From patchwork Fri May 1 12:03:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Biwen Li \(OSS\)" X-Patchwork-Id: 244700 List-Id: U-Boot discussion From: biwen.li at oss.nxp.com (Biwen Li) Date: Fri, 1 May 2020 20:03:57 +0800 Subject: [v3 02/27] rtc: pt7c4338: Add driver model support In-Reply-To: <20200501120422.11747-1-biwen.li@oss.nxp.com> References: <20200501120422.11747-1-biwen.li@oss.nxp.com> Message-ID: <20200501120422.11747-2-biwen.li@oss.nxp.com> From: Biwen Li Add support of driver model of pt7c4338 Signed-off-by: Biwen Li Reviewed-by: Priyanka Jain --- Change in v3: - fix checkpatch warning Change in v2: - none drivers/rtc/pt7c4338.c | 100 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 100 insertions(+) diff --git a/drivers/rtc/pt7c4338.c b/drivers/rtc/pt7c4338.c index 6a19fe1d23..5211d07586 100644 --- a/drivers/rtc/pt7c4338.c +++ b/drivers/rtc/pt7c4338.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2010 Freescale Semiconductor, Inc. + * Copyright 2020 NXP * * Author: Priyanka Jain */ @@ -19,6 +20,7 @@ #include #include +#include #include #include @@ -46,6 +48,7 @@ #define RTC_PT7C4338_RESET_VAL \ (RTC_CTL_STAT_BIT_RS0 | RTC_CTL_STAT_BIT_RS1 | RTC_CTL_STAT_BIT_OUT) +#if !CONFIG_IS_ENABLED(DM_RTC) /****** Helper functions ****************************************/ static u8 rtc_read(u8 reg) { @@ -125,3 +128,100 @@ void rtc_reset(void) rtc_write(RTC_SEC_REG_ADDR, 0x00); /* clearing Clock Halt */ rtc_write(RTC_CTL_STAT_REG_ADDR, RTC_PT7C4338_RESET_VAL); } +#else +static u8 rtc_read(struct udevice *dev, u8 reg) +{ + return dm_i2c_reg_read(dev, reg); +} + +static void rtc_write(struct udevice *dev, u8 reg, u8 val) +{ + dm_i2c_reg_write(dev, reg, val); +} + +static int pt7c4338_rtc_get(struct udevice *dev, struct rtc_time *tmp) +{ + int ret = 0; + u8 sec, min, hour, mday, wday, mon, year, ctl_stat; + + ctl_stat = rtc_read(dev, RTC_CTL_STAT_REG_ADDR); + sec = rtc_read(dev, RTC_SEC_REG_ADDR); + min = rtc_read(dev, RTC_MIN_REG_ADDR); + hour = rtc_read(dev, RTC_HR_REG_ADDR); + wday = rtc_read(dev, RTC_DAY_REG_ADDR); + mday = rtc_read(dev, RTC_DATE_REG_ADDR); + mon = rtc_read(dev, RTC_MON_REG_ADDR); + year = rtc_read(dev, RTC_YR_REG_ADDR); + debug("Get RTC year: %02x mon: %02x mday: %02x wday: %02x\n", + year, mon, mday, wday); + debug("hr: %02x min: %02x sec: %02x control_status: %02x\n", + hour, min, sec, ctl_stat); + + if (ctl_stat & RTC_CTL_STAT_BIT_OSF) { + printf("### Warning: RTC oscillator has stopped\n"); + /* clear the OSF flag */ + rtc_write(dev, RTC_CTL_STAT_REG_ADDR, + rtc_read(dev, + RTC_CTL_STAT_REG_ADDR) + & ~RTC_CTL_STAT_BIT_OSF); + ret = -1; + } + + tmp->tm_sec = bcd2bin(sec & 0x7F); + tmp->tm_min = bcd2bin(min & 0x7F); + tmp->tm_hour = bcd2bin(hour & 0x3F); + tmp->tm_mday = bcd2bin(mday & 0x3F); + tmp->tm_mon = bcd2bin(mon & 0x1F); + tmp->tm_year = bcd2bin(year) + 2000; + tmp->tm_wday = bcd2bin((wday - 1) & 0x07); + tmp->tm_yday = 0; + tmp->tm_isdst = 0; + debug("Get DATE: %4d-%02d-%02d [wday=%d] TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + + return ret; +} + +static int pt7c4338_rtc_set(struct udevice *dev, const struct rtc_time *tmp) +{ + debug("Set DATE: %4d-%02d-%02d [wday=%d] TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + + rtc_write(dev, RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100)); + rtc_write(dev, RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon)); + rtc_write(dev, RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday + 1)); + rtc_write(dev, RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday)); + rtc_write(dev, RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour)); + rtc_write(dev, RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min)); + rtc_write(dev, RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec)); + + return 0; +} + +static int pt7c4338_rtc_reset(struct udevice *dev) +{ + rtc_write(dev, RTC_SEC_REG_ADDR, 0x00); /* clearing Clock Halt */ + rtc_write(dev, RTC_CTL_STAT_REG_ADDR, RTC_PT7C4338_RESET_VAL); + return 0; +} + +static const struct rtc_ops pt7c4338_rtc_ops = { + .get = pt7c4338_rtc_get, + .set = pt7c4338_rtc_set, + .reset = pt7c4338_rtc_reset, +}; + +static const struct udevice_id pt7c4338_rtc_ids[] = { + { .compatible = "pericom,pt7c4338" }, + { } +}; + +U_BOOT_DRIVER(rtc_pt7c4338) = { + .name = "rtc-pt7c4338", + .id = UCLASS_RTC, + .of_match = pt7c4338_rtc_ids, + .ops = &pt7c4338_rtc_ops, +}; +#endif