diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index c2fbc23b11..baa9fa8529 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -589,5 +589,5 @@ struct ccsr_serdes {
 	u8 res5[0x19fc - 0xa00];
 };
 
-#endif /*__ASSEMBLY__*/
+#endif /*__ASSEMBLY__ */
 #endif /* __ARCH_FSL_LSCH3_IMMAP_H_ */
diff --git a/arch/arm/include/asm/arch-mx27/regs-rtc.h b/arch/arm/include/asm/arch-mx27/regs-rtc.h
index d373ab1583..8434f4c1cb 100644
--- a/arch/arm/include/asm/arch-mx27/regs-rtc.h
+++ b/arch/arm/include/asm/arch-mx27/regs-rtc.h
@@ -21,6 +21,6 @@ struct rtc_regs {
 	u32 dayr;
 	u32 dayalarm;
 };
-#endif /* __ASSEMBLY__*/
+#endif /* __ASSEMBLY__ */
 
 #endif	/* __MX28_REGS_RTC_H__ */
diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h
index fbb6e599b6..3d1cc68322 100644
--- a/arch/arm/include/asm/arch-mx5/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
@@ -557,6 +557,6 @@ struct pwm_regs {
 	u32	cnr;
 };
 
-#endif /* __ASSEMBLER__*/
+#endif /* __ASSEMBLY__ */
 
 #endif				/* __ASM_ARCH_MX5_IMX_REGS_H__ */
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 4f01b20aed..5b41a7a4b8 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -1003,5 +1003,5 @@ struct pwm_regs {
  */
 #define	is_boot_from_usb(void) (!(readl(USB_PHY0_BASE_ADDR) & (1<<20)))
 
-#endif /* __ASSEMBLER__*/
+#endif /* __ASSEMBLY__ */
 #endif /* __ASM_ARCH_MX6_IMX_REGS_H__ */
diff --git a/arch/arm/include/asm/arch-mx7/imx-regs.h b/arch/arm/include/asm/arch-mx7/imx-regs.h
index 6336514007..7b23abbc7e 100644
--- a/arch/arm/include/asm/arch-mx7/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx7/imx-regs.h
@@ -1223,5 +1223,5 @@ struct bootrom_sw_info {
 	u32 reserved_3[3];
 };
 
-#endif /* __ASSEMBLER__*/
+#endif /* __ASSEMBLY__ */
 #endif /* __ASM_ARCH_MX7_IMX_REGS_H__ */
diff --git a/arch/arm/include/asm/arch-s32v234/imx-regs.h b/arch/arm/include/asm/arch-s32v234/imx-regs.h
index 9a779cce96..1472a43f1b 100644
--- a/arch/arm/include/asm/arch-s32v234/imx-regs.h
+++ b/arch/arm/include/asm/arch-s32v234/imx-regs.h
@@ -323,6 +323,6 @@ struct mscm_ir {
 	u32 ipcie[4];		/* Interconnect Parity Checking Injection Enable Register       */
 };
 
-#endif /* __ASSEMBLER__ */
+#endif /* __ASSEMBLY__ */
 
 #endif /* __ASM_ARCH_IMX_REGS_H__ */
diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h b/arch/arm/include/asm/arch-vf610/imx-regs.h
index ae0a187c4d..03def8e3c5 100644
--- a/arch/arm/include/asm/arch-vf610/imx-regs.h
+++ b/arch/arm/include/asm/arch-vf610/imx-regs.h
@@ -474,6 +474,6 @@ struct mscm {
 	u32 cpxcfg3;
 };
 
-#endif	/* __ASSEMBLER__*/
+#endif	/* __ASSEMBLY__ */
 
 #endif	/* __ASM_ARCH_IMX_REGS_H__ */
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager.h b/arch/arm/mach-socfpga/include/mach/clock_manager.h
index c6830582a5..1f734bcd65 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager.h
@@ -8,7 +8,7 @@
 
 phys_addr_t socfpga_get_clkmgr_addr(void);
 
-#ifndef __ASSEMBLER__
+#ifndef __ASSEMBLY__
 void cm_wait_for_lock(u32 mask);
 int cm_wait_for_fsm(void);
 void cm_print_clock_quick_summary(void);
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
index 23f280df1b..8d62d75432 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
@@ -6,7 +6,7 @@
 #ifndef CLOCK_MANAGER_ARRIA10
 #define CLOCK_MANAGER_ARRIA10
 
-#ifndef __ASSEMBLER__
+#ifndef __ASSEMBLY__
 
 /* Clock manager group */
 #define CLKMGR_A10_CTRL				0x00
@@ -69,7 +69,7 @@ unsigned long cm_get_mpu_clk_hz(void);
 
 unsigned int cm_get_qspi_controller_clk_hz(void);
 
-#endif /* __ASSEMBLER__ */
+#endif /* __ASSEMBLY__ */
 
 #define LOCKED_MASK	(CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_SET_MSK | \
 			 CLKMGR_CLKMGR_STAT_PERPLLLOCKED_SET_MSK)
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h
index 08655094ca..fc6d230156 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h
@@ -6,7 +6,7 @@
 #ifndef _CLOCK_MANAGER_GEN5_H_
 #define _CLOCK_MANAGER_GEN5_H_
 
-#ifndef __ASSEMBLER__
+#ifndef __ASSEMBLY__
 
 struct cm_config {
 	/* main group */
@@ -107,7 +107,7 @@ const unsigned int cm_get_f2s_sdr_ref_clk_hz(void);
 /* Clock configuration accessors */
 int cm_basic_init(const struct cm_config * const cfg);
 const struct cm_config * const cm_get_default_config(void);
-#endif /* __ASSEMBLER__ */
+#endif /* __ASSEMBLY__ */
 
 #define LOCKED_MASK \
 	(CLKMGR_INTER_SDRPLLLOCKED_MASK  | \
diff --git a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
index 25b82fb285..f2773883fd 100644
--- a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
@@ -205,7 +205,7 @@ struct socfpga_io48_mmr {
 	u32 niosreserve2;
 };
 
-#endif /*__ASSEMBLY__*/
+#endif /*__ASSEMBLY__ */
 
 #define IO48_MMR_CTRLCFG0_DB2_BURST_LENGTH_MASK		0x1F000000
 #define IO48_MMR_CTRLCFG0_DB2_BURST_LENGTH_SHIFT	24
diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h
index 76d593d785..f8ddb1cb57 100644
--- a/arch/arm/mach-stm32mp/include/mach/stm32.h
+++ b/arch/arm/mach-stm32mp/include/mach/stm32.h
@@ -130,5 +130,5 @@ enum forced_boot_mode {
 #define BSEC_OTP_MAC	57
 #define BSEC_OTP_BOARD	59
 
-#endif /* __ASSEMBLY__*/
+#endif /* __ASSEMBLY__ */
 #endif /* _MACH_STM32_H_ */
diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h
index 672617256e..212a699c1b 100644
--- a/arch/x86/include/asm/mtrr.h
+++ b/arch/x86/include/asm/mtrr.h
@@ -57,7 +57,7 @@
 
 #define MTRR_FIX_TYPE(t)	((t << 24) | (t << 16) | (t << 8) | t)
 
-#if !defined(__ASSEMBLER__)
+#if !defined(__ASSEMBLY__)
 
 /**
  * Information about the previous MTRR state, set up by mtrr_open()
diff --git a/arch/x86/include/asm/sipi.h b/arch/x86/include/asm/sipi.h
index 1ab6c2874a..2483422528 100644
--- a/arch/x86/include/asm/sipi.h
+++ b/arch/x86/include/asm/sipi.h
@@ -10,7 +10,7 @@
 #define AP_DEFAULT_BASE 0x30000
 #define AP_DEFAULT_SIZE 0x10000
 
-#ifndef __ASSEMBLER__
+#ifndef __ASSEMBLY__
 
 /**
  * struct sipi_params_16bit - 16-bit SIPI entry-point parameters
@@ -81,6 +81,6 @@ void ap_start(void);
 extern char sipi_params_16bit[];
 extern char sipi_params[];
 
-#endif /* __ASSEMBLER__ */
+#endif /* __ASSEMBLY__ */
 
 #endif
diff --git a/include/atf_common.h b/include/atf_common.h
index 3a7d40e5f0..fd5454c55b 100644
--- a/include/atf_common.h
+++ b/include/atf_common.h
@@ -177,6 +177,6 @@ struct bl2_to_bl31_params_mem {
 	struct entry_point_info bl31_ep_info;
 };
 
-#endif /*__ASSEMBLY__*/
+#endif /*__ASSEMBLY__ */
 
 #endif /* __BL_COMMON_H__ */
diff --git a/include/elf.h b/include/elf.h
index e7c51986df..b04e746d61 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -9,7 +9,7 @@
 #ifndef _ELF_H
 #define _ELF_H
 
-#ifndef __ASSEMBLER__
+#ifndef __ASSEMBLY__
 #include "compiler.h"
 
 /* This version doesn't work for 64-bit ABIs - Erik */
@@ -690,7 +690,7 @@ unsigned long elf_hash(const unsigned char *name);
 #define R_RISCV_64		2
 #define R_RISCV_RELATIVE	3
 
-#ifndef __ASSEMBLER__
+#ifndef __ASSEMBLY__
 int valid_elf_image(unsigned long addr);
 unsigned long load_elf64_image_phdr(unsigned long addr);
 unsigned long load_elf64_image_shdr(unsigned long addr);
