From patchwork Mon Jul 4 12:58:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Garg X-Patchwork-Id: 587135 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:1ec:0:0:0:0 with SMTP id 12csp804325map; Mon, 4 Jul 2022 06:00:15 -0700 (PDT) X-Google-Smtp-Source: AGRyM1sucjO2Yvp19AOV3sNEuLhH7L9babyMqKaaUi1uHLgi9DnR74jV4jXkKkMjX1ImJ/nkrs3q X-Received: by 2002:a05:651c:1246:b0:25a:9a7c:680c with SMTP id h6-20020a05651c124600b0025a9a7c680cmr17229392ljh.79.1656939615135; Mon, 04 Jul 2022 06:00:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1656939615; cv=none; d=google.com; s=arc-20160816; b=aA51stQOZpfZ4G7Nyo82LNb4/v2inOm72ndEN1RPPepaf8fc5sVm8+7JONF8ok/Ak8 vrLSlyeKzUfIPVmfnXsvipyie7Huh9zbDLsMirG2pK4qgfo2oOJ0LqjQxAlcV1BC3jmK l+sIwPUwSnV8EnidB989x31wk4JtdoJojrdnaG2u63Lzs9M14QLa3P8nCtQc8YmkKccg a7uFsXyULTaDWhZk04lYkgeCXMysZA5OsM2tSFnwReYyJl91Jy9OHCLfwnEVPBBh8eba 63a+VXNXVhkTSSRT1a8s09lvFOVsLiaJLOernBdqMHKvVsvHWPMKJjvXs1lVvdUWqN3A EfKQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=PMVLhXBuzk8fEj1RLYQplSRsB4urUW8SCFVD/5OczaQ=; b=BQa2P4S5QM9BDfnwOJWPYGd7qzhHWhq7oRF36EhpPblya3E796NIdLT3fhMvuXZ+L1 58+EAxq3AeIEBeCgEsN2jc3ilb5XDJpJqUp8kznBQlJVJsx2vVZIK1fyPOccTiBI1gKz ApwL4Lw2amj/jWybj5oGiTrLBwJjWTTnKaFiGFFsdhNmEYJCGUX4MoNmbFZ/C0rSgyg1 EG0DP3bUJLlsbW9NAsNlR1hNdBWOYwlcwDRi9cjziP6etnz1ZGL9M+icEk4hMuZN2+Yg vDNgdvciLmDPhO9pMD+q0g4x/W/3JZYtXCfRvmh/OTMZXn0+SPCPaBht+AzZTaUHpvHQ B3Gg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bTXtpbEs; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. [85.214.62.61]) by mx.google.com with ESMTPS id w8-20020a056512098800b00449fff28205si9141221lft.391.2022.07.04.06.00.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Jul 2022 06:00:15 -0700 (PDT) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) client-ip=85.214.62.61; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bTXtpbEs; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 6CB89844F0; Mon, 4 Jul 2022 14:59:34 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="bTXtpbEs"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 69BEB844E1; Mon, 4 Jul 2022 14:59:33 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-pl1-x62c.google.com (mail-pl1-x62c.google.com [IPv6:2607:f8b0:4864:20::62c]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id B263F844D9 for ; Mon, 4 Jul 2022 14:59:30 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sumit.garg@linaro.org Received: by mail-pl1-x62c.google.com with SMTP id 5so2640399plk.9 for ; Mon, 04 Jul 2022 05:59:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PMVLhXBuzk8fEj1RLYQplSRsB4urUW8SCFVD/5OczaQ=; b=bTXtpbEsX2bKoXPdFnNePtX4b5CJ6C8chrMCABFqNWhRKKzQ2kRJhF1Xyhu6eCEyNG m9VMybJBofDO+52i2FjlFCLrbzqU6Fe2SGd2HMF5yDHzJ9p862d9D+R6AbdCtl7lTLU6 WHZJpSFsbRoj1XK56EKYSUcuLUsDt7qo0oOHC6rQLJ0Bie7u+NSaTmL4NgQ3AAdib2pN vxRbuos2nTP3hVej4apJjJqiBfNaEp/RiWsbNE03la1Fe5dGePq8jAfeZ7YpvXof9ox5 G3VweJoZG9wJZbn0b+GBSpakon4RtW/yg7f5rfHyT5TCNY1ESdf+YGW95g+Yih4Yiz87 w/2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PMVLhXBuzk8fEj1RLYQplSRsB4urUW8SCFVD/5OczaQ=; b=LZsON0v4W4Vx0dg8AvB2mFB+6fC6v0VKCAPaRF6i08uws+tJNFih9/JTI+rr1P2X+U qdz+S/NszxJqeDbkYu4hgKW8Y7M3eL34lZ6D09utyYDrqM2duqdZkP3XCsxI3XD5qa+h L4AzdHL7F8NWH5whNiBpcOIhZXH+dI8pYhIPYcuhRuSThvSpjLKTzEtmTpzZoUjzYDyo L2XibZsbP9wBPDk1wPHFF2n1iV4SgzoL8upDGrppQ0/JR3x71UybUVVrtdMi9dEYlSGC 8zpakZVBjyP680pvhpPEl5VUM61tTY+TxewLGgMUylkaUlH5NGdA342osBSDwbpjsbw4 QDjA== X-Gm-Message-State: AJIora99lCMf8Bd/qa5UGmO0a3hD3FFNj6TzqwOoeNtUsBI05Ft4kcN6 S9ZsdL8vZrEJLZTsGJ+SvwXa7HIvnE+r8A== X-Received: by 2002:a17:90a:b398:b0:1ef:7e67:6 with SMTP id e24-20020a17090ab39800b001ef7e670006mr10790114pjr.123.1656939570073; Mon, 04 Jul 2022 05:59:30 -0700 (PDT) Received: from localhost.localdomain ([182.77.21.191]) by smtp.gmail.com with ESMTPSA id x20-20020a170902b41400b001676dac529asm21047544plr.146.2022.07.04.05.59.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Jul 2022 05:59:29 -0700 (PDT) From: Sumit Garg To: u-boot@lists.denx.de Cc: rfried.dev@gmail.com, peng.fan@nxp.com, jh80.chung@samsung.com, sjg@chromium.org, trini@konsulko.com, dsankouski@gmail.com, stephan@gerhold.net, vinod.koul@linaro.org, nicolas.dechesne@linaro.org, mworsfold@impinj.com, daniel.thompson@linaro.org, Sumit Garg Subject: [PATCH 6/8] pinctrl: qcom: Add pinctrl driver for QCS404 SoC Date: Mon, 4 Jul 2022 18:28:43 +0530 Message-Id: <20220704125845.1077037-7-sumit.garg@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220704125845.1077037-1-sumit.garg@linaro.org> References: <20220704125845.1077037-1-sumit.garg@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Currently this pinctrl driver only supports BLSP UART2 specific pin configuration. Signed-off-by: Sumit Garg --- arch/arm/mach-snapdragon/Makefile | 1 + arch/arm/mach-snapdragon/pinctrl-qcs404.c | 55 +++++++++++++++++++ arch/arm/mach-snapdragon/pinctrl-snapdragon.c | 1 + arch/arm/mach-snapdragon/pinctrl-snapdragon.h | 1 + 4 files changed, 58 insertions(+) create mode 100644 arch/arm/mach-snapdragon/pinctrl-qcs404.c diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile index 962855eb8c..cb8c1aa8d2 100644 --- a/arch/arm/mach-snapdragon/Makefile +++ b/arch/arm/mach-snapdragon/Makefile @@ -15,4 +15,5 @@ obj-y += dram.o obj-y += pinctrl-snapdragon.o obj-y += pinctrl-apq8016.o obj-y += pinctrl-apq8096.o +obj-y += pinctrl-qcs404.o obj-$(CONFIG_SDM845) += pinctrl-sdm845.o diff --git a/arch/arm/mach-snapdragon/pinctrl-qcs404.c b/arch/arm/mach-snapdragon/pinctrl-qcs404.c new file mode 100644 index 0000000000..889ead0f57 --- /dev/null +++ b/arch/arm/mach-snapdragon/pinctrl-qcs404.c @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm QCS404 pinctrl + * + * (C) Copyright 2022 Sumit Garg + */ + +#include "pinctrl-snapdragon.h" +#include + +#define MAX_PIN_NAME_LEN 32 +static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); +static const char * const msm_pinctrl_pins[] = { + "SDC1_RCLK", + "SDC1_CLK", + "SDC1_CMD", + "SDC1_DATA", + "SDC2_CLK", + "SDC2_CMD", + "SDC2_DATA", +}; + +static const struct pinctrl_function msm_pinctrl_functions[] = { + {"blsp_uart2", 1}, +}; + +static const char *qcs404_get_function_name(struct udevice *dev, + unsigned int selector) +{ + return msm_pinctrl_functions[selector].name; +} + +static const char *qcs404_get_pin_name(struct udevice *dev, + unsigned int selector) +{ + if (selector < 120) { + snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector); + return pin_name; + } else { + return msm_pinctrl_pins[selector - 120]; + } +} + +static unsigned int qcs404_get_function_mux(unsigned int selector) +{ + return msm_pinctrl_functions[selector].val; +} + +struct msm_pinctrl_data qcs404_data = { + .pin_count = 126, + .functions_count = ARRAY_SIZE(msm_pinctrl_functions), + .get_function_name = qcs404_get_function_name, + .get_function_mux = qcs404_get_function_mux, + .get_pin_name = qcs404_get_pin_name, +}; diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c index d1c560dd40..c2148a5d0a 100644 --- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c +++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c @@ -119,6 +119,7 @@ static const struct udevice_id msm_pinctrl_ids[] = { #ifdef CONFIG_SDM845 { .compatible = "qcom,tlmm-sdm845", .data = (ulong)&sdm845_data }, #endif + { .compatible = "qcom,tlmm-qcs404", .data = (ulong)&qcs404_data }, { } }; diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.h b/arch/arm/mach-snapdragon/pinctrl-snapdragon.h index ea524312a0..178ee01a41 100644 --- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.h +++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.h @@ -28,5 +28,6 @@ struct pinctrl_function { extern struct msm_pinctrl_data apq8016_data; extern struct msm_pinctrl_data apq8096_data; extern struct msm_pinctrl_data sdm845_data; +extern struct msm_pinctrl_data qcs404_data; #endif