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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id 14-20020aca210e000000b00359ba124b07sm4561361oiz.36.2022.12.06.08.16.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Dec 2022 08:16:37 -0800 (PST) Received: (nullmailer pid 581648 invoked by uid 1000); Tue, 06 Dec 2022 16:16:32 -0000 From: Rob Herring Date: Tue, 06 Dec 2022 10:16:31 -0600 Subject: [PATCH 3/4] dts: synquacer: Fix "arm, armv7-timer-mem" node address sizes MIME-Version: 1.0 Message-Id: <20221206-synquacer-dts-v1-3-73eb52e391e9@kernel.org> References: <20221206-synquacer-dts-v1-0-73eb52e391e9@kernel.org> In-Reply-To: <20221206-synquacer-dts-v1-0-73eb52e391e9@kernel.org> To: Masahisa Kojima , Tom Rini , Ilias Apalodimas Cc: u-boot@lists.denx.de X-Mailer: b4 0.11.0-dev X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean The "arm,armv7-timer-mem" schema defines the address sizes for child nodes to be 32-bit as there's no need for 64-bit offsets and sizes of the child 'frame' nodes. Signed-off-by: Rob Herring --- arch/arm/dts/synquacer-sc2a11.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/dts/synquacer-sc2a11.dtsi b/arch/arm/dts/synquacer-sc2a11.dtsi index 0e1bc164549f..049afcb0af8a 100644 --- a/arch/arm/dts/synquacer-sc2a11.dtsi +++ b/arch/arm/dts/synquacer-sc2a11.dtsi @@ -364,13 +364,13 @@ timer@2a810000 { compatible = "arm,armv7-timer-mem"; reg = <0x0 0x2a810000 0x0 0x10000>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - frame@2a830000 { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x2a810000 0x30000>; + frame@20000 { frame-number = <0>; interrupts = ; - reg = <0x0 0x2a830000 0x0 0x10000>; + reg = <0x20000 0x10000>; }; };