From patchwork Tue Mar 21 21:13:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 665557 Delivered-To: patch@linaro.org Received: by 2002:a5d:5602:0:0:0:0:0 with SMTP id l2csp1855407wrv; Tue, 21 Mar 2023 14:13:56 -0700 (PDT) X-Google-Smtp-Source: AK7set+ut2rWSjtXdoS0conbuTe79OItdPE9i2SWxW/Eh3eX3vs8cz/ndgeR/yUIfSSolKi2tRgX X-Received: by 2002:a05:622a:1653:b0:3e2:60d6:423b with SMTP id y19-20020a05622a165300b003e260d6423bmr6406qtj.4.1679433235993; Tue, 21 Mar 2023 14:13:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679433235; cv=none; d=google.com; s=arc-20160816; b=uL5bPrZmBmxAR6DK52MgrB3uWZ7z1W7UwlcjUMtgALyTQ6NE+OD1GzyhSP+es8PDjR r7ohvkSFSGQaEG8GqA0JU5bDEjw5CcAIJmyCMsacVXw7BlSsYaMchnfPK8fZ60uWogm9 fppG8khGghlANmic06+xLDWj/UKArmI0znHM5zB11ooVTatGGunlSsDuH5BMpA6/aLd3 wS2dF3EB3xH2LUX+0sCdFwFb+GKGyWhSZS8/yaWhZm+7QiOrg7uUfvhGWW9SAXXR1cYA /ilLbRKFHi84NLg00yGWC6x6fvuqQLeIacWKkOmWBNgiu9ZAlirqMdhc7wubaXyKHvCv OgeQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=xJvPXmRUwtEbxS7++p+3TZ3oFTu4EGSO5tiOpACwWMQ=; b=YRbu+Xoe/YBbtA8HflWvwaUs+RXQAEro6dfBSwxp4ifYNXj8/cDUNkBf1/v8LX96Sy dgVsJ/PTSiBAA4wHlQMC8qk+EbuWRyMySuzHD0y+fdNHvi4Dejf9dGCTKZYZ6RtoKfVG ufp5atNVnEW/VGk+0kSm3xY2fYk+xJSWp5gihfoeB0w/L4kkv5+GHDwqkhtBtJbK1Zuz O/FoVHI/h7caPpnH9AKCRj7SbgkS1lxckqg3CEDt89q7nsOijWEGAYEYQYbKuN2VYZO2 LPcuKPiCkM571oXhPQc7oqcbD6ay3yDFcY/cqaFUN3T0U482dwW6J81QaottB1mNGViJ 75Ag== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hwJ3zbJP; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. [2a01:238:438b:c500:173d:9f52:ddab:ee01]) by mx.google.com with ESMTPS id e5-20020a05622a110500b003bfef95515asi9558650qty.43.2023.03.21.14.13.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Mar 2023 14:13:55 -0700 (PDT) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hwJ3zbJP; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 38E6885CAD; Tue, 21 Mar 2023 22:13:41 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="hwJ3zbJP"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 6C56C85C6D; Tue, 21 Mar 2023 22:13:26 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-lj1-x22b.google.com (mail-lj1-x22b.google.com [IPv6:2a00:1450:4864:20::22b]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 221CD85C98 for ; Tue, 21 Mar 2023 22:13:20 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=linus.walleij@linaro.org Received: by mail-lj1-x22b.google.com with SMTP id q14so2563567ljm.11 for ; Tue, 21 Mar 2023 14:13:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679433199; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xJvPXmRUwtEbxS7++p+3TZ3oFTu4EGSO5tiOpACwWMQ=; b=hwJ3zbJPD48IfspYdzw9BRZST7414+6mZkHy23PZuGdfbuesjRGhettLqAM1h+iMGO pHhYQgNzG3pWNwViADaWw9bkH0LtFk4gdbNx99mplfTkhKHSpXntXiBRdfP9hhwiBbGT BN2vZtC/xwojS4CqZbk+bU5cTpP9eRoYEUXeR82iELYf46LegtZxgaqQOmCJ7fyYtRcf wFtUP+PwaO3mcKV8z0j06CJ1kn2zURvb6hWJbheG0AyxGNG5pcCHJPicMLMjZF2xJvk2 G5nWVhhTyNHZmNGr5GCnwl03VM1OO+gWkhptpszWO0QNFnq7X5ogFM0u1qMk/O0AX/tZ UWnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679433199; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xJvPXmRUwtEbxS7++p+3TZ3oFTu4EGSO5tiOpACwWMQ=; b=zprxn+WqQ1Gt3zFJPPiZYmq2QtI9vBvANrOfZF1uKIF3b2gjrTrlk03A1zptDqluKk VNpZL1Z3H72wpQjiYjftdYn3Fh3xcLAcwdrpBTMdOEaasdfnCArRq97pgyme4bCo34AK Enp3fNSHwph6r7v0/LWi/FrPBbbmcXkZwNtD0Zf/+ow4/3mpmhrLkyFPsDrAzxLkvPTH waNjNJs2vUjrIjpS2RYIAeYpwY8eDKEvnT0wkeLyYBUM00OlWEfO8qQU9gQd0FNlWjax K8h4yKsZxYgog41BhZtKvcRDdHZnmRWVsO3y3DCWyc4zfsSP6RBH9QWMuOuHM7o2ssJ6 S6sQ== X-Gm-Message-State: AO0yUKU/KyFyT5pqWbZwhj19nxNKg1N6D/L0Gwj00UpJm2QeUykIzCsc 3x+mt8LtpiEVSi1k6v4icfTlYBmugP2nizDnwJE= X-Received: by 2002:a2e:8457:0:b0:29a:2b6c:2fb1 with SMTP id u23-20020a2e8457000000b0029a2b6c2fb1mr1366970ljh.39.1679433199190; Tue, 21 Mar 2023 14:13:19 -0700 (PDT) Received: from Fecusia.lan (c-05d8225c.014-348-6c756e10.bbcust.telenor.se. [92.34.216.5]) by smtp.gmail.com with ESMTPSA id p15-20020a2ea40f000000b00295a8d1ecc7sm2406630ljn.18.2023.03.21.14.13.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Mar 2023 14:13:18 -0700 (PDT) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini , Michael Nazzareno Trimarchi , William Zhang Cc: Anand Gore , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , Linus Walleij , Dario Binacchi Subject: [PATCH v3 1/5] nand: brcmnand: add iproc support Date: Tue, 21 Mar 2023 22:13:08 +0100 Message-Id: <20230321211312.503812-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230321211312.503812-1-linus.walleij@linaro.org> References: <20230321211312.503812-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add support for the iproc Broadcom NAND controller, used in Northstar SoCs for example. Based on the Linux driver. Cc: Philippe Reynes Cc: Dario Binacchi Acked-by: William Zhang Reviewed-by: Michael Trimarchi Signed-off-by: Linus Walleij --- ChangeLog v2->v3: - Collect William Zhang's ACK - Bundle with NorthStar enablement patches. ChangeLog v1->v2: - Check return value of dev_read_resource() - Use devm_ioremap() - Collect Michael's Review tag --- drivers/mtd/nand/raw/Kconfig | 7 + drivers/mtd/nand/raw/brcmnand/Makefile | 1 + drivers/mtd/nand/raw/brcmnand/iproc_nand.c | 148 +++++++++++++++++++++ 3 files changed, 156 insertions(+) create mode 100644 drivers/mtd/nand/raw/brcmnand/iproc_nand.c diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 5b35da45f584..6a13bc1e228a 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -156,6 +156,13 @@ config NAND_BRCMNAND_63158 help Enable support for broadcom nand driver on bcm63158. +config NAND_BRCMNAND_IPROC + bool "Support Broadcom NAND controller on the iproc family" + depends on NAND_BRCMNAND + help + Enable support for broadcom nand driver on the Broadcom + iproc family such as Northstar (BCM5301x, BCM4708...) + config NAND_DAVINCI bool "Support TI Davinci NAND controller" select SYS_NAND_SELF_INIT if TARGET_DA850EVM diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile index f46a7edae321..0c6325aaa618 100644 --- a/drivers/mtd/nand/raw/brcmnand/Makefile +++ b/drivers/mtd/nand/raw/brcmnand/Makefile @@ -6,5 +6,6 @@ obj-$(CONFIG_NAND_BRCMNAND_6753) += bcm6753_nand.o obj-$(CONFIG_NAND_BRCMNAND_68360) += bcm68360_nand.o obj-$(CONFIG_NAND_BRCMNAND_6838) += bcm6838_nand.o obj-$(CONFIG_NAND_BRCMNAND_6858) += bcm6858_nand.o +obj-$(CONFIG_NAND_BRCMNAND_IPROC) += iproc_nand.o obj-$(CONFIG_NAND_BRCMNAND) += brcmnand.o obj-$(CONFIG_NAND_BRCMNAND) += brcmnand_compat.o diff --git a/drivers/mtd/nand/raw/brcmnand/iproc_nand.c b/drivers/mtd/nand/raw/brcmnand/iproc_nand.c new file mode 100644 index 000000000000..69711d98ce1b --- /dev/null +++ b/drivers/mtd/nand/raw/brcmnand/iproc_nand.c @@ -0,0 +1,148 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Code borrowed from the Linux driver + * Copyright (C) 2015 Broadcom Corporation + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "brcmnand.h" + +struct iproc_nand_soc { + struct brcmnand_soc soc; + void __iomem *idm_base; + void __iomem *ext_base; +}; + +#define IPROC_NAND_CTLR_READY_OFFSET 0x10 +#define IPROC_NAND_CTLR_READY BIT(0) + +#define IPROC_NAND_IO_CTRL_OFFSET 0x00 +#define IPROC_NAND_APB_LE_MODE BIT(24) +#define IPROC_NAND_INT_CTRL_READ_ENABLE BIT(6) + +static bool iproc_nand_intc_ack(struct brcmnand_soc *soc) +{ + struct iproc_nand_soc *priv = + container_of(soc, struct iproc_nand_soc, soc); + void __iomem *mmio = priv->ext_base + IPROC_NAND_CTLR_READY_OFFSET; + u32 val = brcmnand_readl(mmio); + + if (val & IPROC_NAND_CTLR_READY) { + brcmnand_writel(IPROC_NAND_CTLR_READY, mmio); + return true; + } + + return false; +} + +static void iproc_nand_intc_set(struct brcmnand_soc *soc, bool en) +{ + struct iproc_nand_soc *priv = + container_of(soc, struct iproc_nand_soc, soc); + void __iomem *mmio = priv->idm_base + IPROC_NAND_IO_CTRL_OFFSET; + u32 val = brcmnand_readl(mmio); + + if (en) + val |= IPROC_NAND_INT_CTRL_READ_ENABLE; + else + val &= ~IPROC_NAND_INT_CTRL_READ_ENABLE; + + brcmnand_writel(val, mmio); +} + +static void iproc_nand_apb_access(struct brcmnand_soc *soc, bool prepare, + bool is_param) +{ + struct iproc_nand_soc *priv = + container_of(soc, struct iproc_nand_soc, soc); + void __iomem *mmio = priv->idm_base + IPROC_NAND_IO_CTRL_OFFSET; + u32 val; + + val = brcmnand_readl(mmio); + + /* + * In the case of BE or when dealing with NAND data, always configure + * the APB bus to LE mode before accessing the FIFO and back to BE mode + * after the access is done + */ + if (IS_ENABLED(CONFIG_SYS_BIG_ENDIAN) || !is_param) { + if (prepare) + val |= IPROC_NAND_APB_LE_MODE; + else + val &= ~IPROC_NAND_APB_LE_MODE; + } else { /* when in LE accessing the parameter page, keep APB in BE */ + val &= ~IPROC_NAND_APB_LE_MODE; + } + + brcmnand_writel(val, mmio); +} + +static int iproc_nand_probe(struct udevice *dev) +{ + struct udevice *pdev = dev; + struct iproc_nand_soc *priv = dev_get_priv(dev); + struct brcmnand_soc *soc; + struct resource res; + int ret; + + soc = &priv->soc; + + ret = dev_read_resource_byname(pdev, "iproc-idm", &res); + if (ret) + return ret; + + priv->idm_base = devm_ioremap(dev, res.start, resource_size(&res)); + if (IS_ERR(priv->idm_base)) + return PTR_ERR(priv->idm_base); + + ret = dev_read_resource_byname(pdev, "iproc-ext", &res); + if (ret) + return ret; + + priv->ext_base = devm_ioremap(dev, res.start, resource_size(&res)); + if (IS_ERR(priv->ext_base)) + return PTR_ERR(priv->ext_base); + + soc->ctlrdy_ack = iproc_nand_intc_ack; + soc->ctlrdy_set_enabled = iproc_nand_intc_set; + soc->prepare_data_bus = iproc_nand_apb_access; + + return brcmnand_probe(pdev, soc); +} + +static const struct udevice_id iproc_nand_dt_ids[] = { + { + .compatible = "brcm,nand-iproc", + }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(iproc_nand) = { + .name = "iproc-nand", + .id = UCLASS_MTD, + .of_match = iproc_nand_dt_ids, + .probe = iproc_nand_probe, + .priv_auto = sizeof(struct iproc_nand_soc), +}; + +void board_nand_init(void) +{ + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MTD, + DM_DRIVER_GET(iproc_nand), &dev); + if (ret && ret != -ENODEV) + pr_err("Failed to initialize %s. (error %d)\n", dev->name, + ret); +}