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Signed-off-by: Caleb Connolly Reviewed-by: Neil Armstrong --- drivers/gpio/Kconfig | 3 +- drivers/gpio/qcom_pmic_gpio.c | 104 ------------------------------------------ 2 files changed, 2 insertions(+), 105 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index ba42b0768e12..fbf77673c5e0 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -309,12 +309,13 @@ config CMD_PCA953X config QCOM_PMIC_GPIO bool "Qualcomm generic PMIC GPIO/keypad driver" depends on DM_GPIO && PMIC_QCOM + select BUTTON help Support for GPIO pins and power/reset buttons found on Qualcomm SoCs PMIC. Default name for GPIO bank is "pm8916". Power and reset buttons are placed in "pwkey_qcom" bank and - have gpio numbers 0 and 1 respectively. + have gpio numbers 0 and 1 respectively. config PCF8575_GPIO bool "PCF8575 I2C GPIO Expander driver" diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c index e5841f502953..7b83c67fa464 100644 --- a/drivers/gpio/qcom_pmic_gpio.c +++ b/drivers/gpio/qcom_pmic_gpio.c @@ -275,107 +275,3 @@ U_BOOT_DRIVER(qcom_pmic_gpio) = { .priv_auto = sizeof(struct qcom_gpio_bank), }; - -/* Add pmic buttons as GPIO as well - there is no generic way for now */ -#define PON_INT_RT_STS 0x10 -#define KPDPWR_ON_INT_BIT 0 -#define RESIN_ON_INT_BIT 1 - -static int qcom_pwrkey_get_function(struct udevice *dev, unsigned offset) -{ - return GPIOF_INPUT; -} - -static int qcom_pwrkey_get_value(struct udevice *dev, unsigned offset) -{ - struct qcom_gpio_bank *priv = dev_get_priv(dev); - - int reg = pmic_reg_read(dev->parent, priv->pid + PON_INT_RT_STS); - - if (reg < 0) - return 0; - - switch (offset) { - case 0: /* Power button */ - return (reg & BIT(KPDPWR_ON_INT_BIT)) != 0; - break; - case 1: /* Reset button */ - default: - return (reg & BIT(RESIN_ON_INT_BIT)) != 0; - break; - } -} - -/* - * Since pmic buttons modelled as GPIO, we need empty direction functions - * to trick u-boot button driver - */ -static int qcom_pwrkey_direction_input(struct udevice *dev, unsigned int offset) -{ - return 0; -} - -static int qcom_pwrkey_direction_output(struct udevice *dev, unsigned int offset, int value) -{ - return -EOPNOTSUPP; -} - -static const struct dm_gpio_ops qcom_pwrkey_ops = { - .get_value = qcom_pwrkey_get_value, - .get_function = qcom_pwrkey_get_function, - .direction_input = qcom_pwrkey_direction_input, - .direction_output = qcom_pwrkey_direction_output, -}; - -static int qcom_pwrkey_probe(struct udevice *dev) -{ - struct qcom_gpio_bank *priv = dev_get_priv(dev); - int reg; - u64 pid; - - pid = dev_read_addr(dev); - if (pid == FDT_ADDR_T_NONE) - return log_msg_ret("bad address", -EINVAL); - - priv->pid = pid; - - /* Do a sanity check */ - reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE); - if (reg != 0x1) - return log_msg_ret("bad type", -ENXIO); - - reg = pmic_reg_read(dev->parent, priv->pid + REG_SUBTYPE); - if ((reg & 0x5) == 0) - return log_msg_ret("bad subtype", -ENXIO); - - return 0; -} - -static int qcom_pwrkey_of_to_plat(struct udevice *dev) -{ - struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); - - uc_priv->gpio_count = 2; - uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name"); - if (uc_priv->bank_name == NULL) - uc_priv->bank_name = "pwkey_qcom"; - - return 0; -} - -static const struct udevice_id qcom_pwrkey_ids[] = { - { .compatible = "qcom,pm8916-pwrkey" }, - { .compatible = "qcom,pm8994-pwrkey" }, - { .compatible = "qcom,pm8998-pwrkey" }, - { } -}; - -U_BOOT_DRIVER(pwrkey_qcom) = { - .name = "pwrkey_qcom", - .id = UCLASS_GPIO, - .of_match = qcom_pwrkey_ids, - .of_to_plat = qcom_pwrkey_of_to_plat, - .probe = qcom_pwrkey_probe, - .ops = &qcom_pwrkey_ops, - .priv_auto = sizeof(struct qcom_gpio_bank), -};