From patchwork Tue Dec 5 13:46:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caleb Connolly X-Patchwork-Id: 750379 Delivered-To: patch@linaro.org Received: by 2002:adf:9b9d:0:b0:333:3a04:f257 with SMTP id d29csp1678515wrc; Tue, 5 Dec 2023 05:47:23 -0800 (PST) X-Google-Smtp-Source: AGHT+IFuvI8awmeerSNNWj+kMicP4KzPxPJmjuMcONanUllMofwndAAVZ6ZYGH0UxPPS8Q3sTTxB X-Received: by 2002:a5d:51c2:0:b0:332:e667:4277 with SMTP id n2-20020a5d51c2000000b00332e6674277mr4737582wrv.40.1701784043773; Tue, 05 Dec 2023 05:47:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1701784043; cv=none; d=google.com; s=arc-20160816; b=Gj0B6yeRFWRLWTTR5S1iI79isJcjWV/5PNdD6maSIgmcXFzX8m2N+Ok+kgMIH/kvuA UorUQXoL8eAHSOWbAdo6vT2eeYqN7nozYpYMTELtW4If3S0TwAGBsQbf4brQBnKNGqgS OlLPsb2vO0svKuevdpHfOcuddUjDPeOI17ZRr6+iPIXufE4J5eYIESZEqdJZxxfQcIVF gIX8+C++xHbf1NZFbqxob68UdR50VMtOYK3Ch7+KUur7+TnwLo1AHZ0nQjnZhRMTHdje NwBLzo0G1xaPDmYteWxk7Jb1EhvMqa2Diw8Xh5f09JLURLkqphvJespLGj8kuLRgibzF rA2w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=9iWXp1j6Zn5yn85tl3X1/LhNwDy3tZsfmK4PgeIrUo8=; fh=57wjcTC2B872pbvvKlxFgwzI1s9QKuSBoEg/SeZNaxI=; b=GKFt9fhm8+e/pLqD9kL0hDghBVupHnfYYW6YevOt5+q3YtelzdoEIArPOv4H1pbMzo KiUUr1QKzWWx3S5addFn+MaGlAb90agzDX/7/QLfbinL0v0rS2TIlZClEUwrUZGx1gY2 Sf3bwi/TZguKo4/kkdUfllmz7bEMp7Ji9KcQs8/k7N7NJMIwTLfKI4WcZ9wUF45Xf0cD yg6gjD5N5wbTG8At2LuZ6CyP1cIpvEClhGPu6qUC5Qq0yqv9P1VNKkmMQ1R2P1NfABJ5 jlH+ODxMGBX2OLkxFN9Br0ygFoaHrACPUCsr5OsX3wq9fkVdBlsCv3pNVe0XNZIPiPcI aw5w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gpX9I38C; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. [85.214.62.61]) by mx.google.com with ESMTPS id q7-20020adfab07000000b003333f9629ffsi3175015wrc.656.2023.12.05.05.47.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Dec 2023 05:47:23 -0800 (PST) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) client-ip=85.214.62.61; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gpX9I38C; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3B7C187860; Tue, 5 Dec 2023 14:47:03 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="gpX9I38C"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 24FCB8782F; Tue, 5 Dec 2023 14:47:02 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-lj1-x236.google.com (mail-lj1-x236.google.com [IPv6:2a00:1450:4864:20::236]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0B00587447 for ; Tue, 5 Dec 2023 14:47:00 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=caleb.connolly@linaro.org Received: by mail-lj1-x236.google.com with SMTP id 38308e7fff4ca-2ca09601127so24566941fa.1 for ; Tue, 05 Dec 2023 05:47:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1701784019; x=1702388819; darn=lists.denx.de; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=9iWXp1j6Zn5yn85tl3X1/LhNwDy3tZsfmK4PgeIrUo8=; b=gpX9I38CtK74GzdeKbmolXdHAmSTcTr52UffowgY9Dy0NxRjw00wup7We7/vKUChm1 gVF4EFPxRZ34fO2hyKjWLzUdukDMLJNCZXWBGQRC3nr2jSVvyptHvDcMdRz517pQJ7i6 38VodtavrEFK1/0AY5U+kRZXhKsEyHwVjZJHmeRHAZrFvP6MZZMk8YoHN5FhZgj/1LCr aHZy/yHRbtb59n8fin4cwP3Z6i4s5jxBKKA/8bFDNCYnzLZ2jRaa+HzQtt5A2yp6EA6I rGeTqLWC9M+Fh66V9ngASJ1z6V1HxkO4qePOrxVxGbno3YP1Mwg71ofZcZpA3vYg6MxY 0oWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701784019; x=1702388819; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9iWXp1j6Zn5yn85tl3X1/LhNwDy3tZsfmK4PgeIrUo8=; b=lJOFKLWWUmS8CnoboDOsONirMA4dN7/5O5NXyrkREjSftRpbbn3A9UdhWNS2o6yZuk gDLT3s0poziEPMx3fzJfymQGurpJSb6CTzDI1qFU2bC7UPK2pdhlWgiW1MHv3SymMFlT GQU+JBrZUd/DqcB/olNJkMitZldTtyTXy5McdKvCdHVkEXVEG9G4W1caaXecLgbZWavw VAewM4T8YqTQruGx02lf7IJQYLvtl7Cc2ASeqhnhqaOESwwem5w1KDqV2z8zI8bHBiCR mRaprov3u/CnuF8HFz9USOIrxrPm2x3OKyk7gE/H3I2y3hdR9w1ss3rk26p1Wqtt4Oos EFdQ== X-Gm-Message-State: AOJu0YwpdGT7qTJMiJb1JLq/y0yLHmUufSl/Iw2hhB56wvriKq/KiDcO xD2hxTAG967QtrK5WDIbC2zE7w== X-Received: by 2002:a2e:9803:0:b0:2ca:c96:f4b with SMTP id a3-20020a2e9803000000b002ca0c960f4bmr1242301ljj.51.1701784019389; Tue, 05 Dec 2023 05:46:59 -0800 (PST) Received: from lion.localdomain ([79.79.179.141]) by smtp.gmail.com with ESMTPSA id d10-20020a2e928a000000b002ca0e0c837asm369688ljh.100.2023.12.05.05.46.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Dec 2023 05:46:58 -0800 (PST) From: Caleb Connolly Date: Tue, 05 Dec 2023 13:46:47 +0000 Subject: [PATCH v6 2/9] button: qcom-pmic: introduce Qualcomm PMIC button driver MIME-Version: 1.0 Message-Id: <20231205-b4-qcom-dt-compat-v6-2-61d104a8f920@linaro.org> References: <20231205-b4-qcom-dt-compat-v6-0-61d104a8f920@linaro.org> In-Reply-To: <20231205-b4-qcom-dt-compat-v6-0-61d104a8f920@linaro.org> To: Ramon Fried , Jorge Ramirez-Ortiz , Neil Armstrong , Sumit Garg , Mateusz Kulikowski , Jaehoon Chung , Dzmitry Sankouski , Stephan Gerhold , Caleb Connolly Cc: u-boot@lists.denx.de X-Mailer: b4 0.13-dev-4bd13 X-Developer-Signature: v=1; a=openpgp-sha256; l=6731; i=caleb.connolly@linaro.org; h=from:subject:message-id; bh=XC2aVmHfeLDBs5m9O4Y8n3fofD3xhmDRMJW4d1VDMUk=; b=owGbwMvMwCFYaeA6f6eBkTjjabUkhtR8zbNzHol9uXzn8o5PoRc/va97bPjxft6sc79eupiHR fxfyaba3lHKwiDIwSArpsgifmKZZdPay/Ya2xdcgJnDygQyhIGLUwAmInad4X+adM8f1/oHt48c Xrvm+PlWh8IfySeSVvBtPhLxpljVh4ufkWEymx6L7Nuoqc+VVp44XyY0226FGe//U5z7yi54XFH by+0BAA== X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Qualcomm PMICs include a "pon" function which handles two buttons, the power button and "resin" button (usually volume down). Introduce a new driver following upstream Linux DT to enable these and map them to Enter and Down respectively to enable use in boot menus. Reviewed-by: Neil Armstrong Reviewed-by: Sumit Garg Tested-by: Sumit Garg Signed-off-by: Caleb Connolly Reviewed-by: Simon Glass --- MAINTAINERS | 1 + drivers/button/Kconfig | 9 +++ drivers/button/Makefile | 1 + drivers/button/button-qcom-pmic.c | 165 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 176 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index f6d63c8ab563..8cd102eaa070 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -572,6 +572,7 @@ M: Neil Armstrong R: Sumit Garg S: Maintained F: arch/arm/mach-snapdragon/ +F: drivers/button/button-qcom-pmic.c F: drivers/clk/qcom/ F: drivers/gpio/msm_gpio.c F: drivers/mmc/msm_sdhci.c diff --git a/drivers/button/Kconfig b/drivers/button/Kconfig index 8ce2de37d62a..097b05f822e7 100644 --- a/drivers/button/Kconfig +++ b/drivers/button/Kconfig @@ -27,4 +27,13 @@ config BUTTON_GPIO The GPIO driver must used driver model. Buttons are configured using the device tree. +config BUTTON_QCOM_PMIC + bool "Qualcomm power button" + depends on BUTTON + depends on PMIC_QCOM + help + Enable support for the power and "resin" (usually volume down) buttons + on Qualcomm SoCs. These will be configured as the Enter and Down keys + respectively, allowing navigation of bootmenu with buttons on device. + endmenu diff --git a/drivers/button/Makefile b/drivers/button/Makefile index bbd18af14940..68555081a47a 100644 --- a/drivers/button/Makefile +++ b/drivers/button/Makefile @@ -5,3 +5,4 @@ obj-$(CONFIG_BUTTON) += button-uclass.o obj-$(CONFIG_BUTTON_ADC) += button-adc.o obj-$(CONFIG_BUTTON_GPIO) += button-gpio.o +obj-$(CONFIG_BUTTON_QCOM_PMIC) += button-qcom-pmic.o \ No newline at end of file diff --git a/drivers/button/button-qcom-pmic.c b/drivers/button/button-qcom-pmic.c new file mode 100644 index 000000000000..34a976d1e6c6 --- /dev/null +++ b/drivers/button/button-qcom-pmic.c @@ -0,0 +1,165 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm generic pmic gpio driver + * + * (C) Copyright 2015 Mateusz Kulikowski + * (C) Copyright 2023 Linaro Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define REG_TYPE 0x4 +#define REG_SUBTYPE 0x5 + +struct qcom_pmic_btn_priv { + u32 base; + u32 status_bit; + int code; + struct udevice *pmic; +}; + +#define PON_INT_RT_STS 0x10 +#define KPDPWR_ON_INT_BIT 0 +#define RESIN_ON_INT_BIT 1 + +#define NODE_IS_PWRKEY(node) (!strncmp(ofnode_get_name(node), "pwrkey", strlen("pwrkey"))) +#define NODE_IS_RESIN(node) (!strncmp(ofnode_get_name(node), "resin", strlen("resin"))) + +static enum button_state_t qcom_pwrkey_get_state(struct udevice *dev) +{ + struct qcom_pmic_btn_priv *priv = dev_get_priv(dev); + + int reg = pmic_reg_read(priv->pmic, priv->base + PON_INT_RT_STS); + + if (reg < 0) + return 0; + + return (reg & BIT(priv->status_bit)) != 0; +} + +static int qcom_pwrkey_get_code(struct udevice *dev) +{ + struct qcom_pmic_btn_priv *priv = dev_get_priv(dev); + + return priv->code; +} + +static int qcom_pwrkey_probe(struct udevice *dev) +{ + struct button_uc_plat *uc_plat = dev_get_uclass_plat(dev); + struct qcom_pmic_btn_priv *priv = dev_get_priv(dev); + ofnode node = dev_ofnode(dev); + int ret; + u64 base; + + /* Ignore the top-level pon node */ + if (!uc_plat->label) + return 0; + + /* the pwrkey and resin nodes are children of the "pon" node, get the + * PMIC device to use in pmic_reg_* calls. + */ + priv->pmic = dev->parent->parent; + + /* Get the address of the parent pon node */ + base = dev_read_addr(dev->parent); + if (base == FDT_ADDR_T_NONE) { + printf("%s: Can't find address\n", dev->name); + return -EINVAL; + } + + priv->base = base; + + /* Do a sanity check */ + ret = pmic_reg_read(priv->pmic, priv->base + REG_TYPE); + if (ret != 0x1 && ret != 0xb) { + printf("%s: unexpected PMIC function type %d\n", dev->name, ret); + return -ENXIO; + } + + ret = pmic_reg_read(priv->pmic, priv->base + REG_SUBTYPE); + if ((ret & 0x7) == 0) { + printf("%s: unexpected PMCI function subtype %d\n", dev->name, ret); + return -ENXIO; + } + + if (NODE_IS_PWRKEY(node)) { + priv->status_bit = 0; + priv->code = KEY_ENTER; + } else if (NODE_IS_RESIN(node)) { + priv->status_bit = 1; + priv->code = KEY_DOWN; + } else { + /* Should not get here! */ + printf("Invalid pon node '%s' should be 'pwrkey' or 'resin'\n", + ofnode_get_name(node)); + return -EINVAL; + } + + return 0; +} + +static int button_qcom_pmic_bind(struct udevice *parent) +{ + struct udevice *dev; + ofnode node; + int ret; + + dev_for_each_subnode(node, parent) { + struct button_uc_plat *uc_plat; + const char *label; + + if (!ofnode_is_enabled(node)) + continue; + + ret = device_bind_driver_to_node(parent, "qcom_pwrkey", + ofnode_get_name(node), + node, &dev); + if (ret) { + printf("Failed to bind %s! %d\n", label, ret); + return ret; + } + uc_plat = dev_get_uclass_plat(dev); + if (NODE_IS_PWRKEY(node)) { + uc_plat->label = "pwrkey"; + } else if (NODE_IS_RESIN(node)) { + uc_plat->label = "vol_down"; + } else { + printf("Unknown button node '%s' should be 'pwrkey' or 'resin'\n", + ofnode_get_name(node)); + device_unbind(dev); + } + } + + return 0; +} + +static const struct button_ops button_qcom_pmic_ops = { + .get_state = qcom_pwrkey_get_state, + .get_code = qcom_pwrkey_get_code, +}; + +static const struct udevice_id qcom_pwrkey_ids[] = { + { .compatible = "qcom,pm8916-pon" }, + { .compatible = "qcom,pm8941-pon" }, + { .compatible = "qcom,pm8998-pon" }, + { } +}; + +U_BOOT_DRIVER(qcom_pwrkey) = { + .name = "qcom_pwrkey", + .id = UCLASS_BUTTON, + .of_match = qcom_pwrkey_ids, + .bind = button_qcom_pmic_bind, + .probe = qcom_pwrkey_probe, + .ops = &button_qcom_pmic_ops, + .priv_auto = sizeof(struct qcom_pmic_btn_priv), +};