| Message ID | 20240215-b4-qcom-common-target-v4-4-ed06355c634a@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Qualcomm generic board support | expand |
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly <caleb.connolly@linaro.org> wrote: > > The upstream DT is supported here, so drop the U-Boot specific binding > docs. > > Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> > Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> > --- > doc/device-tree-bindings/mmc/msm_sdhci.txt | 25 ------------------------- > 1 file changed, 25 deletions(-) > Reviewed-by: Sumit Garg <sumit.garg@linaro.org> -Sumit > diff --git a/doc/device-tree-bindings/mmc/msm_sdhci.txt b/doc/device-tree-bindings/mmc/msm_sdhci.txt > deleted file mode 100644 > index 08a290c66931..000000000000 > --- a/doc/device-tree-bindings/mmc/msm_sdhci.txt > +++ /dev/null > @@ -1,25 +0,0 @@ > -Qualcomm Snapdragon SDHCI controller > - > -Required properties: > -- compatible : "qcom,sdhci-msm-v4" > -- reg: Base address and length of registers: > - - Host controller registers (SDHCI) > - - SD Core registers > -- clock: interface clock (must accept SD bus clock as a frequency) > - > -Optional properties: > -- index: If there is more than one controller - controller index (required > - by generic SDHCI code). > -- bus_width: Width of SD/eMMC bus (default 4) > -- clock-frequency: Frequency of SD/eMMC bus (default 400 kHz) > - > -Example: > - > -sdhci@07864000 { > - compatible = "qcom,sdhci-msm-v4"; > - reg = <0x7864900 0x11c 0x7864000 0x800>; > - index = <0x1>; > - bus-width = <0x4>; > - clock = <&clkc 1>; > - clock-frequency = <200000000>; > -}; > > -- > 2.43.1 >
diff --git a/doc/device-tree-bindings/mmc/msm_sdhci.txt b/doc/device-tree-bindings/mmc/msm_sdhci.txt deleted file mode 100644 index 08a290c66931..000000000000 --- a/doc/device-tree-bindings/mmc/msm_sdhci.txt +++ /dev/null @@ -1,25 +0,0 @@ -Qualcomm Snapdragon SDHCI controller - -Required properties: -- compatible : "qcom,sdhci-msm-v4" -- reg: Base address and length of registers: - - Host controller registers (SDHCI) - - SD Core registers -- clock: interface clock (must accept SD bus clock as a frequency) - -Optional properties: -- index: If there is more than one controller - controller index (required - by generic SDHCI code). -- bus_width: Width of SD/eMMC bus (default 4) -- clock-frequency: Frequency of SD/eMMC bus (default 400 kHz) - -Example: - -sdhci@07864000 { - compatible = "qcom,sdhci-msm-v4"; - reg = <0x7864900 0x11c 0x7864000 0x800>; - index = <0x1>; - bus-width = <0x4>; - clock = <&clkc 1>; - clock-frequency = <200000000>; -};