From patchwork Wed Aug 14 11:00:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sughosh Ganu X-Patchwork-Id: 819129 Delivered-To: patch@linaro.org Received: by 2002:adf:cd01:0:b0:367:895a:4699 with SMTP id w1csp646344wrm; Wed, 14 Aug 2024 04:05:19 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX1GmQggyVqeYevShphS12tS0bySOmBz8niv9TQ4j4oykePqleJL6Lbavj+OqpXSXU1CZt/lU5/Kxxcsv9TO7dR X-Google-Smtp-Source: AGHT+IEN0qTPWCCUdQvqjXOutSgF15zcLbagHiaP741rhfJqQ/rN0PyyDNgnrBG3VGr4MalPETL1 X-Received: by 2002:a05:6402:2354:b0:5bb:b8e1:4653 with SMTP id 4fb4d7f45d1cf-5bea1cac726mr1443079a12.24.1723633519403; Wed, 14 Aug 2024 04:05:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1723633519; cv=none; d=google.com; s=arc-20160816; b=F4jFAdds7AU2nMnG4juQnGDotpyWmlFUMfLKZ3pKCsy/4q+GFctrkRSNAfbOccHqfJ vDQc1ZaZYfkFRirG47butVBNWKdJb/XZXiOHRpBPUPtjb2kwr4ciBhZTufIM8YV0aR+W MFhYPVaQ/eR2GEVcOUpHFmVIP1j4NGmDxs/5Cg1NxPGBHeUx+Fo+KS8DlVCTFHukRaku TLwB+nIwz9hNe//crHyO93Bka8eWD+mSmRW7zwfqWLDrnd4ztITQ5rWbUWvp9in+x+Pu 0aDrzs5uwVN+qewEppsKSeV9BCWLw1DDsczmWYODff5yDvoq/mx4hQnyhrNq12JHDWVJ SxeQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=euhlUbZerDi2db/PYY/NUoHN+dnrHHtSqR36kQeAfec=; fh=w4WyT9xL7ErtT1TeetrD/m0Y0mAgjnERgxacGUpGjSg=; b=xr21WcJSOFSwS7e7+5qyic/GWvxf9xxrCdk+tzaJHZ/ISCJpIWZdvPB0+NYKX4tjnN o3Qhaiy4Gdr9DM2G70Qin0PL7OzrZTTus8vTzFohgt43fiUu8/VZDMk4l0/V0MmKahgt FGm0ynqI/jk1/tv3Qwu+qyhmGPAIlagWMZiXMAUavmveURczJOWSjWljmR2Rc2cEQvn0 lNblBkXx/fPlIapPMuDEmuqT8Wcs15v77+4T2XooiduO6Uh/iU2iDDqpkO0XdeugQW7R 7Lg8/fgg8USV3t0v4+bUbMp5mTGCVCH+YptfzFC1gegku3X2w1QueNxTimClIPmY8Md/ d9oA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. [85.214.62.61]) by mx.google.com with ESMTPS id 4fb4d7f45d1cf-5bd187fef44si5507182a12.76.2024.08.14.04.05.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Aug 2024 04:05:19 -0700 (PDT) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) client-ip=85.214.62.61; Authentication-Results: mx.google.com; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D658388AA9; Wed, 14 Aug 2024 13:02:46 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 4283B88A66; Wed, 14 Aug 2024 13:02:46 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED,RCVD_IN_VALIDITY_RPBL_BLOCKED, SPF_HELO_NONE,SPF_SOFTFAIL,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.2 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id 05EC588A79 for ; Wed, 14 Aug 2024 13:02:44 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sughosh.ganu@linaro.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 62A29DA7; Wed, 14 Aug 2024 04:03:09 -0700 (PDT) Received: from a079122.blr.arm.com (a079122.arm.com [10.162.17.48]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E32B03F58B; Wed, 14 Aug 2024 04:02:38 -0700 (PDT) From: Sughosh Ganu To: u-boot@lists.denx.de Cc: Ilias Apalodimas , Heinrich Schuchardt , Simon Glass , Marek Vasut , Tom Rini , Mark Kettenis , Michal Simek , Patrick DELAUNAY , Patrice CHOTARD , Huan Wang , Angelo Dureghello , Daniel Schwierzeck , Thomas Chou , Rick Chen , Max Filippov , Sughosh Ganu Subject: [PATCH v2 26/32] stm32mp: compute ram_top based on the optee base address Date: Wed, 14 Aug 2024 16:30:03 +0530 Message-Id: <20240814110009.45310-27-sughosh.ganu@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240814110009.45310-1-sughosh.ganu@linaro.org> References: <20240814110009.45310-1-sughosh.ganu@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The value of ram_top address currently gets computed in an indirect manner. The boot_fdt_add_mem_rsv_regions() function gets called first to reserve the memory region occupied by OP-TEE in the LMB memory map. This is followed by a call to the lmb_alloc() API, which returns an address which is below the OP-TEE base address. This address is the value of ram_top returned by the board_get_usable_ram_top() function. This has now changed, as the LMB memory map, which is no longer local, gets set up after relocation. Get the OP-TEE base address by reading the device tree, and set the ram_top from this value. Signed-off-by: Sughosh Ganu --- Changes since V1: New patch arch/arm/mach-stm32mp/dram_init.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/arch/arm/mach-stm32mp/dram_init.c b/arch/arm/mach-stm32mp/dram_init.c index b3dbd521b7..32baefca71 100644 --- a/arch/arm/mach-stm32mp/dram_init.c +++ b/arch/arm/mach-stm32mp/dram_init.c @@ -62,8 +62,10 @@ int dram_init(void) phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { + int ret; phys_size_t size; phys_addr_t reg; + u32 optee_start, optee_size; if (!total_size) return gd->ram_top; @@ -73,16 +75,10 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size) * if the effective available memory is bigger */ gd->ram_top = clamp_val(gd->ram_top, 0, SZ_4G - 1); + size = ALIGN(SZ_8M + CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE); - /* found enough not-reserved memory to relocated U-Boot */ - lmb_add(gd->ram_base, gd->ram_top - gd->ram_base); - boot_fdt_add_mem_rsv_regions((void *)gd->fdt_blob); - /* add 8M for reserved memory for display, fdt, gd,... */ - size = ALIGN(SZ_8M + CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE), - reg = lmb_alloc(size, MMU_SECTION_SIZE); - - if (!reg) - reg = gd->ram_top - size; + ret = optee_get_reserved_memory(&optee_start, &optee_size); + reg = (!ret ? optee_start : gd->ram_top) - size; /* before relocation, mark the U-Boot memory as cacheable by default */ if (!(gd->flags & GD_FLG_RELOC))