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Fri, 28 Mar 2025 01:53:25 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:3d9:2080:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c0b79e0basm1969794f8f.63.2025.03.28.01.53.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Mar 2025 01:53:25 -0700 (PDT) From: Neil Armstrong Date: Fri, 28 Mar 2025 09:53:21 +0100 Subject: [PATCH 1/4] spmi: msm: use real number of channels for v5 & v7 MIME-Version: 1.0 Message-Id: <20250328-topic-sm8x50-spmi-fix-v1-1-a7548d3aef0d@linaro.org> References: <20250328-topic-sm8x50-spmi-fix-v1-0-a7548d3aef0d@linaro.org> In-Reply-To: <20250328-topic-sm8x50-spmi-fix-v1-0-a7548d3aef0d@linaro.org> To: Caleb Connolly , Sumit Garg , Mateusz Kulikowski , Tom Rini Cc: u-boot-qcom@groups.io, u-boot@lists.denx.de, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1949; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=A2IMOgIDnFbyt+w1PgFnhrRwDh2xDfwmeARDqd7Wo5g=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBn5mOChGHAYaTJxgUoXlTwcEQ+jpQ5n1hLJt9Twxnw vWBk/MyJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZ+ZjggAKCRB33NvayMhJ0TZXEA CGkKXkafkdAtQmjSV1I07CmsFSZnhdIM513d2VLup6jx290aEU9FHMkalmPGbZaHn0c/XlFZQmtyZ+ rcfn/g7HJX1Lili7C7zXX9IDRyeyB9SwXamYLDh/icpF3dHDm5G3/xgiOQu0CzutVa662YryoIHzFx 7YRmlrrF6ZVEDXcqW0XZsI1oEInSxQox9Ng2Iwue04e0rPJVnNfjuPOCZz10gKPpnlBs013XfTXac8 J+/iMbYD25hy+tm3KZwut/UmjAme+q6OpLFFjIgJxtef+08VrlQMhON+tbwxI1NUAwAEbjdkYa4WyU LtEXDGp338tL707eElw6973410R3WY+5i84yjbUeg87N0nJZ9O32vziEaEOuEaWDES7DNP/lgOaBTX ajt0e3MAu/PEqAnw0BDCgaLTnsX3YNMVdkOyRB9ArhLR1A0uUMABnduKHlLvSk8Zon0Pd0F9S8CIbg 1ZeGp4NQ5bdI7yJoLOzpRfw3UM47RIaXZ958LbGm4KlGjsaRJ1ustNnbeGI35UQ+RI+3jvKQHLGXiq N/on23CCn1B2fcLJUP3egI51Sr4bFpgK8xsVqY0dd5NeeEd1UIrDJwHwsEXwbqVenY5FkO5OYEWhWb 6uvgvSzZ9pBuwVk0f6AAzpjn/yXPR+L3t87WAg+sUxduZ5GTBT2RV47vYGfQ== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The SPMI_MAX_CHANNELS_Vx are only the maximum channels supported by the controller, but the real number of channels mapped on this system can be read from a register, so take this info. This allows no to overlap on the second controller present on the V7 SPMI arbiter, otherwise we would also parse the mapping of the second SPMI bus and we would bet the wrong IDs. Signed-off-by: Neil Armstrong --- drivers/spmi/spmi-msm.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/spmi/spmi-msm.c b/drivers/spmi/spmi-msm.c index 5cc5a9e654c8371d71386384654e9429ed96b05f..08be4517df189f320302e97334a371d370b36440 100644 --- a/drivers/spmi/spmi-msm.c +++ b/drivers/spmi/spmi-msm.c @@ -24,6 +24,9 @@ DECLARE_GLOBAL_DATA_PTR; #define PMIC_ARB_VERSION_V5_MIN 0x50000000 #define PMIC_ARB_VERSION_V7_MIN 0x70000000 +#define PMIC_ARB_FEATURES 0x0004 +#define PMIC_ARB_FEATURES_PERIPH_MASK GENMASK(10, 0) + #define APID_MAP_OFFSET_V1_V2_V3 (0x800) #define APID_MAP_OFFSET_V5 (0x900) #define APID_MAP_OFFSET_V7 (0x2000) @@ -271,13 +274,17 @@ static int msm_spmi_probe(struct udevice *dev) } else if (hw_ver < PMIC_ARB_VERSION_V7_MIN) { priv->arb_ver = V5; priv->arb_chnl = core_addr + APID_MAP_OFFSET_V5; - priv->max_channels = SPMI_MAX_CHANNELS_V5; + priv->max_channels = min_t(u32, readl(core_addr + PMIC_ARB_FEATURES) & + PMIC_ARB_FEATURES_PERIPH_MASK, + SPMI_MAX_CHANNELS_V5); priv->spmi_cnfg = dev_read_addr_name(dev, "cnfg"); } else { /* TOFIX: handle second bus */ priv->arb_ver = V7; priv->arb_chnl = core_addr + APID_MAP_OFFSET_V7; - priv->max_channels = SPMI_MAX_CHANNELS_V7; + priv->max_channels = min_t(u32, readl(core_addr + PMIC_ARB_FEATURES) & + PMIC_ARB_FEATURES_PERIPH_MASK, + SPMI_MAX_CHANNELS_V7); priv->spmi_cnfg = dev_read_addr_name(dev, "cnfg"); }