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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id f34-v6si1284408plf.495.2018.06.26.03.44.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 26 Jun 2018 03:44:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b="ZRhqVa/v"; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 5308C20957AFF; Tue, 26 Jun 2018 03:44:31 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::243; helo=mail-wm0-x243.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x243.google.com (mail-wm0-x243.google.com [IPv6:2a00:1450:400c:c09::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 05BCC202E53E8 for ; Tue, 26 Jun 2018 03:44:29 -0700 (PDT) Received: by mail-wm0-x243.google.com with SMTP id e16-v6so1332989wmd.0 for ; Tue, 26 Jun 2018 03:44:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=c9Vw79V/yNHw0M5ixyWrQUlATREpVZJes6m6lR/ZRyI=; b=ZRhqVa/vEtfE04ZhVsrQl7vf6vMBwYrlBrWHWKgAYhFj7Rl0ReoRBaip255pibQV2r 0LlEsMVI+JJdTpVQych0XBuBmkrbDKXLTCy4dnx2++zR4Oc2VPVU/U/dLvx+06+cSSWO uNiPYFPXryiTY1ErO6EFxhFw97PvUm22yQ/0k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=c9Vw79V/yNHw0M5ixyWrQUlATREpVZJes6m6lR/ZRyI=; b=hiyACPUQSnirfrcAo9dz18xIeuYH4Fufv+UFxRooD01d0t0NCa1aqnGKdnOO01W9vf Fn8VuDZ2RPAdEScN7HSJqezzBsq2BLc0wbZjPpLtVoupzE5PycpkIfXuPd12EvnWnsFu PhmuktzKXUXxVGp+/XCtH+ODhr1wDrdvZFIHyXSxBWoqmBm4zBNTv7ANUDg/cAhJYe+2 KKNKK4FRVfaJflOhsTXgg5fzRXqadatUcyQIWZ9IAoud6UIKhBav4K6Eb3ll0NG2ENuk q5stpZIsJ0oPlLHaW41fz5DZzSEsZqH+P6wpmO7KuUwHkAHBAvtE9eBtiKhOuMDNhwRx Etsg== X-Gm-Message-State: APt69E1c3ttoFb7o4uEK9DnWqHi1tEuI02JceSmpZWxoTfhy0h+rwFqB bJY2rVMYkdlE6rMIeCSwLDBbObhhwgw= X-Received: by 2002:a1c:6943:: with SMTP id e64-v6mr1203815wmc.14.1530009867497; Tue, 26 Jun 2018 03:44:27 -0700 (PDT) Received: from dogfood.home ([2a01:cb1d:112:6f00:a044:5ea2:f748:d67a]) by smtp.gmail.com with ESMTPSA id m58-v6sm2557745wrf.61.2018.06.26.03.44.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 26 Jun 2018 03:44:26 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Tue, 26 Jun 2018 12:44:22 +0200 Message-Id: <20180626104424.3524-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.1 Subject: [edk2] [PATCH edk2-platforms 0/2] SynQuacer: enable MMIO translation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Even if the UEFI spec permits it and accommodates it, many UEFI drivers for PCI peripherals appear to misbehave in the presence of MMIO windows that appear at different addresses in the CPU and PCI address spaces. So let's add some plumbing to allow us to test this on SynQuacer. Patch #1 adds some groundwork, and can be taken into edk2-platforms. Patch #2 is included for reference, and may be applied locally to build firmware images to be used in driver testing. Ard Biesheuvel (2): Silicon/SynQuacer: add preliminary support for PCIe MMIO32 translation Silicon/Socionext/SynQuacer: use single translated MMIO window for PCI1 .../SynQuacer/AcpiTables/AcpiSsdtRootPci.asl | 19 ++++-------------- .../SynQuacer/DeviceTree/SynQuacer.dtsi | 11 +++++----- .../SynQuacer/Include/Platform/Pcie.h | 20 ++++++++++--------- .../SynQuacerPciHostBridgeLib.c | 11 +++++----- .../SynQuacerPciHostBridgeLibConstructor.c | 2 +- 5 files changed, 27 insertions(+), 36 deletions(-) -- 2.17.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel