From patchwork Sun Nov 13 06:47:58 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 81951 Delivered-To: patch@linaro.org Received: by 10.140.97.165 with SMTP id m34csp503409qge; Sat, 12 Nov 2016 22:48:39 -0800 (PST) X-Received: by 10.98.105.68 with SMTP id e65mr23669882pfc.10.1479019719833; Sat, 12 Nov 2016 22:48:39 -0800 (PST) Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id n7si14674451pag.191.2016.11.12.22.48.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Nov 2016 22:48:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 1D1A981DD3; Sat, 12 Nov 2016 22:48:35 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-pg0-x22d.google.com (mail-pg0-x22d.google.com [IPv6:2607:f8b0:400e:c05::22d]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id F15D381DE9 for ; Sat, 12 Nov 2016 22:48:32 -0800 (PST) Received: by mail-pg0-x22d.google.com with SMTP id p66so37255338pga.2 for ; Sat, 12 Nov 2016 22:48:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=GS3Gh5LZf1K7iY9gt9YZJ4+9rkFfNllIyUqGUUC+juA=; b=ciQ+ifsSs+T7badAMXSVByJWP68orWe9nMmtSBErhWtCOOs79gSodjv3gXLVuabtcY RXFr+met/NZC2P1WyTtCz2buhwDEayk22mDigwQ6mweevU0XlznNJJumxr2PAHoQjYAQ ZLluIy5MAqFEGiqxmzTFq/Acl7qyoRlswvbXM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=GS3Gh5LZf1K7iY9gt9YZJ4+9rkFfNllIyUqGUUC+juA=; b=jlqPIxuz/VrivUTXiwlSTDsjIBiAttsVE1evb9l03XN6CMZ05OTLhGd/E2GSNfA0EP 2vwYCue1rukZxPZnrS9xG0J8K7kNvIFZM2ZM614+h1jt+XRq6jT53YELtMBXFERbyJej jorYKT10lx8F2SbIuaLHcFICzTgFgwxr+nKTwveUivJmXN5PRi7bAQEIfWnq45mVWrJp otjFoP7Bt9ZX99Dg9M9XStOOFw5c6Kub+i/Sj8CbRG6zWbqxwxm5/I+XkNAaczJoj0I/ xGXbXgNSRO+Bd8hCbXdiL7rsIYrGpoxAcOqyZdKQT+OXz9eruOvBGbGeib4RoZRSLoLQ ptNQ== X-Gm-Message-State: ABUngvf+EYiIlFcRbmTyQAWJDElwgxqwKzT+pCPneajvzZZoXhkHXhnYsmwk5WbWJz8CqEJK X-Received: by 10.98.194.130 with SMTP id w2mr23353753pfk.143.1479019716980; Sat, 12 Nov 2016 22:48:36 -0800 (PST) Received: from localhost.localdomain ([45.56.159.75]) by smtp.gmail.com with ESMTPSA id a66sm26198365pfa.64.2016.11.12.22.48.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 12 Nov 2016 22:48:36 -0800 (PST) From: Haojian Zhuang To: ryan.harkin@linaro.org, edk2-devel@lists.01.org, leif.lindholm@linaro.org, ard.biesheuvel@linaro.org Date: Sun, 13 Nov 2016 14:47:58 +0800 Message-Id: <1479019678-12621-10-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1479019678-12621-1-git-send-email-haojian.zhuang@linaro.org> References: <1479019678-12621-1-git-send-email-haojian.zhuang@linaro.org> Subject: [edk2] [PATCH v5 9/9] PL180: update for indentifying SD X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Haojian Zhuang MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" When CMD6 & ACMD51 are added into indentifying SD process, PL180 should also support CMD6 & ACMD51. Otherwise, it'll hang when system tries to read expected data. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang Tested-by: Ryan Harkin --- ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c | 29 ++++++++++++++++++++------- 1 file changed, 22 insertions(+), 7 deletions(-) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c index 5526aac..b2ba4c0 100644 --- a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c +++ b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c @@ -63,11 +63,6 @@ MciIsReadOnly ( return (MmioRead32 (FixedPcdGet32 (PcdPL180SysMciRegAddress)) & SYS_MCI_WPROT); } -#if 0 -//Note: This function has been commented out because it is not used yet. -// This function could be used to remove the hardcoded BlockLen used -// in MciPrepareDataPath - // Convert block size to 2^n STATIC UINT32 @@ -87,7 +82,6 @@ GetPow2BlockLen ( return Pow2BlockLen; } -#endif VOID MciPrepareDataPath ( @@ -126,6 +120,23 @@ MciSendCommand ( MciPrepareDataPath (MCI_DATACTL_CARD_TO_CONT); } else if ((MmcCmd == MMC_CMD24) || (MmcCmd == MMC_CMD20)) { MciPrepareDataPath (MCI_DATACTL_CONT_TO_CARD); + } else if (MmcCmd == MMC_CMD6) { + MmioWrite32 (MCI_DATA_TIMER_REG, 0xFFFFFFF); + MmioWrite32 (MCI_DATA_LENGTH_REG, 64); +#ifndef USE_STREAM + MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | GetPow2BlockLen (64)); +#else + MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | MCI_DATACTL_STREAM_TRANS); +#endif + } else if (MmcCmd == MMC_ACMD51) { + MmioWrite32 (MCI_DATA_TIMER_REG, 0xFFFFFFF); + /* SCR register is 8 bytes long. */ + MmioWrite32 (MCI_DATA_LENGTH_REG, 8); +#ifndef USE_STREAM + MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | GetPow2BlockLen (8)); +#else + MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | MCI_DATACTL_STREAM_TRANS); +#endif } // Create Command for PL180 @@ -223,7 +234,11 @@ MciReadBlockData ( // Read data from the RX FIFO Loop = 0; - Finish = MMCI0_BLOCKLEN / 4; + if (Length < MMCI0_BLOCKLEN) { + Finish = Length / 4; + } else { + Finish = MMCI0_BLOCKLEN / 4; + } // Raise the TPL at the highest level to disable Interrupts. Tpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);