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[198.145.21.10]) by mx.google.com with ESMTPS id h129si1755009pgc.163.2016.11.21.23.50.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Nov 2016 23:50:43 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 8986381E55; Mon, 21 Nov 2016 23:50:43 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-pf0-x232.google.com (mail-pf0-x232.google.com [IPv6:2607:f8b0:400e:c00::232]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9E2BB81E54 for ; Mon, 21 Nov 2016 23:50:42 -0800 (PST) Received: by mail-pf0-x232.google.com with SMTP id 189so2961516pfz.3 for ; Mon, 21 Nov 2016 23:50:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jeCJMTvhKZYZuJrh7Y2CSPDhlE/ChhvG32EI18bJJq8=; b=NSidfp/v1SU+wEyCWjk+eGgpmb459s5+kAZW2vSQ6giocwh91k+/6tpvVPhBksiMNj RCaRa33/BlMT1DBkir9+pPCnILFQhWgM2uCzWmxxQ88iWWii6Msw5rkvPBTkOLwPsYUT Xl1gotDxE2HKtkJnpJxkz5tXf6VzPIVYVLk6Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jeCJMTvhKZYZuJrh7Y2CSPDhlE/ChhvG32EI18bJJq8=; b=bHMSDfI4gOkGgX//z5dYX5oH3l9T1Njnzp+IjXj/zEXk9X9TF15D/tNhCOUDMkskM4 DslgcEnlDAkczzvdqwKGXVzybw+3o8z9Xz6ChgWyj+YP+O/TlWQUlLbrMbijUqHBRdwV TGU5qIt7GZ8CN2T4vq6OXOk8H8KHp0/KB9zmJzFKpo4gfwTm3Ckg3XO1rmLf0Ojac7u6 uvSuA3hQSN8/CQXlG6LCT0LUB601Yz8ESuyeofjcboTceHN9ckMRRqEvm8fkeLgeRv/T RVnmi852FjJbglmJWviiuwIBOjJx8oHUD4hxan7cnVsx96KXtrXeEGbtaRYcZWIxjwlm gxfw== X-Gm-Message-State: AKaTC03QBDYGhsxlaZgg+zlRmmaR6+KaPE/dd5/4bc5oDIVxLc1WKswniN0Qxb/y+pnbqaJv X-Received: by 10.99.112.66 with SMTP id a2mr41092486pgn.43.1479801042227; Mon, 21 Nov 2016 23:50:42 -0800 (PST) Received: from localhost.localdomain ([45.56.159.13]) by smtp.gmail.com with ESMTPSA id f132sm26323216pfa.72.2016.11.21.23.50.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 21 Nov 2016 23:50:41 -0800 (PST) From: Haojian Zhuang To: ryan.harkin@linaro.org, edk2-devel@lists.01.org, leif.lindholm@linaro.org, ard.biesheuvel@linaro.org Date: Tue, 22 Nov 2016 15:50:26 +0800 Message-Id: <1479801028-3587-3-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1479801028-3587-1-git-send-email-haojian.zhuang@linaro.org> References: <1479801028-3587-1-git-send-email-haojian.zhuang@linaro.org> Subject: [edk2] [PATCH v6 2/4] MmcDxe: set iospeed and bus width in SD stack X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Haojian Zhuang MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Add more SD commands to support 4-bit bus width & iospeed. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang Tested-by: Ryan Harkin --- EmbeddedPkg/Include/Protocol/MmcHost.h | 3 + EmbeddedPkg/Universal/MmcDxe/Mmc.h | 16 ++++ EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c | 106 +++++++++++++++++++++++ 3 files changed, 125 insertions(+) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/EmbeddedPkg/Include/Protocol/MmcHost.h b/EmbeddedPkg/Include/Protocol/MmcHost.h index 01c0bf4..5028045 100644 --- a/EmbeddedPkg/Include/Protocol/MmcHost.h +++ b/EmbeddedPkg/Include/Protocol/MmcHost.h @@ -64,11 +64,14 @@ typedef UINT32 MMC_CMD; #define MMC_CMD24 (MMC_INDX(24) | MMC_CMD_WAIT_RESPONSE) #define MMC_CMD55 (MMC_INDX(55) | MMC_CMD_WAIT_RESPONSE) #define MMC_ACMD41 (MMC_INDX(41) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_NO_CRC_RESPONSE) +#define MMC_ACMD51 (MMC_INDX(51) | MMC_CMD_WAIT_RESPONSE) // Valid responses for CMD1 in eMMC #define EMMC_CMD1_CAPACITY_LESS_THAN_2GB 0x00FF8080 // Capacity <= 2GB, byte addressing used #define EMMC_CMD1_CAPACITY_GREATER_THAN_2GB 0x40FF8080 // Capacity > 2GB, 512-byte sector addressing used +#define MMC_STATUS_APP_CMD (1 << 5) + typedef enum _MMC_STATE { MmcInvalidState = 0, MmcHwInitializationState, diff --git a/EmbeddedPkg/Universal/MmcDxe/Mmc.h b/EmbeddedPkg/Universal/MmcDxe/Mmc.h index fd1fccf..e98fac6 100644 --- a/EmbeddedPkg/Universal/MmcDxe/Mmc.h +++ b/EmbeddedPkg/Universal/MmcDxe/Mmc.h @@ -80,6 +80,22 @@ typedef struct { UINT32 PowerUp: 1; // This bit is set to LOW if the card has not finished the power up routine } OCR; +typedef struct { + UINT8 SD_SPEC: 4; // SD Memory Card - Spec. Version [59:56] + UINT8 SCR_STRUCTURE: 4; // SCR Structure [63:60] + UINT8 SD_BUS_WIDTHS: 4; // DAT Bus widths supported [51:48] + UINT8 DATA_STAT_AFTER_ERASE: 1; // Data Status after erases [55] + UINT8 SD_SECURITY: 3; // CPRM Security Support [54:52] + UINT8 EX_SECURITY_1: 1; // Extended Security Support [43] + UINT8 SD_SPEC4: 1; // Spec. Version 4.00 or higher [42] + UINT8 RESERVED_1: 2; // Reserved [41:40] + UINT8 SD_SPEC3: 1; // Spec. Version 3.00 or higher [47] + UINT8 EX_SECURITY_2: 3; // Extended Security Support [46:44] + UINT8 CMD_SUPPORT: 4; // Command Support bits [35:32] + UINT8 RESERVED_2: 4; // Reserved [39:36] + UINT32 RESERVED_3; // Manufacturer Usage [31:0] +} SCR; + typedef struct { UINT32 NOT_USED; // 1 [0:0] UINT32 CRC; // CRC7 checksum [7:1] diff --git a/EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c b/EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c index 90aed33..4a44980 100644 --- a/EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c +++ b/EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c @@ -12,6 +12,9 @@ * **/ +#include +#include + #include "Mmc.h" typedef union { @@ -41,6 +44,11 @@ typedef union { #define EMMC_SWITCH_ERROR (1 << 7) +#define SD_BUS_WIDTH_1BIT (1 << 0) +#define SD_BUS_WIDTH_4BIT (1 << 2) + +#define SD_CCC_SWITCH (1 << 10) + #define DEVICE_STATE(x) (((x) >> 9) & 0xf) typedef enum _EMMC_DEVICE_STATE { EMMC_IDLE_STATE = 0, @@ -296,9 +304,12 @@ InitializeSdMmcDevice ( { UINT32 CmdArg; UINT32 Response[4]; + UINT32 Buffer[128]; UINTN BlockSize; UINTN CardSize; UINTN NumBlocks; + BOOLEAN CccSwitch; + SCR Scr; EFI_STATUS Status; EFI_MMC_HOST_PROTOCOL *MmcHost; @@ -319,6 +330,11 @@ InitializeSdMmcDevice ( return Status; } PrintCSD (Response); + if (MMC_CSD_GET_CCC(Response) & SD_CCC_SWITCH) { + CccSwitch = TRUE; + } else { + CccSwitch = FALSE; + } if (MmcHostInstance->CardInfo.CardType == SD_CARD_2_HIGH) { CardSize = HC_MMC_CSD_GET_DEVICESIZE (Response); @@ -349,6 +365,96 @@ InitializeSdMmcDevice ( return Status; } + Status = MmcHost->SendCommand (MmcHost, MMC_CMD55, CmdArg); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "%a(MMC_CMD55): Error and Status = %r\n", Status)); + return Status; + } + Status = MmcHost->ReceiveResponse (MmcHost, MMC_RESPONSE_TYPE_R1, Response); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "%a(MMC_CMD55): Error and Status = %r\n", Status)); + return Status; + } + if ((Response[0] & MMC_STATUS_APP_CMD) == 0) { + return EFI_SUCCESS; + } + + /* SCR */ + Status = MmcHost->SendCommand (MmcHost, MMC_ACMD51, 0); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "%a(MMC_ACMD51): Error and Status = %r\n", __func__, Status)); + return Status; + } else { + Status = MmcHost->ReadBlockData (MmcHost, 0, 8, Buffer); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "%a(MMC_ACMD51): ReadBlockData Error and Status = %r\n", __func__, Status)); + return Status; + } + CopyMem (&Scr, Buffer, 8); + if (Scr.SD_SPEC == 2) { + if (Scr.SD_SPEC3 == 1) { + if (Scr.SD_SPEC4 == 1) { + DEBUG ((EFI_D_INFO, "Found SD Card for Spec Version 4.xx\n")); + } else { + DEBUG ((EFI_D_INFO, "Found SD Card for Spec Version 3.0x\n")); + } + } else { + if (Scr.SD_SPEC4 == 0) { + DEBUG ((EFI_D_INFO, "Found SD Card for Spec Version 2.0\n")); + } else { + DEBUG ((EFI_D_ERROR, "Found invalid SD Card\n")); + } + } + } else { + if ((Scr.SD_SPEC3 == 0) && (Scr.SD_SPEC4 == 0)) { + if (Scr.SD_SPEC == 1) { + DEBUG ((EFI_D_INFO, "Found SD Card for Spec Version 1.10\n")); + } else { + DEBUG ((EFI_D_INFO, "Found SD Card for Spec Version 1.0\n")); + } + } else { + DEBUG ((EFI_D_ERROR, "Found invalid SD Card\n")); + } + } + } + if (CccSwitch) { + /* SD Switch, Mode:1, Group:0, Value:1 */ + CmdArg = 1 << 31 | 0x00FFFFFF; + CmdArg &= ~(0xF << (0 * 4)); + CmdArg |= 1 << (0 * 4); + Status = MmcHost->SendCommand (MmcHost, MMC_CMD6, CmdArg); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "%a(MMC_CMD6): Error and Status = %r\n", Status)); + return Status; + } else { + Status = MmcHost->ReadBlockData (MmcHost, 0, 64, Buffer); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "%a(MMC_CMD6): ReadBlockData Error and Status = %r\n", Status)); + return Status; + } + } + } + if (Scr.SD_BUS_WIDTHS & SD_BUS_WIDTH_4BIT) { + CmdArg = MmcHostInstance->CardInfo.RCA << 16; + Status = MmcHost->SendCommand (MmcHost, MMC_CMD55, CmdArg); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "%a(MMC_CMD55): Error and Status = %r\n", Status)); + return Status; + } + /* Width: 4 */ + Status = MmcHost->SendCommand (MmcHost, MMC_CMD6, 2); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "%a(MMC_CMD6): Error and Status = %r\n", Status)); + return Status; + } + } + if (MmcHost->SetIos) { + Status = MmcHost->SetIos (MmcHost, 24 * 1000 * 1000, 4, EMMCBACKWARD); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "%a(SetIos): Error and Status = %r\n", Status)); + return Status; + } + } return EFI_SUCCESS; }