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client-ip=2a00:1450:400c:c09::241; helo=mail-wm0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 27C50222A3356 for ; Thu, 25 Jan 2018 04:22:26 -0800 (PST) Received: by mail-wm0-x241.google.com with SMTP id v71so14613572wmv.2 for ; Thu, 25 Jan 2018 04:27:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=YwXCUsXGEZG7l0j2D4LD5Utf9ZA5PX8svNffjnw+wBc=; b=ChFGgl63yiJCi4XRnIv76icYMN0EeWO2NcJ2p1b35tGhjwaRx84VoTLqqDcG6iJAvS SGfxB0Z3GT1Ms+FsOGgnKcfwskSc804HmPY6iMLqsp3aFPUVU9sosBp8OMAHx6iyFHHj Ucyr6fSRSGV4G2/cH7BMUHXGNvoanXkdJWxXg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=YwXCUsXGEZG7l0j2D4LD5Utf9ZA5PX8svNffjnw+wBc=; b=Eg14EKcoSJ5Ykr0rUyBfGUbN31RxfhUeYJH7LttL1lpTfCOqg+5rkoWnVJlPToAp71 iDNpW2nGt0mjXZFTjBetslFGVX8dTEiHMkcPLjvxxtZIoM3kesxuuJNc+JqflYMOfu2N XfjPPLVuxzWe0PkvG4sKIOVu6M2M+ZwvEIa2EBxkIFacL53lqPQMjV7o8L/6EyO8tbRS lWvsokFEbuTfPbSTd3Y2LnDxDasRVcSi9vU5nmNZvCULZRwtzcsL1TquNFOwob7+vNDY SmPSF9o7kUs/CcG0pSoElyo9yyDQL/H0Dq0mifFVwnTyaXjOLaONLOoetQXpaWSfqP6t eF5Q== X-Gm-Message-State: AKwxyteC2SQTrOwz+BrIbN38wcUit1rvXf+ScPtwoFxdhnl/sWxshsFg P7PNsPBhAe7kdHF/qxkjJoD3+HX/eLM= X-Received: by 10.28.232.72 with SMTP id f69mr6769848wmh.110.1516883273979; Thu, 25 Jan 2018 04:27:53 -0800 (PST) Received: from localhost.localdomain ([160.167.127.168]) by smtp.gmail.com with ESMTPSA id v75sm5510001wrc.45.2018.01.25.04.27.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 25 Jan 2018 04:27:53 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Thu, 25 Jan 2018 12:27:34 +0000 Message-Id: <20180125122736.5427-7-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180125122736.5427-1-ard.biesheuvel@linaro.org> References: <20180125122736.5427-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH edk2-platforms 6/8] Silicon/SynQuacer/DeviceTree: align uart DT nodes X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Align the UART DT nodes: - use 'uart' not 'fuart' as node name for the second serial port - create an alias 'serial1' for the second serial port - use UART clock reference instead of hardcoded frequency - split 'clocks' property into 1 cell per phandle Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Leif Lindholm diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi index 37a3981f0360..7c3518facb98 100644 --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi @@ -32,6 +32,7 @@ aliases { serial0 = &soc_uart0; + serial1 = &fuart; }; chosen { @@ -436,15 +437,16 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0x2a400000 0x0 0x1000>; interrupts = ; - clocks = <&clk_uart &clk_apb>; + clocks = <&clk_uart>, <&clk_apb>; clock-names = "uartclk", "apb_pclk"; }; - fuart: fuart@51040000 { + fuart: uart@51040000 { compatible = "snps,dw-apb-uart"; reg = <0x0 0x51040000 0x0 0x1000>; interrupts = ; - clock-frequency = <62500000>; + clocks = <&clk_uart>, <&clk_apb>; + clock-names = "baudclk", "apb_pclk"; reg-io-width = <4>; reg-shift = <2>; };