From patchwork Tue Aug 14 08:08:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 144123 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp4049066ljj; Tue, 14 Aug 2018 01:10:41 -0700 (PDT) X-Google-Smtp-Source: AA+uWPxfc5Y583g1D8i1YvE/oBO5ejqE9HCB0M7HvTweZrP+6EWQJ7+zhrRYUQ3IrCZjMuBDJF2S X-Received: by 2002:a63:f919:: with SMTP id h25-v6mr19431817pgi.401.1534234241429; Tue, 14 Aug 2018 01:10:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1534234241; cv=none; d=google.com; s=arc-20160816; b=zc0XbaqZ4BJJZpP4syee7ooR6c5yHTtwGgdRP748ESbzGW+vW3j3R31HLmaakqzCCF tU9k/ezA+FZOXuOK3Bj001qbBtbhaP9awCDeRVPrCNCxBa+gzrVG6ssj5WAnY3zyz8wM qV56qvgKWFtqcdFDdI1HsITB1uRTFSi27D0I42xfZGJOhIeLSLVagmOowbtA2l3vnZP1 quSwyYeOu6/fog75F0fH9Ump1MhIK89uORHmn/TcJpnO/6jDsY58zHvMQ7Q8j74IB1kg 4MfzGReu0qGppHK5CumTuCKVHZ2xBRLbQuIg2isJk0Sk/Q99y99rQALb3pCQlbm7+8Ck XICQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=fcBBIox+pDMhSr4vK29LO1bgfmFSnAtKk5f5jcVO2f8=; b=jZRN1jMHc/d4dQXy7jd/g7ubBGLqpLnX7gzEeJkjFoVgwSEbMHMK+e1BrOsObwEOwX hvzdvVGRHdHbBsJl3ZT4dnYODGEZQjOx4MTevgB48QOC9F6+LN6laRTNJPefQmVViwRo dhD6Sc0r+8fhZm9c7he4LWcLUdMeDAO3Oi3xcdoz8Nhbt1IjVHxuzwzBtjViWQ7xDmhA l9x6mFqP5ZLPS4h4LXy84wcaYtclcSjhuCI7Da2r5AfVei9Di03XxI/6ra8IKhsiMbZw M12Yg6hHZeifbY53bUdtO+H+DDHHlpsOvxR7WvgumwOtnCD5nlhRTzBWSM/Rd7vxchKH miPQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Xk2f+l3Q; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id p187-v6si22529049pfp.27.2018.08.14.01.10.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 14 Aug 2018 01:10:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Xk2f+l3Q; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 1AF49210F16A6; Tue, 14 Aug 2018 01:10:18 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::543; helo=mail-pg1-x543.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pg1-x543.google.com (mail-pg1-x543.google.com [IPv6:2607:f8b0:4864:20::543]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1B29C210EFB15 for ; Tue, 14 Aug 2018 01:10:16 -0700 (PDT) Received: by mail-pg1-x543.google.com with SMTP id y5-v6so8801103pgv.1 for ; Tue, 14 Aug 2018 01:10:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=AxFXUEiNzg/SsU+++cS+C9fzVZayu+zRoOWJ8Tmk3fM=; b=Xk2f+l3QG3g07b2XflxAnC2lHKcn3JxaCkOpLE8tHlePAxQwbqRI0xfvQHB2ikwydS HK8mxgXvOIFIQOgnoQTb/AnI9GjUuFONlAxm8aQD76pp2UQlGjgSzFTHfp/36a8C5XiI ge088ksZ3FFEH4xwpZZMtTXpqxuE3pnQbpklE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=AxFXUEiNzg/SsU+++cS+C9fzVZayu+zRoOWJ8Tmk3fM=; b=A4BWi04LKF9Ccx8OjX5ghxG19dASLCWhurfx+9i0yR96zfWCtb87NrHj4/go69yHks 9Q+A1Gms1opiUChpuouXLrXQZcHkoUeEchWX4EapkBPEJatq9WPJIhpDNLe83DRuA2ZK i5Wp072YSpYQ0MkNQi0jdCACBfabIHA1qjwkGmz0TATwuNSfrRMDXVC/G4g0MXn1I5Wr rxyoiyjgEHJNe8nvK2ZwnkbPcitPTO4DEOyjWvTN5L0DE3pzXwz/1LRDwlsxMREhg3uQ huHBO2nOgt2kzNbx2+tBGju8JJIEYVbYuek5DHBjps66bG7ZTSBwAuffPxFb73vqYGYo aw6A== X-Gm-Message-State: AOUpUlHcfp+UrnA99lp0LW6MTfn8iZJd46VE6ACuQNfBKOlLQBvJmn3D MY/DRzJyK9uWldDL5Xx66u+UVQ== X-Received: by 2002:a63:1902:: with SMTP id z2-v6mr19728676pgl.86.1534234215781; Tue, 14 Aug 2018 01:10:15 -0700 (PDT) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id h130-v6sm72905670pgc.88.2018.08.14.01.10.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 14 Aug 2018 01:10:15 -0700 (PDT) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Tue, 14 Aug 2018 16:08:35 +0800 Message-Id: <20180814080903.50466-16-ming.huang@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180814080903.50466-1-ming.huang@linaro.org> References: <20180814080903.50466-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v2 15/43] Silicon/Hisilicon/Acpi: Unify HisiAcipPlatformDxe X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, guoheyi@huawei.com, huangdaode@hisilicon.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" The EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE struct is used by UpdateAcpiTable.c and Srat aslc. The struct may be different according to chips, so move some macro to PlatformArch.h. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Hi1610/Include/PlatformArch.h | 6 ++++ Silicon/Hisilicon/Hi1620/Include/PlatformArch.h | 6 ++++ Silicon/Hisilicon/Include/Library/AcpiNextLib.h | 31 ++++++++++++++------ Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c | 2 -- 4 files changed, 34 insertions(+), 11 deletions(-) -- 2.17.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Leif Lindholm diff --git a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h index f39ae0748c..1ebddca4e5 100644 --- a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h +++ b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h @@ -30,6 +30,12 @@ // Max NUMA node number for each node type #define MAX_NUM_PER_TYPE 8 +// for acpi +#define NODE_IN_SOCKET 2 +#define CORE_NUM_PER_SOCKET 32 +#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT 10 +#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 8 + #define S1_BASE 0x40000000000 #define RASC_BASE (0x5000) diff --git a/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h index 9539cfdada..f3ad45f6c6 100644 --- a/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h +++ b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h @@ -57,5 +57,11 @@ EFI_ACPI_ARM_CREATOR_REVISION /* UINT32 CreatorRevision */ \ } +// for acpi +#define NODE_IN_SOCKET 2 +#define CORE_NUM_PER_SOCKET 48 +#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT 16 +#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 1 + #endif diff --git a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h index fd05a3b960..2abffb65fc 100644 --- a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h +++ b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h @@ -19,6 +19,21 @@ #ifndef __ACPI_NEXT_LIB_H__ #define __ACPI_NEXT_LIB_H__ +#include + +/// +/// ITS Affinity Structure Definition +/// +#pragma pack(1) +typedef struct { + UINT8 Type; + UINT8 Length; + UINT32 ProximityDomain; + UINT16 Reserved; + UINT32 ItsHwId; +} EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE; +#pragma pack() + #define EFI_ACPI_6_1_GIC_ITS_INIT(GicITSHwId, GicITSBase) \ { \ EFI_ACPI_6_1_GIC_ITS, sizeof (EFI_ACPI_6_1_GIC_ITS_STRUCTURE), EFI_ACPI_RESERVED_WORD, \ @@ -42,8 +57,8 @@ #define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT( \ ProximityDomain, ItsId) \ { \ - 4, sizeof (EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE), ProximityDomain, \ - {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, ItsId \ + 4, sizeof (EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE), ProximityDomain, \ + EFI_ACPI_RESERVED_WORD, ItsId \ } #define EFI_ACPI_6_1_MEMORY_AFFINITY_STRUCTURE_INIT( \ @@ -75,15 +90,13 @@ // Define the number of each table type. // This is where the table layout is modified. // -#define EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT 64 -#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT 10 -#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 8 +#define EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT (MAX_SOCKET*CORE_NUM_PER_SOCKET) typedef struct { - EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header; - EFI_ACPI_6_0_MEMORY_AFFINITY_STRUCTURE Memory[EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT]; - EFI_ACPI_6_0_GICC_AFFINITY_STRUCTURE Gicc[EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT]; - EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE Its[EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT]; + EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header; + EFI_ACPI_6_2_MEMORY_AFFINITY_STRUCTURE Memory[EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT]; + EFI_ACPI_6_2_GICC_AFFINITY_STRUCTURE Gicc[EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT]; + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE Its[EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT]; } EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE; #pragma pack() diff --git a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c index f5869841dc..54f49977c3 100644 --- a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c +++ b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c @@ -20,8 +20,6 @@ #include #include -#define CORE_NUM_PER_SOCKET 32 -#define NODE_IN_SOCKET 2 #define CORECOUNT(X) ((X) * CORE_NUM_PER_SOCKET) STATIC