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[92.154.90.120]) by smtp.gmail.com with ESMTPSA id e10-v6sm1690204wmg.23.2018.11.07.05.13.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 07 Nov 2018 05:13:04 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Wed, 7 Nov 2018 14:13:01 +0100 Message-Id: <20181107131301.15852-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 Subject: [edk2] [PATCH] MdePkg/BaseIoLibIntrinsicArmVirt ARM: avoid double word loads and stores X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marc.zyngier@arm.com, liming.gao@intel.com, michael.d.kinney@intel.com, lersek@redhat.com Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" BaseIoLibIntrinsicArmVirt was created to prevent LTO from merging accesses to MMIO regions, resulting in instructions with multiple output registers that KVM on ARM cannot emulate (since the exception syndrome information that KVM relies on can only describe a single output register) However, using double word loads on ARM amounts to the same thing, and so code that relies on doing 64-bit MMIO to regions that are emulated under KVM (such as the GICv3 TYPER register) will still suffer from the original issue. So replace ldrd and strd with equivalent two instruction sequences. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) -- 2.19.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Philippe Mathieu-Daudé Acked-by: Laszlo Ersek Reviewed-by: Leif Lindholm diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S index 3ad22bd5706d..0d802d6928d6 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S +++ b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S @@ -125,7 +125,8 @@ ASM_PFX(MmioWrite32Internal): // @return The value read. // ASM_PFX(MmioRead64Internal): - ldrd r0, r1, [r0] + ldr r1, [r0, #4] + ldr r0, [r0] dmb bx lr @@ -141,5 +142,6 @@ ASM_PFX(MmioRead64Internal): // ASM_PFX(MmioWrite64Internal): dmb st - strd r2, r3, [r0] + str r2, [r0] + str r3, [r0, #4] bx lr