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if (ret) { error(0, ret, "pthread_getaffinity_np()"); + kfree(q_pcfg); return NULL; } @@ -168,12 +169,14 @@ struct qman_portal *fsl_qman_portal_create(void) if (CPU_ISSET(loop, &cpuset)) { if (q_pcfg->cpu != -1) { pr_err("Thread is not affine to 1 cpu\n"); + kfree(q_pcfg); return NULL; } q_pcfg->cpu = loop; } if (q_pcfg->cpu == -1) { pr_err("Bug in getaffinity handling!\n"); + kfree(q_pcfg); return NULL; } @@ -183,6 +186,7 @@ struct qman_portal *fsl_qman_portal_create(void) ret = process_portal_map(&q_map); if (ret) { error(0, ret, "process_portal_map()"); + kfree(q_pcfg); return NULL; } q_pcfg->channel = q_map.channel; @@ -217,6 +221,7 @@ struct qman_portal *fsl_qman_portal_create(void) close(q_fd); err1: process_portal_unmap(&q_map.addr); + kfree(q_pcfg); return NULL; } From patchwork Thu Apr 5 08:54:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 132848 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp6031654ljb; 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struct qman_portal *qp; + int ret; - if (unlikely(!RTE_PER_LCORE(dpaa_io))) - rte_dpaa_portal_init(arg); + if (unlikely(!RTE_PER_LCORE(dpaa_io))) { + ret = rte_dpaa_portal_init(arg); + if (ret < 0) { + DPAA_BUS_LOG(ERR, "portal initialization failure"); + return ret; + } + } /* Initialise qman specific portals */ qp = fsl_qman_portal_create(); From patchwork Thu Apr 5 08:54:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 132849 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp6031766ljb; Thu, 5 Apr 2018 01:56:38 -0700 (PDT) X-Google-Smtp-Source: AIpwx4/UQiosERMrPr8lIzPJyk7JkN88aBqhJ3tj2fKZeb8ijRbOG2DTbc5vWawAQJgDNilPdGdt X-Received: by 10.223.195.116 with SMTP id e49mr14963041wrg.5.1522918598185; Thu, 05 Apr 2018 01:56:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1522918598; cv=none; d=google.com; s=arc-20160816; b=mvThVEoawLcdxk6rpKY8+XBWsj4i7/J2A/OloCLpYKGGTvq/+UH+Idmn/UxVIE6smk ll+AQ8xbASDZOkNgz8kftLVnxizTq3EM8nZa8COViwsmhFrYfdM+StD1etFXMDNAXzWe bthLFIKSdSNTMzXGDtyz3cVOlzcNUXiPIE4bRPh8J9A75FOcDyCRRMCDdXhYr3LsM6N8 yBNrz7yWQIaplRWv+1JileCCtwVYH33Pz8uXCuXThBi1xJVLmZ37S4noHu13x1cOKv5/ HEK5TTeqKY/oaYCNeQR9iyLMnDzaGPS2+rrKI/3JGsBMi2L5XvejtnUtlqfWmx+vAfk4 tGZQ== ARC-Message-Signature: i=1; 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} - /* Each device can not have more than DPAA_PCD_FQID_MULTIPLIER RX + /* Each device can not have more than DPAA_MAX_NUM_PCD_QUEUES RX * queues. */ - if (num_rx_fqs <= 0 || num_rx_fqs > DPAA_PCD_FQID_MULTIPLIER) { + if (num_rx_fqs <= 0 || num_rx_fqs > DPAA_MAX_NUM_PCD_QUEUES) { DPAA_PMD_ERR("Invalid number of RX queues\n"); return -EINVAL; } From patchwork Thu Apr 5 08:54:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 132850 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp6031961ljb; Thu, 5 Apr 2018 01:56:52 -0700 (PDT) X-Google-Smtp-Source: AIpwx4+Gsi2aShwmxUtsKYrN8MLhbtEU8L29SeuvJ8067cWPRPA3Gx3C9DgdiVKQdEykxuua+pSB X-Received: by 10.223.225.210 with SMTP id l18mr16722302wri.251.1522918612826; Thu, 05 Apr 2018 01:56:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1522918612; cv=none; d=google.com; s=arc-20160816; b=q261YOkYhOV5q3ouCjJW9xiJkMp46iEchpoiNCAvnuBDFNOUbEXTEsZsb4VZ/1HFAf oc19DdaxmGDMHqNx5DcRYYR6e2l404y5214eQU8vhcerYtmQTnPrht+OzaKvce3Iv1xT EoliXjTmOKNceJkUoswQeIBWitaQ6uoF69hQbhIdr7Xq1xIJ7WiL3aSOd/ey9SH4yJCB FJ2c29f59Kq/vE51C6E66UwQnF8wD1ZvyyvVllPqta+GFuyGIvADDb6/O2NbGdakV1yK UV4w690NbVA5JyOjXC7RCrRUamrMExg43LdiM5lrct8yfECd8Fh/1cz5B8a8LyXBtH3J ClPg== ARC-Message-Signature: i=1; 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+ if (limit < stat_cnt) + return stat_cnt; + if (xstats_names != NULL) for (i = 0; i < stat_cnt; i++) snprintf(xstats_names[i].name, @@ -366,7 +369,7 @@ dpaa_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids, return 0; fman_if_stats_get_all(dpaa_intf->fif, values_copy, - sizeof(struct dpaa_if_stats)); + sizeof(struct dpaa_if_stats) / 8); for (i = 0; i < stat_cnt; i++) values[i] = From patchwork Thu Apr 5 08:54:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 132851 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp6032124ljb; Thu, 5 Apr 2018 01:57:08 -0700 (PDT) X-Google-Smtp-Source: AIpwx4+Symoxokj2p0PIFhgZigj2EPVes5IFmMij+uyWzFuyj89R+oaUdrHrvmY2AKcI2fQKxlv5 X-Received: by 10.28.1.197 with SMTP id 188mr9491910wmb.49.1522918628543; Thu, 05 Apr 2018 01:57:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1522918628; cv=none; d=google.com; s=arc-20160816; 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+ free(bpool); goto err; } pname = pool_node->full_name; @@ -449,6 +450,7 @@ fman_if_init(const struct device_node *dpa_node) prop = of_get_property(pool_node, "fsl,bpid", &proplen); if (!prop) { FMAN_ERR(-EINVAL, "%s: no fsl,bpid\n", pname); + free(bpool); goto err; } assert(proplen == sizeof(*prop)); From patchwork Thu Apr 5 08:54:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 132852 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp6032297ljb; Thu, 5 Apr 2018 01:57:21 -0700 (PDT) X-Google-Smtp-Source: AIpwx49KhgNPhOGpx6Md8xCpZZ+S3Meyj0f58meh5H2vkDN8pjEnFbSH1GO7wfN41nINhQZvwAFT X-Received: by 10.28.202.6 with SMTP id a6mr7847766wmg.112.1522918641692; Thu, 05 Apr 2018 01:57:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1522918641; cv=none; d=google.com; s=arc-20160816; b=GEVCiaeyJo04K8WQlwJ045EUoRAZsjnP3trQnBt1e9TY6rc9dFG8NrvSvaXEPkHKL/ ErClcxZEeb0SDlGg6gP3xzmDk/iU3be3LnHmNS7C4flK/5Olh3lNHU0nFnPAqaslu9nO RSaaxDz/VHSWNaHyk/PZr28Wljq03ftYx5CRl3hEHTbm+PSyL1wTzgYLSqmgdVhkuUlY M5uY9wnDkiUk5AqM1KXmrZ6sGg8Aa27cIntKVTl4fan9QTNgZDERjbZ/xYLXGnKJQ2ku kX3Qf0I7QsK6HYz9JcxnOAyFdFQ6goXyEDUV6sEkmZYMloStSWnA0I8cs6S7lROfUF0/ ZBwA== ARC-Message-Signature: i=1; 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unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings); - if (xstats == NULL) - return 0; - if (n < num) return num; + if (xstats == NULL) + return 0; + /* Get Counters from page_0*/ retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 0, 0, &value[0]); @@ -1153,10 +1153,13 @@ dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, static int dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev, struct rte_eth_xstat_name *xstats_names, - __rte_unused unsigned int limit) + unsigned int limit) { unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings); + if (limit < stat_cnt) + return stat_cnt; + if (xstats_names != NULL) for (i = 0; i < stat_cnt; i++) snprintf(xstats_names[i].name, From patchwork Thu Apr 5 08:54:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 132854 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp6032902ljb; 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This keeps the portal in busy mode. This patch updates the portals bifurcation to have separate portals to receive packets for Ethernet and all other devices to use a common portal. Signed-off-by: Nipun Gupta --- drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 27 ++++++++++++++------------- drivers/bus/fslmc/portal/dpaa2_hw_dpio.h | 8 ++++---- drivers/bus/fslmc/rte_bus_fslmc_version.map | 8 +++++++- drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 12 ++++++------ drivers/net/dpaa2/dpaa2_rxtx.c | 29 ++++++++++++++++------------- 5 files changed, 47 insertions(+), 37 deletions(-) -- 2.7.4 diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c index 881dd5f..a741626 100644 --- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c +++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c @@ -350,7 +350,7 @@ dpaa2_affine_qbman_swp(void) } int -dpaa2_affine_qbman_swp_sec(void) +dpaa2_affine_qbman_ethrx_swp(void) { unsigned int lcore_id = rte_lcore_id(); uint64_t tid = syscall(SYS_gettid); @@ -361,35 +361,36 @@ dpaa2_affine_qbman_swp_sec(void) else if (lcore_id >= RTE_MAX_LCORE) return -1; - if (dpaa2_io_portal[lcore_id].sec_dpio_dev) { + if (dpaa2_io_portal[lcore_id].ethrx_dpio_dev) { DPAA2_BUS_DP_INFO( "DPAA Portal=%p (%d) is being shared between thread" " %" PRIu64 " and current %" PRIu64 "\n", - dpaa2_io_portal[lcore_id].sec_dpio_dev, - dpaa2_io_portal[lcore_id].sec_dpio_dev->index, + dpaa2_io_portal[lcore_id].ethrx_dpio_dev, + dpaa2_io_portal[lcore_id].ethrx_dpio_dev->index, dpaa2_io_portal[lcore_id].sec_tid, tid); - RTE_PER_LCORE(_dpaa2_io).sec_dpio_dev - = dpaa2_io_portal[lcore_id].sec_dpio_dev; + RTE_PER_LCORE(_dpaa2_io).ethrx_dpio_dev + = dpaa2_io_portal[lcore_id].ethrx_dpio_dev; rte_atomic16_inc(&dpaa2_io_portal - [lcore_id].sec_dpio_dev->ref_count); + [lcore_id].ethrx_dpio_dev->ref_count); dpaa2_io_portal[lcore_id].sec_tid = tid; DPAA2_BUS_DP_DEBUG( "Old Portal=%p (%d) affined thread" " - %" PRIu64 "\n", - dpaa2_io_portal[lcore_id].sec_dpio_dev, - dpaa2_io_portal[lcore_id].sec_dpio_dev->index, + dpaa2_io_portal[lcore_id].ethrx_dpio_dev, + dpaa2_io_portal[lcore_id].ethrx_dpio_dev->index, tid); return 0; } /* Populate the dpaa2_io_portal structure */ - dpaa2_io_portal[lcore_id].sec_dpio_dev = dpaa2_get_qbman_swp(lcore_id); + dpaa2_io_portal[lcore_id].ethrx_dpio_dev = + dpaa2_get_qbman_swp(lcore_id); - if (dpaa2_io_portal[lcore_id].sec_dpio_dev) { - RTE_PER_LCORE(_dpaa2_io).sec_dpio_dev - = dpaa2_io_portal[lcore_id].sec_dpio_dev; + if (dpaa2_io_portal[lcore_id].ethrx_dpio_dev) { + RTE_PER_LCORE(_dpaa2_io).ethrx_dpio_dev + = dpaa2_io_portal[lcore_id].ethrx_dpio_dev; dpaa2_io_portal[lcore_id].sec_tid = tid; return 0; } else { diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h index c0bd878..d593eea 100644 --- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h +++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.h @@ -13,7 +13,7 @@ struct dpaa2_io_portal_t { struct dpaa2_dpio_dev *dpio_dev; - struct dpaa2_dpio_dev *sec_dpio_dev; + struct dpaa2_dpio_dev *ethrx_dpio_dev; uint64_t net_tid; uint64_t sec_tid; void *eventdev; @@ -25,8 +25,8 @@ RTE_DECLARE_PER_LCORE(struct dpaa2_io_portal_t, _dpaa2_io); #define DPAA2_PER_LCORE_DPIO RTE_PER_LCORE(_dpaa2_io).dpio_dev #define DPAA2_PER_LCORE_PORTAL DPAA2_PER_LCORE_DPIO->sw_portal -#define DPAA2_PER_LCORE_SEC_DPIO RTE_PER_LCORE(_dpaa2_io).sec_dpio_dev -#define DPAA2_PER_LCORE_SEC_PORTAL DPAA2_PER_LCORE_SEC_DPIO->sw_portal +#define DPAA2_PER_LCORE_ETHRX_DPIO RTE_PER_LCORE(_dpaa2_io).ethrx_dpio_dev +#define DPAA2_PER_LCORE_ETHRX_PORTAL DPAA2_PER_LCORE_ETHRX_DPIO->sw_portal /* Variable to store DPAA2 platform type */ extern uint32_t dpaa2_svr_family; @@ -39,7 +39,7 @@ struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(int cpu_id); int dpaa2_affine_qbman_swp(void); /* Affine additional DPIO portal to current crypto processing thread */ -int dpaa2_affine_qbman_swp_sec(void); +int dpaa2_affine_qbman_ethrx_swp(void); /* allocate memory for FQ - dq storage */ int diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map b/drivers/bus/fslmc/rte_bus_fslmc_version.map index b7db074..f519651 100644 --- a/drivers/bus/fslmc/rte_bus_fslmc_version.map +++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map @@ -2,7 +2,6 @@ DPDK_17.05 { global: dpaa2_affine_qbman_swp; - dpaa2_affine_qbman_swp_sec; dpaa2_alloc_dpbp_dev; dpaa2_alloc_dq_storage; dpaa2_free_dpbp_dev; @@ -101,3 +100,10 @@ DPDK_18.02 { rte_fslmc_get_device_count; } DPDK_17.11; + +DPDK_18.05 { + global: + + dpaa2_affine_qbman_ethrx_swp; + +} DPDK_18.02; diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c index 7c80df6..d02d821 100644 --- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c +++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c @@ -1159,14 +1159,14 @@ dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops, qbman_eq_desc_set_response(&eqdesc, 0, 0); qbman_eq_desc_set_fq(&eqdesc, dpaa2_qp->tx_vq.fqid); - if (!DPAA2_PER_LCORE_SEC_DPIO) { - ret = dpaa2_affine_qbman_swp_sec(); + if (!DPAA2_PER_LCORE_DPIO) { + ret = dpaa2_affine_qbman_swp(); if (ret) { DPAA2_SEC_ERR("Failure in affining portal"); return 0; } } - swp = DPAA2_PER_LCORE_SEC_PORTAL; + swp = DPAA2_PER_LCORE_PORTAL; while (nb_ops) { frames_to_send = (nb_ops >> 3) ? MAX_TX_RING_SLOTS : nb_ops; @@ -1307,14 +1307,14 @@ dpaa2_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops, const struct qbman_fd *fd; struct qbman_pull_desc pulldesc; - if (!DPAA2_PER_LCORE_SEC_DPIO) { - ret = dpaa2_affine_qbman_swp_sec(); + if (!DPAA2_PER_LCORE_DPIO) { + ret = dpaa2_affine_qbman_swp(); if (ret) { DPAA2_SEC_ERR("Failure in affining portal"); return 0; } } - swp = DPAA2_PER_LCORE_SEC_PORTAL; + swp = DPAA2_PER_LCORE_PORTAL; dq_storage = dpaa2_qp->rx_vq.q_storage->dq_storage[0]; qbman_pull_desc_clear(&pulldesc); diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c index 532de94..d1cfe95 100644 --- a/drivers/net/dpaa2/dpaa2_rxtx.c +++ b/drivers/net/dpaa2/dpaa2_rxtx.c @@ -481,14 +481,15 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts) struct queue_storage_info_t *q_storage = dpaa2_q->q_storage; struct rte_eth_dev *dev = dpaa2_q->dev; - if (unlikely(!DPAA2_PER_LCORE_DPIO)) { - ret = dpaa2_affine_qbman_swp(); + if (unlikely(!DPAA2_PER_LCORE_ETHRX_DPIO)) { + ret = dpaa2_affine_qbman_ethrx_swp(); if (ret) { DPAA2_PMD_ERR("Failure in affining portal"); return 0; } } - swp = DPAA2_PER_LCORE_PORTAL; + swp = DPAA2_PER_LCORE_ETHRX_PORTAL; + if (unlikely(!q_storage->active_dqs)) { q_storage->toggle = 0; dq_storage = q_storage->dq_storage[q_storage->toggle]; @@ -500,11 +501,12 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts) qbman_pull_desc_set_fq(&pulldesc, fqid); qbman_pull_desc_set_storage(&pulldesc, dq_storage, (dma_addr_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1); - if (check_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index)) { + if (check_swp_active_dqs(DPAA2_PER_LCORE_ETHRX_DPIO->index)) { while (!qbman_check_command_complete( - get_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index))) + get_swp_active_dqs( + DPAA2_PER_LCORE_ETHRX_DPIO->index))) ; - clear_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index); + clear_swp_active_dqs(DPAA2_PER_LCORE_ETHRX_DPIO->index); } while (1) { if (qbman_swp_pull(swp, &pulldesc)) { @@ -516,8 +518,9 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts) break; } q_storage->active_dqs = dq_storage; - q_storage->active_dpio_id = DPAA2_PER_LCORE_DPIO->index; - set_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index, dq_storage); + q_storage->active_dpio_id = DPAA2_PER_LCORE_ETHRX_DPIO->index; + set_swp_active_dqs(DPAA2_PER_LCORE_ETHRX_DPIO->index, + dq_storage); } dq_storage = q_storage->active_dqs; @@ -583,11 +586,11 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts) num_rx++; } while (pending); - if (check_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index)) { + if (check_swp_active_dqs(DPAA2_PER_LCORE_ETHRX_DPIO->index)) { while (!qbman_check_command_complete( - get_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index))) + get_swp_active_dqs(DPAA2_PER_LCORE_ETHRX_DPIO->index))) ; - clear_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index); + clear_swp_active_dqs(DPAA2_PER_LCORE_ETHRX_DPIO->index); } /* issue a volatile dequeue command for next pull */ while (1) { @@ -599,8 +602,8 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts) break; } q_storage->active_dqs = dq_storage1; - q_storage->active_dpio_id = DPAA2_PER_LCORE_DPIO->index; - set_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index, dq_storage1); + q_storage->active_dpio_id = DPAA2_PER_LCORE_ETHRX_DPIO->index; + set_swp_active_dqs(DPAA2_PER_LCORE_ETHRX_DPIO->index, dq_storage1); dpaa2_q->rx_pkts += num_rx;