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X-Received-From: 2a00:1450:400c:c0c::243 Subject: [Qemu-devel] [RFC PATCH] target/arm: support reading of CNTVCT_EL0 from user-space X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , takeharu.kato@linaro.org, =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-devel@nongnu.org, renato.golin@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Since kernel commit a86bd139f2 (arm64: arch_timer: Enable CNTVCT_EL0 trap..) user-space has been able to read this system register. This patch enables access to that register although currently it always returns 0 as we don't yet have a mechanism for managing timers in linux-user mode. Signed-off-by: Alex Bennée --- target/arm/helper.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) -- 2.17.0 diff --git a/target/arm/helper.c b/target/arm/helper.c index b14fdab140..8244badd63 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -2121,11 +2121,25 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = { }; #else -/* In user-mode none of the generic timer registers are accessible, - * and their implementation depends on QEMU_CLOCK_VIRTUAL and qdev gpio outputs, - * so instead just don't register any of them. + +/* In user-mode most of the generic timer registers are inaccessible + * however modern kernels (4.12+) allow access to cntvct_el0 */ + +static uint64_t gt_virt_cnt_read(CPUARMState *env, const ARMCPRegInfo *ri) +{ + /* Currently we have no support for QEMUTimer in linux-user so we + * can't call gt_get_countervalue(env). + */ + return 0; +} + static const ARMCPRegInfo generic_timer_cp_reginfo[] = { + { .name = "CNTVCT_EL0", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 3, .crn = 14, .crm = 0, .opc2 = 2, + .access = PL0_R, .type = ARM_CP_NO_RAW | ARM_CP_IO, + .readfn = gt_virt_cnt_read, + }, REGINFO_SENTINEL };