From patchwork Wed Mar 3 17:42:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Konovalov X-Patchwork-Id: 392634 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp5611909jap; Wed, 3 Mar 2021 17:52:49 -0800 (PST) X-Google-Smtp-Source: ABdhPJxiaQh/ltgsW4dMFdGwYHMK96nvP5HTqgJP07ZW4/vZMhu1MQYDZTnkcWuJpwh5k/+zCQtr X-Received: by 2002:a17:906:9888:: with SMTP id zc8mr1711235ejb.310.1614822769228; Wed, 03 Mar 2021 17:52:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614822769; cv=none; d=google.com; s=arc-20160816; b=IbmWJm7DRfcFIfoms8RyCEbzyTctjFqBkR4nCFogsF6tFbT3yfqsXOsxHsGlTe8doh xqCkd4nUo2wLMszV+u66DwZOCZVUmHSUPiZRHnpXp7n3tWQOqPPWHK69g8q8/1r4kuIc pV4ogQm/zWC3WkN+b3BfOlH6Vz6hbkMyiKbd7IKEtyYOfsWbiJ8hoiIjU2r5SaCl5+lo 0W78OVwpRT49tzsGR996dNuC6dYTyPI2WLRhXqwfOuMtjU/S/SWMIdBO4L4r2sXi2LXB DJKC3wHtV+pnCVbTVeSgkyGsvLQ2a6B3IVNO90GFLxQyMB3UP1f92rfvB8A57Pt2YQvI F+vQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=843Cqu10do3AOcdjRFPledKrGoMFl6vHJzmaFjeMBSM=; b=OmuTgeBStgTE2oEMbyghrbP9Lwt+eF1GpQkyxT12H8/ZyTgPaV4GxR1iOmWoEtuPZd Q+aczrtbeUOjsTlQ9svkdnZC5RC3Za2ax+rIojwzCmSAwX+hEMU9RoYMzlhNGJNRQIue +tvaEZSCNpZj52c+ad7Jbq5slXRy6D1go96ZCZI1ElxrJYWs+ZAxbKE8VUGHJm/xHEQU L7RYGFV15Rpm40yv321p+hI/+pJX4JK1/l6/9Bv5F4WGH3RLOuhmUdQmWV+18UMVqYDY bAXHAzUF/RFImHDGjaIq11scYRb6MxhLvXN7sCOwfnFVQJKvF/G9qoSSjErqUf6AXAlG 4w+A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="zix6/HFr"; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id p17si16189393ejd.307.2021.03.03.17.52.49; Wed, 03 Mar 2021 17:52:49 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="zix6/HFr"; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1389818AbhCCVr3 (ORCPT + 16 others); Wed, 3 Mar 2021 16:47:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48382 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241656AbhCCRoX (ORCPT ); Wed, 3 Mar 2021 12:44:23 -0500 Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6FF8DC061762 for ; Wed, 3 Mar 2021 09:43:23 -0800 (PST) Received: by mail-lf1-x12f.google.com with SMTP id f1so38489439lfu.3 for ; Wed, 03 Mar 2021 09:43:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=843Cqu10do3AOcdjRFPledKrGoMFl6vHJzmaFjeMBSM=; b=zix6/HFrJghHi2HtjcVyWLj0N+uc6HhJDfNpB38u08KjESRVwSyspbvWr93KTIwSfl 4cbcUGdgY8NwVv5x/WJWPg/BDaMShLrKU+xdao/Sqsrk2WMrmhH1B2xMXh5h+UGckrms JLmOflDgf8EGD3FsfoxRr/JupQHIkt2hkS3RFbkFWze5IyS8KmVpzFsHGxsO35F/JWni i7Q/FSwCvrva4MASIHcRp4+t5ncbfkg0gB3ZYXNOWFoBgTKVlb5lVkOMAS6A0tLWM4iD zfrgGoMRkbuF0wddNl5ovU0IlkSzfTFIZYZdRQjnPxl07z3KSSLeOlCpLwUSM9D4QQ9D hXdg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=843Cqu10do3AOcdjRFPledKrGoMFl6vHJzmaFjeMBSM=; b=h7HN4xNvKRsCHLBzHWscNPjhdgAo3a1YuYlbdzmKLvXR5Ko/982GT72QvfwB5w/vYf dnfso4CvUX3Ao71acfGnUgjGtmZxwyTvG/t++awURQupuzsh/QR3ETeVAoTMTYbKoRae XcqhEphA+aJ/Tk1O8WkFN/YeialqmbR10aCoPcl4ueKn7TKggK3tLRf09wi8MqJBWoJD sATsY+8D3liwOJ6xgpiB+6K+1VATPAfnSxbYLDiMRL+5G1/zv9l2NlrjFQx4zqalTwdl SIBRaU4cCK/luaVPAeF2t6q8TNPcjreaQO/9ncg89/Bp7X91tWnAVH67VzbSbGuRVuvo o4hw== X-Gm-Message-State: AOAM530wWTH2m4+XYKJITtjs/VTGMQSTXdfIUP8JfB/zMKB6yM3sa9nR p+CAt3wiJa3bniUW24joRqmvpg== X-Received: by 2002:a05:6512:3081:: with SMTP id z1mr15929096lfd.257.1614793401892; Wed, 03 Mar 2021 09:43:21 -0800 (PST) Received: from localhost.localdomain ([85.249.43.69]) by smtp.googlemail.com with ESMTPSA id s7sm2101441lfi.140.2021.03.03.09.43.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 09:43:21 -0800 (PST) From: Andrey Konovalov To: junak.pub@gmail.com, robert.foss@linaro.org, sakari.ailus@linux.intel.com Cc: todor.too@gmail.com, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, laurent.pinchart@ideasonboard.com, jacopo@jmondi.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Andrey Konovalov Subject: [PATCH v3 1/3] v4l: common: v4l2_get_link_freq: add printing a warning Date: Wed, 3 Mar 2021 20:42:48 +0300 Message-Id: <20210303174250.11405-2-andrey.konovalov@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210303174250.11405-1-andrey.konovalov@linaro.org> References: <20210303174250.11405-1-andrey.konovalov@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Print a warning if V4L2_CID_LINK_FREQ control is not implemented. Signed-off-by: Andrey Konovalov Reviewed-by: Jacopo Mondi Reviewed-by: Laurent Pinchart --- drivers/media/v4l2-core/v4l2-common.c | 5 +++++ 1 file changed, 5 insertions(+) -- 2.17.1 diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c index 133d20e40f82..04af03285a20 100644 --- a/drivers/media/v4l2-core/v4l2-common.c +++ b/drivers/media/v4l2-core/v4l2-common.c @@ -469,6 +469,11 @@ s64 v4l2_get_link_freq(struct v4l2_ctrl_handler *handler, unsigned int mul, return -ENOENT; freq = div_u64(v4l2_ctrl_g_ctrl_int64(ctrl) * mul, div); + + pr_warn("%s: Link frequency estimated using pixel rate: result might be inaccurate\n", + __func__); + pr_warn("%s: Consider implementing support for V4L2_CID_LINK_FREQ in the transmitter driver\n", + __func__); } return freq > 0 ? freq : -EINVAL; From patchwork Wed Mar 3 17:42:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Konovalov X-Patchwork-Id: 392641 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp5612994jap; Wed, 3 Mar 2021 17:54:38 -0800 (PST) X-Google-Smtp-Source: ABdhPJzcc6KWiXYTFF14tcmtOA3RLCJakrXjTpVhavRVS6+nqU909QSvTPdxQ3BhQ67YnjJ/1jwd X-Received: by 2002:aa7:cd54:: with SMTP id v20mr1968680edw.80.1614822769728; Wed, 03 Mar 2021 17:52:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614822769; cv=none; d=google.com; s=arc-20160816; b=Ij5odC1xmoxNj0++JObuWDLCFGjV4ihyEM938gcsUUPQRN0ABvqhCBecqHBdJbEsY+ teQBPepgclo2GooP3c7cFWaRTDhFnW9R1cMOM/1u4CLpN2/0encjl3vZBBLyhb6ZduCB R1j38879VMpH0Wi8uDWhnu/EKUjjOwhUhl3n3T1Asy8pjZ65IUwF1fsoONckRNJ685ZE vbHmtdk5iisVCTOjRRS7wZPAjkN1dJl22iV13ESVL1ZQ6a9JtszwH58V/UNnnIfmU2Ko kKGtyvJ+uqEsAb2UTASk3005+/taUKbIuJA9DpQhLVhFUB2xSgARcZYFzWkR1E0r7vXV B8eg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=1IcwK3DemopH0DjeG0nZJ6cnUVN6kwVF/dS7NnpgeP0=; b=S6ObAptYffkbm4Q89iHTsBFVaioV2z+qN/b0xkEDIT7MUF5m+Ljdd4wtPTnaV0kygG hdEu/7kPWwxUwApKtyXujLF/ZmOgtxPTkmf1liVShN8uXVmds0moEjYG2vN9QDj285R0 +sj7W930ggszTiHIDxVBrM2ywHUFJQZPs89Qyd3jcDBgHKTnkGmVi+A73A5a79Iy+4T0 V1bbssVqC79P2MNeS/Jwup9RANIisaKXVk+Z1cNkWG3eZHmt1v4vPvMVp7SI5xGfriXq 6iUyOXDMbtXjamwp/V616KFMCIGt9j0rZtCdU3+fVc4mW15xQS2j/Ym9bQ9gszpB1d2j H/Yw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tryws+fx; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id p17si16189393ejd.307.2021.03.03.17.52.49; Wed, 03 Mar 2021 17:52:49 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tryws+fx; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1389836AbhCCVrp (ORCPT + 16 others); Wed, 3 Mar 2021 16:47:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48958 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1386126AbhCCRqn (ORCPT ); Wed, 3 Mar 2021 12:46:43 -0500 Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CBA05C0613D8 for ; Wed, 3 Mar 2021 09:43:26 -0800 (PST) Received: by mail-lf1-x12f.google.com with SMTP id v9so20678209lfa.1 for ; Wed, 03 Mar 2021 09:43:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1IcwK3DemopH0DjeG0nZJ6cnUVN6kwVF/dS7NnpgeP0=; b=tryws+fxiTO4g1MkSYeAg1x/Nyj4xoGpoTRjxq0mWszjuPMpVOAJXpvGxVi39b+AD9 Q+16cwUjZ2gqT0ml0P9XvERDJiBm2oqyo+NAOXLOFvuaboATnex18STcyTobSmFGvkpv RRPIgofFn/hzlleW3mNbZJkDiJNd34xhFuAKPRrXZwG107cYo4Ll/AHgX/KXNM9RU4/+ KXT3Hczm1L5VfY+n/xWlyzoceWpTSPT3tvmLu1oIZw6p3T6iREPo8qAyF90eQ4arsQ7W yy7UOxx7NzMOhRbwJ4RE4c4hidlpKilv/uGZCIR/kvGz6oCsKkewBq2PGUCFo9KtNZmv by0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1IcwK3DemopH0DjeG0nZJ6cnUVN6kwVF/dS7NnpgeP0=; b=Iub0Qb7IcIpK12ufjSMUXIrRszCHITPQ+dESLzoXq0Uv+WfypyN9nTLexwPZUrHNtD CZFRYbxYYGmKHk0PQqYn1FJCuiGWTSvSEZ2HMGNCiQef0k0n8iIdskt6BhgUBuxfuI4z gtHqppbMD5oQ0GourX6ezjr/z3cQmLbPyMPgqVgxbbqq7krimumU7PUk/fzHYMlbLDey SOkD3n2Pqxa/xKRhgmKJun9H4mdnTS+yjR11paTpfzV681fnUF9HUDdDsO9CQtkdxQl1 hNMYP2LJXZ6UsRyggzs0Tuvg/zwHRcW+Bpkqr2iGPD2FxGNH1z8Mj7quMymUlGTtpQPC oz7A== X-Gm-Message-State: AOAM532QYftm+2UkeYOUlsgMlV/jJ/fIB+NNx4W9PzI6LjqIVb8MoTLj p40ZWeau+r6OOF4JlGmmd+F+VA== X-Received: by 2002:a19:86c3:: with SMTP id i186mr14039688lfd.434.1614793405196; Wed, 03 Mar 2021 09:43:25 -0800 (PST) Received: from localhost.localdomain ([85.249.43.69]) by smtp.googlemail.com with ESMTPSA id s7sm2101441lfi.140.2021.03.03.09.43.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 09:43:24 -0800 (PST) From: Andrey Konovalov To: junak.pub@gmail.com, robert.foss@linaro.org, sakari.ailus@linux.intel.com Cc: todor.too@gmail.com, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, laurent.pinchart@ideasonboard.com, jacopo@jmondi.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Andrey Konovalov Subject: [PATCH v3 2/3] media: camss: use v4l2_get_link_freq() to calculate the relevant clocks Date: Wed, 3 Mar 2021 20:42:49 +0300 Message-Id: <20210303174250.11405-3-andrey.konovalov@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210303174250.11405-1-andrey.konovalov@linaro.org> References: <20210303174250.11405-1-andrey.konovalov@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org There are places in the camss driver where camss_get_pixel_clock() is called to get the pixel rate (using V4L2_CID_PIXEL_RATE control) and to calculate the link frequency from it. There is a case when this would not work: when V4L2_CID_PIXEL_RATE gets the rate at which the pixels are read (sampled) from the sensor's pixel array, and this rate is different from the pixel transmission rate over the CSI link, the link frequency value can't be calculated from the pixel rate. One needs to use V4L2_CID_LINK_FREQ to get the link frequency in this case. Replace such calls to camss_get_pixel_clock() with calls to a wrapper around v4l2_get_link_freq(). v4l2_get_link_freq() tries V4L2_CID_LINK_FREQ first, and if it is not implemented by the camera sensor driver, falls back to V4L2_CID_PIXEL_RATE to calculate the link frequency value from. Calls to camss_get_pixel_clock() from vfe_[check,set]_clock_rates() are left intact as it looks like this VFE clock does depend on the rate the pixel samples comes out of the camera sensor, not on the frequency at which the link between the sensor and the CSI receiver operates. Signed-off-by: Andrey Konovalov Acked-by: Robert Foss Reviewed-by: Jacopo Mondi --- .../media/platform/qcom/camss/camss-csid.c | 20 +++++------ .../qcom/camss/camss-csiphy-2ph-1-0.c | 22 ++++++------ .../qcom/camss/camss-csiphy-3ph-1-0.c | 22 ++++++------ .../media/platform/qcom/camss/camss-csiphy.c | 36 +++++++++---------- .../media/platform/qcom/camss/camss-csiphy.h | 2 +- drivers/media/platform/qcom/camss/camss.c | 23 ++++++++++++ drivers/media/platform/qcom/camss/camss.h | 2 ++ 7 files changed, 71 insertions(+), 56 deletions(-) -- 2.17.1 diff --git a/drivers/media/platform/qcom/camss/camss-csid.c b/drivers/media/platform/qcom/camss/camss-csid.c index be3fe76f3dc3..cff9759c9158 100644 --- a/drivers/media/platform/qcom/camss/camss-csid.c +++ b/drivers/media/platform/qcom/camss/camss-csid.c @@ -462,13 +462,17 @@ static irqreturn_t csid_isr(int irq, void *dev) static int csid_set_clock_rates(struct csid_device *csid) { struct device *dev = csid->camss->dev; - u32 pixel_clock; + const struct csid_format *fmt; + s64 link_freq; int i, j; int ret; - ret = camss_get_pixel_clock(&csid->subdev.entity, &pixel_clock); - if (ret) - pixel_clock = 0; + fmt = csid_get_fmt_entry(csid->formats, csid->nformats, + csid->fmt[MSM_CSIPHY_PAD_SINK].code); + link_freq = camss_get_link_freq(&csid->subdev.entity, fmt->bpp, + csid->phy.lane_cnt); + if (link_freq < 0) + link_freq = 0; for (i = 0; i < csid->nclocks; i++) { struct camss_clock *clock = &csid->clock[i]; @@ -477,13 +481,7 @@ static int csid_set_clock_rates(struct csid_device *csid) !strcmp(clock->name, "csi1") || !strcmp(clock->name, "csi2") || !strcmp(clock->name, "csi3")) { - const struct csid_format *f = csid_get_fmt_entry( - csid->formats, - csid->nformats, - csid->fmt[MSM_CSIPHY_PAD_SINK].code); - u8 num_lanes = csid->phy.lane_cnt; - u64 min_rate = pixel_clock * f->bpp / - (2 * num_lanes * 4); + u64 min_rate = link_freq / 4; long rate; camss_add_clock_margin(&min_rate); diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-2ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-2ph-1-0.c index 12bce391d71f..30b454c369ab 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy-2ph-1-0.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy-2ph-1-0.c @@ -51,16 +51,13 @@ static void csiphy_reset(struct csiphy_device *csiphy) * * Helper function to calculate settle count value. This is * based on the CSI2 T_hs_settle parameter which in turn - * is calculated based on the CSI2 transmitter pixel clock - * frequency. + * is calculated based on the CSI2 transmitter link frequency. * - * Return settle count value or 0 if the CSI2 pixel clock - * frequency is not available + * Return settle count value or 0 if the CSI2 link frequency + * is not available */ -static u8 csiphy_settle_cnt_calc(u32 pixel_clock, u8 bpp, u8 num_lanes, - u32 timer_clk_rate) +static u8 csiphy_settle_cnt_calc(s64 link_freq, u32 timer_clk_rate) { - u32 mipi_clock; /* Hz */ u32 ui; /* ps */ u32 timer_period; /* ps */ u32 t_hs_prepare_max; /* ps */ @@ -68,8 +65,10 @@ static u8 csiphy_settle_cnt_calc(u32 pixel_clock, u8 bpp, u8 num_lanes, u32 t_hs_settle; /* ps */ u8 settle_cnt; - mipi_clock = pixel_clock * bpp / (2 * num_lanes); - ui = div_u64(1000000000000LL, mipi_clock); + if (link_freq <= 0) + return 0; + + ui = div_u64(1000000000000LL, link_freq); ui /= 2; t_hs_prepare_max = 85000 + 6 * ui; t_hs_prepare_zero_min = 145000 + 10 * ui; @@ -83,15 +82,14 @@ static u8 csiphy_settle_cnt_calc(u32 pixel_clock, u8 bpp, u8 num_lanes, static void csiphy_lanes_enable(struct csiphy_device *csiphy, struct csiphy_config *cfg, - u32 pixel_clock, u8 bpp, u8 lane_mask) + s64 link_freq, u8 lane_mask) { struct csiphy_lanes_cfg *c = &cfg->csi2->lane_cfg; u8 settle_cnt; u8 val, l = 0; int i = 0; - settle_cnt = csiphy_settle_cnt_calc(pixel_clock, bpp, c->num_data, - csiphy->timer_clk_rate); + settle_cnt = csiphy_settle_cnt_calc(link_freq, csiphy->timer_clk_rate); writel_relaxed(0x1, csiphy->base + CAMSS_CSI_PHY_GLBL_T_INIT_CFG0); diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c index 97cb9de85031..da7c3d3f9a10 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c @@ -107,24 +107,23 @@ static irqreturn_t csiphy_isr(int irq, void *dev) * * Helper function to calculate settle count value. This is * based on the CSI2 T_hs_settle parameter which in turn - * is calculated based on the CSI2 transmitter pixel clock - * frequency. + * is calculated based on the CSI2 transmitter link frequency. * - * Return settle count value or 0 if the CSI2 pixel clock - * frequency is not available + * Return settle count value or 0 if the CSI2 link frequency + * is not available */ -static u8 csiphy_settle_cnt_calc(u32 pixel_clock, u8 bpp, u8 num_lanes, - u32 timer_clk_rate) +static u8 csiphy_settle_cnt_calc(s64 link_freq, u32 timer_clk_rate) { - u32 mipi_clock; /* Hz */ u32 ui; /* ps */ u32 timer_period; /* ps */ u32 t_hs_prepare_max; /* ps */ u32 t_hs_settle; /* ps */ u8 settle_cnt; - mipi_clock = pixel_clock * bpp / (2 * num_lanes); - ui = div_u64(1000000000000LL, mipi_clock); + if (link_freq <= 0) + return 0; + + ui = div_u64(1000000000000LL, link_freq); ui /= 2; t_hs_prepare_max = 85000 + 6 * ui; t_hs_settle = t_hs_prepare_max; @@ -137,15 +136,14 @@ static u8 csiphy_settle_cnt_calc(u32 pixel_clock, u8 bpp, u8 num_lanes, static void csiphy_lanes_enable(struct csiphy_device *csiphy, struct csiphy_config *cfg, - u32 pixel_clock, u8 bpp, u8 lane_mask) + s64 link_freq, u8 lane_mask) { struct csiphy_lanes_cfg *c = &cfg->csi2->lane_cfg; u8 settle_cnt; u8 val, l = 0; int i; - settle_cnt = csiphy_settle_cnt_calc(pixel_clock, bpp, c->num_data, - csiphy->timer_clk_rate); + settle_cnt = csiphy_settle_cnt_calc(link_freq, csiphy->timer_clk_rate); val = BIT(c->clk.pos); for (i = 0; i < c->num_data; i++) diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/media/platform/qcom/camss/camss-csiphy.c index 509c9a59c09c..40384d7ca78c 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy.c @@ -102,23 +102,23 @@ static u8 csiphy_get_bpp(const struct csiphy_format *formats, static int csiphy_set_clock_rates(struct csiphy_device *csiphy) { struct device *dev = csiphy->camss->dev; - u32 pixel_clock; + s64 link_freq; int i, j; int ret; - ret = camss_get_pixel_clock(&csiphy->subdev.entity, &pixel_clock); - if (ret) - pixel_clock = 0; + u8 bpp = csiphy_get_bpp(csiphy->formats, csiphy->nformats, + csiphy->fmt[MSM_CSIPHY_PAD_SINK].code); + u8 num_lanes = csiphy->cfg.csi2->lane_cfg.num_data; + + link_freq = camss_get_link_freq(&csiphy->subdev.entity, bpp, num_lanes); + if (link_freq < 0) + link_freq = 0; for (i = 0; i < csiphy->nclocks; i++) { struct camss_clock *clock = &csiphy->clock[i]; if (csiphy->rate_set[i]) { - u8 bpp = csiphy_get_bpp(csiphy->formats, - csiphy->nformats, - csiphy->fmt[MSM_CSIPHY_PAD_SINK].code); - u8 num_lanes = csiphy->cfg.csi2->lane_cfg.num_data; - u64 min_rate = pixel_clock * bpp / (2 * num_lanes * 4); + u64 min_rate = link_freq / 4; long round_rate; camss_add_clock_margin(&min_rate); @@ -238,22 +238,18 @@ static u8 csiphy_get_lane_mask(struct csiphy_lanes_cfg *lane_cfg) static int csiphy_stream_on(struct csiphy_device *csiphy) { struct csiphy_config *cfg = &csiphy->cfg; - u32 pixel_clock; + s64 link_freq; u8 lane_mask = csiphy_get_lane_mask(&cfg->csi2->lane_cfg); u8 bpp = csiphy_get_bpp(csiphy->formats, csiphy->nformats, csiphy->fmt[MSM_CSIPHY_PAD_SINK].code); + u8 num_lanes = csiphy->cfg.csi2->lane_cfg.num_data; u8 val; - int ret; - ret = camss_get_pixel_clock(&csiphy->subdev.entity, &pixel_clock); - if (ret) { - dev_err(csiphy->camss->dev, - "Cannot get CSI2 transmitter's pixel clock\n"); - return -EINVAL; - } - if (!pixel_clock) { + link_freq = camss_get_link_freq(&csiphy->subdev.entity, bpp, num_lanes); + + if (link_freq < 0) { dev_err(csiphy->camss->dev, - "Got pixel clock == 0, cannot continue\n"); + "Cannot get CSI2 transmitter's link frequency\n"); return -EINVAL; } @@ -268,7 +264,7 @@ static int csiphy_stream_on(struct csiphy_device *csiphy) writel_relaxed(val, csiphy->base_clk_mux); wmb(); - csiphy->ops->lanes_enable(csiphy, cfg, pixel_clock, bpp, lane_mask); + csiphy->ops->lanes_enable(csiphy, cfg, link_freq, lane_mask); return 0; } diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.h b/drivers/media/platform/qcom/camss/camss-csiphy.h index f7967ef836dc..d71b8bc6ec00 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy.h +++ b/drivers/media/platform/qcom/camss/camss-csiphy.h @@ -50,7 +50,7 @@ struct csiphy_hw_ops { void (*reset)(struct csiphy_device *csiphy); void (*lanes_enable)(struct csiphy_device *csiphy, struct csiphy_config *cfg, - u32 pixel_clock, u8 bpp, u8 lane_mask); + s64 link_freq, u8 lane_mask); void (*lanes_disable)(struct csiphy_device *csiphy, struct csiphy_config *cfg); irqreturn_t (*isr)(int irq, void *dev); diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 7c0f669f8aa6..eb8fb8c34acd 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -548,6 +548,29 @@ struct media_entity *camss_find_sensor(struct media_entity *entity) } } +/** + * camss_get_link_freq - Get link frequency from sensor + * @entity: Media entity in the current pipeline + * @bpp: Number of bits per pixel for the current format + * @lanes: Number of lanes in the link to the sensor + * + * Return link frequency on success or a negative error code otherwise + */ +s64 camss_get_link_freq(struct media_entity *entity, unsigned int bpp, + unsigned int lanes) +{ + struct media_entity *sensor; + struct v4l2_subdev *subdev; + + sensor = camss_find_sensor(entity); + if (!sensor) + return -ENODEV; + + subdev = media_entity_to_v4l2_subdev(sensor); + + return v4l2_get_link_freq(subdev->ctrl_handler, bpp, 2 * lanes); +} + /* * camss_get_pixel_clock - Get pixel clock rate from sensor * @entity: Media entity in the current pipeline diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h index 3a0484683cd6..86cdc25189eb 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -108,6 +108,8 @@ int camss_enable_clocks(int nclocks, struct camss_clock *clock, struct device *dev); void camss_disable_clocks(int nclocks, struct camss_clock *clock); struct media_entity *camss_find_sensor(struct media_entity *entity); +s64 camss_get_link_freq(struct media_entity *entity, unsigned int bpp, + unsigned int lanes); int camss_get_pixel_clock(struct media_entity *entity, u32 *pixel_clock); int camss_pm_domain_on(struct camss *camss, int id); void camss_pm_domain_off(struct camss *camss, int id); From patchwork Wed Mar 3 17:42:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Konovalov X-Patchwork-Id: 392208 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DB135C28E86 for ; Wed, 3 Mar 2021 21:52:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BB20964E2E for ; Wed, 3 Mar 2021 21:52:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1389838AbhCCVrw (ORCPT ); Wed, 3 Mar 2021 16:47:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48980 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1386142AbhCCRqr (ORCPT ); Wed, 3 Mar 2021 12:46:47 -0500 Received: from mail-lf1-x12c.google.com (mail-lf1-x12c.google.com [IPv6:2a00:1450:4864:20::12c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0D58EC0613DB for ; Wed, 3 Mar 2021 09:43:31 -0800 (PST) Received: by mail-lf1-x12c.google.com with SMTP id p21so38423469lfu.11 for ; Wed, 03 Mar 2021 09:43:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=mikpPCKqiawoZCyFMz/JZszyNAgG2MWQqRABlKUmtPE=; b=qPag2lIKx7lybT1A8UT7VBqWbqmI/IzPDWnJI60OE5N6mh3ngTzRKXzJO9ugnhQiDg 5GbvPCRPJwVx2vAItSFv2FKFNu2VyQDmLQaWfLBnu/V19VNOoMNojrDNQA5WfyssEzWC bxc/dde1HAtqp8MsUPGbTNb7D99TmItDbVpz5N0J3sSVVsP7/pls9OaQSs/qW/SGFxsk 4mWyWhXsfqe53vmNFe8PDYRjIVlihqEfUcWsjXFwY4hmgwT7cckKL462+1TqEF61NeQX V9rW3218DHYK59+fJ6KPEhWngR9A3GkF043BZuQUf4fov0RggHvHu3K0E8QqDfVm8d+C arqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=mikpPCKqiawoZCyFMz/JZszyNAgG2MWQqRABlKUmtPE=; b=kyh0135ZoAa9WUbPlZoskRv5bpZsoKHuEk9ESleb2PtQgreq07y/1SIXLLggXBiWza e68wpS4E4jgX3euhvhzqjtGJPSh8WfUpjAqXum7rMSaNaQ3ScSoDSZRQF5RNCLrrwhUm XdPPQQcZOa6GRnmjlW0PSgYaMXBmCQpxMjFJ3F5y5fOb5afTHFF4LP2sEu4R8/4qLIJB Ri7EAQVjLlcbXOl76uztcFmgvz2JHVuYjMcGaQAhTFog79s+EU3ApM0QDHHgVVRDtX3M agrpOYciNplwHqxuQUMcu8m/GVh5RyMIdSP1753R4uJkaQV7QYNUqr52NoxR9oFrHYUM wLMA== X-Gm-Message-State: AOAM530ddBszFF95Ucg8P/fs5+Jpn9uUE/sq77KpVCxKvHDvOxNT8Mpp 9t0Z0Br65u6jVq+uWSRVuwnPEQ== X-Google-Smtp-Source: ABdhPJz24Nt4zTWXCh0P8CSKaTk4yAMhHXahLWxwJBGz1RSR42b/HhFny15eAaawuAsKINhR/37ykw== X-Received: by 2002:a19:4042:: with SMTP id n63mr16165938lfa.256.1614793409462; Wed, 03 Mar 2021 09:43:29 -0800 (PST) Received: from localhost.localdomain ([85.249.43.69]) by smtp.googlemail.com with ESMTPSA id s7sm2101441lfi.140.2021.03.03.09.43.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 09:43:28 -0800 (PST) From: Andrey Konovalov To: junak.pub@gmail.com, robert.foss@linaro.org, sakari.ailus@linux.intel.com Cc: todor.too@gmail.com, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, laurent.pinchart@ideasonboard.com, jacopo@jmondi.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Andrey Konovalov Subject: [PATCH v3 3/3] media: qcom: camss: Fix overflows in clock rate calculations Date: Wed, 3 Mar 2021 20:42:50 +0300 Message-Id: <20210303174250.11405-4-andrey.konovalov@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210303174250.11405-1-andrey.konovalov@linaro.org> References: <20210303174250.11405-1-andrey.konovalov@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Vladimir Lypak Because of u32 type being used to store pixel clock rate, expression used to calculate pipeline clocks (pixel_clock * bpp) produces wrong value due to integer overflow. This patch changes data type used to store, pass and retrieve pixel_clock from u32 to u64 to make this mistake less likely to be repeated in the future. Signed-off-by: Vladimir Lypak Acked-by: Robert Foss Signed-off-by: Andrey Konovalov --- drivers/media/platform/qcom/camss/camss-vfe.c | 4 ++-- drivers/media/platform/qcom/camss/camss.c | 2 +- drivers/media/platform/qcom/camss/camss.h | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c index fae2b513b2f9..b2c95b46ce66 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -1112,7 +1112,7 @@ static inline void vfe_isr_halt_ack(struct vfe_device *vfe) static int vfe_set_clock_rates(struct vfe_device *vfe) { struct device *dev = vfe->camss->dev; - u32 pixel_clock[MSM_VFE_LINE_NUM]; + u64 pixel_clock[MSM_VFE_LINE_NUM]; int i, j; int ret; @@ -1194,7 +1194,7 @@ static int vfe_set_clock_rates(struct vfe_device *vfe) */ static int vfe_check_clock_rates(struct vfe_device *vfe) { - u32 pixel_clock[MSM_VFE_LINE_NUM]; + u64 pixel_clock[MSM_VFE_LINE_NUM]; int i, j; int ret; diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index eb8fb8c34acd..d82bbc2213a6 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -578,7 +578,7 @@ s64 camss_get_link_freq(struct media_entity *entity, unsigned int bpp, * * Return 0 on success or a negative error code otherwise */ -int camss_get_pixel_clock(struct media_entity *entity, u32 *pixel_clock) +int camss_get_pixel_clock(struct media_entity *entity, u64 *pixel_clock) { struct media_entity *sensor; struct v4l2_subdev *subdev; diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h index 86cdc25189eb..e29466d07ad2 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -110,7 +110,7 @@ void camss_disable_clocks(int nclocks, struct camss_clock *clock); struct media_entity *camss_find_sensor(struct media_entity *entity); s64 camss_get_link_freq(struct media_entity *entity, unsigned int bpp, unsigned int lanes); -int camss_get_pixel_clock(struct media_entity *entity, u32 *pixel_clock); +int camss_get_pixel_clock(struct media_entity *entity, u64 *pixel_clock); int camss_pm_domain_on(struct camss *camss, int id); void camss_pm_domain_off(struct camss *camss, int id); void camss_delete(struct camss *camss);