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[80.251.214.228]) by smtp.gmail.com with ESMTPSA id c4sm16057511pfo.2.2021.03.02.19.31.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 19:31:20 -0800 (PST) From: Shawn Guo To: Bjorn Andersson Cc: devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-msm@vger.kernel.org, Shawn Guo , Evan Green Subject: [PATCH 1/4] arm64: dts: qcom: sdm845: fix number of pins in 'gpio-ranges' Date: Wed, 3 Mar 2021 11:31:03 +0800 Message-Id: <20210303033106.549-2-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210303033106.549-1-shawn.guo@linaro.org> References: <20210303033106.549-1-shawn.guo@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The last cell of 'gpio-ranges' should be number of GPIO pins, and in case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather than msm_pinctrl_soc_data.ngpio - 1. This fixes the problem that when the last GPIO pin in the range is configured with the following call sequence, it always fails with -EPROBE_DEFER. pinctrl_gpio_set_config() pinctrl_get_device_gpio_range() pinctrl_match_gpio_range() Fixes: bc2c806293c6 ("arm64: dts: qcom: sdm845: Add gpio-ranges to TLMM node") Cc: Evan Green Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 454f794af547..6a2ed02d383d 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2382,7 +2382,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 150>; + gpio-ranges = <&tlmm 0 0 151>; wakeup-parent = <&pdc_intc>; cci0_default: cci0-default { From patchwork Wed Mar 3 03:31:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 392366 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5507FC43603 for ; Wed, 3 Mar 2021 12:58:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 30E68601FF for ; Wed, 3 Mar 2021 12:58:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233233AbhCCMRc (ORCPT ); Wed, 3 Mar 2021 07:17:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343707AbhCCDcw (ORCPT ); Tue, 2 Mar 2021 22:32:52 -0500 Received: from mail-pg1-x52b.google.com (mail-pg1-x52b.google.com [IPv6:2607:f8b0:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 545D2C0617A9 for ; Tue, 2 Mar 2021 19:31:23 -0800 (PST) Received: by mail-pg1-x52b.google.com with SMTP id t25so15314737pga.2 for ; Tue, 02 Mar 2021 19:31:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=cn2nXibIzD0MkhidCs0pgueHS+0vk99rUID4aeq6w6Y=; b=CLmmXpcEX5+Anb8wZZGcKGG/CeFLnu6I8e+fm741ocARS+TjchKVo2iDrMHSD1Nbt2 9fhwi1sVXOtwNX4OgQeeiwzsT+mEntWK6ZKWmPRKHtTazpXdvJiYa762vlCjezwteNxe teSIaHPPAHFhMIUUqdFOE7CRcKi0cfyciqA0uaQyNF2vWt8bHKmarKsqFp+c/VBGhhwM rbMG8ZK4MzApHOALD+oW588JmebnGEOvRE+InxBfw9mKdlVetpNymOIQGBDNmdKMBrz2 wBx+/7t+TKX3FnXqfW9/eEwKe53bT24W1eNohwIqXkv96aexuZLoPNF0pbrZcmaZM5sb H5dw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=cn2nXibIzD0MkhidCs0pgueHS+0vk99rUID4aeq6w6Y=; b=qMqTdsZ7x7UpCmk+jRo7L5A4YQz+GhXfLaRONl8ZYEbcwIbCDAAqre0MROuMAHqbbJ cKZdqU4u/VuHpYDVC69x33PcJ2e37DE7d/YiHJweWvc20OTl7gqsAprUJdOCJMwRvYR5 vtiS5QdDWWzzYyeQJsvdsC+ftlBlSZbrl+VUku2+5QOajiAFsACUHTlK42Q6i4xgCV+V Q3XC5jQuFgUj9e+3rYxrBsevDxR4J9EY5AuyaWW0EfZO6NG+tFNTymBuqrbRsESxVuK8 9k4zri0OLnmjVy/NzuiuQT8CaH52A4WB3cj7xFFtYMfH9k8Ver5VQJaYxz/PnQ3FnMHm adzQ== X-Gm-Message-State: AOAM530JH0j7c3bJ9iWL69ew7EmxM5sdY2LucvpYcBSxRwqaaVNhBTtN K+A//QE7MTU7uSkg418Qh+VMTOdm3eCT2w== X-Google-Smtp-Source: ABdhPJxUuYkhu4i6aduARS71TgXJShBmy+zKxt2isfiduxdLMnn1un8v+HreOtOXqf7YGR/bczwMLQ== X-Received: by 2002:a05:6a00:a95:b029:1ee:471f:e323 with SMTP id b21-20020a056a000a95b02901ee471fe323mr19528594pfl.69.1614742282903; Tue, 02 Mar 2021 19:31:22 -0800 (PST) Received: from localhost.localdomain (80.251.214.228.16clouds.com. [80.251.214.228]) by smtp.gmail.com with ESMTPSA id c4sm16057511pfo.2.2021.03.02.19.31.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 19:31:22 -0800 (PST) From: Shawn Guo To: Bjorn Andersson Cc: devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-msm@vger.kernel.org, Shawn Guo , Vinod Koul Subject: [PATCH 2/4] arm64: dts: qcom: sm8150: fix number of pins in 'gpio-ranges' Date: Wed, 3 Mar 2021 11:31:04 +0800 Message-Id: <20210303033106.549-3-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210303033106.549-1-shawn.guo@linaro.org> References: <20210303033106.549-1-shawn.guo@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The last cell of 'gpio-ranges' should be number of GPIO pins, and in case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather than msm_pinctrl_soc_data.ngpio - 1. This fixes the problem that when the last GPIO pin in the range is configured with the following call sequence, it always fails with -EPROBE_DEFER. pinctrl_gpio_set_config() pinctrl_get_device_gpio_range() pinctrl_match_gpio_range() Fixes: e13c6d144fa0 ("arm64: dts: qcom: sm8150: Add base dts file") Cc: Vinod Koul Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index e5bb17bc2f46..778613d3410b 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -914,7 +914,7 @@ <0x0 0x03D00000 0x0 0x300000>; reg-names = "west", "east", "north", "south"; interrupts = ; - gpio-ranges = <&tlmm 0 0 175>; + gpio-ranges = <&tlmm 0 0 176>; gpio-controller; #gpio-cells = <2>; interrupt-controller; From patchwork Wed Mar 3 03:31:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 392367 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1666AC43333 for ; Wed, 3 Mar 2021 12:58:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E8C5F64EBB for ; Wed, 3 Mar 2021 12:58:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233015AbhCCMRA (ORCPT ); Wed, 3 Mar 2021 07:17:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37142 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343731AbhCCDcw (ORCPT ); Tue, 2 Mar 2021 22:32:52 -0500 Received: from mail-pf1-x436.google.com (mail-pf1-x436.google.com [IPv6:2607:f8b0:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2DB23C0617AB for ; Tue, 2 Mar 2021 19:31:25 -0800 (PST) Received: by mail-pf1-x436.google.com with SMTP id m6so15288644pfk.1 for ; Tue, 02 Mar 2021 19:31:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=f3sWvCasmNW6dLl/Crq/uVSATvBuumInYXGeWlRuNZQ=; b=pvSsjm6oPXUZLMfXImgeQZRm7ev8blcpPcFz1rofXaA4qnQCJnTO7eDcfOtgzJMT3+ AXh740gsgGJElgIwq0KYh2vwMXZGpbA04ylVYXbVTVKeIDhcmmATZ3745SSubcg2a96N P8C92D7Qfwl9zR2PXi5ewVwB+YBgMHnQVB6ZmJznPUPtV0hMjRxov3HezrNhjiSopwNg +YEk1I94BEQwCKMXbZ2kQo3DTK+l0nK931V6NQ4BRMEl39QncbJZEQSfF7z9zVPTS2Ms mqz6BGhAOJPNqwkG4jk5PjUGq21u5coSFdSQncRas/CGoDN5GBhRqacDLuOu9CN9x05P 4/Ew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=f3sWvCasmNW6dLl/Crq/uVSATvBuumInYXGeWlRuNZQ=; b=rsBJuQmfeFsXzMXf9iaKJCb+VTQYvCpqrtPaAFY+xb47hglUIPRcIrM6MlK4555c3z mNJgdP9tYdI80rKY7QOlmf1FyA1Y2idonfQNJKvohsCyud976AIuo0QU7YU1OH5gNbiQ aysDJmsRG0iYBwoFfnInwBZ5BfeGz2jegPOtrV6DKV8/UTv2X8NTjcaUC1/T0VQ5b2/e 1gOtO5ZmwOkMN1BBy0a85noFmcB/kztd6db1AOcWRbG/CzbkcwpbQhsYxsjxu52kQVDe Wh45Q9PS5NUQKp3DS1p/jdGfm6ITEak7Fw14djMScYLGNNsPlMs3XPw/2rX2rSg1uuRe NF4Q== X-Gm-Message-State: AOAM531IAjedw6RSJcBbeIQ/ovD9zdcErGdTXEVYvGKcvymqmhXRZnPv qlR3Nxt1d5Fhq5NvoaICluSyoA== X-Google-Smtp-Source: ABdhPJwZyEWQLsgt/oHLzfjZ3q7KHNrDMo0D/1nrDi3mHdEsYzGmuSbO3nqpaOiMg/B/7mO9hiXoRw== X-Received: by 2002:a63:cf56:: with SMTP id b22mr5564900pgj.352.1614742284782; Tue, 02 Mar 2021 19:31:24 -0800 (PST) Received: from localhost.localdomain (80.251.214.228.16clouds.com. [80.251.214.228]) by smtp.gmail.com with ESMTPSA id c4sm16057511pfo.2.2021.03.02.19.31.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 19:31:24 -0800 (PST) From: Shawn Guo To: Bjorn Andersson Cc: devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-msm@vger.kernel.org, Shawn Guo Subject: [PATCH 3/4] arm64: dts: qcom: sm8250: fix number of pins in 'gpio-ranges' Date: Wed, 3 Mar 2021 11:31:05 +0800 Message-Id: <20210303033106.549-4-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210303033106.549-1-shawn.guo@linaro.org> References: <20210303033106.549-1-shawn.guo@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The last cell of 'gpio-ranges' should be number of GPIO pins, and in case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather than msm_pinctrl_soc_data.ngpio - 1. This fixes the problem that when the last GPIO pin in the range is configured with the following call sequence, it always fails with -EPROBE_DEFER. pinctrl_gpio_set_config() pinctrl_get_device_gpio_range() pinctrl_match_gpio_range() Fixes: 16951b490b20 ("arm64: dts: qcom: sm8250: Add TLMM pinctrl node") Cc: Bjorn Andersson Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 947e1accae3a..e7edb2593ba1 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -2689,7 +2689,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 180>; + gpio-ranges = <&tlmm 0 0 181>; wakeup-parent = <&pdc>; pri_mi2s_active: pri-mi2s-active { From patchwork Wed Mar 3 03:31:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 392627 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp5606397jap; Wed, 3 Mar 2021 17:42:58 -0800 (PST) X-Google-Smtp-Source: ABdhPJwGohVvp4BMST+Dbe1+PEcHe7xeymXS7xKmMQNiMCY1fXjOTgPgJZRWl5/vmO9dK53qNqhF X-Received: by 2002:aa7:db01:: with SMTP id t1mr1855913eds.77.1614821817246; Wed, 03 Mar 2021 17:36:57 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614821817; cv=none; d=google.com; s=arc-20160816; b=Fh/XrxADsx/8LX3E8JxcyTRAx1lqEwwlKPCQhWE6Vl/dT5zRHht3OaCF5xcu8a/BeS DWT2o20MlouGR5M+IVxsgtkS7jzEVY/BOAGxnS0+0U1IdltqRDnw5rvSKo3TPi6PoU8Y 5DeFWttcyNI9a1fsPKMZU+DI2SDJ9cfygf1E60WCncGDrhtfayhF3oo/IWc0nMH66Ufq 5ParjZwMv72ND4lLWg8JEsziDq6wiTq6yRiAWp4kRXkqVHYQ3cwp8bPPyoUjhxHyu1P8 cbckWowMqE3uIH+fz1SAnVOvx9jA9cynNjWGTxYqQtBL2GfD9tASzuCAC7koIj2zI8i4 mITw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=+0F+pGitTgwubWfG1pa09cZYXP+gzbeba4SznEWwqGI=; b=Pi7Yp7AtqC5bzoqgeZXPE5/5mMWl19HzLIfBtOG6FQID2ZeIwUMaAJ37seRr83wx0h O/BCbhPI3xzTUUZQh7I2GHNfwlIFJluTsOMvNk9rCsAYBzLVXdxT6upvWYXBfPJ25uqZ XtAs27G1xBEpIRkfoda0ihUHmy5Jv57/Fgdpy+EC9dE5QyekCdGtt1wnPkLthFBoI+Yh WVqdhnOw+r0piWmC8nYIWu/igRYoZ+e/S+tz9lkOzrc6z20EOrXJS3sPxW4VgL+PqJth gmOFFfwAgraZV8m0zU12MPA73dKSrbx6S4vF7Du6IjwN8Ja9z+nORiKOMaKX22vP+nY9 JUNg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Nxviuoed; spf=pass (google.com: domain of linux-gpio-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[80.251.214.228]) by smtp.gmail.com with ESMTPSA id c4sm16057511pfo.2.2021.03.02.19.31.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 19:31:26 -0800 (PST) From: Shawn Guo To: Bjorn Andersson Cc: devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-msm@vger.kernel.org, Shawn Guo , Vinod Koul Subject: [PATCH 4/4] arm64: dts: qcom: sm8350: fix number of pins in 'gpio-ranges' Date: Wed, 3 Mar 2021 11:31:06 +0800 Message-Id: <20210303033106.549-5-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210303033106.549-1-shawn.guo@linaro.org> References: <20210303033106.549-1-shawn.guo@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The last cell of 'gpio-ranges' should be number of GPIO pins, and in case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather than msm_pinctrl_soc_data.ngpio - 1. This fixes the problem that when the last GPIO pin in the range is configured with the following call sequence, it always fails with -EPROBE_DEFER. pinctrl_gpio_set_config() pinctrl_get_device_gpio_range() pinctrl_match_gpio_range() Fixes: b7e8f433a673 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC") Cc: Vinod Koul Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 5ef460458f5c..fab211298c35 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -382,7 +382,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 203>; + gpio-ranges = <&tlmm 0 0 204>; qup_uart3_default_state: qup-uart3-default-state { rx {