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[111.184.129.17]) by smtp.gmail.com with ESMTPSA id i7sm7836702pfq.184.2021.03.07.10.58.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 07 Mar 2021 10:58:39 -0800 (PST) From: Ying-Chun Liu To: u-boot@lists.denx.de Cc: "Ying-Chun Liu (PaulLiu)" Subject: [PATCH 1/2] drivers: usb: phy: add driver for usb-nop-xceiv Date: Mon, 8 Mar 2021 02:58:28 +0800 Message-Id: <20210307185829.97583-2-grandpaul@gmail.com> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210307185829.97583-1-grandpaul@gmail.com> References: <20210307185829.97583-1-grandpaul@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean From: "Ying-Chun Liu (PaulLiu)" implement the generic NOP USB transceiver for all USB transceiver which are either built-in into USB IP or which are mostly autonomous. Signed-off-by: Ying-Chun Liu (PaulLiu) --- drivers/usb/phy/Kconfig | 8 ++ drivers/usb/phy/Makefile | 1 + drivers/usb/phy/usb_nop_phy.c | 137 ++++++++++++++++++++++++++++++++++ 3 files changed, 146 insertions(+) create mode 100644 drivers/usb/phy/usb_nop_phy.c -- 2.30.1 diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig index 8741553d09..663b50a937 100644 --- a/drivers/usb/phy/Kconfig +++ b/drivers/usb/phy/Kconfig @@ -13,3 +13,11 @@ config OMAP_USB_PHY config ROCKCHIP_USB2_PHY bool "Rockchip USB2 PHY" + +config NOP_USB_XCEIV + bool "NOP USB Transceiver Driver" + depends on PHY + help + This driver is to be used by all the usb transceiver which are either + built-in with usb ip or which are autonomous and doesn't require any + phy programming such as ISP1x04 etc. diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile index 20f7edf48d..079e24770f 100644 --- a/drivers/usb/phy/Makefile +++ b/drivers/usb/phy/Makefile @@ -6,3 +6,4 @@ obj-$(CONFIG_TWL4030_USB) += twl4030.o obj-$(CONFIG_OMAP_USB_PHY) += omap_usb_phy.o obj-$(CONFIG_ROCKCHIP_USB2_PHY) += rockchip_usb2_phy.o +obj-$(CONFIG_NOP_USB_XCEIV) += usb_nop_phy.o diff --git a/drivers/usb/phy/usb_nop_phy.c b/drivers/usb/phy/usb_nop_phy.c new file mode 100644 index 0000000000..7f4133af39 --- /dev/null +++ b/drivers/usb/phy/usb_nop_phy.c @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * NOP USB transceiver for all USB transceiver which are either built-in + * into USB IP or which are mostly autonomous. + * + * Copyright (C) 2009 Texas Instruments Inc + * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2021 Linaro + * Author: Ajay Kumar Gupta + * Jean-Jacques Hiblot + * Ying-Chun Liu (PaulLiu) + * Current status: + * This provides a "nop" transceiver for PHYs which are + * autonomous such as isp1504, isp1707, etc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct usb_nop_phy_priv { + struct clk_bulk bulk; + struct udevice *vcc; + struct gpio_desc *gpiod_reset; + struct gpio_desc *gpiod_vbus; +}; + +static int usb_nop_phy_reset(struct phy *phy) +{ + int ret = 0; + struct usb_nop_phy_priv *priv = dev_get_priv(phy->dev); + + if (!priv->gpiod_reset) + return ret; + + ret = dm_gpio_set_value(priv->gpiod_reset, 1); + mdelay(20); + ret = dm_gpio_set_value(priv->gpiod_reset, 0); + + return ret; +} + +static int usb_nop_phy_init(struct phy *phy) +{ + struct usb_nop_phy_priv *priv = dev_get_priv(phy->dev); + int ret = 0; + + if (CONFIG_IS_ENABLED(DM_REGULATOR) && priv->vcc) { + ret = regulator_set_enable(priv->vcc, true); + if (ret < 0) { + dev_err(phy->dev, "Failed to enable power: %d\n", ret); + return ret; + } + } + + if (CONFIG_IS_ENABLED(CLK)) { + ret = clk_enable_bulk(&priv->bulk); + if (ret < 0) { + dev_err(phy->dev, "Failed to enable clk: %d\n", ret); + return ret; + } + } + + return ret; +} + +static int usb_nop_phy_probe(struct udevice *dev) +{ + struct usb_nop_phy_priv *priv = dev_get_priv(dev); + u32 clk_rate = 0; + int i, ret = 0; + + /* Get all clocks. Actually only main_clk should be assigned */ + if (CONFIG_IS_ENABLED(CLK)) { + ret = clk_get_bulk(dev, &priv->bulk); + if (ret < 0) + dev_info(dev, "failed to get clock: %d\n", ret); + } + + /* Get vcc-supply */ + if (CONFIG_IS_ENABLED(DM_REGULATOR)) { + ret = device_get_supply_regulator(dev, "vcc-supply", &priv->vcc); + if (ret < 0) { + dev_info(dev, "failed to get vcc-supply: %d\n", ret); + priv->vcc = NULL; + } + } + + ret = ofnode_read_u32(dev_ofnode(dev), "clock-frequency", &clk_rate); + if (ret < 0) + clk_rate = 0; + + priv->gpiod_reset = devm_gpiod_get_optional(dev, "reset", 0); + if (priv->gpiod_reset) + priv->gpiod_vbus = devm_gpiod_get_optional(dev, + "vbus-detect", + 0); + + if (clk_rate) + for (i = 0; i < priv->bulk.count; i++) { + ret = clk_set_rate(&priv->bulk.clks[i], clk_rate); + if (ret < 0) { + dev_err(dev, + "Failed to set clk rate %d: %d\n", + clk_rate, + ret); + return ret; + } + } + + return 0; +} + +static const struct udevice_id usb_nop_phy_ids[] = { + { .compatible = "usb-nop-xceiv" }, + { } +}; + +static struct phy_ops usb_nop_phy_ops = { + .init = usb_nop_phy_init, + .reset = usb_nop_phy_reset, +}; + +U_BOOT_DRIVER(usb_nop_phy) = { + .name = "usb_nop_phy", + .id = UCLASS_PHY, + .of_match = usb_nop_phy_ids, + .ops = &usb_nop_phy_ops, + .probe = usb_nop_phy_probe, + .priv_auto = sizeof(struct usb_nop_phy_priv), +}; From patchwork Sun Mar 7 18:58:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ying-Chun Liu X-Patchwork-Id: 395153 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1145830jai; Sun, 7 Mar 2021 10:59:08 -0800 (PST) X-Google-Smtp-Source: ABdhPJxVxLX+Ca+WdnLiVcGmPi47UffZ/tNCVIVEbzQw22E8jjGcsx5/WwBEo21/vH1eQFzTqsTN X-Received: by 2002:a50:ec0e:: with SMTP id g14mr19094355edr.264.1615143548792; Sun, 07 Mar 2021 10:59:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615143548; cv=none; d=google.com; s=arc-20160816; b=nMTWqbSUax7L01kpCF4+jxAlzNKStcA7XrU+bgAjRY0ghvQFEuE79/lxzk9hhf6Puo ZT8UNwxt+hsDfsn59VwyLvXrDOgwL8QZGMp8oC+sG8+Butl3t+zjAkNCtwZAjyqCPhnL xwa1qATan+af0Y9ceH963UGJ6kPDQYKOF8YJVNrq4Nwx4u/zZimwXWzi8QprQaFbPyVo VSbJukhvEayW6w0H2CwCn5K6dOOUqE7HfjqexjULsICsZLiNKP5oITFY8Udre/JLWPmu /ACCbPo/p0FoHm7EKu6oWmZYelP0zntN3qaG6NOEBumIwd7XDkeXySRSowfWi6DbPW6l 6crQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=jSdcLVORPkoAQZ5Jkr0rUk7rOTKHzZAc9THCoQ8hgKg=; b=gKXzE81n8H+HlxxFYvhZvrHhXgKEL3cpaT7v75HLrwghoxCP/n5jyN4m84ngs3m55M jWolTUwtkNG1aB86kNrbxdCtKwVQeP6NqYR02vhTMVkJMvMFcQuzPFlxxJwwPinwVVjk VMH4Qxv96iFxSco6r2fA8i6AoO29FRZUSrgrUbijgrNwh5o3GQgKFAlbz/Fn/bCvfZRx SqJXAsF97OOdHdcrMNurIad6paAoUJWlPX+sPf4uDZuPv8uJ1ilc1ZVK/vywZg/3JXed dV6HeoQY0lcr9PzvGt9zrlnzAy3eBd6G8OqEl0s91ED3V9ZBmoNm89jjH0Rf8Ikx3NeO bhAA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=Wt0ctNye; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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[111.184.129.17]) by smtp.gmail.com with ESMTPSA id t16sm7246807pfc.204.2021.03.07.10.58.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 07 Mar 2021 10:58:42 -0800 (PST) From: Ying-Chun Liu To: u-boot@lists.denx.de Cc: "Ying-Chun Liu (PaulLiu)" Subject: [PATCH 2/2] doc: device-tree-bindings: phy: usb-nop-xceiv Date: Mon, 8 Mar 2021 02:58:29 +0800 Message-Id: <20210307185829.97583-3-grandpaul@gmail.com> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210307185829.97583-1-grandpaul@gmail.com> References: <20210307185829.97583-1-grandpaul@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean From: "Ying-Chun Liu (PaulLiu)" Document the bindings for usb-nop-xceiv Signed-off-by: Ying-Chun Liu (PaulLiu) --- .../phy/usb-nop-xceiv.txt | 43 +++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 doc/device-tree-bindings/phy/usb-nop-xceiv.txt -- 2.30.1 diff --git a/doc/device-tree-bindings/phy/usb-nop-xceiv.txt b/doc/device-tree-bindings/phy/usb-nop-xceiv.txt new file mode 100644 index 0000000000..4dc6a8ee30 --- /dev/null +++ b/doc/device-tree-bindings/phy/usb-nop-xceiv.txt @@ -0,0 +1,43 @@ +USB NOP PHY + +Required properties: +- compatible: should be usb-nop-xceiv +- #phy-cells: Must be 0 + +Optional properties: +- clocks: phandle to the PHY clock. Use as per Documentation/devicetree + /bindings/clock/clock-bindings.txt + This property is required if clock-frequency is specified. + +- clock-names: Should be "main_clk" + +- clock-frequency: the clock frequency (in Hz) that the PHY clock must + be configured to. + +- vcc-supply: phandle to the regulator that provides power to the PHY. + +- reset-gpios: Should specify the GPIO for reset. + +- vbus-detect-gpio: should specify the GPIO detecting a VBus insertion + (see Documentation/devicetree/bindings/gpio/gpio.txt) +- vbus-regulator : should specifiy the regulator supplying current drawn from + the VBus line (see Documentation/devicetree/bindings/regulator/regulator.txt). + +Example: + + hsusb1_phy { + compatible = "usb-nop-xceiv"; + clock-frequency = <19200000>; + clocks = <&osc 0>; + clock-names = "main_clk"; + vcc-supply = <&hsusb1_vcc_regulator>; + reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + vbus-detect-gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>; + vbus-regulator = <&vbus_regulator>; + #phy-cells = <0>; + }; + +hsusb1_phy is a NOP USB PHY device that gets its clock from an oscillator +and expects that clock to be configured to 19.2MHz by the NOP PHY driver. +hsusb1_vcc_regulator provides power to the PHY and GPIO 7 controls RESET. +GPIO 13 detects VBus insertion, and accordingly notifies the vbus-regulator.