From patchwork Fri Apr 23 11:38:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 426275 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp1236301jao; Fri, 23 Apr 2021 04:57:00 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzmbkVMjN6qaUD5Y85Z7DBvEipPvaGDe7YvDXg9i7l25kOy00AIMfxEL6PRxQiyzbBiB1Rj X-Received: by 2002:a05:6402:1ad9:: with SMTP id ba25mr4007760edb.264.1619179020188; Fri, 23 Apr 2021 04:57:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619179020; cv=none; d=google.com; s=arc-20160816; b=sU1r+l37cJsrKtGwr0SBY0g24tn7Y83JXtZM8a97faBkc5Kv91UchLAsK13XiG26Q0 0Xzvp0z208NFrgXPNnzwBmo5s1Knsg/DkFI4cDvzPDNjCxyTI+du2zdhAQb+Z95aais8 isJi8GTOetBqSWyNbS13NNYSCFTt8vmUCjNt1QorGqh1IDDHkGbjeY+Ll6vS8hIxItcL JVHbHDPjnjLr6diFCP+8Rh2rbCEyKnYrhrWmf2Ph9m6yrxxztjM13InVGxwW6agWD5Fo vcF8fLUqGVDtNottqgTmpaefPzsFjQCO/3X2oGIeZczxclRFSJ/gK7jR9uIqVrrIhR6O Gvjg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=FsRbQGwgPPyTX9wed12qTQDvSstkWFdppnOjxRuHqVc=; b=McExIVLnfNr4IO9yxKDUi9pZc9VidFcoWdF4C3pWyYjN1IPiajqps1W9MoJsWZv37e f3+fQ7ycTPC8cQ3kZkLIMGdqOpQP8xl1cuMnSkh8/+TY104H4XlMKYQM0aygIID6a4CQ sQa4FvhR/ZqHRd+ygM458+fp3ePfubs42wsQcrXGtf6cvvpM7gODqc2Y6QU15mVwUwIj Gp5BL4SQnIBWehTd4fcDNnsFDlT86K2z5NgQ0PUawxEONlQ7Ij5CCSvOsYfVdjfyqCIy 9vDvhz2Qed/hovxuUjJfOPmJEZlclQGCQ8FBcfFomvL9zvLwAXyts/Im1XtAto6VLUVw S2ng== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ejY8Pdll; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id jg32si5266731ejc.26.2021.04.23.04.56.59; Fri, 23 Apr 2021 04:57:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ejY8Pdll; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230376AbhDWL5d (ORCPT + 4 others); Fri, 23 Apr 2021 07:57:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36702 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229957AbhDWL5c (ORCPT ); Fri, 23 Apr 2021 07:57:32 -0400 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [IPv6:2a00:1450:4864:20::334]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 433F2C06174A for ; Fri, 23 Apr 2021 04:56:56 -0700 (PDT) Received: by mail-wm1-x334.google.com with SMTP id y124-20020a1c32820000b029010c93864955so1059126wmy.5 for ; Fri, 23 Apr 2021 04:56:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FsRbQGwgPPyTX9wed12qTQDvSstkWFdppnOjxRuHqVc=; b=ejY8PdllvGtau5SI84NlsFbQ/jOjJ60UTzOvs0UchL/+TFV03CkbyL8XNmfd/WRviN sRhV1ivb/6t70ipJzwGH3V2nwgvr2CC7e65EfkzCyG0Hd/t59p2UrA7/2X6oAiCYawVn osUbAydpApJ0S8TUhbVaV9JAPFB3T9Iv2eFi6NcuYwt9i4qFBrUBHaxcRtHf1YD8sh53 ftWVMzYGg/42zGxpp8e+PeFOxEAFSJdB902bFsF4XH6MyC7wj3RiFQQSQfEvQZxqnort 4HWeT9xiHnW4C0KFMeiyhR38PuYOylfhgT6e5JTFMsnvSVz4wKDW1kxw/rFG9cuOr51P gVAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FsRbQGwgPPyTX9wed12qTQDvSstkWFdppnOjxRuHqVc=; b=P0F67RbY4dxnRddb4xdF6Dz0yG08swkPQvBcfA1rKDjfIoHqPhTOPDlodL12Vw4CQZ 0HmBSEbQHanzXw9xdd3spqIUscGFyCJo/UhHkzynnsxs5ueH6svgUzcIT7kJ6qhiC3dB V2Dm48JJiHVdWoJYKaiH2tGUGM9USJxYxImAY34v9TOt3dZLmJq/lFAmIWOAsPxurabV J2oLgdESJlg8UQMCcgyVgR5TRZFA9VfL+IiHASmr0wpNa6MSQUXvPgBWNZTd4Ne5PMko wB0zOspjOwy5ZfACTSpvLJNgweleznzamFc4Y/bwFtzv/HUq+Y1syzfOWChNYzKq62U1 ZEww== X-Gm-Message-State: AOAM530Qe68coNvwLD7CpbLJZCKZuzPomVs4mRgiOtCekp37K2XCs6qi vrqM6urzZBcxhNMsZxHbNzSdhQ== X-Received: by 2002:a05:600c:3796:: with SMTP id o22mr5082783wmr.139.1619179014941; Fri, 23 Apr 2021 04:56:54 -0700 (PDT) Received: from localhost.localdomain ([2001:1715:4e26:a7e0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id g9sm7485195wmh.21.2021.04.23.04.56.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Apr 2021 04:56:54 -0700 (PDT) From: Jean-Philippe Brucker To: rjw@rjwysocki.net, lenb@kernel.org, joro@8bytes.org, mst@redhat.com Cc: will@kernel.org, catalin.marinas@arm.com, baolu.lu@linux.intel.com, dwmw2@infradead.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org, virtualization@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, eric.auger@redhat.com, sebastien.boeuf@intel.com, robin.murphy@arm.com, kevin.tian@intel.com, lorenzo.pieralisi@arm.com, guohanjun@huawei.com, sudeep.holla@arm.com, jean-philippe@linaro.org Subject: [PATCH v2 1/6] ACPI: arm64: Move DMA setup operations out of IORT Date: Fri, 23 Apr 2021 13:38:32 +0200 Message-Id: <20210423113836.3974972-2-jean-philippe@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210423113836.3974972-1-jean-philippe@linaro.org> References: <20210423113836.3974972-1-jean-philippe@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Extract generic DMA setup code out of IORT, so it can be reused by VIOT. Keep it in drivers/acpi/arm64 for now, since it could break x86 platforms that haven't run this code so far, if they have invalid tables. Signed-off-by: Jean-Philippe Brucker --- drivers/acpi/arm64/Makefile | 1 + include/linux/acpi.h | 3 +++ include/linux/acpi_iort.h | 6 ++--- drivers/acpi/arm64/dma.c | 50 ++++++++++++++++++++++++++++++++++ drivers/acpi/arm64/iort.c | 54 ++++++------------------------------- drivers/acpi/scan.c | 2 +- 6 files changed, 66 insertions(+), 50 deletions(-) create mode 100644 drivers/acpi/arm64/dma.c -- 2.31.1 diff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile index 6ff50f4ed947..66acbe77f46e 100644 --- a/drivers/acpi/arm64/Makefile +++ b/drivers/acpi/arm64/Makefile @@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_ACPI_IORT) += iort.o obj-$(CONFIG_ACPI_GTDT) += gtdt.o +obj-y += dma.o diff --git a/include/linux/acpi.h b/include/linux/acpi.h index c60745f657e9..7aaa9559cc19 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -259,9 +259,12 @@ void acpi_numa_x2apic_affinity_init(struct acpi_srat_x2apic_cpu_affinity *pa); #ifdef CONFIG_ARM64 void acpi_numa_gicc_affinity_init(struct acpi_srat_gicc_affinity *pa); +void acpi_arch_dma_setup(struct device *dev, u64 *dma_addr, u64 *dma_size); #else static inline void acpi_numa_gicc_affinity_init(struct acpi_srat_gicc_affinity *pa) { } +static inline void +acpi_arch_dma_setup(struct device *dev, u64 *dma_addr, u64 *dma_size) { } #endif int acpi_numa_memory_affinity_init (struct acpi_srat_mem_affinity *ma); diff --git a/include/linux/acpi_iort.h b/include/linux/acpi_iort.h index 1a12baa58e40..f7f054833afd 100644 --- a/include/linux/acpi_iort.h +++ b/include/linux/acpi_iort.h @@ -34,7 +34,7 @@ struct irq_domain *iort_get_device_domain(struct device *dev, u32 id, void acpi_configure_pmsi_domain(struct device *dev); int iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id); /* IOMMU interface */ -void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *size); +int iort_dma_get_ranges(struct device *dev, u64 *size); const struct iommu_ops *iort_iommu_configure_id(struct device *dev, const u32 *id_in); int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head); @@ -48,8 +48,8 @@ static inline struct irq_domain *iort_get_device_domain( { return NULL; } static inline void acpi_configure_pmsi_domain(struct device *dev) { } /* IOMMU interface */ -static inline void iort_dma_setup(struct device *dev, u64 *dma_addr, - u64 *size) { } +static inline int iort_dma_get_ranges(struct device *dev, u64 *size) +{ return -ENODEV; } static inline const struct iommu_ops *iort_iommu_configure_id( struct device *dev, const u32 *id_in) { return NULL; } diff --git a/drivers/acpi/arm64/dma.c b/drivers/acpi/arm64/dma.c new file mode 100644 index 000000000000..f16739ad3cc0 --- /dev/null +++ b/drivers/acpi/arm64/dma.c @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include +#include +#include +#include + +void acpi_arch_dma_setup(struct device *dev, u64 *dma_addr, u64 *dma_size) +{ + int ret; + u64 end, mask; + u64 dmaaddr = 0, size = 0, offset = 0; + + /* + * If @dev is expected to be DMA-capable then the bus code that created + * it should have initialised its dma_mask pointer by this point. For + * now, we'll continue the legacy behaviour of coercing it to the + * coherent mask if not, but we'll no longer do so quietly. + */ + if (!dev->dma_mask) { + dev_warn(dev, "DMA mask not set\n"); + dev->dma_mask = &dev->coherent_dma_mask; + } + + if (dev->coherent_dma_mask) + size = max(dev->coherent_dma_mask, dev->coherent_dma_mask + 1); + else + size = 1ULL << 32; + + ret = acpi_dma_get_range(dev, &dmaaddr, &offset, &size); + if (ret == -ENODEV) + ret = iort_dma_get_ranges(dev, &size); + if (!ret) { + /* + * Limit coherent and dma mask based on size retrieved from + * firmware. + */ + end = dmaaddr + size - 1; + mask = DMA_BIT_MASK(ilog2(end) + 1); + dev->bus_dma_limit = end; + dev->coherent_dma_mask = min(dev->coherent_dma_mask, mask); + *dev->dma_mask = min(*dev->dma_mask, mask); + } + + *dma_addr = dmaaddr; + *dma_size = size; + + ret = dma_direct_set_offset(dev, dmaaddr + offset, dmaaddr, size); + + dev_dbg(dev, "dma_offset(%#08llx)%s\n", offset, ret ? " failed!" : ""); +} diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c index 3912a1f6058e..a940be1cf2af 100644 --- a/drivers/acpi/arm64/iort.c +++ b/drivers/acpi/arm64/iort.c @@ -1144,56 +1144,18 @@ static int rc_dma_get_range(struct device *dev, u64 *size) } /** - * iort_dma_setup() - Set-up device DMA parameters. + * iort_dma_get_ranges() - Look up DMA addressing limit for the device + * @dev: device to lookup + * @size: DMA range size result pointer * - * @dev: device to configure - * @dma_addr: device DMA address result pointer - * @dma_size: DMA range size result pointer + * Return: 0 on success, an error otherwise. */ -void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *dma_size) +int iort_dma_get_ranges(struct device *dev, u64 *size) { - u64 end, mask, dmaaddr = 0, size = 0, offset = 0; - int ret; - - /* - * If @dev is expected to be DMA-capable then the bus code that created - * it should have initialised its dma_mask pointer by this point. For - * now, we'll continue the legacy behaviour of coercing it to the - * coherent mask if not, but we'll no longer do so quietly. - */ - if (!dev->dma_mask) { - dev_warn(dev, "DMA mask not set\n"); - dev->dma_mask = &dev->coherent_dma_mask; - } - - if (dev->coherent_dma_mask) - size = max(dev->coherent_dma_mask, dev->coherent_dma_mask + 1); + if (dev_is_pci(dev)) + return rc_dma_get_range(dev, size); else - size = 1ULL << 32; - - ret = acpi_dma_get_range(dev, &dmaaddr, &offset, &size); - if (ret == -ENODEV) - ret = dev_is_pci(dev) ? rc_dma_get_range(dev, &size) - : nc_dma_get_range(dev, &size); - - if (!ret) { - /* - * Limit coherent and dma mask based on size retrieved from - * firmware. - */ - end = dmaaddr + size - 1; - mask = DMA_BIT_MASK(ilog2(end) + 1); - dev->bus_dma_limit = end; - dev->coherent_dma_mask = min(dev->coherent_dma_mask, mask); - *dev->dma_mask = min(*dev->dma_mask, mask); - } - - *dma_addr = dmaaddr; - *dma_size = size; - - ret = dma_direct_set_offset(dev, dmaaddr + offset, dmaaddr, size); - - dev_dbg(dev, "dma_offset(%#08llx)%s\n", offset, ret ? " failed!" : ""); + return nc_dma_get_range(dev, size); } static void __init acpi_iort_register_irq(int hwirq, const char *name, diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c index bc973fbd70b2..e166916eb9db 100644 --- a/drivers/acpi/scan.c +++ b/drivers/acpi/scan.c @@ -1536,7 +1536,7 @@ int acpi_dma_configure_id(struct device *dev, enum dev_dma_attr attr, return 0; } - iort_dma_setup(dev, &dma_addr, &size); + acpi_arch_dma_setup(dev, &dma_addr, &size); iommu = iort_iommu_configure_id(dev, input_id); if (PTR_ERR(iommu) == -EPROBE_DEFER) From patchwork Fri Apr 23 11:38:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 426277 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp1236325jao; Fri, 23 Apr 2021 04:57:01 -0700 (PDT) X-Google-Smtp-Source: ABdhPJywdWZ13+lOClDMdERAvoKyNKjv8gGk40hsP0W/4cC1iIQVXy2/Uvy1UCEEjw5fynDWsiNG X-Received: by 2002:a05:6402:2216:: with SMTP id cq22mr4029632edb.265.1619179021415; Fri, 23 Apr 2021 04:57:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619179021; cv=none; d=google.com; s=arc-20160816; b=vA04yui2NVW5s3Fb+zdIcJNTlngeDJQ7ZxcnXeOJwwx6b473+Ua29VOiw9NtyZAyaB nW+6AA85DIkGkkJq3Snn+FQ4EZ1tgdMZJgdbpwG2lzqgrpLkRRiR3GexKFagbnV5URPy 7C3ENoxUH06/uInYJv6SF+Pf0czEt9yQklPui5TipBtES6yBsVLMRBAkCP+r4EQ7NhPc GT4Q5ZpHPJDVQQJMYQywTiAqEAAgTGq7frTdAzad+Rz69haUp/pVx6KDa/upQzF02E0E XVncJcjrEqmLCsdoAbgVfCQP+wfa2RIB8VTpZhwPmbWJ/E9sd6PO5JQHVaTxaehF3axu zzsQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Ie4nU0t6j2jprvM9FCKa2FLyckkjG0nBrisc3oCcJ1E=; b=nZkNDURkS5Xa26068WOCv17ba5YWtK56q/guMXlOzVOaBGjp7NSjGyWTCtqHhtjd9z KjkFKm+DiQKY2GWGZ2w7X4xILln3jl+4FJ6UIsSGgJ0XrGzzFVkSfifS+5xEKI7aZkaO 8STnbXyV9ZZ8cR2wUD+jlyTc5fkXoe+Y/BmRppBJf0jgVcCI+9H/C0QCRjJdOua42oQA Ga24FFgS2mCOgdh+lFLjecx5Rl6hpc/xNOo3wX2ey6r2W8rnha0Pp06XOGSP0bB282Ov RqqPB0SBjW0ujQTn2EhjrfAQIecPJPU++uMuBc/1+5AZQlUpkMF8oIZ4RCl6MjxH7et3 Tdhw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sU0Q7m9t; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Extract it from IORT. Signed-off-by: Jean-Philippe Brucker --- include/acpi/acpi_bus.h | 3 ++ include/linux/acpi_iort.h | 8 ++--- drivers/acpi/arm64/iort.c | 75 +++++---------------------------------- drivers/acpi/scan.c | 55 +++++++++++++++++++++++++++- 4 files changed, 69 insertions(+), 72 deletions(-) -- 2.31.1 diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h index 3a82faac5767..41f092a269f6 100644 --- a/include/acpi/acpi_bus.h +++ b/include/acpi/acpi_bus.h @@ -588,6 +588,9 @@ struct acpi_pci_root { bool acpi_dma_supported(struct acpi_device *adev); enum dev_dma_attr acpi_get_dma_attr(struct acpi_device *adev); +int acpi_iommu_fwspec_init(struct device *dev, u32 id, + struct fwnode_handle *fwnode, + const struct iommu_ops *ops); int acpi_dma_get_range(struct device *dev, u64 *dma_addr, u64 *offset, u64 *size); int acpi_dma_configure_id(struct device *dev, enum dev_dma_attr attr, diff --git a/include/linux/acpi_iort.h b/include/linux/acpi_iort.h index f7f054833afd..f1f0842a2cb2 100644 --- a/include/linux/acpi_iort.h +++ b/include/linux/acpi_iort.h @@ -35,8 +35,7 @@ void acpi_configure_pmsi_domain(struct device *dev); int iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id); /* IOMMU interface */ int iort_dma_get_ranges(struct device *dev, u64 *size); -const struct iommu_ops *iort_iommu_configure_id(struct device *dev, - const u32 *id_in); +int iort_iommu_configure_id(struct device *dev, const u32 *id_in); int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head); phys_addr_t acpi_iort_dma_get_max_cpu_address(void); #else @@ -50,9 +49,8 @@ static inline void acpi_configure_pmsi_domain(struct device *dev) { } /* IOMMU interface */ static inline int iort_dma_get_ranges(struct device *dev, u64 *size) { return -ENODEV; } -static inline const struct iommu_ops *iort_iommu_configure_id( - struct device *dev, const u32 *id_in) -{ return NULL; } +static inline int iort_iommu_configure_id(struct device *dev, const u32 *id_in) +{ return -ENODEV; } static inline int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head) { return 0; } diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c index a940be1cf2af..b5b021e064b6 100644 --- a/drivers/acpi/arm64/iort.c +++ b/drivers/acpi/arm64/iort.c @@ -806,23 +806,6 @@ static struct acpi_iort_node *iort_get_msi_resv_iommu(struct device *dev) return NULL; } -static inline const struct iommu_ops *iort_fwspec_iommu_ops(struct device *dev) -{ - struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); - - return (fwspec && fwspec->ops) ? fwspec->ops : NULL; -} - -static inline int iort_add_device_replay(struct device *dev) -{ - int err = 0; - - if (dev->bus && !device_iommu_mapped(dev)) - err = iommu_probe_device(dev); - - return err; -} - /** * iort_iommu_msi_get_resv_regions - Reserved region driver helper * @dev: Device from iommu_get_resv_regions() @@ -900,18 +883,6 @@ static inline bool iort_iommu_driver_enabled(u8 type) } } -static int arm_smmu_iort_xlate(struct device *dev, u32 streamid, - struct fwnode_handle *fwnode, - const struct iommu_ops *ops) -{ - int ret = iommu_fwspec_init(dev, fwnode, ops); - - if (!ret) - ret = iommu_fwspec_add_ids(dev, &streamid, 1); - - return ret; -} - static bool iort_pci_rc_supports_ats(struct acpi_iort_node *node) { struct acpi_iort_root_complex *pci_rc; @@ -946,7 +917,7 @@ static int iort_iommu_xlate(struct device *dev, struct acpi_iort_node *node, return iort_iommu_driver_enabled(node->type) ? -EPROBE_DEFER : -ENODEV; - return arm_smmu_iort_xlate(dev, streamid, iort_fwnode, ops); + return acpi_iommu_fwspec_init(dev, streamid, iort_fwnode, ops); } struct iort_pci_alias_info { @@ -1020,24 +991,14 @@ static int iort_nc_iommu_map_id(struct device *dev, * @dev: device to configure * @id_in: optional input id const value pointer * - * Returns: iommu_ops pointer on configuration success - * NULL on configuration failure + * Returns: 0 on success, <0 on failure */ -const struct iommu_ops *iort_iommu_configure_id(struct device *dev, - const u32 *id_in) +int iort_iommu_configure_id(struct device *dev, const u32 *id_in) { struct acpi_iort_node *node; - const struct iommu_ops *ops; + const struct iommu_ops *ops = NULL; int err = -ENODEV; - /* - * If we already translated the fwspec there - * is nothing left to do, return the iommu_ops. - */ - ops = iort_fwspec_iommu_ops(dev); - if (ops) - return ops; - if (dev_is_pci(dev)) { struct iommu_fwspec *fwspec; struct pci_bus *bus = to_pci_dev(dev)->bus; @@ -1046,7 +1007,7 @@ const struct iommu_ops *iort_iommu_configure_id(struct device *dev, node = iort_scan_node(ACPI_IORT_NODE_PCI_ROOT_COMPLEX, iort_match_node_callback, &bus->dev); if (!node) - return NULL; + return -ENODEV; info.node = node; err = pci_for_each_dma_alias(to_pci_dev(dev), @@ -1059,7 +1020,7 @@ const struct iommu_ops *iort_iommu_configure_id(struct device *dev, node = iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT, iort_match_node_callback, dev); if (!node) - return NULL; + return -ENODEV; err = id_in ? iort_nc_iommu_map_id(dev, node, id_in) : iort_nc_iommu_map(dev, node); @@ -1068,32 +1029,14 @@ const struct iommu_ops *iort_iommu_configure_id(struct device *dev, iort_named_component_init(dev, node); } - /* - * If we have reason to believe the IOMMU driver missed the initial - * add_device callback for dev, replay it to get things in order. - */ - if (!err) { - ops = iort_fwspec_iommu_ops(dev); - err = iort_add_device_replay(dev); - } - - /* Ignore all other errors apart from EPROBE_DEFER */ - if (err == -EPROBE_DEFER) { - ops = ERR_PTR(err); - } else if (err) { - dev_dbg(dev, "Adding to IOMMU failed: %d\n", err); - ops = NULL; - } - - return ops; + return err; } #else int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head) { return 0; } -const struct iommu_ops *iort_iommu_configure_id(struct device *dev, - const u32 *input_id) -{ return NULL; } +int iort_iommu_configure_id(struct device *dev, const u32 *input_id) +{ return -ENODEV; } #endif static int nc_dma_get_range(struct device *dev, u64 *size) diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c index e166916eb9db..5924421075f6 100644 --- a/drivers/acpi/scan.c +++ b/drivers/acpi/scan.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -1519,6 +1520,58 @@ int acpi_dma_get_range(struct device *dev, u64 *dma_addr, u64 *offset, return ret >= 0 ? 0 : ret; } +int acpi_iommu_fwspec_init(struct device *dev, u32 id, + struct fwnode_handle *fwnode, + const struct iommu_ops *ops) +{ + int ret = iommu_fwspec_init(dev, fwnode, ops); + + if (!ret) + ret = iommu_fwspec_add_ids(dev, &id, 1); + + return ret; +} + +static inline const struct iommu_ops *acpi_iommu_fwspec_ops(struct device *dev) +{ + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); + + return fwspec ? fwspec->ops : NULL; +} + +static const struct iommu_ops *acpi_iommu_configure_id(struct device *dev, + const u32 *id_in) +{ + int err; + const struct iommu_ops *ops; + + /* + * If we already translated the fwspec there is nothing left to do, + * return the iommu_ops. + */ + ops = acpi_iommu_fwspec_ops(dev); + if (ops) + return ops; + + err = iort_iommu_configure_id(dev, id_in); + + /* + * If we have reason to believe the IOMMU driver missed the initial + * add_device callback for dev, replay it to get things in order. + */ + if (!err && dev->bus && !device_iommu_mapped(dev)) + err = iommu_probe_device(dev); + + /* Ignore all other errors apart from EPROBE_DEFER */ + if (err == -EPROBE_DEFER) { + return ERR_PTR(err); + } else if (err) { + dev_dbg(dev, "Adding to IOMMU failed: %d\n", err); + return NULL; + } + return acpi_iommu_fwspec_ops(dev); +} + /** * acpi_dma_configure_id - Set-up DMA configuration for the device. * @dev: The pointer to the device @@ -1538,7 +1591,7 @@ int acpi_dma_configure_id(struct device *dev, enum dev_dma_attr attr, acpi_arch_dma_setup(dev, &dma_addr, &size); - iommu = iort_iommu_configure_id(dev, input_id); + iommu = acpi_iommu_configure_id(dev, input_id); if (PTR_ERR(iommu) == -EPROBE_DEFER) return -EPROBE_DEFER; From patchwork Fri Apr 23 11:38:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 426279 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp1236383jao; Fri, 23 Apr 2021 04:57:06 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy+wdKISquqpXa/K/ARnL35tTbmsaU/nyRPekf/KJ0gd+fa9Emrxel6fIMolbSeHu2VJwVW X-Received: by 2002:a17:906:2b03:: with SMTP id a3mr3861291ejg.481.1619179026554; Fri, 23 Apr 2021 04:57:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619179026; cv=none; d=google.com; s=arc-20160816; b=smVgPq5CxAxBot8j4ljfW4tLF+EGepYaknBcpSqqlXbQM8t0DwQV2nlVUPZd48K+LS vIsZrmhYAiTiKPO+3pYJEehdnPRt2itTo/2Ei4ergLqJiHPVPM5Pbm4H9VvJu/0265d9 pQ66osIxug/MIaGvUiQJLMe/eepGic1YQfN2G1b9A4hzZXLtd9ZxL6RMkqY0a2wW1ep8 tfKtqTrytci+JQWeFuq+//+5v4TPWeiSLJ4ygJ0o9PQ6lT2QKlk4auDM+n3txesJa7fG P4ThvoNBZOpl2paIubwGP/Zhri8P+gySkqqBdZwbWO5hqmClabnjBQ1+pFK8vQwJH3fE K+Gw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Gl+wT+HXO1EmX33ux5rHV8ewc8i/fb8Q84CtH/7aE+s=; b=zJTyECpOyq5PUodn+DX91F1mWecNNSGz1yg7AeorVO7PPFQ37oMs02i3DmeaqSaN7N YAEQX/ILLX8BgeSXikKTKegXw1poPvbwb5TTbnbXobCm8/Drp+k4QAKPjOveOxArJFkS pIN+YpZemxtCAzobcl1UuqLifzi4yFrj1aYiglinsTXY6k0CuP8QDSbYrFwjUds2LL4i GxLdJdkz4xJC+QLGdh7C6exRAgizS6HVJKz896eu3Y96JNiIW+fDezzPws1aYO4LNQXP huxM+wByUDb26RFkqV7DzQb4yOAVZFKMUfKbTrgfQEcxjI452agwVUFe+8RGTDgTfHAO esDg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=u5H1CF5i; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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For now it describes the relation between virtio-iommu and the endpoints it manages. Three steps are needed to configure DMA of endpoints: (1) acpi_viot_init(): parse the VIOT table, find or create the fwnode associated to each vIOMMU device. (2) When probing the vIOMMU device, the driver registers its IOMMU ops within the IOMMU subsystem. This step doesn't require any intervention from the VIOT driver. (3) viot_iommu_configure(): before binding the endpoint to a driver, find the associated IOMMU ops. Register them, along with the endpoint ID, into the device's iommu_fwspec. If step (3) happens before step (2), it is deferred until the IOMMU is initialized, then retried. Signed-off-by: Jean-Philippe Brucker --- drivers/acpi/Kconfig | 3 + drivers/iommu/Kconfig | 1 + drivers/acpi/Makefile | 2 + include/linux/acpi_viot.h | 19 +++ drivers/acpi/bus.c | 2 + drivers/acpi/scan.c | 3 + drivers/acpi/viot.c | 350 ++++++++++++++++++++++++++++++++++++++ MAINTAINERS | 8 + 8 files changed, 388 insertions(+) create mode 100644 include/linux/acpi_viot.h create mode 100644 drivers/acpi/viot.c -- 2.31.1 diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index eedec61e3476..3758c6940ed7 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig @@ -526,6 +526,9 @@ endif source "drivers/acpi/pmic/Kconfig" +config ACPI_VIOT + bool + endif # ACPI config X86_PM_TIMER diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index 1f111b399bca..aff8a4830dd1 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -403,6 +403,7 @@ config VIRTIO_IOMMU depends on ARM64 select IOMMU_API select INTERVAL_TREE + select ACPI_VIOT if ACPI help Para-virtualised IOMMU driver with virtio. diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile index 700b41adf2db..a6e644c48987 100644 --- a/drivers/acpi/Makefile +++ b/drivers/acpi/Makefile @@ -118,3 +118,5 @@ video-objs += acpi_video.o video_detect.o obj-y += dptf/ obj-$(CONFIG_ARM64) += arm64/ + +obj-$(CONFIG_ACPI_VIOT) += viot.o diff --git a/include/linux/acpi_viot.h b/include/linux/acpi_viot.h new file mode 100644 index 000000000000..1eb8ee5b0e5f --- /dev/null +++ b/include/linux/acpi_viot.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __ACPI_VIOT_H__ +#define __ACPI_VIOT_H__ + +#include + +#ifdef CONFIG_ACPI_VIOT +void __init acpi_viot_init(void); +int viot_iommu_configure(struct device *dev); +#else +static inline void acpi_viot_init(void) {} +static inline int viot_iommu_configure(struct device *dev) +{ + return -ENODEV; +} +#endif + +#endif /* __ACPI_VIOT_H__ */ diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c index be7da23fad76..b835ca702ff0 100644 --- a/drivers/acpi/bus.c +++ b/drivers/acpi/bus.c @@ -27,6 +27,7 @@ #include #endif #include +#include #include #include #include @@ -1339,6 +1340,7 @@ static int __init acpi_init(void) pci_mmcfg_late_init(); acpi_iort_init(); acpi_scan_init(); + acpi_viot_init(); acpi_ec_init(); acpi_debugfs_init(); acpi_sleep_proc_init(); diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c index 5924421075f6..4db43c822ee7 100644 --- a/drivers/acpi/scan.c +++ b/drivers/acpi/scan.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -1554,6 +1555,8 @@ static const struct iommu_ops *acpi_iommu_configure_id(struct device *dev, return ops; err = iort_iommu_configure_id(dev, id_in); + if (err && err != -EPROBE_DEFER) + err = viot_iommu_configure(dev); /* * If we have reason to believe the IOMMU driver missed the initial diff --git a/drivers/acpi/viot.c b/drivers/acpi/viot.c new file mode 100644 index 000000000000..710e5a5eac70 --- /dev/null +++ b/drivers/acpi/viot.c @@ -0,0 +1,350 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Virtual I/O topology + */ +#define pr_fmt(fmt) "ACPI: VIOT: " fmt + +#include +#include +#include +#include +#include +#include +#include + +struct viot_iommu { + /* Node offset within the table */ + unsigned int offset; + struct fwnode_handle *fwnode; + struct list_head list; +}; + +struct viot_endpoint { + union { + /* PCI range */ + struct { + u16 segment_start; + u16 segment_end; + u16 bdf_start; + u16 bdf_end; + }; + /* MMIO */ + u64 address; + }; + u32 endpoint_id; + struct viot_iommu *viommu; + struct list_head list; +}; + +static struct acpi_table_viot *viot; +static LIST_HEAD(viot_iommus); +static LIST_HEAD(viot_pci_ranges); +static LIST_HEAD(viot_mmio_endpoints); + +static int __init viot_check_bounds(const struct acpi_viot_header *hdr) +{ + struct acpi_viot_header *start, *end, *hdr_end; + + start = ACPI_ADD_PTR(struct acpi_viot_header, viot, + max_t(size_t, sizeof(*viot), viot->node_offset)); + end = ACPI_ADD_PTR(struct acpi_viot_header, viot, viot->header.length); + hdr_end = ACPI_ADD_PTR(struct acpi_viot_header, hdr, sizeof(*hdr)); + + if (hdr < start || hdr_end > end) { + pr_err(FW_BUG "Node pointer overflows\n"); + return -EOVERFLOW; + } + if (hdr->length < sizeof(*hdr)) { + pr_err(FW_BUG "Empty node\n"); + return -EINVAL; + } + return 0; +} + +static int __init viot_get_pci_iommu_fwnode(struct viot_iommu *viommu, + u16 segment, u16 bdf) +{ + struct pci_dev *pdev; + struct fwnode_handle *fwnode; + + pdev = pci_get_domain_bus_and_slot(segment, PCI_BUS_NUM(bdf), + bdf & 0xff); + if (!pdev) { + pr_err("Could not find PCI IOMMU\n"); + return -ENODEV; + } + + fwnode = pdev->dev.fwnode; + if (!fwnode) { + /* + * PCI devices aren't necessarily described by ACPI. Create a + * fwnode so the IOMMU subsystem can identify this device. + */ + fwnode = acpi_alloc_fwnode_static(); + if (!fwnode) { + pci_dev_put(pdev); + return -ENOMEM; + } + set_primary_fwnode(&pdev->dev, fwnode); + } + viommu->fwnode = pdev->dev.fwnode; + pci_dev_put(pdev); + return 0; +} + +static int __init viot_get_mmio_iommu_fwnode(struct viot_iommu *viommu, + u64 address) +{ + struct acpi_device *adev; + struct resource res = { + .start = address, + .end = address, + .flags = IORESOURCE_MEM, + }; + + adev = acpi_resource_consumer(&res); + if (!adev) { + pr_err("Could not find MMIO IOMMU\n"); + return -EINVAL; + } + viommu->fwnode = &adev->fwnode; + return 0; +} + +static struct viot_iommu * __init viot_get_iommu(unsigned int offset) +{ + int ret; + struct viot_iommu *viommu; + struct acpi_viot_header *hdr = ACPI_ADD_PTR(struct acpi_viot_header, + viot, offset); + union { + struct acpi_viot_virtio_iommu_pci pci; + struct acpi_viot_virtio_iommu_mmio mmio; + } *node = (void *)hdr; + + list_for_each_entry(viommu, &viot_iommus, list) + if (viommu->offset == offset) + return viommu; + + if (viot_check_bounds(hdr)) + return NULL; + + viommu = kzalloc(sizeof(*viommu), GFP_KERNEL); + if (!viommu) + return NULL; + + viommu->offset = offset; + switch (hdr->type) { + case ACPI_VIOT_NODE_VIRTIO_IOMMU_PCI: + if (hdr->length < sizeof(node->pci)) + goto err_free; + + ret = viot_get_pci_iommu_fwnode(viommu, node->pci.segment, + node->pci.bdf); + break; + case ACPI_VIOT_NODE_VIRTIO_IOMMU_MMIO: + if (hdr->length < sizeof(node->mmio)) + goto err_free; + + ret = viot_get_mmio_iommu_fwnode(viommu, + node->mmio.base_address); + break; + default: + ret = -EINVAL; + } + if (ret) + goto err_free; + + list_add(&viommu->list, &viot_iommus); + return viommu; + +err_free: + kfree(viommu); + return NULL; +} + +static int __init viot_parse_node(const struct acpi_viot_header *hdr) +{ + int ret = -EINVAL; + struct list_head *list; + struct viot_endpoint *ep; + union { + struct acpi_viot_mmio mmio; + struct acpi_viot_pci_range pci; + } *node = (void *)hdr; + + if (viot_check_bounds(hdr)) + return -EINVAL; + + if (hdr->type == ACPI_VIOT_NODE_VIRTIO_IOMMU_PCI || + hdr->type == ACPI_VIOT_NODE_VIRTIO_IOMMU_MMIO) + return 0; + + ep = kzalloc(sizeof(*ep), GFP_KERNEL); + if (!ep) + return -ENOMEM; + + switch (hdr->type) { + case ACPI_VIOT_NODE_PCI_RANGE: + if (hdr->length < sizeof(node->pci)) { + pr_err(FW_BUG "Invalid PCI node size\n"); + goto err_free; + } + + ep->segment_start = node->pci.segment_start; + ep->segment_end = node->pci.segment_end; + ep->bdf_start = node->pci.bdf_start; + ep->bdf_end = node->pci.bdf_end; + ep->endpoint_id = node->pci.endpoint_start; + ep->viommu = viot_get_iommu(node->pci.output_node); + list = &viot_pci_ranges; + break; + case ACPI_VIOT_NODE_MMIO: + if (hdr->length < sizeof(node->mmio)) { + pr_err(FW_BUG "Invalid MMIO node size\n"); + goto err_free; + } + + ep->address = node->mmio.base_address; + ep->endpoint_id = node->mmio.endpoint; + ep->viommu = viot_get_iommu(node->mmio.output_node); + list = &viot_mmio_endpoints; + break; + default: + pr_warn("Unsupported node %x\n", hdr->type); + ret = 0; + goto err_free; + } + + /* + * To be compatible with future versions of the table which may include + * other node types, keep parsing. + */ + if (!ep->viommu) { + pr_warn("No IOMMU node found\n"); + ret = 0; + goto err_free; + } + + list_add(&ep->list, list); + return 0; + +err_free: + kfree(ep); + return ret; +} + +/** + * acpi_viot_init - Parse the VIOT table + * + * Parse the VIOT table, prepare the list of endpoints to be used during DMA + * setup of devices. + */ +void __init acpi_viot_init(void) +{ + int i; + acpi_status status; + struct acpi_table_header *hdr; + struct acpi_viot_header *node; + + status = acpi_get_table(ACPI_SIG_VIOT, 0, &hdr); + if (ACPI_FAILURE(status)) { + if (status != AE_NOT_FOUND) { + const char *msg = acpi_format_exception(status); + + pr_err("Failed to get table, %s\n", msg); + } + return; + } + + viot = (void *)hdr; + + node = ACPI_ADD_PTR(struct acpi_viot_header, viot, viot->node_offset); + for (i = 0; i < viot->node_count; i++) { + if (viot_parse_node(node)) + return; + + node = ACPI_ADD_PTR(struct acpi_viot_header, node, + node->length); + } +} + +static int viot_dev_iommu_init(struct device *dev, struct viot_iommu *viommu, + u32 epid) +{ + const struct iommu_ops *ops; + + if (!viommu) + return -ENODEV; + + /* We're not translating ourself */ + if (viommu->fwnode == dev->fwnode) + return -EINVAL; + + ops = iommu_ops_from_fwnode(viommu->fwnode); + if (!ops) + return IS_ENABLED(CONFIG_VIRTIO_IOMMU) ? + -EPROBE_DEFER : -ENODEV; + + return acpi_iommu_fwspec_init(dev, epid, viommu->fwnode, ops); +} + +static int viot_pci_dev_iommu_init(struct pci_dev *pdev, u16 dev_id, void *data) +{ + u32 epid; + struct viot_endpoint *ep; + u32 domain_nr = pci_domain_nr(pdev->bus); + + list_for_each_entry(ep, &viot_pci_ranges, list) { + if (domain_nr >= ep->segment_start && + domain_nr <= ep->segment_end && + dev_id >= ep->bdf_start && + dev_id <= ep->bdf_end) { + epid = ((domain_nr - ep->segment_start) << 16) + + dev_id - ep->bdf_start + ep->endpoint_id; + + /* + * If we found a PCI range managed by the viommu, we're + * the one that has to request ACS. + */ + pci_request_acs(); + + return viot_dev_iommu_init(&pdev->dev, ep->viommu, + epid); + } + } + return -ENODEV; +} + +static int viot_mmio_dev_iommu_init(struct platform_device *pdev) +{ + struct resource *mem; + struct viot_endpoint *ep; + + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!mem) + return -ENODEV; + + list_for_each_entry(ep, &viot_mmio_endpoints, list) { + if (ep->address == mem->start) + return viot_dev_iommu_init(&pdev->dev, ep->viommu, + ep->endpoint_id); + } + return -ENODEV; +} + +/** + * viot_iommu_configure - Setup IOMMU ops for an endpoint described by VIOT + * @dev: the endpoint + * + * Return: 0 on success, <0 on failure + */ +int viot_iommu_configure(struct device *dev) +{ + if (dev_is_pci(dev)) + return pci_for_each_dma_alias(to_pci_dev(dev), + viot_pci_dev_iommu_init, NULL); + else if (dev_is_platform(dev)) + return viot_mmio_dev_iommu_init(to_platform_device(dev)); + return -ENODEV; +} diff --git a/MAINTAINERS b/MAINTAINERS index 6b1560c45e2a..1a018afff162 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -431,6 +431,14 @@ W: https://01.org/linux-acpi B: https://bugzilla.kernel.org F: drivers/acpi/acpi_video.c +ACPI VIOT DRIVER +M: Jean-Philippe Brucker +L: linux-acpi@vger.kernel.org +L: iommu@lists.linux-foundation.org +S: Maintained +F: drivers/acpi/viot.c +F: include/linux/acpi_viot.h + ACPI WMI DRIVER L: platform-driver-x86@vger.kernel.org S: Orphan From patchwork Fri Apr 23 11:38:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 426278 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp1236364jao; Fri, 23 Apr 2021 04:57:05 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzt57I5X13XeBDCdLjUXUO0qxELh+ow4NN2bjXVfyR01uBdd9nDVVHScTrvu5j0dV7Y+Fc0 X-Received: by 2002:a05:6402:4405:: with SMTP id y5mr3958312eda.149.1619179024865; Fri, 23 Apr 2021 04:57:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619179024; cv=none; d=google.com; s=arc-20160816; b=bsOMPiNIDWFkuLVYp2DP8wSgY42y8URtDE2csiOTJnMB9SnlfMX3Eopy5ihDr1vY6F uNwjI9COkOCIhPuuFMBgjG3axmUb/JhsYEK+V1Bp9+Dy1K3eI2YbiTKGRsCNWJroXS8Y eHGOWr1yz41xHiXO6SkXDtxhtjDYZZgTPU/3QFy4F2PxnKEk+fvy7DH2WMAu6eLB3bFj PPfjzF+SHnG2kR+jkvUycMpL+85ojmpcedH0hUK4DQpA4KC+4Fo9DTRwnNd9aPimJW4y 9mvnoxarOVEUDoP2qDqPAAuvTopGpR3ZWccW6BX4RIGsEYWNiZNObQrMgKiT6JOOQIZW UJPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=I/trhSE6y6Y4tDuE2sk5DuZOlkIOvXsegzt8mA8VmJ0=; b=zxsERxbAbv8SWRN7Rjj7ZOks4GoljGvK1Zil0oqzDt3J9Fa4Ma3DemXM5rg/Jtop6Y x8r1UruAgQkv5K0IZp43Qe5LR/jnxCJSt2p+FMlPrnqk0GSf+/xeU2/ic0J7CFR/OSF+ k37mNhb/6naYLfNHkehf3+ha6Sdv4Ubw3VoGgQLge8Gm+Js0B4Is0+TU9+pFcAqM0F/S Ing+PCjuwct9Qh9L6oIrdmk2GKbi147sf2oH1C1k8v6XMtRX8r0/eaVmYEOxonO9sW9l osm/FWFYG0SYj6W7fmhELT7QQwJ01UEWoSCc5w6C2J+8uHRQ35V7v5Wo7JHWr4ufWBDQ 3YZg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Lovu0ihG; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id jg32si5266731ejc.26.2021.04.23.04.57.04; Fri, 23 Apr 2021 04:57:04 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Lovu0ihG; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231504AbhDWL5j (ORCPT + 4 others); Fri, 23 Apr 2021 07:57:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36722 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230515AbhDWL5f (ORCPT ); Fri, 23 Apr 2021 07:57:35 -0400 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [IPv6:2a00:1450:4864:20::32d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1BA95C06174A for ; Fri, 23 Apr 2021 04:56:59 -0700 (PDT) Received: by mail-wm1-x32d.google.com with SMTP id n4-20020a05600c4f84b029013151278decso1064105wmq.4 for ; Fri, 23 Apr 2021 04:56:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=I/trhSE6y6Y4tDuE2sk5DuZOlkIOvXsegzt8mA8VmJ0=; b=Lovu0ihGApeyFpxtgvSIg+rb/YQtEIE/Mw2PYDYzX//yT9/GkRvDqYeKzJCInDmD06 CvQH/h1V2qL0xToqgg8GYiiMXNpipQqi9sk1LaaxPOWzY661jZl73a8wkaY4QCDfpA+n 1+uEqa5V0V6iAOOHbgIid20FdMbz41uOQn/lui5KCGymadEY0jMLD/3JanbM3FNGhfow QpBSyNFCU0SXL1+h/40RMiS9YS1jQal3uZiMeTzSwkO4/yiMkjR/FSdOI0dXp/wyKA1d Dl5cad5PmOP5yr5spJLRHn40KzML+YvmpIyvLl1iRzL5VqT/0UR3xGeOIUYet4YV0mnN p+gg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=I/trhSE6y6Y4tDuE2sk5DuZOlkIOvXsegzt8mA8VmJ0=; b=sfhz5R0Cm692d1btCwZld8a13LVIf4+4q5Qhzulf+PNFzicbDUPyOuc4bt5JzEcezT hS9CIa2JBwvNNYoQVTuXwH9fda+5bP+8tiBrCtdcGuYp0TL1DlTSdA/geEh3VaiJA8r2 vVM7W+qfrU+0VuqmCgvjaTCvrRPb/6M3mPZsyaPrRA5axcBL8s6KbvdCxnIsk3qWI24e 1A3Rp5hBayK2WojIcfBJyeTIwW9xSD3mYIsolfHDy3pIZQA7lXjeJOncHfjbOnBpjiXr 4NlTg3clynJsMnujoV88IXLIxuO+4M5du1tqUeuUVGWFjy+lqRk3jVBTc92vHwDRqCEG 1gtQ== X-Gm-Message-State: AOAM533owtc9TZ0D4/CnK5sQcIjalZEbnbTOIBu9F5/Yy6kPOigjfbo2 uQQIFFCqmUMK2+o62l/5KNLcHZDDlJn5FK2M X-Received: by 2002:a1c:3587:: with SMTP id c129mr3760936wma.80.1619179017764; Fri, 23 Apr 2021 04:56:57 -0700 (PDT) Received: from localhost.localdomain ([2001:1715:4e26:a7e0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id g9sm7485195wmh.21.2021.04.23.04.56.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Apr 2021 04:56:57 -0700 (PDT) From: Jean-Philippe Brucker To: rjw@rjwysocki.net, lenb@kernel.org, joro@8bytes.org, mst@redhat.com Cc: will@kernel.org, catalin.marinas@arm.com, baolu.lu@linux.intel.com, dwmw2@infradead.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org, virtualization@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, eric.auger@redhat.com, sebastien.boeuf@intel.com, robin.murphy@arm.com, kevin.tian@intel.com, lorenzo.pieralisi@arm.com, guohanjun@huawei.com, sudeep.holla@arm.com, jean-philippe@linaro.org Subject: [PATCH v2 4/6] iommu/dma: Pass address limit rather than size to iommu_setup_dma_ops() Date: Fri, 23 Apr 2021 13:38:35 +0200 Message-Id: <20210423113836.3974972-5-jean-philippe@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210423113836.3974972-1-jean-philippe@linaro.org> References: <20210423113836.3974972-1-jean-philippe@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Passing a 64-bit address width to iommu_setup_dma_ops() is valid on virtual platforms, but isn't currently possible. The overflow check in iommu_dma_init_domain() prevents this even when @dma_base isn't 0. Pass a limit address instead of a size, so callers don't have to fake a size to work around the check. Signed-off-by: Jean-Philippe Brucker --- include/linux/dma-iommu.h | 4 ++-- arch/arm64/mm/dma-mapping.c | 2 +- drivers/iommu/amd/iommu.c | 2 +- drivers/iommu/dma-iommu.c | 12 ++++++------ drivers/iommu/intel/iommu.c | 2 +- 5 files changed, 11 insertions(+), 11 deletions(-) -- 2.31.1 diff --git a/include/linux/dma-iommu.h b/include/linux/dma-iommu.h index 6e75a2d689b4..758ca4694257 100644 --- a/include/linux/dma-iommu.h +++ b/include/linux/dma-iommu.h @@ -19,7 +19,7 @@ int iommu_get_msi_cookie(struct iommu_domain *domain, dma_addr_t base); void iommu_put_dma_cookie(struct iommu_domain *domain); /* Setup call for arch DMA mapping code */ -void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 size); +void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 dma_limit); /* The DMA API isn't _quite_ the whole story, though... */ /* @@ -50,7 +50,7 @@ struct msi_msg; struct device; static inline void iommu_setup_dma_ops(struct device *dev, u64 dma_base, - u64 size) + u64 dma_limit) { } diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c index 93e87b287556..83f4f4bad5e4 100644 --- a/arch/arm64/mm/dma-mapping.c +++ b/arch/arm64/mm/dma-mapping.c @@ -50,7 +50,7 @@ void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, dev->dma_coherent = coherent; if (iommu) - iommu_setup_dma_ops(dev, dma_base, size); + iommu_setup_dma_ops(dev, dma_base, size - dma_base - 1); #ifdef CONFIG_XEN if (xen_initial_domain()) diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 67da96d5b3c2..50041df43391 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -1713,7 +1713,7 @@ static void amd_iommu_probe_finalize(struct device *dev) /* Domains are initialized for this device - have a look what we ended up with */ domain = iommu_get_domain_for_dev(dev); if (domain->type == IOMMU_DOMAIN_DMA) - iommu_setup_dma_ops(dev, IOVA_START_PFN << PAGE_SHIFT, 0); + iommu_setup_dma_ops(dev, IOVA_START_PFN << PAGE_SHIFT, U64_MAX); else set_dma_ops(dev, NULL); } diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 7bcdd1205535..c62e19bed302 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -319,16 +319,16 @@ static bool dev_is_untrusted(struct device *dev) * iommu_dma_init_domain - Initialise a DMA mapping domain * @domain: IOMMU domain previously prepared by iommu_get_dma_cookie() * @base: IOVA at which the mappable address space starts - * @size: Size of IOVA space + * @limit: Last address of the IOVA space * @dev: Device the domain is being initialised for * - * @base and @size should be exact multiples of IOMMU page granularity to + * @base and @limit + 1 should be exact multiples of IOMMU page granularity to * avoid rounding surprises. If necessary, we reserve the page at address 0 * to ensure it is an invalid IOVA. It is safe to reinitialise a domain, but * any change which could make prior IOVAs invalid will fail. */ static int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, - u64 size, struct device *dev) + dma_addr_t limit, struct device *dev) { struct iommu_dma_cookie *cookie = domain->iova_cookie; unsigned long order, base_pfn; @@ -346,7 +346,7 @@ static int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, /* Check the domain allows at least some access to the device... */ if (domain->geometry.force_aperture) { if (base > domain->geometry.aperture_end || - base + size <= domain->geometry.aperture_start) { + limit < domain->geometry.aperture_start) { pr_warn("specified DMA range outside IOMMU capability\n"); return -EFAULT; } @@ -1308,7 +1308,7 @@ static const struct dma_map_ops iommu_dma_ops = { * The IOMMU core code allocates the default DMA domain, which the underlying * IOMMU driver needs to support via the dma-iommu layer. */ -void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 size) +void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 dma_limit) { struct iommu_domain *domain = iommu_get_domain_for_dev(dev); @@ -1320,7 +1320,7 @@ void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 size) * underlying IOMMU driver needs to support via the dma-iommu layer. */ if (domain->type == IOMMU_DOMAIN_DMA) { - if (iommu_dma_init_domain(domain, dma_base, size, dev)) + if (iommu_dma_init_domain(domain, dma_base, dma_limit, dev)) goto out_err; dev->dma_ops = &iommu_dma_ops; } diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 708f430af1c4..39a4e672b1c2 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -5166,7 +5166,7 @@ static void intel_iommu_probe_finalize(struct device *dev) if (domain && domain->type == IOMMU_DOMAIN_DMA) iommu_setup_dma_ops(dev, base, - __DOMAIN_MAX_ADDR(dmar_domain->gaw) - base); + __DOMAIN_MAX_ADDR(dmar_domain->gaw)); else set_dma_ops(dev, NULL); } From patchwork Fri Apr 23 11:38:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 426280 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp1236417jao; Fri, 23 Apr 2021 04:57:09 -0700 (PDT) X-Google-Smtp-Source: ABdhPJydEu057wrD2k1c/O3K8jOR4EmPBob4wa4j30B+0slg5R0WxLw6OcDxaNiY/oTAQ2htT+kZ X-Received: by 2002:a17:907:984d:: with SMTP id jj13mr3712448ejc.45.1619179029180; Fri, 23 Apr 2021 04:57:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619179029; cv=none; d=google.com; s=arc-20160816; b=CoUkJNRS/89JkwKFIc4N/edWwc5sWv0Gc9qHae/3hXpuVty4SIC0xDgtdDZOcFvjDF rYLhEfwQc0VmmHlDfNboMRyKgSJzP5uKzPVbnqVKaxPfMA3Bu5ASiJMvoQdxmEgvMd+U EqMAkv5aJp1JuHl0JaygkYMz3kuNHXQuuVn+XVl3axhSChZ2B72/beBYUWi1PLX2te8K q9R5LlAANlR7PC4Nvd8zMRadPxNECpRCyw9hAAoKl6nqdSn9lhZFTdL6okBXsdFWCXv7 c6lGRzE/tuIM88VS/Yj4NeWQSOs4AIMYFKlOHDNqKxI0FF/GMdlK4dO6Nz2PeUXELsmM jXIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=PPlf6PmudxEBhFFbCtfVg/0ThZVLyT3V5UlJSyz19uQ=; b=tQHLyxm4cqiCZfGk1QtKaMlczHBCwDFiLtJPBABJ/GcGDCLmc333qkLdQT7Q0ff6FR 33if/TLI5ReHuVUGjcCrhTfHDA5Vo4az5VoIH5Tp5vEj7KLAFPc5BiHe+YlPNDKVEbZ6 NtJb0w/BcO5yD7LZN7JVwrPjYns5XLwOKHCARiYgMOq4elYPmY3Pvsx/AVj5Vb8B+hYH DbV62yp7i/aRJPzj8SvY2kqylTwf8D22x2Hle1IqWxvoT+UiP6nvQro6zGDq+AYxSSvT kl3Ez+ghfKJldsOFaQjFsqa+95qrqOTOZNZuGSCdK3lqhxTdA2VtsEMbvTLmhRcw6H9O 6E7A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=nRkBopEb; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id jg32si5266731ejc.26.2021.04.23.04.57.09; Fri, 23 Apr 2021 04:57:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=nRkBopEb; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230243AbhDWL5k (ORCPT + 4 others); Fri, 23 Apr 2021 07:57:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36724 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229957AbhDWL5g (ORCPT ); Fri, 23 Apr 2021 07:57:36 -0400 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [IPv6:2a00:1450:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0A6D4C061756 for ; Fri, 23 Apr 2021 04:57:00 -0700 (PDT) Received: by mail-wr1-x436.google.com with SMTP id p6so41451334wrn.9 for ; Fri, 23 Apr 2021 04:56:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PPlf6PmudxEBhFFbCtfVg/0ThZVLyT3V5UlJSyz19uQ=; b=nRkBopEbDZfyoJj93wf3o22q/jswYgaQWnGlI6oAwmedhv/HGZN7g3FARSljblxKD5 acjYCanfz5LdD8LEdDSIEHgIlB+f3gnCX35E78fjNUkoXlkSkJoAG+mUiJIeSX1hsyWd TgUSR6lrK82ZUQP53r6gGX0ZuRertEVlH4Sx1ROIBbK5ANGDVafwOuWFkaNDut9csDD7 JSm7sySdFNLmhkzXYfVrer2Y+HT5K4AIjsqUojilCvM2hENpooUfV+o6rjIjG2yuDWPe q8wpXSscJjF+jwYonvShzo57XIzap+xqcFXhwpk+LrgZLsyQQUemvwa8GLCvj7lV44zS 6yKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PPlf6PmudxEBhFFbCtfVg/0ThZVLyT3V5UlJSyz19uQ=; b=I/1fOMhESvRRmW3DPH5qk8vm4l0j2u4umC+RNHvJj+onhlM+5APsjFASazQZ7z+1pf eCxPSXLU+l7jTXKgtGC+8nGQ3TOrjqPwediBzaPdAyLyH8KZM16LimbuoTm87Jpau4Je trosQI+kzGioP7tTSsXR1xEUzs/g9puZSXVu0tVTjeppG73hOxX8N2oTBAo387GiLnwo YepsHRcnq1CqUDIKJw01O7CbnTxUaD+cH+M5ODz4azsmiRVMEDhW9GRQiuC2WX9VVggN H4/ldaulCPIx4FBGsnQ+F5iAAm8aUz9aZLR4lMelenBI1cVZ674dQPtfMal+CyrmImYZ 4hvA== X-Gm-Message-State: AOAM531fREpi0g71iSdVc0gqjntJhl3mnQDy/nAoc8u+fNg0sisqDPko IgUteCdGVGQ4lpSX9MqDRekmuA== X-Received: by 2002:a05:6000:1209:: with SMTP id e9mr4332783wrx.192.1619179018723; Fri, 23 Apr 2021 04:56:58 -0700 (PDT) Received: from localhost.localdomain ([2001:1715:4e26:a7e0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id g9sm7485195wmh.21.2021.04.23.04.56.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Apr 2021 04:56:58 -0700 (PDT) From: Jean-Philippe Brucker To: rjw@rjwysocki.net, lenb@kernel.org, joro@8bytes.org, mst@redhat.com Cc: will@kernel.org, catalin.marinas@arm.com, baolu.lu@linux.intel.com, dwmw2@infradead.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org, virtualization@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, eric.auger@redhat.com, sebastien.boeuf@intel.com, robin.murphy@arm.com, kevin.tian@intel.com, lorenzo.pieralisi@arm.com, guohanjun@huawei.com, sudeep.holla@arm.com, jean-philippe@linaro.org Subject: [PATCH v2 5/6] iommu/dma: Simplify calls to iommu_setup_dma_ops() Date: Fri, 23 Apr 2021 13:38:36 +0200 Message-Id: <20210423113836.3974972-6-jean-philippe@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210423113836.3974972-1-jean-philippe@linaro.org> References: <20210423113836.3974972-1-jean-philippe@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org dma-iommu uses the address bounds described in domain->geometry during IOVA allocation. The address size parameters of iommu_setup_dma_ops() are useful for describing additional limits set by the platform firmware, but aren't needed for drivers that call this function from probe_finalize(). The base parameter can be zero because dma-iommu already removes the first IOVA page, and the limit parameter can be U64_MAX because it's only checked against the domain geometry. Simplify calls to iommu_setup_dma_ops(). Signed-off-by: Jean-Philippe Brucker --- drivers/iommu/amd/iommu.c | 9 +-------- drivers/iommu/dma-iommu.c | 4 +++- drivers/iommu/intel/iommu.c | 10 +--------- 3 files changed, 5 insertions(+), 18 deletions(-) -- 2.31.1 diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 50041df43391..bbb09840cf40 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -1708,14 +1708,7 @@ static struct iommu_device *amd_iommu_probe_device(struct device *dev) static void amd_iommu_probe_finalize(struct device *dev) { - struct iommu_domain *domain; - - /* Domains are initialized for this device - have a look what we ended up with */ - domain = iommu_get_domain_for_dev(dev); - if (domain->type == IOMMU_DOMAIN_DMA) - iommu_setup_dma_ops(dev, IOVA_START_PFN << PAGE_SHIFT, U64_MAX); - else - set_dma_ops(dev, NULL); + iommu_setup_dma_ops(dev, 0, U64_MAX); } static void amd_iommu_release_device(struct device *dev) diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index c62e19bed302..175f8eaeb5b3 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -1322,7 +1322,9 @@ void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 dma_limit) if (domain->type == IOMMU_DOMAIN_DMA) { if (iommu_dma_init_domain(domain, dma_base, dma_limit, dev)) goto out_err; - dev->dma_ops = &iommu_dma_ops; + set_dma_ops(dev, &iommu_dma_ops); + } else { + set_dma_ops(dev, NULL); } return; diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 39a4e672b1c2..c6fe11d3624e 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -5160,15 +5160,7 @@ static void intel_iommu_release_device(struct device *dev) static void intel_iommu_probe_finalize(struct device *dev) { - dma_addr_t base = IOVA_START_PFN << VTD_PAGE_SHIFT; - struct iommu_domain *domain = iommu_get_domain_for_dev(dev); - struct dmar_domain *dmar_domain = to_dmar_domain(domain); - - if (domain && domain->type == IOMMU_DOMAIN_DMA) - iommu_setup_dma_ops(dev, base, - __DOMAIN_MAX_ADDR(dmar_domain->gaw)); - else - set_dma_ops(dev, NULL); + iommu_setup_dma_ops(dev, 0, U64_MAX); } static void intel_iommu_get_resv_regions(struct device *device, From patchwork Fri Apr 23 11:38:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 426281 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp1236430jao; Fri, 23 Apr 2021 04:57:10 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwZRwIopz2iA5C8PzgkDJ0dDqacSZCUwERZKQyTJ05vm8YMe6xCteN4Tz1/qWKBfQdwMxn6 X-Received: by 2002:aa7:c511:: with SMTP id o17mr3893780edq.335.1619179030802; Fri, 23 Apr 2021 04:57:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619179030; cv=none; d=google.com; s=arc-20160816; b=J21IGdV0GA/5rwfGx8ZuXowJ+jYNepUxMcsMpRU7JLQd6K1BZoTlDQefwDT/ubsNnd NsqY4se7yhgZ8il1Rr150CLdoTHVu7gfw+NmwusQbAOB9b+yLMt6RxUauJNQJ3LD3/Rc GT6SZaT8XHd5oe4qGCEjuz01UfjvFlH19Ah2v+WLm4kGeF3y2uC0yhhzGWE0PYpkW2X6 lkXULyzv0GV1/TNVYnQvHPhH48Q0e1dC8qE0QZP+f/nxpcdvymlut6gI3tR0jIu+FVpJ LTVoKr96iYANnFKPJ41UzQM0s8ZPe9ft/NP+CzDFw0cSABKSsHIHZQ5Xh8dpx3otkKzf +3Wg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=UQIMwLFTls4/WJjymQFgC41Tqut/moVpCvSGVMf3p14=; b=h+y+MxvuPZYkyB/5PmKC/QGJgMVw0us9fWgKYjRL3nOzC01Gk3iUQ8bzr5BUDDuIjO Ow6J3Ll3WIs9ikNONXHdCluvYKbbCQFUz6kBQMPxanogR7FCTnyatubnaM9RBtyS0T4n b5Q25w4HPrKg7RujkQ0bDQfCQyLeY4TUcbtXlHo7E7bKAT7XT4CNaksHuccfKGB2wIdG 4HLxrAa6cdMjkVpLEEeDsNNKQSz5LcDCo3BuxOBPPLVqNxLlnxDAI0qqpTY5BC5tsJiJ gPRGvIpdvhCMfKsDhS2AWgJjfTUiyGjleNHfX3Cv3kSi2dcqQ2wNyAdN03+moKMjeAl3 lqDQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Se4ZGfMv; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Because the other x86 IOMMU drivers aren't yet ready to use the acpi_dma_setup() path, x86 doesn't implement arch_setup_dma_ops() at the moment. Similarly to Vt-d and AMD IOMMU, call iommu_setup_dma_ops() from probe_finalize(). Acked-by: Joerg Roedel Signed-off-by: Jean-Philippe Brucker --- drivers/iommu/Kconfig | 3 ++- drivers/iommu/dma-iommu.c | 1 + drivers/iommu/virtio-iommu.c | 8 ++++++++ 3 files changed, 11 insertions(+), 1 deletion(-) -- 2.31.1 Acked-by: Michael S. Tsirkin diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index aff8a4830dd1..07b7c25cbed8 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -400,8 +400,9 @@ config HYPERV_IOMMU config VIRTIO_IOMMU tristate "Virtio IOMMU driver" depends on VIRTIO - depends on ARM64 + depends on (ARM64 || X86) select IOMMU_API + select IOMMU_DMA select INTERVAL_TREE select ACPI_VIOT if ACPI help diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 175f8eaeb5b3..46ed43c400cf 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -1332,6 +1332,7 @@ void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 dma_limit) pr_warn("Failed to set up IOMMU for device %s; retaining platform DMA ops\n", dev_name(dev)); } +EXPORT_SYMBOL_GPL(iommu_setup_dma_ops); static struct iommu_dma_msi_page *iommu_dma_get_msi_page(struct device *dev, phys_addr_t msi_addr, struct iommu_domain *domain) diff --git a/drivers/iommu/virtio-iommu.c b/drivers/iommu/virtio-iommu.c index 29a397c2d12f..8be546a338e7 100644 --- a/drivers/iommu/virtio-iommu.c +++ b/drivers/iommu/virtio-iommu.c @@ -1027,6 +1027,13 @@ static struct iommu_device *viommu_probe_device(struct device *dev) return ERR_PTR(ret); } +static void viommu_probe_finalize(struct device *dev) +{ +#ifndef CONFIG_ARCH_HAS_SETUP_DMA_OPS + iommu_setup_dma_ops(dev, 0, U64_MAX); +#endif +} + static void viommu_release_device(struct device *dev) { struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); @@ -1063,6 +1070,7 @@ static struct iommu_ops viommu_ops = { .iova_to_phys = viommu_iova_to_phys, .iotlb_sync = viommu_iotlb_sync, .probe_device = viommu_probe_device, + .probe_finalize = viommu_probe_finalize, .release_device = viommu_release_device, .device_group = viommu_device_group, .get_resv_regions = viommu_get_resv_regions,