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Mon, 10 May 2021 03:29:09 +0000 From: "Peng Fan (OSS)" To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, p.zabel@pengutronix.de, l.stach@pengutronix.de, krzk@kernel.org, agx@sigxcpu.org, marex@denx.de, andrew.smirnov@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ping.bai@nxp.com, frieder.schrempf@kontron.de, aford173@gmail.com, abel.vesa@nxp.com Subject: [PATCH V3 02/13] soc: imx: gpcv2: move domain mapping to domain driver probe Date: Mon, 10 May 2021 12:00:34 +0800 Message-Id: <20210510040045.13225-3-peng.fan@oss.nxp.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210510040045.13225-1-peng.fan@oss.nxp.com> References: <20210510040045.13225-1-peng.fan@oss.nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SG2PR04CA0184.apcprd04.prod.outlook.com (2603:1096:4:14::22) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SG2PR04CA0184.apcprd04.prod.outlook.com (2603:1096:4:14::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4108.25 via Frontend Transport; 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Tested-by: Frieder Schrempf Reviewed-by: Frieder Schrempf Signed-off-by: Lucas Stach --- drivers/soc/imx/gpcv2.c | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index 512e6f4acafd..552d3e6bee52 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c @@ -140,14 +140,11 @@ static int imx_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain *genpd, int i, ret = 0; u32 pxx_req; - regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, - domain->bits.map, domain->bits.map); - if (has_regulator && on) { ret = regulator_enable(domain->regulator); if (ret) { dev_err(domain->dev, "failed to enable regulator\n"); - goto unmap; + return ret; } } @@ -203,9 +200,7 @@ static int imx_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain *genpd, /* Preserve earlier error code */ ret = ret ?: err; } -unmap: - regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, - domain->bits.map, 0); + return ret; } @@ -499,10 +494,13 @@ static int imx_pgc_domain_probe(struct platform_device *pdev) if (ret) return dev_err_probe(domain->dev, ret, "Failed to get domain's clocks\n"); + regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, + domain->bits.map, domain->bits.map); + ret = pm_genpd_init(&domain->genpd, NULL, true); if (ret) { dev_err(domain->dev, "Failed to init power domain\n"); - goto out_put_clocks; + goto out_domain_unmap; } ret = of_genpd_add_provider_simple(domain->dev->of_node, @@ -516,7 +514,9 @@ static int imx_pgc_domain_probe(struct platform_device *pdev) out_genpd_remove: pm_genpd_remove(&domain->genpd); -out_put_clocks: +out_domain_unmap: + regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, + domain->bits.map, 0); imx_pgc_put_clocks(domain); return ret; @@ -528,6 +528,10 @@ static int imx_pgc_domain_remove(struct platform_device *pdev) of_genpd_del_provider(domain->dev->of_node); pm_genpd_remove(&domain->genpd); + + regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, + domain->bits.map, 0); + imx_pgc_put_clocks(domain); return 0; From patchwork Mon May 10 04:00:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan \(OSS\)" X-Patchwork-Id: 433322 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6F83C433B4 for ; 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dkim=none (message not signed) header.d=none; kernel.org; dmarc=none action=none header.from=oss.nxp.com; Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) by DB7PR04MB4091.eurprd04.prod.outlook.com (2603:10a6:5:1e::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4108.26; Mon, 10 May 2021 03:29:21 +0000 Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::45b9:c993:87ec:9a64]) by DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::45b9:c993:87ec:9a64%8]) with mapi id 15.20.4108.031; Mon, 10 May 2021 03:29:21 +0000 From: "Peng Fan (OSS)" To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, p.zabel@pengutronix.de, l.stach@pengutronix.de, krzk@kernel.org, agx@sigxcpu.org, marex@denx.de, andrew.smirnov@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ping.bai@nxp.com, frieder.schrempf@kontron.de, aford173@gmail.com, abel.vesa@nxp.com, Peng Fan Subject: [PATCH V3 04/13] soc: imx: gpcv2: split power up and power down sequence control Date: Mon, 10 May 2021 12:00:36 +0800 Message-Id: <20210510040045.13225-5-peng.fan@oss.nxp.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210510040045.13225-1-peng.fan@oss.nxp.com> References: <20210510040045.13225-1-peng.fan@oss.nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SG2PR04CA0184.apcprd04.prod.outlook.com (2603:1096:4:14::22) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SG2PR04CA0184.apcprd04.prod.outlook.com (2603:1096:4:14::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4108.25 via Frontend Transport; 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Split the function into two, which results in slightly more code, but is way easier to get right. Tested-by: Frieder Schrempf Reviewed-by: Frieder Schrempf Signed-off-by: Lucas Stach Signed-off-by: Peng Fan --- drivers/soc/imx/gpcv2.c | 141 ++++++++++++++++++++++++---------------- 1 file changed, 86 insertions(+), 55 deletions(-) diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index 4222b6e87e7c..bcf1f338b0bf 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c @@ -125,20 +125,19 @@ struct imx_pgc_domain_data { const struct regmap_access_table *reg_access_table; }; -static int imx_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain *genpd, - bool on) +static inline struct imx_pgc_domain * +to_imx_pgc_domain(struct generic_pm_domain *genpd) { - struct imx_pgc_domain *domain = container_of(genpd, - struct imx_pgc_domain, - genpd); - unsigned int offset = on ? - GPC_PU_PGC_SW_PUP_REQ : GPC_PU_PGC_SW_PDN_REQ; - const bool enable_power_control = !on; - const bool has_regulator = !IS_ERR(domain->regulator); - int i, ret = 0; - u32 pxx_req; - - if (has_regulator && on) { + return container_of(genpd, struct imx_pgc_domain, genpd); +} + +static int imx_pgc_power_up(struct generic_pm_domain *genpd) +{ + struct imx_pgc_domain *domain = to_imx_pgc_domain(genpd); + u32 reg_val; + int ret; + + if (!IS_ERR(domain->regulator)) { ret = regulator_enable(domain->regulator); if (ret) { dev_err(domain->dev, "failed to enable regulator\n"); @@ -150,69 +149,101 @@ static int imx_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain *genpd, ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks); if (ret) { dev_err(domain->dev, "failed to enable reset clocks\n"); - regulator_disable(domain->regulator); - return ret; + goto out_regulator_disable; } - if (enable_power_control) - regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc), - GPC_PGC_CTRL_PCR, GPC_PGC_CTRL_PCR); - - if (domain->bits.hsk) - regmap_update_bits(domain->regmap, GPC_PU_PWRHSK, - domain->bits.hsk, on ? domain->bits.hsk : 0); - - regmap_update_bits(domain->regmap, offset, + /* request the domain to power up */ + regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ, domain->bits.pxx, domain->bits.pxx); - /* * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait * for PUP_REQ/PDN_REQ bit to be cleared */ - ret = regmap_read_poll_timeout(domain->regmap, offset, pxx_req, - !(pxx_req & domain->bits.pxx), + ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PGC_SW_PUP_REQ, + reg_val, !(reg_val & domain->bits.pxx), 0, USEC_PER_MSEC); if (ret) { dev_err(domain->dev, "failed to command PGC\n"); - /* - * If we were in a process of enabling a - * domain and failed we might as well disable - * the regulator we just enabled. And if it - * was the opposite situation and we failed to - * power down -- keep the regulator on - */ - on = !on; + goto out_clk_disable; } - if (enable_power_control) - regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc), - GPC_PGC_CTRL_PCR, 0); + /* disable power control */ + regmap_clear_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc), + GPC_PGC_CTRL_PCR); + + /* request the ADB400 to power up */ + if (domain->bits.hsk) + regmap_update_bits(domain->regmap, GPC_PU_PWRHSK, + domain->bits.hsk, domain->bits.hsk); /* Disable reset clocks for all devices in the domain */ clk_bulk_disable_unprepare(domain->num_clks, domain->clks); - if (has_regulator && !on) { - int err; + return 0; - err = regulator_disable(domain->regulator); - if (err) - dev_err(domain->dev, - "failed to disable regulator: %d\n", err); - /* Preserve earlier error code */ - ret = ret ?: err; - } +out_clk_disable: + clk_bulk_disable_unprepare(domain->num_clks, domain->clks); +out_regulator_disable: + if (!IS_ERR(domain->regulator)) + regulator_disable(domain->regulator); return ret; } -static int imx_gpc_pu_pgc_sw_pup_req(struct generic_pm_domain *genpd) +static int imx_pgc_power_down(struct generic_pm_domain *genpd) { - return imx_gpc_pu_pgc_sw_pxx_req(genpd, true); -} + struct imx_pgc_domain *domain = to_imx_pgc_domain(genpd); + u32 reg_val; + int ret; -static int imx_gpc_pu_pgc_sw_pdn_req(struct generic_pm_domain *genpd) -{ - return imx_gpc_pu_pgc_sw_pxx_req(genpd, false); + /* Enable reset clocks for all devices in the domain */ + ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks); + if (ret) { + dev_err(domain->dev, "failed to enable reset clocks\n"); + return ret; + } + + /* request the ADB400 to power down */ + if (domain->bits.hsk) + regmap_clear_bits(domain->regmap, GPC_PU_PWRHSK, + domain->bits.hsk); + + /* enable power control */ + regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc), + GPC_PGC_CTRL_PCR, GPC_PGC_CTRL_PCR); + + /* request the domain to power down */ + regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PDN_REQ, + domain->bits.pxx, domain->bits.pxx); + /* + * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait + * for PUP_REQ/PDN_REQ bit to be cleared + */ + ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PGC_SW_PDN_REQ, + reg_val, !(reg_val & domain->bits.pxx), + 0, USEC_PER_MSEC); + if (ret) { + dev_err(domain->dev, "failed to command PGC\n"); + goto out_clk_disable; + } + + /* Disable reset clocks for all devices in the domain */ + clk_bulk_disable_unprepare(domain->num_clks, domain->clks); + + if (!IS_ERR(domain->regulator)) { + ret = regulator_disable(domain->regulator); + if (ret) { + dev_err(domain->dev, "failed to disable regulator\n"); + return ret; + } + } + + return 0; + +out_clk_disable: + clk_bulk_disable_unprepare(domain->num_clks, domain->clks); + + return ret; } static const struct imx_pgc_domain imx7_pgc_domains[] = { @@ -590,8 +621,8 @@ static int imx_gpcv2_probe(struct platform_device *pdev) domain = pd_pdev->dev.platform_data; domain->regmap = regmap; - domain->genpd.power_on = imx_gpc_pu_pgc_sw_pup_req; - domain->genpd.power_off = imx_gpc_pu_pgc_sw_pdn_req; + domain->genpd.power_on = imx_pgc_power_up; + domain->genpd.power_off = imx_pgc_power_down; pd_pdev->dev.parent = dev; pd_pdev->dev.of_node = np; From patchwork Mon May 10 04:00:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan \(OSS\)" X-Patchwork-Id: 433321 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.9 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE,SPF_PASS, UNWANTED_LANGUAGE_BODY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DAA27C433B4 for ; Mon, 10 May 2021 03:29:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B664361432 for ; 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dkim=none (message not signed) header.d=none; kernel.org; dmarc=none action=none header.from=oss.nxp.com; Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) by DB7PR04MB4091.eurprd04.prod.outlook.com (2603:10a6:5:1e::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4108.26; Mon, 10 May 2021 03:29:34 +0000 Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::45b9:c993:87ec:9a64]) by DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::45b9:c993:87ec:9a64%8]) with mapi id 15.20.4108.031; Mon, 10 May 2021 03:29:33 +0000 From: "Peng Fan (OSS)" To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, p.zabel@pengutronix.de, l.stach@pengutronix.de, krzk@kernel.org, agx@sigxcpu.org, marex@denx.de, andrew.smirnov@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ping.bai@nxp.com, frieder.schrempf@kontron.de, aford173@gmail.com, abel.vesa@nxp.com, Peng Fan Subject: [PATCH V3 06/13] soc: imx: gpcv2: add runtime PM support for power-domains Date: Mon, 10 May 2021 12:00:38 +0800 Message-Id: <20210510040045.13225-7-peng.fan@oss.nxp.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210510040045.13225-1-peng.fan@oss.nxp.com> References: <20210510040045.13225-1-peng.fan@oss.nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SG2PR04CA0184.apcprd04.prod.outlook.com (2603:1096:4:14::22) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SG2PR04CA0184.apcprd04.prod.outlook.com (2603:1096:4:14::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4108.25 via Frontend Transport; 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Tested-by: Frieder Schrempf Reviewed-by: Frieder Schrempf Signed-off-by: Lucas Stach Signed-off-by: Peng Fan --- drivers/soc/imx/gpcv2.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index c449cd0e1499..800287abdbea 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -141,11 +142,17 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd) u32 reg_val; int ret; + ret = pm_runtime_get_sync(domain->dev); + if (ret < 0) { + pm_runtime_put_noidle(domain->dev); + return ret; + } + if (!IS_ERR(domain->regulator)) { ret = regulator_enable(domain->regulator); if (ret) { dev_err(domain->dev, "failed to enable regulator\n"); - return ret; + goto out_put_pm; } } @@ -204,6 +211,8 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd) out_regulator_disable: if (!IS_ERR(domain->regulator)) regulator_disable(domain->regulator); +out_put_pm: + pm_runtime_put(domain->dev); return ret; } @@ -266,6 +275,8 @@ static int imx_pgc_power_down(struct generic_pm_domain *genpd) } } + pm_runtime_put(domain->dev); + return 0; out_clk_disable: @@ -523,6 +534,8 @@ static int imx_pgc_domain_probe(struct platform_device *pdev) return dev_err_probe(domain->dev, domain->num_clks, "Failed to get domain's clocks\n"); + pm_runtime_enable(domain->dev); + regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, domain->bits.map, domain->bits.map); @@ -546,6 +559,7 @@ static int imx_pgc_domain_probe(struct platform_device *pdev) out_domain_unmap: regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, domain->bits.map, 0); + pm_runtime_disable(domain->dev); return ret; } @@ -560,6 +574,8 @@ static int imx_pgc_domain_remove(struct platform_device *pdev) regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, domain->bits.map, 0); + pm_runtime_disable(domain->dev); + return 0; } From patchwork Mon May 10 04:00:40 2021 Content-Type: text/plain; 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Mon, 10 May 2021 03:29:45 +0000 From: "Peng Fan (OSS)" To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, p.zabel@pengutronix.de, l.stach@pengutronix.de, krzk@kernel.org, agx@sigxcpu.org, marex@denx.de, andrew.smirnov@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ping.bai@nxp.com, frieder.schrempf@kontron.de, aford173@gmail.com, abel.vesa@nxp.com, Peng Fan Subject: [PATCH V3 08/13] dt-bindings: imx: gpcv2: add support for optional resets Date: Mon, 10 May 2021 12:00:40 +0800 Message-Id: <20210510040045.13225-9-peng.fan@oss.nxp.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210510040045.13225-1-peng.fan@oss.nxp.com> References: <20210510040045.13225-1-peng.fan@oss.nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SG2PR04CA0184.apcprd04.prod.outlook.com (2603:1096:4:14::22) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SG2PR04CA0184.apcprd04.prod.outlook.com (2603:1096:4:14::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4108.25 via Frontend Transport; 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Add an optional resets property to allow the GPC driver to trigger those resets explicitly. The resets belong to devices located inside the power domain, which need to be held in reset across the power-up sequence. So we have no means to specify what each reset is in a generic power-domain binding. Same situation as with the clocks in this binding actually. Tested-by: Frieder Schrempf Signed-off-by: Lucas Stach Signed-off-by: Peng Fan Reviewed-by: Rob Herring --- .../devicetree/bindings/power/fsl,imx-gpcv2.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml index a96e6dbf1858..eb248f24dce6 100644 --- a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml +++ b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml @@ -66,6 +66,16 @@ properties: power-supply: true + resets: + description: | + A number of phandles to resets that need to be asserted during + power-up sequencing of the domain. The resets belong to devices + located inside the power domain, which need to be held in reset + across the power-up sequence. So no means to specify what each + reset is in a generic power-domain binding. + minItems: 1 + maxItems: 4 + required: - '#power-domain-cells' - reg From patchwork Mon May 10 04:00:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan \(OSS\)" X-Patchwork-Id: 433319 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1B48C433B4 for ; Mon, 10 May 2021 03:30:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 892DB61432 for ; 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dkim=none (message not signed) header.d=none; kernel.org; dmarc=none action=none header.from=oss.nxp.com; Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) by DB7PR04MB4091.eurprd04.prod.outlook.com (2603:10a6:5:1e::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4108.26; Mon, 10 May 2021 03:29:57 +0000 Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::45b9:c993:87ec:9a64]) by DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::45b9:c993:87ec:9a64%8]) with mapi id 15.20.4108.031; Mon, 10 May 2021 03:29:57 +0000 From: "Peng Fan (OSS)" To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, p.zabel@pengutronix.de, l.stach@pengutronix.de, krzk@kernel.org, agx@sigxcpu.org, marex@denx.de, andrew.smirnov@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ping.bai@nxp.com, frieder.schrempf@kontron.de, aford173@gmail.com, abel.vesa@nxp.com, Rob Herring , Peng Fan Subject: [PATCH V3 10/13] dt-bindings: power: add defines for i.MX8MM power domains Date: Mon, 10 May 2021 12:00:42 +0800 Message-Id: <20210510040045.13225-11-peng.fan@oss.nxp.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210510040045.13225-1-peng.fan@oss.nxp.com> References: <20210510040045.13225-1-peng.fan@oss.nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SG2PR04CA0184.apcprd04.prod.outlook.com (2603:1096:4:14::22) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SG2PR04CA0184.apcprd04.prod.outlook.com (2603:1096:4:14::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4108.25 via Frontend Transport; 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Tested-by: Frieder Schrempf Acked-by: Rob Herring Signed-off-by: Lucas Stach Signed-off-by: Peng Fan --- .../bindings/power/fsl,imx-gpcv2.yaml | 2 ++ include/dt-bindings/power/imx8mm-power.h | 22 +++++++++++++++++++ 2 files changed, 24 insertions(+) create mode 100644 include/dt-bindings/power/imx8mm-power.h diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml index eb248f24dce6..87b6318bf2b9 100644 --- a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml +++ b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml @@ -26,6 +26,7 @@ properties: enum: - fsl,imx7d-gpc - fsl,imx8mq-gpc + - fsl,imx8mm-gpc reg: maxItems: 1 @@ -54,6 +55,7 @@ properties: Power domain index. Valid values are defined in include/dt-bindings/power/imx7-power.h for fsl,imx7d-gpc and include/dt-bindings/power/imx8m-power.h for fsl,imx8mq-gpc + include/dt-bindings/power/imx8mm-power.h for fsl,imx8mm-gpc maxItems: 1 clocks: diff --git a/include/dt-bindings/power/imx8mm-power.h b/include/dt-bindings/power/imx8mm-power.h new file mode 100644 index 000000000000..fc9c2e16aadc --- /dev/null +++ b/include/dt-bindings/power/imx8mm-power.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ +/* + * Copyright (C) 2020 Pengutronix, Lucas Stach + */ + +#ifndef __DT_BINDINGS_IMX8MM_POWER_H__ +#define __DT_BINDINGS_IMX8MM_POWER_H__ + +#define IMX8MM_POWER_DOMAIN_HSIOMIX 0 +#define IMX8MM_POWER_DOMAIN_PCIE 1 +#define IMX8MM_POWER_DOMAIN_OTG1 2 +#define IMX8MM_POWER_DOMAIN_OTG2 3 +#define IMX8MM_POWER_DOMAIN_GPUMIX 4 +#define IMX8MM_POWER_DOMAIN_GPU 5 +#define IMX8MM_POWER_DOMAIN_VPUMIX 6 +#define IMX8MM_POWER_DOMAIN_VPUG1 7 +#define IMX8MM_POWER_DOMAIN_VPUG2 8 +#define IMX8MM_POWER_DOMAIN_VPUH1 9 +#define IMX8MM_POWER_DOMAIN_DISPMIX 10 +#define IMX8MM_POWER_DOMAIN_MIPI 11 + +#endif From patchwork Mon May 10 04:00:44 2021 Content-Type: text/plain; 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Mon, 10 May 2021 03:30:10 +0000 From: "Peng Fan (OSS)" To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, p.zabel@pengutronix.de, l.stach@pengutronix.de, krzk@kernel.org, agx@sigxcpu.org, marex@denx.de, andrew.smirnov@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ping.bai@nxp.com, frieder.schrempf@kontron.de, aford173@gmail.com, abel.vesa@nxp.com, Peng Fan Subject: [PATCH V3 12/13] soc: imx: gpcv2: Add support for missing i.MX8MM VPU/DISPMIX power domains Date: Mon, 10 May 2021 12:00:44 +0800 Message-Id: <20210510040045.13225-13-peng.fan@oss.nxp.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210510040045.13225-1-peng.fan@oss.nxp.com> References: <20210510040045.13225-1-peng.fan@oss.nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SG2PR04CA0184.apcprd04.prod.outlook.com (2603:1096:4:14::22) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SG2PR04CA0184.apcprd04.prod.outlook.com (2603:1096:4:14::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4108.25 via Frontend Transport; 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Tested-by: Frieder Schrempf Signed-off-by: Lucas Stach Signed-off-by: Frieder Schrempf Signed-off-by: Peng Fan --- drivers/soc/imx/gpcv2.c | 70 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index d676e65e8c16..2490757f759d 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c @@ -650,6 +650,76 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = { }, .pgc = IMX8MM_PGC_GPU2D, }, + + [IMX8MM_POWER_DOMAIN_VPUMIX] = { + .genpd = { + .name = "vpumix", + }, + .bits = { + .pxx = IMX8MM_VPUMIX_SW_Pxx_REQ, + .map = IMX8MM_VPUMIX_A53_DOMAIN, + .hskreq = IMX8MM_VPUMIX_HSK_PWRDNREQN, + .hskack = IMX8MM_VPUMIX_HSK_PWRDNACKN, + }, + .pgc = IMX8MM_PGC_VPUMIX, + }, + + [IMX8MM_POWER_DOMAIN_VPUG1] = { + .genpd = { + .name = "vpu-g1", + }, + .bits = { + .pxx = IMX8MM_VPUG1_SW_Pxx_REQ, + .map = IMX8MM_VPUG1_A53_DOMAIN, + }, + .pgc = IMX8MM_PGC_VPUG1, + }, + + [IMX8MM_POWER_DOMAIN_VPUG2] = { + .genpd = { + .name = "vpu-g2", + }, + .bits = { + .pxx = IMX8MM_VPUG2_SW_Pxx_REQ, + .map = IMX8MM_VPUG2_A53_DOMAIN, + }, + .pgc = IMX8MM_PGC_VPUG2, + }, + + [IMX8MM_POWER_DOMAIN_VPUH1] = { + .genpd = { + .name = "vpu-h1", + }, + .bits = { + .pxx = IMX8MM_VPUH1_SW_Pxx_REQ, + .map = IMX8MM_VPUH1_A53_DOMAIN, + }, + .pgc = IMX8MM_PGC_VPUH1, + }, + + [IMX8MM_POWER_DOMAIN_DISPMIX] = { + .genpd = { + .name = "dispmix", + }, + .bits = { + .pxx = IMX8MM_DISPMIX_SW_Pxx_REQ, + .map = IMX8MM_DISPMIX_A53_DOMAIN, + .hskreq = IMX8MM_DISPMIX_HSK_PWRDNREQN, + .hskack = IMX8MM_DISPMIX_HSK_PWRDNACKN, + }, + .pgc = IMX8MM_PGC_DISPMIX, + }, + + [IMX8MM_POWER_DOMAIN_MIPI] = { + .genpd = { + .name = "mipi", + }, + .bits = { + .pxx = IMX8MM_MIPI_SW_Pxx_REQ, + .map = IMX8MM_MIPI_A53_DOMAIN, + }, + .pgc = IMX8MM_PGC_MIPI, + }, }; static const struct regmap_range imx8mm_yes_ranges[] = { From patchwork Mon May 10 04:00:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan \(OSS\)" X-Patchwork-Id: 433020 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp2474369jao; Sun, 9 May 2021 20:30:25 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyxnJbyugoUHUyk5MZphsp5ajMnOrVCxWabOF1EsMO+y3oEsw4T0ue1U5T7z6rsKrM4yqwe X-Received: by 2002:a05:6e02:1be6:: with SMTP id y6mr9647267ilv.242.1620617425683; Sun, 09 May 2021 20:30:25 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1620617425; cv=pass; d=google.com; s=arc-20160816; b=vldwTQXA1JqwUN5nmHIBvCvAo3Px8vQx/U6AimI/Di4zkJlVLz6Myz3rV13VYwKkDg HgCESUo+pjxLIcerQHSguakIei7haNGcKW3YfBuaNgbfJxnwlSyr1eXCx0bA2MEK74JO DbNuPPf6cChuj0Jt9dyxZjB9OA1Lqla5IAs8xNsuCJVlLh9W/MeZdJJdwfkZlnNZhKNo Ft2zyGJrtkbWuCn4BJjsdlR1qyYE8qV/86uGtgZoi2HUY4QEVQoHH1m60OY1iumZpHzj R4WAjo13OwOFXEYpCs3wqekgevGbP00Exw3LUBVIXfteNryK7EomN80kQv8fDIWQfZi0 DJvw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Q9CnNtvb9vIm+pedslTBJfFuW0h8T99Um/krzsU0U/k=; b=lP7ruwNxYZBWOkDTLUC+yvDg+jVSo6eBekY3o4nBLiYgoXUk2tZ1PbTC4wv4QlOkOe ho8SAAjU1Ycfb4tod/SJG9oL5J+oWW6dHDz4aah3N0jjoszU1zWOad56gRhZckVjtCZi wFVxikzN5zuhSIMA2RNuGBsM4fdmZO3dXfJGmbgjXpnin4kTadOG/N0AtIbAi1EeYmDT cb4gBEc1N7WIo1knsxhW8pPHkJdD17sGBcfFDlyMA/MpUWQKTENmHT2gu/fdZdm/0cnC 5hGlYlKf8DYtN5t37KI9xaeZu6Ak2Yfz0OqLLH6rK6tSNNhnpMQ7O/7Y+qiLNKOneeTe 0x+g== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@NXP1.onmicrosoft.com header.s=selector2-NXP1-onmicrosoft-com header.b=Ogsn8zbu; arc=pass (i=1 spf=pass spfdomain=oss.nxp.com dkim=pass dkdomain=oss.nxp.com dmarc=pass fromdomain=oss.nxp.com); spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Mon, 10 May 2021 03:30:16 +0000 From: "Peng Fan (OSS)" To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, p.zabel@pengutronix.de, l.stach@pengutronix.de, krzk@kernel.org, agx@sigxcpu.org, marex@denx.de, andrew.smirnov@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ping.bai@nxp.com, frieder.schrempf@kontron.de, aford173@gmail.com, abel.vesa@nxp.com, Peng Fan Subject: [PATCH V3 13/13] soc: imx: gpcv2: move reset assert after requesting domain power up Date: Mon, 10 May 2021 12:00:45 +0800 Message-Id: <20210510040045.13225-14-peng.fan@oss.nxp.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210510040045.13225-1-peng.fan@oss.nxp.com> References: <20210510040045.13225-1-peng.fan@oss.nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SG2PR04CA0184.apcprd04.prod.outlook.com (2603:1096:4:14::22) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SG2PR04CA0184.apcprd04.prod.outlook.com (2603:1096:4:14::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4108.25 via Frontend Transport; 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It also applies to GPU power domain. Reviewed-by: Frieder Schrempf Tested-by: Frieder Schrempf Signed-off-by: Peng Fan --- drivers/soc/imx/gpcv2.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.30.0 diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index 2490757f759d..35bbb1bc5159 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c @@ -217,8 +217,6 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd) goto out_regulator_disable; } - reset_control_assert(domain->reset); - if (domain->bits.pxx) { /* request the domain to power up */ regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ, @@ -241,6 +239,8 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd) GPC_PGC_CTRL_PCR); } + reset_control_assert(domain->reset); + /* delay for reset to propagate */ udelay(5);