From patchwork Fri Jun 29 08:11:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 140526 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp545346ljj; Fri, 29 Jun 2018 01:11:50 -0700 (PDT) X-Google-Smtp-Source: ADUXVKK39EEUvkZbA6BcFwYaup6rWPXZnsK8Mc8CK4wh2aJUSw4JN7YLp/vVJDgt5HVFCpJq53kh X-Received: by 2002:a17:902:820a:: with SMTP id x10-v6mr13745580pln.179.1530259910582; Fri, 29 Jun 2018 01:11:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1530259910; cv=none; d=google.com; s=arc-20160816; b=IBXVdI/KctDH/Kw0nWuyDIOswe1ommZSMFfD42EMQUITqQb2gzYc4Q/GNmeeHuub5c beUGQxv7a5S8wND2haGaUNHr4h2nml/UhKqmut6sEPKou/0F3Oq//GrZY9K5M5Ng2Xes hXXj/KQf+VdECFlfEekT1Oenu2nr+9wDlXYf69DMVlmzjfahfisgT72XmUdyBuXF/TaC 0F32JPCt6BCKMUgPerkK/OXlYKpgvLRpXN9BqcxTP1M+o5tNnTN9upckr2ZBq4/SeOEB 2mlKAEeCqCAn43QwTSGZRQ4DSl7B3dBpIbiQdQaBqAosVjhYB3TR5IhWQloI+jB8n+vN jtUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=YWEqtDMOxOj4GiIRp8x9UJ6tFM1P2/A6jvF6YCtUQ74=; b=XkgrV0ifXolSyx9MZvGBWEr2lilq0fShF3b4oqQFdxGnFJJ7YL9k4QpwAS4dz9+ZmX /cLapNPfXyBTVkOR2PmFFjPnjt0Ut6yeH1s9r1RoIFH6n+ni+lHomp762R6pGm+zGZca V5KgW5eiQzepSSK1bDDmKkh5j602gy4Cbr3WFyqzK0doVwOae1aDJw194BstuoC2VgD2 QnLmkKpR4io4vsNfYrM1GjjtdWlz5+AD3Fi0wAWm9CHq31b++b4zefN+cB9RDqKkPqS2 tWRi8qTjPPDSmD19GEWw8GlAI1B0kE+k3lZqaqenUds3LdxNuphTJLr96/HYZFUprg3A 7mmQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x66-v6si8819498pfb.97.2018.06.29.01.11.50; Fri, 29 Jun 2018 01:11:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934630AbeF2ILr (ORCPT + 5 others); Fri, 29 Jun 2018 04:11:47 -0400 Received: from mx.socionext.com ([202.248.49.38]:42397 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934615AbeF2ILk (ORCPT ); Fri, 29 Jun 2018 04:11:40 -0400 Received: from unknown (HELO kinkan-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 29 Jun 2018 17:11:39 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by kinkan-ex.css.socionext.com (Postfix) with ESMTP id 0B9D11800FC; Fri, 29 Jun 2018 17:11:39 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Fri, 29 Jun 2018 17:11:38 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan.css.socionext.com (Postfix) with ESMTP id 8AD871A120B; Fri, 29 Jun 2018 17:11:38 +0900 (JST) From: Kunihiko Hayashi To: Philipp Zabel , Rob Herring , Mark Rutland , Masahiro Yamada Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Masami Hiramatsu , Jassi Brar , Kunihiko Hayashi Subject: [PATCH 1/2] dt-bindings: reset: uniphier: add USB3 controller reset support Date: Fri, 29 Jun 2018 17:11:30 +0900 Message-Id: <1530259891-18822-2-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1530259891-18822-1-git-send-email-hayashi.kunihiko@socionext.com> References: <1530259891-18822-1-git-send-email-hayashi.kunihiko@socionext.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DT bindings for reset control of USB3 controller implemented in UniPhier SoCs. Signed-off-by: Kunihiko Hayashi --- .../devicetree/bindings/reset/uniphier-reset.txt | 45 ++++++++++++++++++++++ 1 file changed, 45 insertions(+) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/reset/uniphier-reset.txt b/Documentation/devicetree/bindings/reset/uniphier-reset.txt index 93efed6..f21d81c 100644 --- a/Documentation/devicetree/bindings/reset/uniphier-reset.txt +++ b/Documentation/devicetree/bindings/reset/uniphier-reset.txt @@ -118,3 +118,48 @@ Example: other nodes ... }; + + +USB3 controller reset +--------------------- + +Required properties: +- compatible: Should be + "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC + "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC + "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC + "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC +- #reset-cells: Should be 1. +- reg: Specifies offset and length of the register set for the device. +- clocks: A list of phandles to the clock gate for USB3 glue layer. + According to the clock-names, appropriate clocks are required. +- clock-names: Should contain + "gio", "link" - for Pro4 SoC + "link" - for others +- resets: A list of phandles to the reset control for USB3 glue layer. + According to the reset-names, appropriate resets are required. +- reset-names: Should contain + "gio", "link" - for Pro4 SoC + "link" - for others + +Example: + + usb-glue@65b00000 { + compatible = "socionext,uniphier-ld20-dwc3-glue", + "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x65b00000 0x400>; + + usb_rst: reset@0 { + compatible = "socionext,uniphier-ld20-usb3-reset"; + reg = <0x0 0x4>; + #reset-cells = <1>; + clock-names = "link"; + clocks = <&sys_clk 14>; + clock-names = "link"; + resets = <&sys_rst 14>; + }; + + other nodes ... + }; From patchwork Fri Jun 29 08:11:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 140528 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp546040ljj; Fri, 29 Jun 2018 01:12:45 -0700 (PDT) X-Google-Smtp-Source: ADUXVKL4i+jipC/M1qK+yUfDHqnHQdkxRW9L2Z6+I6A+tLKHw3E8W1GM1GdKN6aaR9F6paZzEHRU X-Received: by 2002:a65:64d7:: with SMTP id t23-v6mr12056953pgv.207.1530259965593; Fri, 29 Jun 2018 01:12:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1530259965; cv=none; d=google.com; s=arc-20160816; b=0oqxaruwZRzdskU3fIdqwSPU12RF1i9AE86653QlcqrXsqX2Eecng+pxRZwNpz2Uqm tPVJSxF4UR7h5GXGOpCwar385qCj+NODJNc0uuwAF/vQZTwrVB0ZqafG+IVMldx8cOxC dXFxHjc0hyiWyY2UzNxlFFOc0DipuztcGP8YNGCdbfdV1wvcPCqo36rG1zhYo54RsGQk 9NxDbOpkbq7UbOBC2kjJv03G1Nn6J9uzs8Kg94HY9NH5OIHrN0Z3yp+dklwkM5b8rhPX KY1rVl43dft1+csjOMeuOnQPIWMc49K0vtfnpX+PwTDll9qLfFSAliX4W8WaJlll2YTQ IvoA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=5tYUzrWOrScdUMNghQF5YO1644QJm2Xs2VAdxRMk+s0=; b=vm0u/yr2NrrJW46rvtbIKTZzgK/gGSSonyE+Z4GUsOx0Wp7C6LS/6WDxzeVnLwZPVo LNRs0kFoRaL82Ooo5tFsQyZAVanq8mZNiF+KUUatz4mCPEGJxmi1ry979um8yGCXl+F4 Ejnd9xXdfA2uD6pZ3yPPuNTmikDKhHlYjKbqtzEjaPAtQg8Q+7ng0+hyvSMKS9KscE7M OOYWG/5N5Fk8Eo0PeQQLWUmcw1mkK4h2na14KozmqYyaD2b/c8heD9s2USCNHs2STnvG W16xfqcgtyfaTqirCOFjV+orZPs5vOnJH5gTDJcmtVMArTCDvsgenmyYM81dhWY+lPow 6kHQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 136-v6si7577479pgb.587.2018.06.29.01.12.45; Fri, 29 Jun 2018 01:12:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934616AbeF2IMn (ORCPT + 5 others); Fri, 29 Jun 2018 04:12:43 -0400 Received: from mx.socionext.com ([202.248.49.38]:42402 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934557AbeF2ILl (ORCPT ); Fri, 29 Jun 2018 04:11:41 -0400 Received: from unknown (HELO iyokan-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 29 Jun 2018 17:11:40 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by iyokan-ex.css.socionext.com (Postfix) with ESMTP id 5964A60034; Fri, 29 Jun 2018 17:11:40 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Fri, 29 Jun 2018 17:11:40 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan.css.socionext.com (Postfix) with ESMTP id BB8CF1A120B; Fri, 29 Jun 2018 17:11:39 +0900 (JST) From: Kunihiko Hayashi To: Philipp Zabel , Rob Herring , Mark Rutland , Masahiro Yamada Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Masami Hiramatsu , Jassi Brar , Kunihiko Hayashi Subject: [PATCH 2/2] reset: uniphier: add USB3 controller reset control Date: Fri, 29 Jun 2018 17:11:31 +0900 Message-Id: <1530259891-18822-3-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1530259891-18822-1-git-send-email-hayashi.kunihiko@socionext.com> References: <1530259891-18822-1-git-send-email-hayashi.kunihiko@socionext.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add reset lines for USB3 controller implemented in UniPhier SoCs. This reuses only the reset operations in reset-simple, because the reset-simple doesn't handle any SoC-dependent clocks and resets. This reset lines is included in the USB3 glue layer, and it's necessary to enable clocks and deassert resets of the layer before using this reset lines. Signed-off-by: Kunihiko Hayashi --- drivers/reset/Kconfig | 10 ++ drivers/reset/Makefile | 1 + drivers/reset/reset-uniphier-usb3.c | 183 ++++++++++++++++++++++++++++++++++++ 3 files changed, 194 insertions(+) create mode 100644 drivers/reset/reset-uniphier-usb3.c -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index c0b292b..851c9c3 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -138,6 +138,16 @@ config RESET_UNIPHIER Say Y if you want to control reset signals provided by System Control block, Media I/O block, Peripheral Block. +config RESET_UNIPHIER_USB3 + tristate "USB3 reset driver for UniPhier SoCs" + depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF + default ARCH_UNIPHIER + select RESET_SIMPLE + help + Support for USB3 reset controllers on UniPhier SoCs. + Say Y if you want to control reset signals provided by + USB3 controller block. + config RESET_ZYNQ bool "ZYNQ Reset Driver" if COMPILE_TEST default ARCH_ZYNQ diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index c1261dc..2638ac4 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -20,5 +20,6 @@ obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o +obj-$(CONFIG_RESET_UNIPHIER_USB3) += reset-uniphier-usb3.o obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o diff --git a/drivers/reset/reset-uniphier-usb3.c b/drivers/reset/reset-uniphier-usb3.c new file mode 100644 index 0000000..397e6c9 --- /dev/null +++ b/drivers/reset/reset-uniphier-usb3.c @@ -0,0 +1,183 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * reset-uniphier-usb3.c - USB3 reset driver for UniPhier + * Copyright 2018 Socionext Inc. + * Author: Kunihiko Hayashi + */ + +#include +#include +#include +#include +#include + +#include "reset-simple.h" + +#define MAX_CLKS 2 +#define MAX_RSTS 2 + +struct uniphier_usb3_reset_soc_data { + const char *clock_names[MAX_CLKS]; + const char *reset_names[MAX_RSTS]; +}; + +struct uniphier_usb3_reset_priv { + int nclks; + struct clk *clk[MAX_CLKS]; + int nrsts; + struct reset_control *rst[MAX_RSTS]; + const struct uniphier_usb3_reset_soc_data *data; +}; + +static int uniphier_usb3_reset_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct uniphier_usb3_reset_priv *priv; + struct reset_simple_data *rst_data; + struct resource *res; + resource_size_t size; + const char *name; + int i, ret, nc, nr; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->data = of_device_get_match_data(dev); + if (WARN_ON(!priv->data)) + return -EINVAL; + + rst_data = devm_kzalloc(dev, sizeof(*rst_data), GFP_KERNEL); + if (!rst_data) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + size = resource_size(res); + rst_data->membase = devm_ioremap_resource(dev, res); + if (IS_ERR(rst_data->membase)) + return PTR_ERR(rst_data->membase); + + for (i = 0; i < MAX_CLKS; i++) { + name = priv->data->clock_names[i]; + if (!name) + break; + priv->clk[i] = devm_clk_get(dev, name); + if (IS_ERR(priv->clk[i])) + return PTR_ERR(priv->clk[i]); + priv->nclks++; + } + + for (i = 0; i < MAX_RSTS; i++) { + name = priv->data->reset_names[i]; + if (!name) + break; + priv->rst[i] = devm_reset_control_get_shared(dev, name); + if (IS_ERR(priv->rst[i])) + return PTR_ERR(priv->rst[i]); + priv->nrsts++; + } + + for (nc = 0; nc < priv->nclks; nc++) { + ret = clk_prepare_enable(priv->clk[nc]); + if (ret) + goto out_clk_disable; + } + + for (nr = 0; nr < priv->nrsts; nr++) { + ret = reset_control_deassert(priv->rst[nr]); + if (ret) + goto out_rst_assert; + } + + spin_lock_init(&rst_data->lock); + rst_data->rcdev.owner = THIS_MODULE; + rst_data->rcdev.nr_resets = size * BITS_PER_BYTE; + rst_data->rcdev.ops = &reset_simple_ops; + rst_data->rcdev.of_node = dev->of_node; + rst_data->active_low = true; + + platform_set_drvdata(pdev, priv); + + ret = devm_reset_controller_register(dev, &rst_data->rcdev); + if (ret) + goto out_rst_assert; + + return 0; + +out_rst_assert: + while (nr--) + reset_control_assert(priv->rst[nr]); +out_clk_disable: + while (nc--) + clk_disable_unprepare(priv->clk[nc]); + + return ret; +} + +static int uniphier_usb3_reset_remove(struct platform_device *pdev) +{ + struct uniphier_usb3_reset_priv *priv = platform_get_drvdata(pdev); + int i; + + for (i = 0; i < priv->nrsts; i++) + reset_control_assert(priv->rst[i]); + for (i = 0; i < priv->nclks; i++) + clk_disable_unprepare(priv->clk[i]); + + return 0; +} + +static const struct uniphier_usb3_reset_soc_data uniphier_pro4_data = { + .clock_names = { "gio", "link", }, + .reset_names = { "gio", "link", }, +}; + +static const struct uniphier_usb3_reset_soc_data uniphier_pxs2_data = { + .clock_names = { "link", }, + .reset_names = { "link", }, +}; + +static const struct uniphier_usb3_reset_soc_data uniphier_ld20_data = { + .clock_names = { "link", }, + .reset_names = { "link", }, +}; + +static const struct uniphier_usb3_reset_soc_data uniphier_pxs3_data = { + .clock_names = { "link", }, + .reset_names = { "link", }, +}; + +static const struct of_device_id uniphier_usb3_reset_match[] = { + { + .compatible = "socionext,uniphier-pro4-usb3-reset", + .data = &uniphier_pro4_data, + }, + { + .compatible = "socionext,uniphier-pxs2-usb3-reset", + .data = &uniphier_pxs2_data, + }, + { + .compatible = "socionext,uniphier-ld20-usb3-reset", + .data = &uniphier_ld20_data, + }, + { + .compatible = "socionext,uniphier-pxs3-usb3-reset", + .data = &uniphier_pxs3_data, + }, + { /* Sentinel */ } +}; +MODULE_DEVICE_TABLE(of, uniphier_usb3_reset_match); + +static struct platform_driver uniphier_usb3_reset_driver = { + .probe = uniphier_usb3_reset_probe, + .remove = uniphier_usb3_reset_remove, + .driver = { + .name = "uniphier-usb3-reset", + .of_match_table = uniphier_usb3_reset_match, + }, +}; +module_platform_driver(uniphier_usb3_reset_driver); + +MODULE_AUTHOR("Kunihiko Hayashi "); +MODULE_DESCRIPTION("UniPhier USB3 Reset Driver"); +MODULE_LICENSE("GPL");