From patchwork Tue Aug 14 10:33:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 144157 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp4173660ljj; Tue, 14 Aug 2018 03:33:42 -0700 (PDT) X-Google-Smtp-Source: AA+uWPyVrBAGb1u6/o5kc7cghSpI9ztNBiV3hh3h6LoKY6LuuhHePdFt1fY/11npEK8Tf07Jcyyb X-Received: by 2002:a17:902:6f10:: with SMTP id w16-v6mr1289627plk.216.1534242822679; Tue, 14 Aug 2018 03:33:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1534242822; cv=none; d=google.com; s=arc-20160816; b=idt93lLjZA+V//iZ1kEJjUsZFtNZB+AonqTlkKkX+EsztdvESx2JeSU4g5E8NUzVMk R35MbPz6wSMQEwMl6x3BHpR73SqcKWM+1SzJMmOU+GR2LVRQavhxkBavAty9+7AH0mE7 cwkiHFAu8xrA00OpgAs5K5cDCfIGNKFRhqxofXimjoBBQbu9Q7t+hWY7iD3vH+04Us8M NmNex3Uyta8G71r2DPAnE46pJA/OmCQLqxgnqtBotZEO44Gr+gqyNl4rEbxNCid/5hlr ZklPzA6hgSaieu3WBknMKLRbfSj8qfPyjolBIJzxco+v4TNJ/379Z+aCF5sIdWMAPyTH xygg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=M1hsVsV1K2nQME2T6V/ZjYXjY04pxbNwMNEcwNJbGPg=; b=tv0hnX/j/3g8/2THhA+Z04/FjwpM9L8P0118qquNpklTqI8xjJHiLBfgJJy0x+S6b/ k0UD4+pS3fWBwTncoq5L+te+LO0BQGBL4oayUmSNxcTPeRZ5rm1Q8rw6Z9OawuPRQBRK 8TaDIOJllZzumxKjhZaV4ggkcUXA8JCB5YaIMvDSt2Sz5dLAJMToSrxa3kTZrOAkD2pp fmTX9KV8TsGdwIDasLDGXmklDvpIjGBwRlsprD578XZLoKtN1U9nGwirpUppB032wIv5 JZJWa8QqwpcoXuBnoJ+0rwpe8G9PMdLpwbWruxpFQ0MhBLdS5jZRA4VYXeCKAk2mf9MJ eN6w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v3-v6si17150865plz.419.2018.08.14.03.33.42; Tue, 14 Aug 2018 03:33:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732049AbeHNNUO (ORCPT + 31 others); Tue, 14 Aug 2018 09:20:14 -0400 Received: from foss.arm.com ([217.140.101.70]:41160 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728541AbeHNNUN (ORCPT ); Tue, 14 Aug 2018 09:20:13 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D31C67A9; Tue, 14 Aug 2018 03:33:39 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.emea.arm.com [10.4.12.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 59E453F73C; Tue, 14 Aug 2018 03:33:38 -0700 (PDT) From: Julien Grall To: linux-doc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, will.deacon@arm.com, corbet@lwn.net, Dave.Martin@arm.com, Julien Grall Subject: [PATCH] Documentation/arm64/sve: Couple of improvements and typoes Date: Tue, 14 Aug 2018 11:33:32 +0100 Message-Id: <20180814103332.28836-1-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org - Fix mismatch between SVE registers (Z) and FPSIMD register (V) - Don't prefix the path for [3] with Linux to stay consistent with [1] and [2]. Signed-off-by: Julien Grall --- Documentation/arm64/sve.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.11.0 Acked-by: Dave Martin diff --git a/Documentation/arm64/sve.txt b/Documentation/arm64/sve.txt index f128f736b4a5..7169a0ec41d8 100644 --- a/Documentation/arm64/sve.txt +++ b/Documentation/arm64/sve.txt @@ -200,7 +200,7 @@ prctl(PR_SVE_SET_VL, unsigned long arg) thread. * Changing the vector length causes all of P0..P15, FFR and all bits of - Z0..V31 except for Z0 bits [127:0] .. Z31 bits [127:0] to become + Z0..Z31 except for Z0 bits [127:0] .. Z31 bits [127:0] to become unspecified. Calling PR_SVE_SET_VL with vl equal to the thread's current vector length, or calling PR_SVE_SET_VL with the PR_SVE_SET_VL_ONEXEC flag, does not constitute a change to the vector length for this purpose. @@ -500,7 +500,7 @@ References [2] arch/arm64/include/uapi/asm/ptrace.h AArch64 Linux ptrace ABI definitions -[3] linux/Documentation/arm64/cpu-feature-registers.txt +[3] Documentation/arm64/cpu-feature-registers.txt [4] ARM IHI0055C http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055c/IHI0055C_beta_aapcs64.pdf