From patchwork Fri Aug 24 16:58:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 145089 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp1475054ljw; Fri, 24 Aug 2018 10:00:47 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYYV+mkm2FhRoPOJxg9o+ECbz9onaBIcq0o8mr+HdvnXT4mY6XIOgs0Nw3NLgGUVdEN4HC8 X-Received: by 2002:a24:4254:: with SMTP id i81-v6mr1986573itb.95.1535130047636; Fri, 24 Aug 2018 10:00:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1535130047; cv=none; d=google.com; s=arc-20160816; b=pd4CzIGyE5idDsj4h++GsZr2zZUv9X4H8XTMMTC81lSt+8eSBY+PFmKUX4MLWjguLD gLQ0i9jBkKRE36vPPKVC2cJozVuPpSkvweu5ViDPNVBONLs7g1sRscPuUKaX9wRgT4S8 nxDIAxl7VhnreJo8/vBebZFPdskumtAbqsrjA9pSolT2H+Zg/dZ8Wxnmzzcem31WhVKu UTeUqKcOADvqEbeN8ZLcVMX5trwgA8N5YZmqRFwcwNWd74Z5ZfU5rRc1gctBrsfXH9Um A13ehQmjKDtsmg86S8yCaKlqhy8a60oSR4s7uBWax9hfkzW40CD5AdkHSMdq9NRmuclJ Ejzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from :arc-authentication-results; bh=+4LZkqglJt9Unq00x6syBYUKMR9HKYJlXJ1nWPyewnI=; b=DFYJKxofDDC7fcbmmgm/vjl2UqNCWOOts12zuAhFSyUI3ZYQzPEdFXoEIsNaNtHYQg YhUDiN8+bGWGg3Rs97vJ/8iPOde5fxENTxuK7aR29XQ+HEnrhH+OfnG0lDGKOhuKKpNG gg3hiN5TuFKyXBmOgcONgEf4nihpam8uEs+ixjq8zbUqihSL55TgnPoimBmlFyoubbfA NQfEqBFB6ni/I61huFrFjjQlGKyCXwyr7WN9MuAVPsSUGAA9L4eYeMddUS4KhAYhkJ8F xvKMV4z2s7ozVn64/y1c2WM90eXcVuovUr9vqFztk7LeYdr6qfGAl/IXKT9dLkO02Miu RfrQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id l20-v6si5465742iom.167.2018.08.24.10.00.47 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 24 Aug 2018 10:00:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ftFPr-00004u-Ij; Fri, 24 Aug 2018 16:58:31 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ftFPq-0008WP-G2 for xen-devel@lists.xen.org; Fri, 24 Aug 2018 16:58:30 +0000 X-Inumbo-ID: 048ca3d2-a7bf-11e8-a6a9-d7ebe60f679a Received: from foss.arm.com (unknown [217.140.101.70]) by us1-amaz-eas1.inumbo.com (Halon) with ESMTP id 048ca3d2-a7bf-11e8-a6a9-d7ebe60f679a; Fri, 24 Aug 2018 16:59:09 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9999815A2; Fri, 24 Aug 2018 09:58:28 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.Emea.Arm.com [10.4.12.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8B3263F5A0; Fri, 24 Aug 2018 09:58:27 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Fri, 24 Aug 2018 17:58:15 +0100 Message-Id: <20180824165820.32620-2-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180824165820.32620-1-julien.grall@arm.com> References: <20180824165820.32620-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 1/6] xen/arm: smccc-1.1: Make return values unsigned long X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Julien Grall , sstabellini@kernel.org, volodymyr_babchuk@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Marc Zyngier An unfortunate consequence of having a strong typing for the input values to the SMC call is that it also affects the type of the return values, limiting r0 to 32 bits and r{1,2,3} to whatever was passed as an input. Let's turn everything into "unsigned long", which satisfies the requirements of both architectures, and allows for the full range of return values. Reported-by: Stefano Stabellini Signed-off-by: Marc Zyngier Signed-off-by: Julien Grall Reviewed-by: Volodymyr Babchuk --- xen/include/asm-arm/smccc.h | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/xen/include/asm-arm/smccc.h b/xen/include/asm-arm/smccc.h index 74c13f8419..a31d67a1de 100644 --- a/xen/include/asm-arm/smccc.h +++ b/xen/include/asm-arm/smccc.h @@ -119,35 +119,35 @@ struct arm_smccc_res { #define __declare_arg_0(a0, res) \ struct arm_smccc_res *___res = res; \ - register uin32_t r0 asm("r0") = a0; \ + register unsigned long r0 asm("r0") = (uint32_t)a0;\ register unsigned long r1 asm("r1"); \ register unsigned long r2 asm("r2"); \ register unsigned long r3 asm("r3") #define __declare_arg_1(a0, a1, res) \ struct arm_smccc_res *___res = res; \ - register uint32_t r0 asm("r0") = a0; \ - register typeof(a1) r1 asm("r1") = a1; \ + register unsigned long r0 asm("r0") = (uint32_t)a0;\ + register unsigned long r1 asm("r1") = a1; \ register unsigned long r2 asm("r2"); \ register unsigned long r3 asm("r3") #define __declare_arg_2(a0, a1, a2, res) \ struct arm_smccc_res *___res = res; \ - register u32 r0 asm("r0") = a0; \ - register typeof(a1) r1 asm("r1") = a1; \ - register typeof(a2) r2 asm("r2") = a2; \ + register unsigned long r0 asm("r0") = (uint32_t)a0;\ + register unsigned long r1 asm("r1") = a1; \ + register unsigned long r2 asm("r2") = a2; \ register unsigned long r3 asm("r3") #define __declare_arg_3(a0, a1, a2, a3, res) \ struct arm_smccc_res *___res = res; \ - register u32 r0 asm("r0") = a0; \ - register typeof(a1) r1 asm("r1") = a1; \ - register typeof(a2) r2 asm("r2") = a2; \ - register typeof(a3) r3 asm("r3") = a3 + register unsigned long r0 asm("r0") = (uint32_t)a0;\ + register unsigned long r1 asm("r1") = a1; \ + register unsigned long r2 asm("r2") = a2; \ + register unsigned long r3 asm("r3") = a3 #define __declare_arg_4(a0, a1, a2, a3, a4, res) \ __declare_arg_3(a0, a1, a2, a3, res); \ - register typeof(a4) r4 asm("r4") = a4 + register unsigned long r4 asm("r4") = a4 #define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \ __declare_arg_4(a0, a1, a2, a3, a4, res); \ From patchwork Fri Aug 24 16:58:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 145093 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp1475105ljw; Fri, 24 Aug 2018 10:00:50 -0700 (PDT) X-Google-Smtp-Source: ANB0Vdbc0LVB27UYAtdTpIwsU1rm5j1XFFHKId6ZXAV+J3X7FwNOSB194cjeUqIVZgQZygr/rKz5 X-Received: by 2002:a24:8782:: with SMTP id f124-v6mr1975751ite.87.1535130050048; Fri, 24 Aug 2018 10:00:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1535130050; cv=none; d=google.com; s=arc-20160816; b=tw7XrSAIaeNDJq30cUhfK/yNztg3rrmGM+N5mcnt01Zy5Xa4+LqSe8RfKB9o4ECLfT 8dCQN2+vY7IkdWZ+lxZTxkRvkyoC+NcMvi6xPYA5f+TzFKv1HI9+MGV9Nc+CdPYdGdbP f4D6OmBUgpbGq4tghIClG1CFDoy4IEqnDtjQ2ynrGvjXgzCLjXqY5UGWvhP8MLghWuTC yVc8+pmcqE4Z1zjGHyW4dZxSCB4krCH7sRIjMQYUJXWYOghCbScWjGyxyoyOEFh+zbmC 6UZmsCfwmYZ+dTB3kf6Zw+Xy55kdQagSvug5mhFVNpfhXy8jNZTT3s6rTL+PzU7+wRC+ o1qQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from :arc-authentication-results; bh=FpReXh2T4Yb2iiw/Hp9X9IYrZeVWYZmDhflp1fUHyic=; b=kThDJeQyvflQc07Mzk4yrLa/N41NbOhPNlLtYA+ic7WLQrVQ6eteido9fVsWB73hUJ IEq4noIJDxqoMXlHRk2Tz75yjmlDqVFOFRZYGSsSIuuJzi05Dcv50/mjefPwBKVHrnOs xU+PTelTgs1uVnyzfwmq5+MzMCgMahkbStzRkwsn+epXxBsx1B93gomOvuEnme4eliBP de6SkefC32bOl+I2FYa/8cmG3a6k5XPYRxghu7ifVS1GkqQQvBGorwmDR36zcaJ+Ohwr dTFSbmEskN6R4JTQtQ2vepXeB4kHdlNrlxX2By7QzYkJRM/7yEeeyT5uJSYWs9ab/gCW wfrA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id 63-v6si1301025ito.9.2018.08.24.10.00.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 24 Aug 2018 10:00:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ftFPs-00005T-Br; Fri, 24 Aug 2018 16:58:32 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ftFPr-00004t-Mk for xen-devel@lists.xen.org; Fri, 24 Aug 2018 16:58:31 +0000 X-Inumbo-ID: bd05feb5-a7be-11e8-a8a5-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id bd05feb5-a7be-11e8-a8a5-bc764e045a96; Fri, 24 Aug 2018 18:57:09 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CB61B80D; Fri, 24 Aug 2018 09:58:29 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.Emea.Arm.com [10.4.12.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D79E23F5A0; Fri, 24 Aug 2018 09:58:28 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Fri, 24 Aug 2018 17:58:16 +0100 Message-Id: <20180824165820.32620-3-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180824165820.32620-1-julien.grall@arm.com> References: <20180824165820.32620-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 2/6] xen/arm: smccc-1.1: Handle function result as parameters X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , sstabellini@kernel.org, volodymyr_babchuk@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Marc Zyngier If someone has the silly idea to write something along those lines: extern u64 foo(void); void bar(struct arm_smccc_res *res) { arm_smccc_1_1_smc(0xbad, foo(), res); } they are in for a surprise, as this gets compiled as: 0000000000000588 : 588: a9be7bfd stp x29, x30, [sp, #-32]! 58c: 910003fd mov x29, sp 590: f9000bf3 str x19, [sp, #16] 594: aa0003f3 mov x19, x0 598: aa1e03e0 mov x0, x30 59c: 94000000 bl 0 <_mcount> 5a0: 94000000 bl 0 5a4: aa0003e1 mov x1, x0 5a8: d4000003 smc #0x0 5ac: b4000073 cbz x19, 5b8 5b0: a9000660 stp x0, x1, [x19] 5b4: a9010e62 stp x2, x3, [x19, #16] 5b8: f9400bf3 ldr x19, [sp, #16] 5bc: a8c27bfd ldp x29, x30, [sp], #32 5c0: d65f03c0 ret 5c4: d503201f nop The call to foo "overwrites" the x0 register for the return value, and we end up calling the wrong secure service. A solution is to evaluate all the parameters before assigning anything to specific registers, leading to the expected result: 0000000000000588 : 588: a9be7bfd stp x29, x30, [sp, #-32]! 58c: 910003fd mov x29, sp 590: f9000bf3 str x19, [sp, #16] 594: aa0003f3 mov x19, x0 598: aa1e03e0 mov x0, x30 59c: 94000000 bl 0 <_mcount> 5a0: 94000000 bl 0 5a4: aa0003e1 mov x1, x0 5a8: d28175a0 mov x0, #0xbad 5ac: d4000003 smc #0x0 5b0: b4000073 cbz x19, 5bc 5b4: a9000660 stp x0, x1, [x19] 5b8: a9010e62 stp x2, x3, [x19, #16] 5bc: f9400bf3 ldr x19, [sp, #16] 5c0: a8c27bfd ldp x29, x30, [sp], #32 5c4: d65f03c0 ret Reported-by: Stefano Stabellini Signed-off-by: Marc Zyngier Reviewed-by: Volodymyr Babchuk --- xen/include/asm-arm/smccc.h | 30 ++++++++++++++++++++---------- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/xen/include/asm-arm/smccc.h b/xen/include/asm-arm/smccc.h index a31d67a1de..648bef28bd 100644 --- a/xen/include/asm-arm/smccc.h +++ b/xen/include/asm-arm/smccc.h @@ -125,41 +125,51 @@ struct arm_smccc_res { register unsigned long r3 asm("r3") #define __declare_arg_1(a0, a1, res) \ + typeof(a1) __a1 = a1; \ struct arm_smccc_res *___res = res; \ register unsigned long r0 asm("r0") = (uint32_t)a0;\ - register unsigned long r1 asm("r1") = a1; \ + register unsigned long r1 asm("r1") = __a1; \ register unsigned long r2 asm("r2"); \ register unsigned long r3 asm("r3") #define __declare_arg_2(a0, a1, a2, res) \ + typeof(a1) __a1 = a1; \ + typeof(a2) __a2 = a2; \ struct arm_smccc_res *___res = res; \ register unsigned long r0 asm("r0") = (uint32_t)a0;\ - register unsigned long r1 asm("r1") = a1; \ - register unsigned long r2 asm("r2") = a2; \ + register unsigned long r1 asm("r1") = __a1; \ + register unsigned long r2 asm("r2") = __a2; \ register unsigned long r3 asm("r3") #define __declare_arg_3(a0, a1, a2, a3, res) \ + typeof(a1) __a1 = a1; \ + typeof(a2) __a2 = a2; \ + typeof(a3) __a3 = a3; \ struct arm_smccc_res *___res = res; \ register unsigned long r0 asm("r0") = (uint32_t)a0;\ - register unsigned long r1 asm("r1") = a1; \ - register unsigned long r2 asm("r2") = a2; \ - register unsigned long r3 asm("r3") = a3 + register unsigned long r1 asm("r1") = __a1; \ + register unsigned long r2 asm("r2") = __a2; \ + register unsigned long r3 asm("r3") = __a3 #define __declare_arg_4(a0, a1, a2, a3, a4, res) \ + typeof(a4) __a4 = a4; \ __declare_arg_3(a0, a1, a2, a3, res); \ - register unsigned long r4 asm("r4") = a4 + register unsigned long r4 asm("r4") = __a4 #define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \ + typeof(a5) __a5 = a5; \ __declare_arg_4(a0, a1, a2, a3, a4, res); \ - register typeof(a5) r5 asm("r5") = a5 + register typeof(a5) r5 asm("r5") = __a5 #define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \ + typeof(a6) __a6 = a6; \ __declare_arg_5(a0, a1, a2, a3, a4, a5, res); \ - register typeof(a6) r6 asm("r6") = a6 + register typeof(a6) r6 asm("r6") = __a6 #define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \ + typeof(a7) __a7 = a7; \ __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \ - register typeof(a7) r7 asm("r7") = a7 + register typeof(a7) r7 asm("r7") = __a7 #define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__) #define __declare_args(count, ...) ___declare_args(count, __VA_ARGS__) From patchwork Fri Aug 24 16:58:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 145094 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp1475125ljw; Fri, 24 Aug 2018 10:00:51 -0700 (PDT) X-Google-Smtp-Source: ANB0VdbZU9POXifAFUEEesRRr4Y9AJ17t6DLyjnv6sH3LhibToxfFgubPVulujkaIunYT/kIfOa1 X-Received: by 2002:a24:4c17:: with SMTP id a23-v6mr2105020itb.144.1535130051337; Fri, 24 Aug 2018 10:00:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1535130051; cv=none; d=google.com; s=arc-20160816; b=c/YqsXCg5sBcxMcZeqX7DR0uFALDSeOI2wv/9lZfZzovF3RNnOndQRS4mMugDDWH9l mXl2q+X25qwEI1ZrZkHZw9DKuiClUONDxT13UJWWa4TDUCafF39Tq1rmY7TX+10TR2Xh agra5v0OHrWAdcLl14KkcDL5VqyChpH6LKvkK3pIVttdemEeCPYQy4NRtqV6sms7r65H 4pLjUYP4YWmB8Hfw3PbByfqYOQ4s5fHLGfoCjRAiTU4P86GR+ffPW2gRj3EnFTPHrUY1 GkK+r1y8Sqx/KaKqaaj97wRWcSbTLT2/LaN7q9YqyWxSh9ZqSWbslK5l8cbI/riTbon1 O+dA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from :arc-authentication-results; bh=r0GYCGqkoaozhoHotGGQQM2nHmvyvBTqa870E589dHw=; b=aXDrrEcuvbb7bE81+dVnsyZ484BIZaZTxRZ/k0ojxGNjbTk3vFaU7tuFVTxn7na467 KYSq/l/t62tzFhcOTI0tuVnAsjmDYNN2Rh7p8azpVe+v9AGWqggEuvRJ7gRLqgFxc4uj MVCsKw/SsxgWMI3ChfD2IBmIG5ZTcWZjghW8mugI0BRm70iRd41IrkY6I8EbTjnn+k4I VyfTZaXuC+hhSze84TV0Q9gwaPbRzfb01m/dDj9gSADR88sgeJ0cLYaq9Po296cTZkg+ 7ox0GuTjkawc6/iVX0oOFVUeFkqh78S7nWC6H94tmES6pB7yttoum3sd1y+HU+SEi1ez EEdg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id k2-v6si1276046ita.130.2018.08.24.10.00.50 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 24 Aug 2018 10:00:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ftFPs-00005e-M5; Fri, 24 Aug 2018 16:58:32 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ftFPr-00004z-Rw for xen-devel@lists.xen.org; Fri, 24 Aug 2018 16:58:31 +0000 X-Inumbo-ID: 0604b77a-a7bf-11e8-a6a9-d7ebe60f679a Received: from foss.arm.com (unknown [217.140.101.70]) by us1-amaz-eas1.inumbo.com (Halon) with ESMTP id 0604b77a-a7bf-11e8-a6a9-d7ebe60f679a; Fri, 24 Aug 2018 16:59:11 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1AD6515A2; Fri, 24 Aug 2018 09:58:31 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.Emea.Arm.com [10.4.12.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0CAED3F5A0; Fri, 24 Aug 2018 09:58:29 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Fri, 24 Aug 2018 17:58:17 +0100 Message-Id: <20180824165820.32620-4-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180824165820.32620-1-julien.grall@arm.com> References: <20180824165820.32620-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 3/6] xen/arm: add SMC wrapper that is compatible with SMCCC v1.0 X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: "Edgar E. Iglesias" , Julien Grall , sstabellini@kernel.org, volodymyr_babchuk@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Volodymyr Babchuk Existing SMC wrapper call_smc() allows only 4 parameters and returns only one value. This is enough for existing use in PSCI code, but TEE mediator will need a call that is fully compatible with ARM SMCCC v1.0. This patch adds a wrapper for both arm32 and arm64. In the case of arm32, the wrapper is just an alias to the ARM SMCCC v1.1 as the convention is the same. CC: "Edgar E. Iglesias" Signed-off-by: Volodymyr Babchuk [julien: Rework the wrapper to make it closer to SMCC 1.1 wrapper] Signed-off-by: Julien Grall --- xen/arch/arm/arm64/Makefile | 1 + xen/arch/arm/arm64/asm-offsets.c | 5 ++++ xen/arch/arm/arm64/smc.S | 32 +++++++++++++++++++++++++ xen/include/asm-arm/smccc.h | 51 +++++++++++++++++++++++++++++++++++++++- 4 files changed, 88 insertions(+), 1 deletion(-) create mode 100644 xen/arch/arm/arm64/smc.S diff --git a/xen/arch/arm/arm64/Makefile b/xen/arch/arm/arm64/Makefile index bb5c610b2a..c4f3a28a0d 100644 --- a/xen/arch/arm/arm64/Makefile +++ b/xen/arch/arm/arm64/Makefile @@ -8,6 +8,7 @@ obj-y += domain.o obj-y += entry.o obj-y += insn.o obj-$(CONFIG_LIVEPATCH) += livepatch.o +obj-y += smc.o obj-y += smpboot.o obj-y += traps.o obj-y += vfp.o diff --git a/xen/arch/arm/arm64/asm-offsets.c b/xen/arch/arm/arm64/asm-offsets.c index 62833d8c8b..280ddb55bf 100644 --- a/xen/arch/arm/arm64/asm-offsets.c +++ b/xen/arch/arm/arm64/asm-offsets.c @@ -10,6 +10,7 @@ #include #include #include +#include #define DEFINE(_sym, _val) \ asm volatile ("\n.ascii\"==>#define " #_sym " %0 /* " #_val " */<==\"" \ @@ -51,6 +52,10 @@ void __dummy__(void) BLANK(); OFFSET(INITINFO_stack, struct init_info, stack); + + BLANK(); + OFFSET(SMCCC_RES_a0, struct arm_smccc_res, a0); + OFFSET(SMCCC_RES_a2, struct arm_smccc_res, a2); } /* diff --git a/xen/arch/arm/arm64/smc.S b/xen/arch/arm/arm64/smc.S new file mode 100644 index 0000000000..b0752be57e --- /dev/null +++ b/xen/arch/arm/arm64/smc.S @@ -0,0 +1,32 @@ +/* + * xen/arch/arm/arm64/smc.S + * + * Wrapper for Secure Monitors Calls + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include + +/* + * void __arm_smccc_1_0_smc(register_t a0, register_t a1, register_t a2, + * register_t a3, register_t a4, register_t a5, + * register_t a6, register_t a7, + * struct arm_smccc_res *res) + */ +ENTRY(__arm_smccc_1_0_smc) + smc #0 + ldr x4, [sp] + cbz x4, 1f /* No need to store the result */ + stp x0, x1, [x4, #SMCCC_RES_a0] + stp x2, x3, [x4, #SMCCC_RES_a2] +1: + ret diff --git a/xen/include/asm-arm/smccc.h b/xen/include/asm-arm/smccc.h index 648bef28bd..1ed6cbaa48 100644 --- a/xen/include/asm-arm/smccc.h +++ b/xen/include/asm-arm/smccc.h @@ -207,7 +207,56 @@ struct arm_smccc_res { *___res = (typeof(*___res)){r0, r1, r2, r3}; \ } while ( 0 ) -#endif +/* + * The calling convention for arm32 is the same for both SMCCC v1.0 and + * v1.1. + */ +#ifdef CONFIG_ARM_32 +#define arm_smccc_1_0_smc(...) arm_smccc_1_1_smc(__VA_ARGS__) +#else + +void __arm_smccc_1_0_smc(register_t a0, register_t a1, register_t a2, + register_t a3, register_t a4, register_t a5, + register_t a6, register_t a7, + struct arm_smccc_res *res); + +/* Macros to handle variadic parameter for SMCCC v1.0 helper */ +#define __arm_smccc_1_0_smc_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \ + __arm_smccc_1_0_smc(a0, a1, a2, a3, a4, a5, a6, a7, res) + +#define __arm_smccc_1_0_smc_6(a0, a1, a2, a3, a4, a5, a6, res) \ + __arm_smccc_1_0_smc_7(a0, a1, a2, a3, a4, a5, a6, 0, res) + +#define __arm_smccc_1_0_smc_5(a0, a1, a2, a3, a4, a5, res) \ + __arm_smccc_1_0_smc_6(a0, a1, a2, a3, a4, a5, 0, res) + +#define __arm_smccc_1_0_smc_4(a0, a1, a2, a3, a4, res) \ + __arm_smccc_1_0_smc_5(a0, a1, a2, a3, a4, 0, res) + +#define __arm_smccc_1_0_smc_3(a0, a1, a2, a3, res) \ + __arm_smccc_1_0_smc_4(a0, a1, a2, a3, 0, res) + +#define __arm_smccc_1_0_smc_2(a0, a1, a2, res) \ + __arm_smccc_1_0_smc_3(a0, a1, a2, 0, res) + +#define __arm_smccc_1_0_smc_1(a0, a1, res) \ + __arm_smccc_1_0_smc_2(a0, a1, 0, res) + +#define __arm_smccc_1_0_smc_0(a0, res) \ + __arm_smccc_1_0_smc_1(a0, 0, res) + +#define ___arm_smccc_1_0_smc_count(count, ...) \ + __arm_smccc_1_0_smc_ ## count(__VA_ARGS__) + +#define __arm_smccc_1_0_smc_count(count, ...) \ + ___arm_smccc_1_0_smc_count(count, __VA_ARGS__) + +#define arm_smccc_1_0_smc(...) \ + __arm_smccc_1_0_smc_count(__count_args(__VA_ARGS__), __VA_ARGS__) + +#endif /* CONFIG_ARM_64 */ + +#endif /* __ASSEMBLY__ */ /* * Construct function identifier from call type (fast or standard), From patchwork Fri Aug 24 16:58:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 145091 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp1475098ljw; Fri, 24 Aug 2018 10:00:49 -0700 (PDT) X-Google-Smtp-Source: ANB0VdZaE0guWECKkgcL0GuNeuds4vluKN7DTT88N8/eLyfYWVTnMECAcTDr58Lddm0M5ds8Sf6Z X-Received: by 2002:a6b:9c50:: with SMTP id f77-v6mr1896446ioe.220.1535130049836; Fri, 24 Aug 2018 10:00:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1535130049; cv=none; d=google.com; s=arc-20160816; b=jR2pDRge5LANfGdWKgUNsQ6m7CAF+akueXpCXetaRF6wYwYgt1TOiCmCCAd1buO+AV IoZaPMZlRAAaBQUb2D7zpteGwd/als8T0ss4v1toVBuC39yFxdVyqVxp0cuSmrhcNRSR nUbq7LAkx8NU4mFb109MY2WWeOLt1YbwV5q6LEYpFuzQlwWKD5XTwBOl4oyvaoEavb+Z JABbEdtbH91XkAhTaSLjqzMkDsbkjaNx4k42kMUVdOQ6tLMeLC/HksJegvZrLukFkJ7y Q5gDIBnZYm6NDQDoV7G9dVEaDmkSxVm1jhzD8J82OrYUeY6TTRo92wUcH0aaVL3ZR60w rApw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from :arc-authentication-results; bh=aaRCX2d7mtK2fcZgDx7lNAO+h8KKDnbRutS+/fPckdo=; b=C9otKMcZD7ejqr4uLvunwpAFAYALNaTMrbis5a1BLc4HX/fN48U6iqR3DzckKhXjah eJxY6jwQrGumgpE0KxTZUSWxWCXQTKCCIG00CBUxJ9pO5AiiwsRBQ2Ha+1dFKJbebCbG Rf7Klx+Ub9p4R3+cyzFDqZQ6gSuOOr5lEnk+7j854JHW4Q8j0K3yjOf64kEZznT1SuCH 0Kdt1obTe9erLB7Y0guj28WThcJE9GNwCwlJkLXVgEGrfTljmVDO1TGBWiUV5W5XvwJZ Tu+RVxncnU5tHJkrBRJKbx4CIWZiPEb3YGIv+sOHMyLlj3FMwA+tfqaphsJRwdy32Igr Gkaw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id f9-v6si5037199ioa.191.2018.08.24.10.00.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 24 Aug 2018 10:00:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ftFPu-00005y-0J; Fri, 24 Aug 2018 16:58:34 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ftFPs-00005j-Sb for xen-devel@lists.xen.org; Fri, 24 Aug 2018 16:58:32 +0000 X-Inumbo-ID: be794460-a7be-11e8-a8a5-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id be794460-a7be-11e8-a8a5-bc764e045a96; Fri, 24 Aug 2018 18:57:11 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 43A4380D; Fri, 24 Aug 2018 09:58:32 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.Emea.Arm.com [10.4.12.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 58FD43F5A0; Fri, 24 Aug 2018 09:58:31 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Fri, 24 Aug 2018 17:58:18 +0100 Message-Id: <20180824165820.32620-5-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180824165820.32620-1-julien.grall@arm.com> References: <20180824165820.32620-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 4/6] xen/arm: cpufeature: Add helper to check constant caps X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Julien Grall , sstabellini@kernel.org, volodymyr_babchuk@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Some capababilities are set right during boot and will never change afterwards. At the moment, the function cpu_have_caps will check whether the cap is enabled from the memory. It is possible to avoid the load from the memory by using an ALTERNATIVE. With that the check is just reduced to 1 instruction. Signed-off-by: Julien Grall --- This is the static key for the poor. At some point we might want to introduce something similar to static key in Xen. --- xen/include/asm-arm/cpufeature.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/xen/include/asm-arm/cpufeature.h b/xen/include/asm-arm/cpufeature.h index 3de6b54301..9c297c521c 100644 --- a/xen/include/asm-arm/cpufeature.h +++ b/xen/include/asm-arm/cpufeature.h @@ -63,6 +63,18 @@ static inline bool cpus_have_cap(unsigned int num) return test_bit(num, cpu_hwcaps); } +/* System capability check for constant cap */ +#define cpus_have_const_cap(num) ({ \ + bool __ret; \ + \ + asm volatile (ALTERNATIVE("mov %0, #0", \ + "mov %0, #1", \ + num) \ + : "=r" (__ret)); \ + \ + __ret; \ + }) + static inline void cpus_set_cap(unsigned int num) { if (num >= ARM_NCAPS) From patchwork Fri Aug 24 16:58:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 145090 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp1475079ljw; Fri, 24 Aug 2018 10:00:49 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYiwxbz4zdUvKXKV/k9h2oetMSGOVHnlX+p+uv6KawJHPJLHHA+SMCRohInmljVAXunmwXO X-Received: by 2002:a6b:4515:: with SMTP id s21-v6mr1826382ioa.273.1535130048964; Fri, 24 Aug 2018 10:00:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1535130048; cv=none; d=google.com; s=arc-20160816; b=PwcR/3X88yyN8aSdkwjoKCjdG5wrvzS0hMT6WJ8u9kIZ0ZQ6oBH8AhGIJVnF64KtKe HMubZiutuACS5iShU5rOuJm8aqU6UmMrJZW9fOUzVH5oZL1qMb0li04I9Spycl72petR NueGG2poYUDtyY08TDip8IjmdVQERuLBNv/tnG2cE+UdUel2XIk+Es+Bfnjqmi+YMwaO e9HI3h2U09Ok7EEQnQLzcnhA7RfrHUQf0QYlQygl2PIulwXjRKUk6M0YzR9j0wKokO7e cG9ymXVwldUUNeRiZcI+gnFGIpo0EfE55imIGOEm6tmJrZUd2jh3a0V6SGBwi8gnMrnL REDg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from :arc-authentication-results; bh=lZ/0N8gZFvrpGYPDTPhPJJvBj9O/J88IwZuLw141Tp0=; b=u1+GgeQMkO7DRBVBO4pjwMvrIWu8eA2FYWo3oF4cT3gSiutse44ivptcZFGT0jsTRG u4cLtyyFyzw7wuBCyZlwj86H2m3Rqh2JVdkRFvTXt2Ara7hC0dWnK4CVSG8FigdmrgPk bTynDoSZaU2MPLjIVmtTkXa9b0d+71JE5pUrRZnc9c1JWNNlQW2+CN9345B+MZWink+Z 5A6r1h07xAmi10B6H4HAz5wvkA5vtb2aoq6wmGm/8wocA2Tm+OuCBu0m+5vMuanq4TkN hbNWOn7d3SN5Oni1F9SyV9nWFGClpgkvkOST0MqRM3NAZBS4eaPGy1GdSaLPKZf31pHL fuWA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id e3-v6si5030700ioa.85.2018.08.24.10.00.48 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 24 Aug 2018 10:00:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ftFPv-00006S-A6; Fri, 24 Aug 2018 16:58:35 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ftFPu-00005x-1f for xen-devel@lists.xen.org; Fri, 24 Aug 2018 16:58:34 +0000 X-Inumbo-ID: 0768872b-a7bf-11e8-a6a9-d7ebe60f679a Received: from foss.arm.com (unknown [217.140.101.70]) by us1-amaz-eas1.inumbo.com (Halon) with ESMTP id 0768872b-a7bf-11e8-a6a9-d7ebe60f679a; Fri, 24 Aug 2018 16:59:14 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6BD1B1650; Fri, 24 Aug 2018 09:58:33 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.Emea.Arm.com [10.4.12.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8148E3F5A0; Fri, 24 Aug 2018 09:58:32 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Fri, 24 Aug 2018 17:58:19 +0100 Message-Id: <20180824165820.32620-6-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180824165820.32620-1-julien.grall@arm.com> References: <20180824165820.32620-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 5/6] xen/arm: smccc: Add wrapper to automatically select the calling convention X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Julien Grall , sstabellini@kernel.org, volodymyr_babchuk@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Signed-off-by: Julien Grall Reviewed-by: Volodymyr Babchuk --- xen/arch/arm/psci.c | 4 ++++ xen/include/asm-arm/cpufeature.h | 3 ++- xen/include/asm-arm/smccc.h | 8 ++++++++ 3 files changed, 14 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c index 3cf5ecf0f3..941eec921b 100644 --- a/xen/arch/arm/psci.c +++ b/xen/arch/arm/psci.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -118,6 +119,9 @@ static void __init psci_init_smccc(void) smccc_ver = ret; } + if ( smccc_ver >= SMCCC_VERSION(1, 1) ) + cpus_set_cap(ARM_SMCCC_1_1); + printk(XENLOG_INFO "Using SMC Calling Convention v%u.%u\n", SMCCC_VERSION_MAJOR(smccc_ver), SMCCC_VERSION_MINOR(smccc_ver)); } diff --git a/xen/include/asm-arm/cpufeature.h b/xen/include/asm-arm/cpufeature.h index 9c297c521c..c9c4046f5f 100644 --- a/xen/include/asm-arm/cpufeature.h +++ b/xen/include/asm-arm/cpufeature.h @@ -44,8 +44,9 @@ #define SKIP_CTXT_SWITCH_SERROR_SYNC 6 #define ARM_HARDEN_BRANCH_PREDICTOR 7 #define ARM_SSBD 8 +#define ARM_SMCCC_1_1 9 -#define ARM_NCAPS 9 +#define ARM_NCAPS 10 #ifndef __ASSEMBLY__ diff --git a/xen/include/asm-arm/smccc.h b/xen/include/asm-arm/smccc.h index 1ed6cbaa48..7c39c530e2 100644 --- a/xen/include/asm-arm/smccc.h +++ b/xen/include/asm-arm/smccc.h @@ -213,6 +213,7 @@ struct arm_smccc_res { */ #ifdef CONFIG_ARM_32 #define arm_smccc_1_0_smc(...) arm_smccc_1_1_smc(__VA_ARGS__) +#define arm_smccc_smc(...) arm_smccc_1_1_smc(__VA_ARGS__) #else void __arm_smccc_1_0_smc(register_t a0, register_t a1, register_t a2, @@ -254,6 +255,13 @@ void __arm_smccc_1_0_smc(register_t a0, register_t a1, register_t a2, #define arm_smccc_1_0_smc(...) \ __arm_smccc_1_0_smc_count(__count_args(__VA_ARGS__), __VA_ARGS__) +#define arm_smccc_smc(...) \ + do { \ + if ( !cpus_have_const_cap(ARM_SMCCC_1_1) ) \ + arm_smccc_1_0_smc(__VA_ARGS__); \ + else \ + arm_smccc_1_1_smc(__VA_ARGS__); \ + } while ( 0 ) #endif /* CONFIG_ARM_64 */ #endif /* __ASSEMBLY__ */ From patchwork Fri Aug 24 16:58:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 145092 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp1475096ljw; Fri, 24 Aug 2018 10:00:49 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYFF4+apb8ovNyldETsFSePa7UcJyRo3gU9p8obDy5pKdYAyjHZGjW6Sdmn3yWp1wo53StI X-Received: by 2002:a6b:fb13:: with SMTP id h19-v6mr1817162iog.270.1535130049828; Fri, 24 Aug 2018 10:00:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1535130049; cv=none; d=google.com; s=arc-20160816; b=yhc9Gfk7jtSfa7b790U0LoKsZgqYjcoeYl9s2LAVPmYiStVu37g4qebWygEknUDdiz 7gzIcOx/GE+Hiho8LzuObdY9co2B/mC3iVJL5Ln9Pkv7Ohb/DhCAIMfATMSAMLdgrLNm zColIaD2kZAORewXUSLPhz7xq0e7X5z5+51bH/C5SQ5XQP7jUUGrx+LesXv0hif8iYfl N19JAk7TfwTXv8bK7xbTB/coTsuV+vSuV6wvxiU46Dzi9+STWhGcdsHFCQOaVOdyv7wQ l6RHnCwMevYiekNhjFdkSnjMhEdC0WZlnqNZkXbA2I3HKOQsWAYTgqAo0HP4X/GtQbV0 n69Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from :arc-authentication-results; bh=BvrR3AxyiaQgEhx3YKCyJJlMbOXqts8hfZsuOi3CtjI=; b=S6DdtNewUA2n7puEYKfdJ36wFHFp1Ci8DybM7yT6mZkdc3MlVfxf7MTlHLr78VOCf9 nj6hCaQK5vAeA5rwrXqeO46XjE5bzCWi1B6z+gEhrn1TnikVhhw755wZvIA40I8JcmTU BY9PSzh5T1YENzncT36CwTU98hhQhHkN6O03sauD2CYIqxeCN4FrAw6cuFjqhYOG8b1j G9MA9sSB7K7JIYYCCvgAgMm45xL62TCMRRanOeCP6S+BEfnoRW5jvXydPOmfXPjPNbcf EpAfETj+lphebwjxBNKyWv73cTLHoAS/3B7c9sKTYNaXhbvN8KjQgTJLNuZAI3YcDyRd AB9w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id k129-v6si5668636iok.181.2018.08.24.10.00.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 24 Aug 2018 10:00:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ftFPx-00008O-Kk; Fri, 24 Aug 2018 16:58:37 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ftFPw-00006l-7Z for xen-devel@lists.xen.org; Fri, 24 Aug 2018 16:58:36 +0000 X-Inumbo-ID: 081ad72c-a7bf-11e8-a6a9-d7ebe60f679a Received: from foss.arm.com (unknown [217.140.101.70]) by us1-amaz-eas1.inumbo.com (Halon) with ESMTP id 081ad72c-a7bf-11e8-a6a9-d7ebe60f679a; Fri, 24 Aug 2018 16:59:15 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 94DBF80D; Fri, 24 Aug 2018 09:58:34 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.Emea.Arm.com [10.4.12.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id AA0673F5A0; Fri, 24 Aug 2018 09:58:33 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Fri, 24 Aug 2018 17:58:20 +0100 Message-Id: <20180824165820.32620-7-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180824165820.32620-1-julien.grall@arm.com> References: <20180824165820.32620-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 6/6] xen/arm: Replace call_smc with arm_smccc_smc X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Julien Grall , sstabellini@kernel.org, volodymyr_babchuk@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" call_smc is a subset of arm_smccc_smc. Rather than having 2 methods to do SMCCC call, replace all call to the former by the later. Signed-off-by: Julien Grall --- xen/arch/arm/Makefile | 1 - xen/arch/arm/platforms/exynos5.c | 3 ++- xen/arch/arm/platforms/seattle.c | 4 ++-- xen/arch/arm/psci.c | 37 +++++++++++++++++++++++++------------ xen/arch/arm/smc.S | 21 --------------------- xen/include/asm-arm/processor.h | 3 --- 6 files changed, 29 insertions(+), 40 deletions(-) delete mode 100644 xen/arch/arm/smc.S diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile index b9b141dc84..37fa8268b3 100644 --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -39,7 +39,6 @@ obj-y += processor.o obj-y += psci.o obj-y += setup.o obj-y += shutdown.o -obj-y += smc.o obj-y += smp.o obj-y += smpboot.o obj-y += sysctl.o diff --git a/xen/arch/arm/platforms/exynos5.c b/xen/arch/arm/platforms/exynos5.c index c15ecf80f5..e2c0b7b878 100644 --- a/xen/arch/arm/platforms/exynos5.c +++ b/xen/arch/arm/platforms/exynos5.c @@ -26,6 +26,7 @@ #include #include #include +#include static bool secure_firmware; @@ -249,7 +250,7 @@ static int exynos5_cpu_up(int cpu) iounmap(power); if ( secure_firmware ) - call_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0); + arm_smccc_smc(SMC_CMD_CPU1BOOT, cpu, NULL); return cpu_up_send_sgi(cpu); } diff --git a/xen/arch/arm/platforms/seattle.c b/xen/arch/arm/platforms/seattle.c index 893cc17972..64cc1868c2 100644 --- a/xen/arch/arm/platforms/seattle.c +++ b/xen/arch/arm/platforms/seattle.c @@ -33,12 +33,12 @@ static const char * const seattle_dt_compat[] __initconst = */ static void seattle_system_reset(void) { - call_smc(PSCI_0_2_FN32_SYSTEM_RESET, 0, 0, 0); + arm_smccc_smc(PSCI_0_2_FN32_SYSTEM_RESET, NULL); } static void seattle_system_off(void) { - call_smc(PSCI_0_2_FN32_SYSTEM_OFF, 0, 0, 0); + arm_smccc_smc(PSCI_0_2_FN32_SYSTEM_OFF, NULL); } PLATFORM_START(seattle, "SEATTLE") diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c index 941eec921b..02737e6caa 100644 --- a/xen/arch/arm/psci.c +++ b/xen/arch/arm/psci.c @@ -42,42 +42,53 @@ uint32_t smccc_ver; static uint32_t psci_cpu_on_nr; +#define PSCI_RET(res) ((int32_t)(res).a0) + int call_psci_cpu_on(int cpu) { - return call_smc(psci_cpu_on_nr, cpu_logical_map(cpu), __pa(init_secondary), 0); + struct arm_smccc_res res; + + arm_smccc_smc(psci_cpu_on_nr, cpu_logical_map(cpu), __pa(init_secondary), + &res); + + return (int32_t)res.a0; } void call_psci_cpu_off(void) { if ( psci_ver > PSCI_VERSION(0, 1) ) { - int errno; + struct arm_smccc_res res; /* If successfull the PSCI cpu_off call doesn't return */ - errno = call_smc(PSCI_0_2_FN32_CPU_OFF, 0, 0, 0); + arm_smccc_smc(PSCI_0_2_FN32_CPU_OFF, &res); panic("PSCI cpu off failed for CPU%d err=%d\n", smp_processor_id(), - errno); + PSCI_RET(res)); } } void call_psci_system_off(void) { if ( psci_ver > PSCI_VERSION(0, 1) ) - call_smc(PSCI_0_2_FN32_SYSTEM_OFF, 0, 0, 0); + arm_smccc_smc(PSCI_0_2_FN32_SYSTEM_OFF, NULL); } void call_psci_system_reset(void) { if ( psci_ver > PSCI_VERSION(0, 1) ) - call_smc(PSCI_0_2_FN32_SYSTEM_RESET, 0, 0, 0); + arm_smccc_smc(PSCI_0_2_FN32_SYSTEM_RESET, NULL); } static int __init psci_features(uint32_t psci_func_id) { + struct arm_smccc_res res; + if ( psci_ver < PSCI_VERSION(1, 0) ) return PSCI_NOT_SUPPORTED; - return call_smc(PSCI_1_0_FN32_PSCI_FEATURES, psci_func_id, 0, 0); + arm_smccc_smc(PSCI_1_0_FN32_PSCI_FEATURES, psci_func_id, NULL); + + return PSCI_RET(res); } static int __init psci_is_smc_method(const struct dt_device_node *psci) @@ -112,11 +123,11 @@ static void __init psci_init_smccc(void) if ( psci_features(ARM_SMCCC_VERSION_FID) != PSCI_NOT_SUPPORTED ) { - uint32_t ret; + struct arm_smccc_res res; - ret = call_smc(ARM_SMCCC_VERSION_FID, 0, 0, 0); - if ( ret != ARM_SMCCC_NOT_SUPPORTED ) - smccc_ver = ret; + arm_smccc_smc(ARM_SMCCC_VERSION_FID, &res); + if ( PSCI_RET(res) != ARM_SMCCC_NOT_SUPPORTED ) + smccc_ver = PSCI_RET(res); } if ( smccc_ver >= SMCCC_VERSION(1, 1) ) @@ -165,6 +176,7 @@ static int __init psci_init_0_2(void) { /* sentinel */ }, }; int ret; + struct arm_smccc_res res; if ( acpi_disabled ) { @@ -186,7 +198,8 @@ static int __init psci_init_0_2(void) } } - psci_ver = call_smc(PSCI_0_2_FN32_PSCI_VERSION, 0, 0, 0); + arm_smccc_smc(PSCI_0_2_FN32_PSCI_VERSION, &res); + psci_ver = PSCI_RET(res); /* For the moment, we only support PSCI 0.2 and PSCI 1.x */ if ( psci_ver != PSCI_VERSION(0, 2) && PSCI_VERSION_MAJOR(psci_ver) != 1 ) diff --git a/xen/arch/arm/smc.S b/xen/arch/arm/smc.S deleted file mode 100644 index b8f182272a..0000000000 --- a/xen/arch/arm/smc.S +++ /dev/null @@ -1,21 +0,0 @@ -/* - * xen/arch/arm/smc.S - * - * Wrapper for Secure Monitors Calls - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include - -ENTRY(call_smc) - smc #0 - ret diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h index 222a02dd99..8016cf306f 100644 --- a/xen/include/asm-arm/processor.h +++ b/xen/include/asm-arm/processor.h @@ -812,9 +812,6 @@ void vcpu_regs_hyp_to_user(const struct vcpu *vcpu, void vcpu_regs_user_to_hyp(struct vcpu *vcpu, const struct vcpu_guest_core_regs *regs); -int call_smc(register_t function_id, register_t arg0, register_t arg1, - register_t arg2); - void do_trap_hyp_serror(struct cpu_user_regs *regs); void do_trap_guest_serror(struct cpu_user_regs *regs);