From patchwork Tue Aug 10 13:24:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parav Pandit X-Patchwork-Id: 494788 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19274C4320A for ; Tue, 10 Aug 2021 13:24:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F074C61076 for ; Tue, 10 Aug 2021 13:24:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241338AbhHJNZO (ORCPT ); Tue, 10 Aug 2021 09:25:14 -0400 Received: from mail-bn7nam10on2045.outbound.protection.outlook.com ([40.107.92.45]:47584 "EHLO NAM10-BN7-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S241339AbhHJNZF (ORCPT ); Tue, 10 Aug 2021 09:25:05 -0400 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=LtlyHD4OEbAtieImnflqsbswcaQyEFtGOfkvBswMa8zolIfWXwBQfe3g/ehRUPERmRToyyV3k74b9jD1ehHivWyCnM3O++OwzvX8MnKBLCsvBZgEUg3Fwuoz/D88DYWZ+TM5lOvOkP4FYphbys2KvAVM+jcBAQjZsuwGYz1aSDz3Pkfi8zvETwofclSI8nbkbGwvtOOhWvBdVrfpFwqFSNftyguw+7wvPH8Z0yAtjm/X2F/zOujtpURuONJXJSoxBMjOzD7pY6kCCHLW6l2JELIC1ti7VlGDLTYg1wUeIK+7VVgrpwiW59dn82l4QNR/oXumMYYmI+FeHxrPeKfCYA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=/4TP67xCYbvJGydxqx01Hd7b5IUy0HkbZU1Dxdmel6g=; b=d0JTDdzXBj3iHFi08U9wDpWgoZ+GDheSCvtyVva4YI08IQp2xCO/GC+WVZkLJoOJnlOHwOUL2YrKXfob6SSpvtDSDe9Po9VEh/Gmi1vqlgNGIYCeRPmNKwiemHLLiruBChnYGPzZ1zeqHsjbLRQyAcKLL9I0VvnaJqUx07nWI44Ct4DHJzEw3f3aOyyMrYfxvDZR3aJ5/t/RpbhKNl2MoGutQ/+8lC0lOnthFPZSc90eTk16h1/jKonKY2WN5su06wOWSWQpbAWSv1Rn16VvXDfy0sjNv+duchU3M8udPilWSXEjsD7vzMJ8+2p2G7xlsTbqFW0TC1KIT0hHgLSQbw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.112.34) smtp.rcpttodomain=vger.kernel.org smtp.mailfrom=nvidia.com; dmarc=pass (p=quarantine sp=none pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=/4TP67xCYbvJGydxqx01Hd7b5IUy0HkbZU1Dxdmel6g=; b=evG7CajBgkbbQT4lnJ2mUP97NvAvVWNxulOOcd1fCDKwUfOgwfwSlyuTsZz8+nfx0fFQSN+7RjYTY/+yfjaHDazE4118F0grMHncoL6s7p+cTKyL96pa5gN/XOzvoRC45XGUOJ8iPo3SB7BlzcibACp4a1VHs8/BP4/9HxN7ZyCSIwP6ZfSgtqGk6SbO55AaSyXK2JphWBKtnODRy5RIq4eWyH1daER6S96qaMDcJjYgPNcPwN6AHA+MsgLuazCPwqp4t3Kw0qDlD+1YBxt/n7ojrExaTvkEOmR2t1JEOIIbgRC7Tyg62u78zxeUpVWguwoXRw7bdnb5NKtaahnDqQ== Received: from MW4PR03CA0025.namprd03.prod.outlook.com (2603:10b6:303:8f::30) by MW2PR12MB2393.namprd12.prod.outlook.com (2603:10b6:907:11::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4394.15; Tue, 10 Aug 2021 13:24:40 +0000 Received: from CO1NAM11FT017.eop-nam11.prod.protection.outlook.com (2603:10b6:303:8f:cafe::1c) by MW4PR03CA0025.outlook.office365.com (2603:10b6:303:8f::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4394.15 via Frontend Transport; Tue, 10 Aug 2021 13:24:40 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.112.34) smtp.mailfrom=nvidia.com; vger.kernel.org; dkim=none (message not signed) header.d=none; vger.kernel.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by CO1NAM11FT017.mail.protection.outlook.com (10.13.175.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4394.16 via Frontend Transport; Tue, 10 Aug 2021 13:24:40 +0000 Received: from sw-mtx-036.mtx.labs.mlnx (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 10 Aug 2021 13:24:38 +0000 From: Parav Pandit To: , , CC: , , Parav Pandit , Jiri Pirko , "Leon Romanovsky" Subject: [PATCH RESEND net-next 02/10] devlink: Add new "enable_rdma" generic device param Date: Tue, 10 Aug 2021 16:24:16 +0300 Message-ID: <20210810132424.9129-3-parav@nvidia.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210810132424.9129-1-parav@nvidia.com> References: <20210810132424.9129-1-parav@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 85ef2907-353d-4187-3181-08d95c02354d X-MS-TrafficTypeDiagnostic: MW2PR12MB2393: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6430; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: jbRxrR5i0hSC+V3iFdGfsVlqX655xrZuPmL4quEy84Q8WeCUfCYhzAwcODmVB+684mv8hn9T7NC2KPuiYUpqlBossFHsWip2zMsxSQr1vfBJGPe0Hpe9PkbqU5pXf/+tZCNItCyObk6/Yq+NHQYD6kho/UkpJG4bjR5wVuksuw7JhhDRotybyFQx3uy2zpRfMV9Rly3w60LTxNRqn9tWlSlwpNwQSfKlTlYapsF1wNWNguWVv5R0S1bmC1/n+alOdTwDT0hKJwCXsm3Xi7nJx+fSpnBptvx1H9J2RUf1EyG81mwVN8PWXssW71E/B1FKLQgBwllY+ecfUHrNCMrh/sQGkMaqeCl6e+HPvIpKaPwq8UVaABgw1A05sVIzJ0repScidgg2tFhtUNUTe4VH1v8E/f/FuBCB94DKmAz0pVtMbAXj1DgmAEchuBUppfTZ+/8I3X7SEkttxVKuuPnt0JLn2wREYVR+0YHX/LShF1aKBQfzysxeDOJTzIVF7SdRw3MEZsLnH8dMdYIl2LZAH9NAtKDIn559eyobtHrplZ2AX+lKkVCRkmJue+/ssUTTqJ4wps/KUqes4Sa8UfpfmLviESPDCdqS7Ziw+XrCIZqQoeUOy0CbOEzKwBBnibnvyndh4pIsuPFrcLayd3FpA50kMyv40fFwMXRrLMT0O8uK5uVlXbkOTncMenVA71Uswe9lbUR/zTNhqe+hzu8T1AEKogcqTrqngS/xUoPTRZU= X-Forefront-Antispam-Report: CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(136003)(376002)(346002)(396003)(39860400002)(46966006)(36840700001)(4326008)(478600001)(70586007)(70206006)(36756003)(107886003)(82310400003)(47076005)(26005)(82740400003)(2906002)(110136005)(7636003)(54906003)(1076003)(2616005)(316002)(86362001)(356005)(16526019)(83380400001)(36860700001)(186003)(8676002)(6666004)(336012)(5660300002)(426003)(36906005)(8936002)(41533002); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Aug 2021 13:24:40.2407 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 85ef2907-353d-4187-3181-08d95c02354d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT017.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW2PR12MB2393 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add new device generic parameter to enable/disable creation of RDMA auxiliary device and associated device functionality in the devlink instance. User who prefers to disable such functionality can disable it using below example. $ devlink dev param set pci/0000:06:00.0 \ name enable_rdma value false cmode driverinit $ devlink dev reload pci/0000:06:00.0 At this point devlink instance do not create auxiliary device for the RDMA functionality. Signed-off-by: Parav Pandit Reviewed-by: Jiri Pirko Reviewed-by: Leon Romanovsky --- Documentation/networking/devlink/devlink-params.rst | 4 ++++ include/net/devlink.h | 4 ++++ net/core/devlink.c | 5 +++++ 3 files changed, 13 insertions(+) diff --git a/Documentation/networking/devlink/devlink-params.rst b/Documentation/networking/devlink/devlink-params.rst index 219c1272f2d6..a49da0b049b6 100644 --- a/Documentation/networking/devlink/devlink-params.rst +++ b/Documentation/networking/devlink/devlink-params.rst @@ -101,6 +101,10 @@ own name. - Boolean - When enabled, the device driver will instantiate Ethernet specific auxiliary device of the devlink device. + * - ``enable_rdma`` + - Boolean + - When enabled, the device driver will instantiate RDMA specific + auxiliary device of the devlink device. * - ``internal_err_reset`` - Boolean - When enabled, the device driver will reset the device on internal diff --git a/include/net/devlink.h b/include/net/devlink.h index 1e3e183bb2c2..6f4f0416e598 100644 --- a/include/net/devlink.h +++ b/include/net/devlink.h @@ -520,6 +520,7 @@ enum devlink_param_generic_id { DEVLINK_PARAM_GENERIC_ID_ENABLE_ROCE, DEVLINK_PARAM_GENERIC_ID_ENABLE_REMOTE_DEV_RESET, DEVLINK_PARAM_GENERIC_ID_ENABLE_ETH, + DEVLINK_PARAM_GENERIC_ID_ENABLE_RDMA, /* add new param generic ids above here*/ __DEVLINK_PARAM_GENERIC_ID_MAX, @@ -563,6 +564,9 @@ enum devlink_param_generic_id { #define DEVLINK_PARAM_GENERIC_ENABLE_ETH_NAME "enable_eth" #define DEVLINK_PARAM_GENERIC_ENABLE_ETH_TYPE DEVLINK_PARAM_TYPE_BOOL +#define DEVLINK_PARAM_GENERIC_ENABLE_RDMA_NAME "enable_rdma" +#define DEVLINK_PARAM_GENERIC_ENABLE_RDMA_TYPE DEVLINK_PARAM_TYPE_BOOL + #define DEVLINK_PARAM_GENERIC(_id, _cmodes, _get, _set, _validate) \ { \ .id = DEVLINK_PARAM_GENERIC_ID_##_id, \ diff --git a/net/core/devlink.c b/net/core/devlink.c index 9a59f45c8bf9..b68d6921d34f 100644 --- a/net/core/devlink.c +++ b/net/core/devlink.c @@ -4282,6 +4282,11 @@ static const struct devlink_param devlink_param_generic[] = { .name = DEVLINK_PARAM_GENERIC_ENABLE_ETH_NAME, .type = DEVLINK_PARAM_GENERIC_ENABLE_ETH_TYPE, }, + { + .id = DEVLINK_PARAM_GENERIC_ID_ENABLE_RDMA, + .name = DEVLINK_PARAM_GENERIC_ENABLE_RDMA_NAME, + .type = DEVLINK_PARAM_GENERIC_ENABLE_RDMA_TYPE, + }, }; static int devlink_param_generic_verify(const struct devlink_param *param) From patchwork Tue Aug 10 13:24:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parav Pandit X-Patchwork-Id: 494789 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 653F6C432BE for ; Tue, 10 Aug 2021 13:24:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3D34161077 for ; Tue, 10 Aug 2021 13:24:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241397AbhHJNZL (ORCPT ); Tue, 10 Aug 2021 09:25:11 -0400 Received: from mail-bn8nam11on2067.outbound.protection.outlook.com ([40.107.236.67]:43478 "EHLO NAM11-BN8-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S241338AbhHJNZF (ORCPT ); Tue, 10 Aug 2021 09:25:05 -0400 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=JSAJHiBPHL+1hkZe5wTLgNpBXJLna4x+jJNgMdnuEOHE/W/8VedcsQPFVHCl3MHmu6l6FpgoctABVePFiZHYCXoaEEQ/MUmheuTz6jhTejrfKiLgBVONGnRvK5LjD66oamFGmD8+0BCD1v+24Uk2bAisTIiF94l6uZvX8TFDdg5gzNJ+nPFXL8fIn/IjVrQT/km9mdp6es4mng/LeF/fXc4XGyZkFc9m2hU6UULb8DE8em6HfGUFBkLtrANzQM74xUuMrD/vl7yC/hxeCslkw7uBsOwxHhcemol7gtYhuom5PaRmimbhYL+7vymj876pmtTKhaz+2JVz+Q/TOFoxOQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=w4/S67V7WOYwqMo9/yFokbt27R1+xYcr9QtOyrtDXIQ=; b=TsEAY44ZrMkDxg20KolzLaqf0FbaIPckdJgc1EqTaEdV85WaI8ppHQOU2R3lWpHvNWyfqNvUWXenGLf0rCA/nMeXfGk7L8puydrSb4wX1W51vFsmRsaanXseGp1wA9h7mPiR6AILvJa9H2Mwf039zTE5dKJxwgWGWc6zBiaSLiZbQWFq70lUVHZhJvTRnoo9ltOhrvd0DuVDJV/GupBvKS3Euh3MOYWeUQ4mpgIv0N6oQP45ZIsn8JibKeyvdSUTmbFCuxUPzv9sW08xRw16XGjmJZ0OYCcc7HJfS47UokoRmbwHp1MboURzzuQ2kBogK2p6H48VvvXygwlXGa60Gw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.112.34) smtp.rcpttodomain=vger.kernel.org smtp.mailfrom=nvidia.com; dmarc=pass (p=quarantine sp=none pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=w4/S67V7WOYwqMo9/yFokbt27R1+xYcr9QtOyrtDXIQ=; b=Cq/ToheyhhH5EEBx0gjhzE603391DHItPV3xj57veRkesYhuYjzkIlME5TxVSnS51ZR+AG2+3a7QHKIIS0lflnoT5tvdQS0c2E+H2271m8UjE5ZTxzCx/F3GhIRGQZkJy9/6uDPlGYfeg76tcozJNogmwfac3r1C+99yZghn4aMDHrD96zEDHpjbVEl6Uevpbdu0JLyV3MPJ+JIzWzvyEwk3iBWkknQRDWjroccq/v6KnISSyKxLH/2qSXzdW4SXUIoSpF9mCAbcfrxmAMrLLY1hm7PfyAa8qCqWukKcJlnBgzrVJmQ1bJnKnskGUJUh8reA5lHi8AV4kJq3EDY3Qw== Received: from MW4PR03CA0017.namprd03.prod.outlook.com (2603:10b6:303:8f::22) by DM6PR12MB2796.namprd12.prod.outlook.com (2603:10b6:5:50::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4394.19; Tue, 10 Aug 2021 13:24:40 +0000 Received: from CO1NAM11FT017.eop-nam11.prod.protection.outlook.com (2603:10b6:303:8f:cafe::20) by MW4PR03CA0017.outlook.office365.com (2603:10b6:303:8f::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4394.17 via Frontend Transport; Tue, 10 Aug 2021 13:24:40 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.112.34) smtp.mailfrom=nvidia.com; vger.kernel.org; dkim=none (message not signed) header.d=none; vger.kernel.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by CO1NAM11FT017.mail.protection.outlook.com (10.13.175.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4394.16 via Frontend Transport; Tue, 10 Aug 2021 13:24:40 +0000 Received: from sw-mtx-036.mtx.labs.mlnx (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 10 Aug 2021 13:24:39 +0000 From: Parav Pandit To: , , CC: , , Parav Pandit , Jiri Pirko , "Leon Romanovsky" Subject: [PATCH RESEND net-next 03/10] devlink: Add new "enable_vnet" generic device param Date: Tue, 10 Aug 2021 16:24:17 +0300 Message-ID: <20210810132424.9129-4-parav@nvidia.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210810132424.9129-1-parav@nvidia.com> References: <20210810132424.9129-1-parav@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 8a75ade7-7867-419d-7170-08d95c023599 X-MS-TrafficTypeDiagnostic: DM6PR12MB2796: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6430; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: yeZeYQdFxdGwJ1Q5bJN+1NL+kdPvgDYk8A6EoconSDw42hfl0Ty1drrgAdhZBFMuUUYdSGbxCODPnjWMVFeJRoHcRIgOi7+XNkIjkrulw0h0E3EqLbndoPNmUiTnZkAfcgQrE8feB2/lDVfplsma97pfZv4CyFgcSLdfTV5sCh6MGTmZWuN7UcSivRzyCTrcnsca9vEh4BBfcv0cSQqeIbF8ZXtlSFEFIjBCW97OFi173vfS0Anyc4Yzd8xYdDX1pPfU8SWQcVRAsAmdRgTI/yQemlLB5PcSgt4rSJmrQdB52UY0NufG+q0bTRsmdo8QVIft/GTzRlnwREOUVNNlpmfLijRl9O+sW68T32+MRmuCQyJeWm11fs2tq2vysY7pn/OAn+5vajKUTEYAoUxeA6GVR4Vg0WMSFYIks79w/H5MCGT0VCZkwFjt2GIu8m1RBF8jPqroxaWvDHM0GOQbJHoVA2ylxwjyZGVbCrmjUMHewQkX39GItmUsYYXlyFG9XpnIgYGEFL9y5l7GQhPJngR4wxV/Q+jfcWGmEG1UI2zSNdan77/halN5ylBIfCINIWTjHMdUzFMHKa9SbT+ibluyqpWJOihFq7iyMPiDMqfMGrrWMRiMLyRzcwWS8lsXGJdHnmlCcGnzS2WNbpAs7jr8DSnMhZWJar70eq4xZAt8A6BbCSs8QPCHYVImuw5YhnYqwjmEVBv0N7nF31f6Rw5pO1Ej0UdjujT9QQ/t2nU= X-Forefront-Antispam-Report: CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(396003)(346002)(376002)(39860400002)(136003)(46966006)(36840700001)(4326008)(478600001)(70206006)(2906002)(1076003)(426003)(70586007)(7636003)(8936002)(5660300002)(336012)(186003)(82310400003)(26005)(36756003)(356005)(16526019)(47076005)(82740400003)(6666004)(86362001)(110136005)(54906003)(8676002)(316002)(36860700001)(36906005)(107886003)(2616005)(83380400001)(41533002); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Aug 2021 13:24:40.7464 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8a75ade7-7867-419d-7170-08d95c023599 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT017.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB2796 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add new device generic parameter to enable/disable creation of VDPA net auxiliary device and associated device functionality in the devlink instance. User who prefers to disable such functionality can disable it using below example. $ devlink dev param set pci/0000:06:00.0 \ name enable_vnet value false cmode driverinit $ devlink dev reload pci/0000:06:00.0 At this point devlink instance do not create auxiliary device for the VDPA net functionality. Signed-off-by: Parav Pandit Reviewed-by: Jiri Pirko Reviewed-by: Leon Romanovsky --- Documentation/networking/devlink/devlink-params.rst | 4 ++++ include/net/devlink.h | 4 ++++ net/core/devlink.c | 5 +++++ 3 files changed, 13 insertions(+) diff --git a/Documentation/networking/devlink/devlink-params.rst b/Documentation/networking/devlink/devlink-params.rst index a49da0b049b6..4878907e9232 100644 --- a/Documentation/networking/devlink/devlink-params.rst +++ b/Documentation/networking/devlink/devlink-params.rst @@ -105,6 +105,10 @@ own name. - Boolean - When enabled, the device driver will instantiate RDMA specific auxiliary device of the devlink device. + * - ``enable_vnet`` + - Boolean + - When enabled, the device driver will instantiate VDPA networking + specific auxiliary device of the devlink device. * - ``internal_err_reset`` - Boolean - When enabled, the device driver will reset the device on internal diff --git a/include/net/devlink.h b/include/net/devlink.h index 6f4f0416e598..0a0becbcdc49 100644 --- a/include/net/devlink.h +++ b/include/net/devlink.h @@ -521,6 +521,7 @@ enum devlink_param_generic_id { DEVLINK_PARAM_GENERIC_ID_ENABLE_REMOTE_DEV_RESET, DEVLINK_PARAM_GENERIC_ID_ENABLE_ETH, DEVLINK_PARAM_GENERIC_ID_ENABLE_RDMA, + DEVLINK_PARAM_GENERIC_ID_ENABLE_VNET, /* add new param generic ids above here*/ __DEVLINK_PARAM_GENERIC_ID_MAX, @@ -567,6 +568,9 @@ enum devlink_param_generic_id { #define DEVLINK_PARAM_GENERIC_ENABLE_RDMA_NAME "enable_rdma" #define DEVLINK_PARAM_GENERIC_ENABLE_RDMA_TYPE DEVLINK_PARAM_TYPE_BOOL +#define DEVLINK_PARAM_GENERIC_ENABLE_VNET_NAME "enable_vnet" +#define DEVLINK_PARAM_GENERIC_ENABLE_VNET_TYPE DEVLINK_PARAM_TYPE_BOOL + #define DEVLINK_PARAM_GENERIC(_id, _cmodes, _get, _set, _validate) \ { \ .id = DEVLINK_PARAM_GENERIC_ID_##_id, \ diff --git a/net/core/devlink.c b/net/core/devlink.c index b68d6921d34f..867ae7e39788 100644 --- a/net/core/devlink.c +++ b/net/core/devlink.c @@ -4287,6 +4287,11 @@ static const struct devlink_param devlink_param_generic[] = { .name = DEVLINK_PARAM_GENERIC_ENABLE_RDMA_NAME, .type = DEVLINK_PARAM_GENERIC_ENABLE_RDMA_TYPE, }, + { + .id = DEVLINK_PARAM_GENERIC_ID_ENABLE_VNET, + .name = DEVLINK_PARAM_GENERIC_ENABLE_VNET_NAME, + .type = DEVLINK_PARAM_GENERIC_ENABLE_VNET_TYPE, + }, }; static int devlink_param_generic_verify(const struct devlink_param *param) From patchwork Tue Aug 10 13:24:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parav Pandit X-Patchwork-Id: 494787 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 94A1AC4320A for ; Tue, 10 Aug 2021 13:25:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7BC5F6101E for ; Tue, 10 Aug 2021 13:25:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241440AbhHJNZT (ORCPT ); Tue, 10 Aug 2021 09:25:19 -0400 Received: from mail-dm6nam11on2059.outbound.protection.outlook.com ([40.107.223.59]:17504 "EHLO NAM11-DM6-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S241327AbhHJNZI (ORCPT ); Tue, 10 Aug 2021 09:25:08 -0400 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=TRdW3tnj5CIucf+2uB3umC4izSiwUKLDWwa5CmyRtEIn7IR3kJ32cwLjUrgkYl31fAbGKOdG19FCyrM1Gsj9jN9HzeCPTVt+M5lQtx/xXBGFc8EhEWIOKwzWWkWRjI0goR6/LX5RQwvte81SYTEtGTxPaDd4F5eguzaQFyuMd2oI2mNZ5SPr1bgw8aHniTKDJd9ixDHChMqluk+W0tRJnd0u/LSObmHfGaxMNtHHqBzkMNuJ20SdrRUs6IoJkB0W0x76vh5AJpDg40j7xQZmmjKzo7Tvm/0Ayob7vCXIQnz5acO7F2I8tfHVvPBaoEoeL7K4R30DF1lazfWQ7TX9dQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=zOWPJ9JIrwjGsqY/KrjRI8m9WzSl5Cf6VcnQWxLM6SE=; b=HyD5XkSIZv4r/15yRWp3NSAWy2rGI1VPQQGJWg2a85CMu97rD+A+SBJYE2b5lukNVg3PAJsoigKFQs3n06LdlfV9HUQTuSzGittn157Mo4Ep2KgzhkeEpFEEBQQ17WUx8Vu4ZY+QYB+JyeKNV0DIeJtMEVklYPIMiHsehbC0bnH7RHfr3mjbljM6mngCkSFqzJaQr9JlrZpd+pazrOYb740m1vVeuLZrAIzuv74spj/6LHhCXh2e2vpU9ofRYtQ0vHVSar0rJi2xTKwriZ6aUYo2RdB/rsevN9h4KMX5knoLTmTs1ftGADm+BMjOqnh27hgPVATq9x1vllVE+hHVKQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.112.34) smtp.rcpttodomain=vger.kernel.org smtp.mailfrom=nvidia.com; dmarc=pass (p=quarantine sp=none pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=zOWPJ9JIrwjGsqY/KrjRI8m9WzSl5Cf6VcnQWxLM6SE=; b=uVmRk6CcS4biRjL16kjmkdLg7qorNTkhkst+W9RALdnnrh6/VTZTDnylQQcpMM9/xUWpXyH7I+KNzj5JRBrbL+TsE37K9TSyB1rojzX+b6XEOr/iPpRDuLbCKUDt/1L6n9PHd1iU0zdXKtJlSraHvcV3g5/NE4Anf8okYLaZBtXX28GgTGIOqs4Q/5I0SItvxg+9Lu5RVA1pPEjsvkQOfiRRy+2SJfcsnELQNLIJe8h7RAPi1joAQWPyFm0HxzgUm9DHRvTGYqG98jrvW78drSo9Yt9hSfKji/vZVcMReSpdT0DNN4dVg+Y6qc0qxP1zYVzYH/4Ruf+//oqfVSvLQA== Received: from MW4PR03CA0027.namprd03.prod.outlook.com (2603:10b6:303:8f::32) by MWHPR12MB1822.namprd12.prod.outlook.com (2603:10b6:300:114::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4415.14; Tue, 10 Aug 2021 13:24:45 +0000 Received: from CO1NAM11FT017.eop-nam11.prod.protection.outlook.com (2603:10b6:303:8f:cafe::36) by MW4PR03CA0027.outlook.office365.com (2603:10b6:303:8f::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4394.15 via Frontend Transport; Tue, 10 Aug 2021 13:24:45 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.112.34) smtp.mailfrom=nvidia.com; vger.kernel.org; dkim=none (message not signed) header.d=none; vger.kernel.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by CO1NAM11FT017.mail.protection.outlook.com (10.13.175.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4394.16 via Frontend Transport; Tue, 10 Aug 2021 13:24:44 +0000 Received: from sw-mtx-036.mtx.labs.mlnx (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 10 Aug 2021 13:24:42 +0000 From: Parav Pandit To: , , CC: , , Parav Pandit , Jiri Pirko , "Leon Romanovsky" Subject: [PATCH RESEND net-next 06/10] devlink: Add APIs to publish, unpublish individual parameter Date: Tue, 10 Aug 2021 16:24:20 +0300 Message-ID: <20210810132424.9129-7-parav@nvidia.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210810132424.9129-1-parav@nvidia.com> References: <20210810132424.9129-1-parav@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: f3b5435e-8c95-478f-e341-08d95c02381f X-MS-TrafficTypeDiagnostic: MWHPR12MB1822: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2000; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 2ssO7EdOLF+DdFAORveHPAXg4d9JSe6e0MKih+MdV7BcUGwyEY1MQc8sMnjOY5KZTGEsfwqVmpkE69fGOYmFNSI/V1DtHzjLYbKAOiloSy/yfscNrvpNflhXGApAMB3WSsprPoJN/cJUXJuZAK4pQNUD3Dtr7nkx5Y2FUKjbnFCUuU02lpovayuIHRgT15JkGCsWlQIdhFqF/D6+oiuIcoCj6koKXnjzBQx6XduF+SYEUVNK6J5LBMEFkE+qxeSsgXqFvSwYfKTPhgAouMMjBCvcfD6JpE3H3SNSBtOWREhkc6j7Fj3aN+eZ7GjlLnIk4EZzvNY/6r2upobLGmDdzJfWFeiQs6GLTuky/M0sO96FZ3RduKxnSVzv2zp2PZWrk7KYBZo6gsr54aOKJEno4DdqjloB4f2wZi5yLFIzGQxxuivbyzBSuhy329qb4WtD7ykuzHQ8mEo69iZkBmFc/jsqfdqgEbnwjxVpZxvUIg7okEWsKnHeYgF5RMjeQ06e4AvyC2wbVrtP+xAOeoUIMD9K1a3fwXQJMf2pjDS87gDzaMwEJW3OB0+/6Bmd9ekDGxdbe9a6V7+xOBSkyRSkmUr+vbuEPIZ1tMx93XsPvWUyTnjuOHO20O/mrUQYrC8yAxkCyWtgmqqaXKE3wKC9Db8YuUFrQlZkCFA/+L+hD0SyRyWjyxNx+6UWx+fV6ibPfTVvjG/e8VKB5+Zkfl4LRw== X-Forefront-Antispam-Report: CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(396003)(346002)(136003)(376002)(39860400002)(36840700001)(46966006)(110136005)(70206006)(356005)(36906005)(36756003)(316002)(54906003)(47076005)(16526019)(186003)(1076003)(70586007)(2616005)(8676002)(107886003)(7636003)(36860700001)(8936002)(82310400003)(86362001)(82740400003)(2906002)(478600001)(4326008)(6666004)(26005)(426003)(336012)(5660300002); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Aug 2021 13:24:44.9800 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f3b5435e-8c95-478f-e341-08d95c02381f X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT017.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR12MB1822 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Enable drivers to publish/unpublish individual parameter. Signed-off-by: Parav Pandit Reviewed-by: Jiri Pirko Reviewed-by: Leon Romanovsky --- include/net/devlink.h | 4 ++++ net/core/devlink.c | 48 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 52 insertions(+) diff --git a/include/net/devlink.h b/include/net/devlink.h index f6459ee77114..1151497c0ec5 100644 --- a/include/net/devlink.h +++ b/include/net/devlink.h @@ -1651,6 +1651,10 @@ void devlink_param_unregister(struct devlink *devlink, const struct devlink_param *param); void devlink_params_publish(struct devlink *devlink); void devlink_params_unpublish(struct devlink *devlink); +void devlink_param_publish(struct devlink *devlink, + const struct devlink_param *param); +void devlink_param_unpublish(struct devlink *devlink, + const struct devlink_param *param); int devlink_port_params_register(struct devlink_port *devlink_port, const struct devlink_param *params, size_t params_count); diff --git a/net/core/devlink.c b/net/core/devlink.c index 629291175af3..ee9787314cff 100644 --- a/net/core/devlink.c +++ b/net/core/devlink.c @@ -9982,6 +9982,54 @@ void devlink_params_unpublish(struct devlink *devlink) } EXPORT_SYMBOL_GPL(devlink_params_unpublish); +/** + * devlink_param_publish - publish one configuration parameter + * + * @devlink: devlink + * @param: one configuration parameter + * + * Publish previously registered configuration parameter. + */ +void devlink_param_publish(struct devlink *devlink, + const struct devlink_param *param) +{ + struct devlink_param_item *param_item; + + list_for_each_entry(param_item, &devlink->param_list, list) { + if (param_item->param != param || param_item->published) + continue; + param_item->published = true; + devlink_param_notify(devlink, 0, param_item, + DEVLINK_CMD_PARAM_NEW); + break; + } +} +EXPORT_SYMBOL_GPL(devlink_param_publish); + +/** + * devlink_param_unpublish - unpublish one configuration parameter + * + * @devlink: devlink + * @param: one configuration parameter + * + * Unpublish previously registered configuration parameter. + */ +void devlink_param_unpublish(struct devlink *devlink, + const struct devlink_param *param) +{ + struct devlink_param_item *param_item; + + list_for_each_entry(param_item, &devlink->param_list, list) { + if (param_item->param != param || !param_item->published) + continue; + param_item->published = false; + devlink_param_notify(devlink, 0, param_item, + DEVLINK_CMD_PARAM_DEL); + break; + } +} +EXPORT_SYMBOL_GPL(devlink_param_unpublish); + /** * devlink_port_params_register - register port configuration parameters * From patchwork Tue Aug 10 13:24:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parav Pandit X-Patchwork-Id: 494786 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE818C4338F for ; Tue, 10 Aug 2021 13:25:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D67B961076 for ; Tue, 10 Aug 2021 13:25:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241519AbhHJNZb (ORCPT ); Tue, 10 Aug 2021 09:25:31 -0400 Received: from mail-bn7nam10on2071.outbound.protection.outlook.com ([40.107.92.71]:35744 "EHLO NAM10-BN7-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S241348AbhHJNZJ (ORCPT ); Tue, 10 Aug 2021 09:25:09 -0400 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=oUONuh1gdwCTnZgHcmU366I4NTt2MeqB8MOA2nXh/T81bWASyA5V69S7x9tAFfX7ikhGniiYsTkIiVJ5FliNsn2+iTiimxq3qNcFyX18NJn8imonSdW3HWg+usi0BUxxiLkpPmvekFXR0azS+uNS12XqZGwT9cC9aAo0o+AuYd+TEJ2oPq0U+JDUMvG3xWEAuEs/rwQzETIE7g8YcteY21wdEm+0ZZJ+4iFF63DUHfJQuaN+msBVDhbRzoX5Z1inYZeeqT3kg0/d2evRg1K4VIOWUZrOCtyUdiNp5M/JIzICCuiw/tdZO2e/2Gep1+eMOvvNiqYpwG+rjw/7h9iMzQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=U1HicVjzcJPAfyQKAKYqTxta5g8FHZk/th/PL0AvTeg=; b=AayG31HoXvcWmx/cVCcqs1xsckhpfSEz4osWH1yXaT8dH96vav9Sm0UeoVYEuB4zxrXeUPPfCuKn+NZRjXmh42QDCs3caOKMHDVqXfQWfWErfvKylso2pVuvhhJvu+m2w1TfcvYcsqCYwTSqu6B0CyXMgaLKXPwofz+GlnX01DnNi7DlRSHdTEvxUW4K6I5L5K0OGpycRF1hvFs1YOugctZB3Tt7d/z1DjZG4RGPp8x1gv+NHenAexWX4jGPKysMwJnsXk7b4TILMPZtrb/TYXM7ycZ4HmWA360dpX7d50yog0Sac24SWlKVmNfcRbMFGJz9FJ2eltHg3ocS+m2bqw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.112.34) smtp.rcpttodomain=vger.kernel.org smtp.mailfrom=nvidia.com; dmarc=pass (p=quarantine sp=none pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=U1HicVjzcJPAfyQKAKYqTxta5g8FHZk/th/PL0AvTeg=; b=diD7XvRc35wt1Yu6CBnf+MejNfOQsoC23HPZiwCb67vBCtyhJzQaUSU6j1fQihMNYTHdPLElvH2ckWLe8tmpSiptLwpY3hbz9jXgJYCD1YtqgdN+owlr173YDudmhsbHHkrtbAy21xCj4+f2hrDBuF8YiA1U7IlTV44j9Yp+Th3LmNiW+ZetQP2fHh3KvglTyqC5FTOcuAcox6MRK6H/tZUiHmIU+HjWpSU1+bsiKOCVyM+hn30P+FKFUjPZKAnsKXZDHQoYVp+EZkTV40iZOZIZ62Z5oMPA9ERkdWjJ0mau4dV6mDMBRZ5fSz0IaeKl+Dhf9y7PnVwwToXv4q8Knw== Received: from MW4PR03CA0026.namprd03.prod.outlook.com (2603:10b6:303:8f::31) by BN9PR12MB5356.namprd12.prod.outlook.com (2603:10b6:408:105::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4394.20; Tue, 10 Aug 2021 13:24:46 +0000 Received: from CO1NAM11FT017.eop-nam11.prod.protection.outlook.com (2603:10b6:303:8f:cafe::f) by MW4PR03CA0026.outlook.office365.com (2603:10b6:303:8f::31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4415.13 via Frontend Transport; Tue, 10 Aug 2021 13:24:46 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.112.34) smtp.mailfrom=nvidia.com; vger.kernel.org; dkim=none (message not signed) header.d=none; vger.kernel.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by CO1NAM11FT017.mail.protection.outlook.com (10.13.175.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4394.16 via Frontend Transport; Tue, 10 Aug 2021 13:24:46 +0000 Received: from sw-mtx-036.mtx.labs.mlnx (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 10 Aug 2021 13:24:43 +0000 From: Parav Pandit To: , , CC: , , Parav Pandit , Leon Romanovsky Subject: [PATCH RESEND net-next 08/10] net/mlx5: Support enable_eth devlink dev param Date: Tue, 10 Aug 2021 16:24:22 +0300 Message-ID: <20210810132424.9129-9-parav@nvidia.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210810132424.9129-1-parav@nvidia.com> References: <20210810132424.9129-1-parav@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: eebd3d0b-7f5d-4533-76e2-08d95c0238d2 X-MS-TrafficTypeDiagnostic: BN9PR12MB5356: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:3383; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: rKIL3F/eZbnaiPuRbGjmPZVDiPjMCL7gzUJgV1916TplzidKkl26F0rXyqtNUw5r8rEMWr6MZRO0N9xILC1KJSfjoqrbVc6jxYdZ+FnCmuDZbL+V0r5ASh5bFpvlEhJT5uE/HiYtp4YOsL0IjtCU1wzggzpOpk1BGiE5KreqxWzpqR+mOLtnZypFdJrvcOAYaq5xuKVr+D2l6p0h6zTYuADOIZAyDcaT59fvlipC2YjbiRRVaI25ctUr2xosqI7x/mC+oNNUwqh74ohzpY7eTq8ETZeeklZoWHrVK3yE1i6JZRIoWqCCvMApTgRGtdAxgcw4Xciy+4kzWMVk8T1FFP/MljhfxPeL+ABM2QGvXsPOC42HWdmlm264pfBjgNkrqIChb5ATu/irbAxKE2Asj6ydqql79yV7Fk9Ls2eU8sTmwykCvore7qBkTZL7p9l/bPN/g1K1gTpq/WtAo70IsXqvMZwrT5xqwxOT0DHhxBSpg/Fybq+K9rjFlOrM6KnpETEFbJFw5lYdIVvIrtl5ZrEy9j7rPG1kB1O/v7GWUadww04ve9CARh5Fzzcu0O8+ucEcV2in2waEBcW7113uLOpCPZR3PwPRos58EXWGVrDX8HWwm8GYARfZkSTwMIn5JZ/VGCdf92UD3cSJ6pXHsOLY52/Npue/rr0k+gEv+rYSojrINZ3i4SC/zVzG4TfUgaMJ4N2zWg+OZI7dm9W5pA== X-Forefront-Antispam-Report: CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(346002)(39860400002)(136003)(376002)(396003)(36840700001)(46966006)(26005)(47076005)(5660300002)(4326008)(478600001)(82740400003)(54906003)(356005)(82310400003)(8676002)(186003)(2906002)(70206006)(70586007)(1076003)(16526019)(110136005)(7636003)(6666004)(336012)(8936002)(86362001)(107886003)(36756003)(426003)(83380400001)(36906005)(2616005)(316002)(36860700001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Aug 2021 13:24:46.1483 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: eebd3d0b-7f5d-4533-76e2-08d95c0238d2 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT017.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN9PR12MB5356 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Enable user to disable Ethernet auxiliary device so that when it is not required, user can disable it. For example, $ devlink dev param set pci/0000:06:00.0 \ name enable_eth value false cmode driverinit $ devlink dev reload pci/0000:06:00.0 At this point devlink instance do not create mlx5_core.eth.2 auxiliary device for the Ethernet functionality. Signed-off-by: Parav Pandit Reviewed-by: Leon Romanovsky --- drivers/net/ethernet/mellanox/mlx5/core/dev.c | 42 ++++++++++++++- .../net/ethernet/mellanox/mlx5/core/devlink.c | 53 +++++++++++++++++++ .../ethernet/mellanox/mlx5/core/mlx5_core.h | 3 ++ 3 files changed, 96 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/dev.c b/drivers/net/ethernet/mellanox/mlx5/core/dev.c index def2156e50ee..10c4309f29be 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/dev.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/dev.c @@ -53,7 +53,7 @@ static bool is_eth_rep_supported(struct mlx5_core_dev *dev) return true; } -static bool is_eth_supported(struct mlx5_core_dev *dev) +bool mlx5_eth_supported(struct mlx5_core_dev *dev) { if (!IS_ENABLED(CONFIG_MLX5_CORE_EN)) return false; @@ -105,6 +105,17 @@ static bool is_eth_supported(struct mlx5_core_dev *dev) return true; } +static bool is_eth_enabled(struct mlx5_core_dev *dev) +{ + union devlink_param_value val; + int err; + + err = devlink_param_driverinit_value_get(priv_to_devlink(dev), + DEVLINK_PARAM_GENERIC_ID_ENABLE_ETH, + &val); + return err ? false : val.vbool; +} + static bool is_vnet_supported(struct mlx5_core_dev *dev) { if (!IS_ENABLED(CONFIG_MLX5_VDPA_NET)) @@ -201,13 +212,15 @@ enum { static const struct mlx5_adev_device { const char *suffix; bool (*is_supported)(struct mlx5_core_dev *dev); + bool (*is_enabled)(struct mlx5_core_dev *dev); } mlx5_adev_devices[] = { [MLX5_INTERFACE_PROTOCOL_VNET] = { .suffix = "vnet", .is_supported = &is_vnet_supported }, [MLX5_INTERFACE_PROTOCOL_IB] = { .suffix = "rdma", .is_supported = &is_ib_supported }, [MLX5_INTERFACE_PROTOCOL_ETH] = { .suffix = "eth", - .is_supported = &is_eth_supported }, + .is_supported = &mlx5_eth_supported, + .is_enabled = &is_eth_enabled }, [MLX5_INTERFACE_PROTOCOL_ETH_REP] = { .suffix = "eth-rep", .is_supported = &is_eth_rep_supported }, [MLX5_INTERFACE_PROTOCOL_IB_REP] = { .suffix = "rdma-rep", @@ -308,6 +321,14 @@ int mlx5_attach_device(struct mlx5_core_dev *dev) if (!priv->adev[i]) { bool is_supported = false; + if (mlx5_adev_devices[i].is_enabled) { + bool enabled; + + enabled = mlx5_adev_devices[i].is_enabled(dev); + if (!enabled) + continue; + } + if (mlx5_adev_devices[i].is_supported) is_supported = mlx5_adev_devices[i].is_supported(dev); @@ -360,6 +381,14 @@ void mlx5_detach_device(struct mlx5_core_dev *dev) if (!priv->adev[i]) continue; + if (mlx5_adev_devices[i].is_enabled) { + bool enabled; + + enabled = mlx5_adev_devices[i].is_enabled(dev); + if (!enabled) + goto skip_suspend; + } + adev = &priv->adev[i]->adev; /* Auxiliary driver was unbind manually through sysfs */ if (!adev->dev.driver) @@ -447,12 +476,21 @@ static void delete_drivers(struct mlx5_core_dev *dev) if (!priv->adev[i]) continue; + if (mlx5_adev_devices[i].is_enabled) { + bool enabled; + + enabled = mlx5_adev_devices[i].is_enabled(dev); + if (!enabled) + goto del_adev; + } + if (mlx5_adev_devices[i].is_supported && !delete_all) is_supported = mlx5_adev_devices[i].is_supported(dev); if (is_supported) continue; +del_adev: del_adev(&priv->adev[i]->adev); priv->adev[i] = NULL; } diff --git a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c index 0ec446d0fd6a..557973c9212f 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c @@ -596,6 +596,52 @@ static void mlx5_devlink_set_params_init_values(struct devlink *devlink) #endif } +static const struct devlink_param enable_eth_param = + DEVLINK_PARAM_GENERIC(ENABLE_ETH, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), + NULL, NULL, NULL); + +static int mlx5_devlink_eth_param_register(struct devlink *devlink) +{ + struct mlx5_core_dev *dev = devlink_priv(devlink); + union devlink_param_value value; + int err; + + if (!mlx5_eth_supported(dev)) + return 0; + + err = devlink_param_register(devlink, &enable_eth_param); + if (err) + return err; + + value.vbool = true; + devlink_param_driverinit_value_set(devlink, + DEVLINK_PARAM_GENERIC_ID_ENABLE_ETH, + value); + devlink_param_publish(devlink, &enable_eth_param); + return 0; +} + +static void mlx5_devlink_eth_param_unregister(struct devlink *devlink) +{ + struct mlx5_core_dev *dev = devlink_priv(devlink); + + if (!mlx5_eth_supported(dev)) + return; + + devlink_param_unpublish(devlink, &enable_eth_param); + devlink_param_unregister(devlink, &enable_eth_param); +} + +static int mlx5_devlink_auxdev_params_register(struct devlink *devlink) +{ + return mlx5_devlink_eth_param_register(devlink); +} + +static void mlx5_devlink_auxdev_params_unregister(struct devlink *devlink) +{ + mlx5_devlink_eth_param_unregister(devlink); +} + #define MLX5_TRAP_DROP(_id, _group_id) \ DEVLINK_TRAP_GENERIC(DROP, DROP, _id, \ DEVLINK_TRAP_GROUP_GENERIC_ID_##_group_id, \ @@ -654,6 +700,10 @@ int mlx5_devlink_register(struct devlink *devlink) mlx5_devlink_set_params_init_values(devlink); devlink_params_publish(devlink); + err = mlx5_devlink_auxdev_params_register(devlink); + if (err) + goto auxdev_reg_err; + err = mlx5_devlink_traps_register(devlink); if (err) goto traps_reg_err; @@ -661,6 +711,8 @@ int mlx5_devlink_register(struct devlink *devlink) return 0; traps_reg_err: + mlx5_devlink_auxdev_params_unregister(devlink); +auxdev_reg_err: devlink_params_unregister(devlink, mlx5_devlink_params, ARRAY_SIZE(mlx5_devlink_params)); params_reg_err: @@ -671,6 +723,7 @@ int mlx5_devlink_register(struct devlink *devlink) void mlx5_devlink_unregister(struct devlink *devlink) { mlx5_devlink_traps_unregister(devlink); + mlx5_devlink_auxdev_params_unregister(devlink); devlink_params_unpublish(devlink); devlink_params_unregister(devlink, mlx5_devlink_params, ARRAY_SIZE(mlx5_devlink_params)); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h b/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h index 343807ac2036..b3dfecf4f433 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h @@ -270,4 +270,7 @@ static inline u32 mlx5_sriov_get_vf_total_msix(struct pci_dev *pdev) return MLX5_CAP_GEN_MAX(dev, num_total_dynamic_vf_msix); } + +bool mlx5_eth_supported(struct mlx5_core_dev *dev); + #endif /* __MLX5_CORE_H__ */ From patchwork Tue Aug 10 13:24:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parav Pandit X-Patchwork-Id: 494785 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87C82C4338F for ; Tue, 10 Aug 2021 13:25:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6781761019 for ; Tue, 10 Aug 2021 13:25:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241527AbhHJNZk (ORCPT ); Tue, 10 Aug 2021 09:25:40 -0400 Received: from mail-mw2nam12on2072.outbound.protection.outlook.com ([40.107.244.72]:39456 "EHLO NAM12-MW2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S241402AbhHJNZL (ORCPT ); Tue, 10 Aug 2021 09:25:11 -0400 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=BjO2JZ4oeJM2kUmRf65ZR3LzKygpotK3lZdh7rCmlk7Szu9u/KlTek4uHUOhpoimmGC8XOly3jamDgbK2E/eLjkIZsiIiqqgtFm8TPfuFTZNYQBpv2zxxIMR0tcOmpmxssHTSVo8xi0Q5J32/I3Ke0M2bQbtqzWQKKsWqmEYVISRUTwZHm9GWRJoyizAtFbWznSBd0l30IveNU433IhLXFSZSjriADCJiEtURPQILTHXNLxUcMt9zbTaJEoigUe/YOcYZDOodnOhlk+nf5gUlxGayXLVh0B0kzyrtbDHenol4rqP8qxTRidKKFkeKMTCCwWGyUH0X9o8kFs/EAwSpg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=oIi8hzPJyZfyI2sfgdbiTFzKy/YbYasDVyImO8S2Rt8=; b=YwCBwt+TjRvS4kyAhmhnN3/mz/ELf3BKTCpxXX0OXjRnXjqcL6RQq/HiRT0gUewcbpwpjuZ9Ai07hMsKdotevgDJ6MUWHp8S2VqoQ81/XVLLRBDPuUA7BFrR1oFQoSHpgcjbotzzV7qjQTHq1yuMsYbu7asuNSRNVk14Ws0T26e3loasTRMIBMf3aqkxCGGEi3gUXecO23Gg2SF0j8UTB4C3bYUbhQIvoga7GqoRHCKwHsvssjxr+n+x51o/UOxutypgUdwhm/jIs2oaGNhQ5mEi26/RpbyoO9n80+R/vUby76Y+r3O0p+Ip+M6kcZyEQi8Z8JWK/PirArmslweNjw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.112.34) smtp.rcpttodomain=vger.kernel.org smtp.mailfrom=nvidia.com; dmarc=pass (p=quarantine sp=none pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=oIi8hzPJyZfyI2sfgdbiTFzKy/YbYasDVyImO8S2Rt8=; b=qEMkfrHsak42sZuj0nGvvYnFX7K7TkuGGP7Rcbr5z5kQGk/cMnXbD07KY1qAmceuRmD4Feq+XsCC9mIme6FARWlswcQVcSob9+LJrCI1FKtgmQyW8A+L6JrdJ1g1N9hoNbwZVSMyW7dxHSu6RjmzybXNfHoRXEKQhmyqXQrYNI2utsluyJW5d5LEjDQ2z7CzhmRTlvrIhvVAPda0SfzjqUD/Elqn7zwO2wcGVWe/tLUZkHT65/vY/CxmHyTk/JcSRIW4rDXT7dD/wsOsOV5NiWVdonUh6Gz0cXU1PaGJXD/lX36GOcTjAKdp+8gNm531ch6RyNvZ5OYEwdpolUuleQ== Received: from MW4PR03CA0002.namprd03.prod.outlook.com (2603:10b6:303:8f::7) by DM5PR12MB1721.namprd12.prod.outlook.com (2603:10b6:3:10d::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4394.21; Tue, 10 Aug 2021 13:24:48 +0000 Received: from CO1NAM11FT017.eop-nam11.prod.protection.outlook.com (2603:10b6:303:8f:cafe::96) by MW4PR03CA0002.outlook.office365.com (2603:10b6:303:8f::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4415.14 via Frontend Transport; Tue, 10 Aug 2021 13:24:48 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.112.34) smtp.mailfrom=nvidia.com; vger.kernel.org; dkim=none (message not signed) header.d=none; vger.kernel.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by CO1NAM11FT017.mail.protection.outlook.com (10.13.175.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4394.16 via Frontend Transport; Tue, 10 Aug 2021 13:24:48 +0000 Received: from sw-mtx-036.mtx.labs.mlnx (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 10 Aug 2021 13:24:45 +0000 From: Parav Pandit To: , , CC: , , Parav Pandit , Leon Romanovsky Subject: [PATCH RESEND net-next 10/10] net/mlx5: Support enable_vnet devlink dev param Date: Tue, 10 Aug 2021 16:24:24 +0300 Message-ID: <20210810132424.9129-11-parav@nvidia.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210810132424.9129-1-parav@nvidia.com> References: <20210810132424.9129-1-parav@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 9334ceaa-3954-4dfb-b9b5-08d95c023a22 X-MS-TrafficTypeDiagnostic: DM5PR12MB1721: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4125; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: VbWvl9W1mSCM9F2kad5gjuUdntCljrDxgwsGGI0zPCkJijey+YesFq0EH8H/4FqjL5WJzKhGBr3nybtWK+X866Gy2uT5dnlNeMdGyXqUsFjyIagt3/TuV2ZBv56jYOAteqMde7zBGLPt79kPUlsy5XFY/Yv23c79fgXc8RnpQXAfQewdyxfSRlmI53L/ltYeCt8FU8N5zl6nSR0XwLfxbD1soUTmKlxvfhWEWn/WSqBDOLGr0pTDlweXBnOc5yU+sm9j/dxb2Irmjc29qYz1DumrCOHCQxNXXgFZW+zOuBiASM2RPwoylp5Z+IsqJA+G52aYnZaVDgrGwYQA2XNz0vuNZ7ALxFtZ6lQ7gDgSV/snvbB0b48g6R31jYDDO6FVy4DYgnKBddgrBcYxvKNCyV4Md7tr36RbzoAzE+WJuzwABhlmynlRnKoB8INdiYDoWpLuY8e6yEyDYfSVzrWy6Cw4wr90elkqFLyyd4MAA/BXaKqYUrIWgvcr4QFz7g63amDFyaNpsjFde3yBNKD9bqa67AJgFIWdao/VZmKj1MPEi2IVoDoO3ZNVImgzNsTrAlrtiFOo/OuLvHJOTPRsIBDpFGDqxYf64O2F5a2zycRce1/1+N9RsmVJ51RejAXEb64uVIUb7HjBsYFXP8PFoLXfWSP/WznWJwT3WJXNc6tV+FdDvPjjQBNE6anCXEpwJEJOUosDRqXBLlTVwyx6Wg== X-Forefront-Antispam-Report: CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(136003)(39860400002)(396003)(346002)(376002)(46966006)(36840700001)(186003)(70206006)(107886003)(8676002)(2906002)(336012)(70586007)(82310400003)(82740400003)(7636003)(16526019)(26005)(83380400001)(4326008)(47076005)(356005)(36756003)(8936002)(478600001)(36906005)(1076003)(2616005)(5660300002)(316002)(36860700001)(54906003)(86362001)(110136005)(426003)(6666004); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Aug 2021 13:24:48.3170 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9334ceaa-3954-4dfb-b9b5-08d95c023a22 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT017.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1721 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Enable user to disable VDPA net auxiliary device so that when it is not required, user can disable it. For example, $ devlink dev param set pci/0000:06:00.0 \ name enable_vnet value false cmode driverinit $ devlink dev reload pci/0000:06:00.0 At this point devlink instance do not create auxiliary device mlx5_core.vnet.2 for the VDPA net functionality. Signed-off-by: Parav Pandit Reviewed-by: Leon Romanovsky --- drivers/net/ethernet/mellanox/mlx5/core/dev.c | 16 ++++++- .../net/ethernet/mellanox/mlx5/core/devlink.c | 42 +++++++++++++++++++ .../ethernet/mellanox/mlx5/core/mlx5_core.h | 1 + 3 files changed, 57 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/dev.c b/drivers/net/ethernet/mellanox/mlx5/core/dev.c index cb86844099c0..ff6b03dc7e32 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/dev.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/dev.c @@ -116,7 +116,7 @@ static bool is_eth_enabled(struct mlx5_core_dev *dev) return err ? false : val.vbool; } -static bool is_vnet_supported(struct mlx5_core_dev *dev) +bool mlx5_vnet_supported(struct mlx5_core_dev *dev) { if (!IS_ENABLED(CONFIG_MLX5_VDPA_NET)) return false; @@ -138,6 +138,17 @@ static bool is_vnet_supported(struct mlx5_core_dev *dev) return true; } +static bool is_vnet_enabled(struct mlx5_core_dev *dev) +{ + union devlink_param_value val; + int err; + + err = devlink_param_driverinit_value_get(priv_to_devlink(dev), + DEVLINK_PARAM_GENERIC_ID_ENABLE_VNET, + &val); + return err ? false : val.vbool; +} + static bool is_ib_rep_supported(struct mlx5_core_dev *dev) { if (!IS_ENABLED(CONFIG_MLX5_INFINIBAND)) @@ -226,7 +237,8 @@ static const struct mlx5_adev_device { bool (*is_enabled)(struct mlx5_core_dev *dev); } mlx5_adev_devices[] = { [MLX5_INTERFACE_PROTOCOL_VNET] = { .suffix = "vnet", - .is_supported = &is_vnet_supported }, + .is_supported = &mlx5_vnet_supported, + .is_enabled = &is_vnet_enabled }, [MLX5_INTERFACE_PROTOCOL_IB] = { .suffix = "rdma", .is_supported = &mlx5_rdma_supported, .is_enabled = &is_ib_enabled }, diff --git a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c index f247ffb325a9..6f4d7c7f06e0 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c @@ -680,6 +680,42 @@ static void mlx5_devlink_rdma_param_unregister(struct devlink *devlink) devlink_param_unregister(devlink, &enable_rdma_param); } +static const struct devlink_param enable_vnet_param = + DEVLINK_PARAM_GENERIC(ENABLE_VNET, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), + NULL, NULL, NULL); + +static int mlx5_devlink_vnet_param_register(struct devlink *devlink) +{ + struct mlx5_core_dev *dev = devlink_priv(devlink); + union devlink_param_value value; + int err; + + if (!mlx5_vnet_supported(dev)) + return 0; + + err = devlink_param_register(devlink, &enable_vnet_param); + if (err) + return err; + + value.vbool = true; + devlink_param_driverinit_value_set(devlink, + DEVLINK_PARAM_GENERIC_ID_ENABLE_VNET, + value); + devlink_param_publish(devlink, &enable_rdma_param); + return 0; +} + +static void mlx5_devlink_vnet_param_unregister(struct devlink *devlink) +{ + struct mlx5_core_dev *dev = devlink_priv(devlink); + + if (!mlx5_vnet_supported(dev)) + return; + + devlink_param_unpublish(devlink, &enable_vnet_param); + devlink_param_unregister(devlink, &enable_vnet_param); +} + static int mlx5_devlink_auxdev_params_register(struct devlink *devlink) { int err; @@ -692,8 +728,13 @@ static int mlx5_devlink_auxdev_params_register(struct devlink *devlink) if (err) goto rdma_err; + err = mlx5_devlink_vnet_param_register(devlink); + if (err) + goto vnet_err; return 0; +vnet_err: + mlx5_devlink_rdma_param_unregister(devlink); rdma_err: mlx5_devlink_eth_param_unregister(devlink); return err; @@ -701,6 +742,7 @@ static int mlx5_devlink_auxdev_params_register(struct devlink *devlink) static void mlx5_devlink_auxdev_params_unregister(struct devlink *devlink) { + mlx5_devlink_vnet_param_unregister(devlink); mlx5_devlink_rdma_param_unregister(devlink); mlx5_devlink_eth_param_unregister(devlink); } diff --git a/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h b/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h index b36fbcdc048e..2059b7319867 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h @@ -273,5 +273,6 @@ static inline u32 mlx5_sriov_get_vf_total_msix(struct pci_dev *pdev) bool mlx5_eth_supported(struct mlx5_core_dev *dev); bool mlx5_rdma_supported(struct mlx5_core_dev *dev); +bool mlx5_vnet_supported(struct mlx5_core_dev *dev); #endif /* __MLX5_CORE_H__ */