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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id n7sm2662270wrp.17.2021.10.20.10.34.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Oct 2021 10:34:57 -0700 (PDT) From: Jean-Philippe Brucker To: mst@redhat.com, imammedo@redhat.com, peter.maydell@linaro.org Subject: [PATCH v5 01/12] hw/acpi: Add VIOT table Date: Wed, 20 Oct 2021 18:27:35 +0100 Message-Id: <20211020172745.620101-2-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211020172745.620101-1-jean-philippe@linaro.org> References: <20211020172745.620101-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=jean-philippe@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker , ehabkost@redhat.com, eric.auger@redhat.com, jasowang@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, peterx@redhat.com, shannon.zhaosl@gmail.com, qemu-arm@nongnu.org, ani@anisinha.ca, pbonzini@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Add a function that generates a Virtual I/O Translation table (VIOT), describing the topology of paravirtual IOMMUs. The table is created if a virtio-iommu device is present. It contains a virtio-iommu node and PCI Range nodes for endpoints managed by the IOMMU. By default, a single node describes all PCI devices. When passing the "default_bus_bypass_iommu" machine option and "bypass_iommu" PXB option, only buses that do not bypass the IOMMU are described by PCI Range nodes. Reviewed-by: Eric Auger Tested-by: Eric Auger Signed-off-by: Jean-Philippe Brucker --- hw/acpi/viot.h | 13 +++++ hw/acpi/viot.c | 114 ++++++++++++++++++++++++++++++++++++++++++++ hw/acpi/Kconfig | 4 ++ hw/acpi/meson.build | 1 + 4 files changed, 132 insertions(+) create mode 100644 hw/acpi/viot.h create mode 100644 hw/acpi/viot.c -- 2.33.0 diff --git a/hw/acpi/viot.h b/hw/acpi/viot.h new file mode 100644 index 0000000000..9fe565bb87 --- /dev/null +++ b/hw/acpi/viot.h @@ -0,0 +1,13 @@ +/* + * ACPI Virtual I/O Translation Table implementation + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef VIOT_H +#define VIOT_H + +void build_viot(MachineState *ms, GArray *table_data, BIOSLinker *linker, + uint16_t virtio_iommu_bdf, const char *oem_id, + const char *oem_table_id); + +#endif /* VIOT_H */ diff --git a/hw/acpi/viot.c b/hw/acpi/viot.c new file mode 100644 index 0000000000..c1af75206e --- /dev/null +++ b/hw/acpi/viot.c @@ -0,0 +1,114 @@ +/* + * ACPI Virtual I/O Translation table implementation + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "qemu/osdep.h" +#include "hw/acpi/acpi.h" +#include "hw/acpi/aml-build.h" +#include "hw/acpi/viot.h" +#include "hw/pci/pci.h" +#include "hw/pci/pci_host.h" + +struct viot_pci_ranges { + GArray *blob; + size_t count; + uint16_t output_node; +}; + +/* Build PCI range for a given PCI host bridge */ +static int build_pci_range_node(Object *obj, void *opaque) +{ + struct viot_pci_ranges *pci_ranges = opaque; + GArray *blob = pci_ranges->blob; + + if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) { + PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus; + + if (bus && !pci_bus_bypass_iommu(bus)) { + int min_bus, max_bus; + + pci_bus_range(bus, &min_bus, &max_bus); + + /* Type */ + build_append_int_noprefix(blob, 1 /* PCI range */, 1); + /* Reserved */ + build_append_int_noprefix(blob, 0, 1); + /* Length */ + build_append_int_noprefix(blob, 24, 2); + /* Endpoint start */ + build_append_int_noprefix(blob, PCI_BUILD_BDF(min_bus, 0), 4); + /* PCI Segment start */ + build_append_int_noprefix(blob, 0, 2); + /* PCI Segment end */ + build_append_int_noprefix(blob, 0, 2); + /* PCI BDF start */ + build_append_int_noprefix(blob, PCI_BUILD_BDF(min_bus, 0), 2); + /* PCI BDF end */ + build_append_int_noprefix(blob, PCI_BUILD_BDF(max_bus, 0xff), 2); + /* Output node */ + build_append_int_noprefix(blob, pci_ranges->output_node, 2); + /* Reserved */ + build_append_int_noprefix(blob, 0, 6); + + pci_ranges->count++; + } + } + + return 0; +} + +/* + * Generate a VIOT table with one PCI-based virtio-iommu that manages PCI + * endpoints. + * + * Defined in the ACPI Specification (Version TBD) + */ +void build_viot(MachineState *ms, GArray *table_data, BIOSLinker *linker, + uint16_t virtio_iommu_bdf, const char *oem_id, + const char *oem_table_id) +{ + /* The virtio-iommu node follows the 48-bytes header */ + int viommu_off = 48; + AcpiTable table = { .sig = "VIOT", .rev = 0, + .oem_id = oem_id, .oem_table_id = oem_table_id }; + struct viot_pci_ranges pci_ranges = { + .output_node = viommu_off, + .blob = g_array_new(false, true /* clear */, 1), + }; + + /* Build the list of PCI ranges that this viommu manages */ + object_child_foreach_recursive(OBJECT(ms), build_pci_range_node, + &pci_ranges); + + /* ACPI table header */ + acpi_table_begin(&table, table_data); + /* Node count */ + build_append_int_noprefix(table_data, pci_ranges.count + 1, 2); + /* Node offset */ + build_append_int_noprefix(table_data, viommu_off, 2); + /* Reserved */ + build_append_int_noprefix(table_data, 0, 8); + + /* Virtio-iommu node */ + /* Type */ + build_append_int_noprefix(table_data, 3 /* virtio-pci IOMMU */, 1); + /* Reserved */ + build_append_int_noprefix(table_data, 0, 1); + /* Length */ + build_append_int_noprefix(table_data, 16, 2); + /* PCI Segment */ + build_append_int_noprefix(table_data, 0, 2); + /* PCI BDF number */ + build_append_int_noprefix(table_data, virtio_iommu_bdf, 2); + /* Reserved */ + build_append_int_noprefix(table_data, 0, 8); + + /* PCI ranges found above */ + g_array_append_vals(table_data, pci_ranges.blob->data, + pci_ranges.blob->len); + g_array_free(pci_ranges.blob, true); + + acpi_table_end(linker, &table); +} + diff --git a/hw/acpi/Kconfig b/hw/acpi/Kconfig index 3b5e118c54..622b0b50b7 100644 --- a/hw/acpi/Kconfig +++ b/hw/acpi/Kconfig @@ -51,6 +51,10 @@ config ACPI_VMGENID default y depends on PC +config ACPI_VIOT + bool + depends on ACPI + config ACPI_HW_REDUCED bool select ACPI diff --git a/hw/acpi/meson.build b/hw/acpi/meson.build index 7d8c0eb43e..adf6347bc4 100644 --- a/hw/acpi/meson.build +++ b/hw/acpi/meson.build @@ -20,6 +20,7 @@ acpi_ss.add(when: 'CONFIG_ACPI_APEI', if_true: files('ghes.c'), if_false: files( acpi_ss.add(when: 'CONFIG_ACPI_PIIX4', if_true: files('piix4.c')) acpi_ss.add(when: 'CONFIG_ACPI_PCIHP', if_true: files('pcihp.c')) acpi_ss.add(when: 'CONFIG_ACPI_PCIHP', if_false: files('acpi-pci-hotplug-stub.c')) +acpi_ss.add(when: 'CONFIG_ACPI_VIOT', if_true: files('viot.c')) acpi_ss.add(when: 'CONFIG_ACPI_X86_ICH', if_true: files('ich9.c', 'tco.c')) acpi_ss.add(when: 'CONFIG_IPMI', if_true: files('ipmi.c'), if_false: files('ipmi-stub.c')) acpi_ss.add(when: 'CONFIG_PC', if_false: files('acpi-x86-stub.c')) From patchwork Wed Oct 20 17:27:36 2021 Content-Type: text/plain; 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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id n7sm2662270wrp.17.2021.10.20.10.34.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Oct 2021 10:34:58 -0700 (PDT) From: Jean-Philippe Brucker To: mst@redhat.com, imammedo@redhat.com, peter.maydell@linaro.org Subject: [PATCH v5 02/12] hw/i386/pc: Remove x86_iommu_get_type() Date: Wed, 20 Oct 2021 18:27:36 +0100 Message-Id: <20211020172745.620101-3-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211020172745.620101-1-jean-philippe@linaro.org> References: <20211020172745.620101-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=jean-philippe@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker , ehabkost@redhat.com, eric.auger@redhat.com, jasowang@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, peterx@redhat.com, shannon.zhaosl@gmail.com, qemu-arm@nongnu.org, ani@anisinha.ca, pbonzini@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" To generate the IOMMU ACPI table, acpi-build.c can use base QEMU types instead of a special IommuType value. Signed-off-by: Jean-Philippe Brucker --- include/hw/i386/x86-iommu.h | 12 ------------ hw/i386/acpi-build.c | 20 +++++++++----------- hw/i386/amd_iommu.c | 2 -- hw/i386/intel_iommu.c | 3 --- hw/i386/x86-iommu-stub.c | 5 ----- hw/i386/x86-iommu.c | 5 ----- 6 files changed, 9 insertions(+), 38 deletions(-) -- 2.33.0 Reviewed-by: Eric Auger Reviewed-by: Igor Mammedov diff --git a/include/hw/i386/x86-iommu.h b/include/hw/i386/x86-iommu.h index 9de92d33a1..5ba0c056d6 100644 --- a/include/hw/i386/x86-iommu.h +++ b/include/hw/i386/x86-iommu.h @@ -33,12 +33,6 @@ OBJECT_DECLARE_TYPE(X86IOMMUState, X86IOMMUClass, X86_IOMMU_DEVICE) typedef struct X86IOMMUIrq X86IOMMUIrq; typedef struct X86IOMMU_MSIMessage X86IOMMU_MSIMessage; -typedef enum IommuType { - TYPE_INTEL, - TYPE_AMD, - TYPE_NONE -} IommuType; - struct X86IOMMUClass { SysBusDeviceClass parent; /* Intel/AMD specific realize() hook */ @@ -71,7 +65,6 @@ struct X86IOMMUState { OnOffAuto intr_supported; /* Whether vIOMMU supports IR */ bool dt_supported; /* Whether vIOMMU supports DT */ bool pt_supported; /* Whether vIOMMU supports pass-through */ - IommuType type; /* IOMMU type - AMD/Intel */ QLIST_HEAD(, IEC_Notifier) iec_notifiers; /* IEC notify list */ }; @@ -140,11 +133,6 @@ struct X86IOMMU_MSIMessage { */ X86IOMMUState *x86_iommu_get_default(void); -/* - * x86_iommu_get_type - get IOMMU type - */ -IommuType x86_iommu_get_type(void); - /** * x86_iommu_iec_register_notifier - register IEC (Interrupt Entry * Cache) notifiers diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 81418b7911..ab49e799ff 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2488,6 +2488,7 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine) PCMachineState *pcms = PC_MACHINE(machine); PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); X86MachineState *x86ms = X86_MACHINE(machine); + X86IOMMUState *iommu = x86_iommu_get_default(); GArray *table_offsets; unsigned facs, dsdt, rsdt, fadt; AcpiPmInfo pm; @@ -2604,17 +2605,14 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine) build_mcfg(tables_blob, tables->linker, &mcfg, x86ms->oem_id, x86ms->oem_table_id); } - if (x86_iommu_get_default()) { - IommuType IOMMUType = x86_iommu_get_type(); - if (IOMMUType == TYPE_AMD) { - acpi_add_table(table_offsets, tables_blob); - build_amd_iommu(tables_blob, tables->linker, x86ms->oem_id, - x86ms->oem_table_id); - } else if (IOMMUType == TYPE_INTEL) { - acpi_add_table(table_offsets, tables_blob); - build_dmar_q35(tables_blob, tables->linker, x86ms->oem_id, - x86ms->oem_table_id); - } + if (object_dynamic_cast(OBJECT(iommu), TYPE_AMD_IOMMU_DEVICE)) { + acpi_add_table(table_offsets, tables_blob); + build_amd_iommu(tables_blob, tables->linker, x86ms->oem_id, + x86ms->oem_table_id); + } else if (object_dynamic_cast(OBJECT(iommu), TYPE_INTEL_IOMMU_DEVICE)) { + acpi_add_table(table_offsets, tables_blob); + build_dmar_q35(tables_blob, tables->linker, x86ms->oem_id, + x86ms->oem_table_id); } if (machine->nvdimms_state->is_enabled) { nvdimm_build_acpi(table_offsets, tables_blob, tables->linker, diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 9242a0d3ed..91fe34ae58 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -1538,7 +1538,6 @@ static void amdvi_sysbus_realize(DeviceState *dev, Error **errp) { int ret = 0; AMDVIState *s = AMD_IOMMU_DEVICE(dev); - X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(dev); MachineState *ms = MACHINE(qdev_get_machine()); PCMachineState *pcms = PC_MACHINE(ms); X86MachineState *x86ms = X86_MACHINE(ms); @@ -1548,7 +1547,6 @@ static void amdvi_sysbus_realize(DeviceState *dev, Error **errp) amdvi_uint64_equal, g_free, g_free); /* This device should take care of IOMMU PCI properties */ - x86_iommu->type = TYPE_AMD; if (!qdev_realize(DEVICE(&s->pci), &bus->qbus, errp)) { return; } diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 75f075547f..c27b20090e 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -3806,9 +3806,6 @@ static void vtd_realize(DeviceState *dev, Error **errp) X86MachineState *x86ms = X86_MACHINE(ms); PCIBus *bus = pcms->bus; IntelIOMMUState *s = INTEL_IOMMU_DEVICE(dev); - X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(dev); - - x86_iommu->type = TYPE_INTEL; if (!vtd_decide_config(s, errp)) { return; diff --git a/hw/i386/x86-iommu-stub.c b/hw/i386/x86-iommu-stub.c index c5ba077f9d..781b5ff922 100644 --- a/hw/i386/x86-iommu-stub.c +++ b/hw/i386/x86-iommu-stub.c @@ -36,8 +36,3 @@ bool x86_iommu_ir_supported(X86IOMMUState *s) { return false; } - -IommuType x86_iommu_get_type(void) -{ - abort(); -} diff --git a/hw/i386/x86-iommu.c b/hw/i386/x86-iommu.c index 86ad03972e..dc968c7a53 100644 --- a/hw/i386/x86-iommu.c +++ b/hw/i386/x86-iommu.c @@ -98,11 +98,6 @@ X86IOMMUState *x86_iommu_get_default(void) return x86_iommu_default; } -IommuType x86_iommu_get_type(void) -{ - return x86_iommu_default->type; -} - static void x86_iommu_realize(DeviceState *dev, Error **errp) { X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(dev); From patchwork Wed Oct 20 17:27:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 516026 Delivered-To: patch@linaro.org Received: by 2002:ac0:cd8c:0:0:0:0:0 with SMTP id d12csp2028364imp; Wed, 20 Oct 2021 10:37:59 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx1pABmV6yiOQ/y45FBxERTMzXlvXWK+v0OZ1hDzKx8xNXHvpvyEB10IvZB5OkxpcBDRrb8 X-Received: by 2002:a67:d907:: with SMTP id t7mr328694vsj.58.1634751479566; Wed, 20 Oct 2021 10:37:59 -0700 (PDT) ARC-Seal: i=1; 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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id n7sm2662270wrp.17.2021.10.20.10.34.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Oct 2021 10:34:59 -0700 (PDT) From: Jean-Philippe Brucker To: mst@redhat.com, imammedo@redhat.com, peter.maydell@linaro.org Subject: [PATCH v5 03/12] hw/i386/pc: Move IOMMU singleton into PCMachineState Date: Wed, 20 Oct 2021 18:27:37 +0100 Message-Id: <20211020172745.620101-4-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211020172745.620101-1-jean-philippe@linaro.org> References: <20211020172745.620101-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=jean-philippe@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker , ehabkost@redhat.com, eric.auger@redhat.com, jasowang@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, peterx@redhat.com, shannon.zhaosl@gmail.com, qemu-arm@nongnu.org, ani@anisinha.ca, pbonzini@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We're about to support a third vIOMMU for x86, virtio-iommu which doesn't inherit X86IOMMUState. Move the IOMMU singleton into PCMachineState, so it can be shared between all three vIOMMUs. The x86_iommu_get_default() helper is still needed by KVM and IOAPIC to fetch the default IRQ-remapping IOMMU. Since virtio-iommu doesn't support IRQ remapping, this interface doesn't need to change for the moment. We could later replace X86IOMMUState with an "IRQ remapping IOMMU" interface if necessary. Signed-off-by: Jean-Philippe Brucker --- include/hw/i386/pc.h | 1 + hw/i386/pc.c | 12 +++++++++++- hw/i386/x86-iommu.c | 26 ++++++++------------------ 3 files changed, 20 insertions(+), 19 deletions(-) -- 2.33.0 Reviewed-by: Eric Auger Reviewed-by: Igor Mammedov diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 11426e26dc..b72e5bf9d1 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -35,6 +35,7 @@ typedef struct PCMachineState { I2CBus *smbus; PFlashCFI01 *flash[2]; ISADevice *pcspk; + DeviceState *iommu; /* Configuration options: */ uint64_t max_ram_below_4g; diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 54e4c00dce..fcbf328e8d 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1330,6 +1330,15 @@ static void pc_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev, } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { pc_virtio_md_pci_pre_plug(hotplug_dev, dev, errp); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_X86_IOMMU_DEVICE)) { + PCMachineState *pcms = PC_MACHINE(hotplug_dev); + + if (pcms->iommu) { + error_setg(errp, "QEMU does not support multiple vIOMMUs " + "for x86 yet."); + return; + } + pcms->iommu = dev; } } @@ -1384,7 +1393,8 @@ static HotplugHandler *pc_get_hotplug_handler(MachineState *machine, if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) || object_dynamic_cast(OBJECT(dev), TYPE_CPU) || object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || - object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { + object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI) || + object_dynamic_cast(OBJECT(dev), TYPE_X86_IOMMU_DEVICE)) { return HOTPLUG_HANDLER(machine); } diff --git a/hw/i386/x86-iommu.c b/hw/i386/x86-iommu.c index dc968c7a53..01d11325a6 100644 --- a/hw/i386/x86-iommu.c +++ b/hw/i386/x86-iommu.c @@ -77,25 +77,17 @@ void x86_iommu_irq_to_msi_message(X86IOMMUIrq *irq, MSIMessage *msg_out) msg_out->data = msg.msi_data; } -/* Default X86 IOMMU device */ -static X86IOMMUState *x86_iommu_default = NULL; - -static void x86_iommu_set_default(X86IOMMUState *x86_iommu) +X86IOMMUState *x86_iommu_get_default(void) { - assert(x86_iommu); + MachineState *ms = MACHINE(qdev_get_machine()); + PCMachineState *pcms = + PC_MACHINE(object_dynamic_cast(OBJECT(ms), TYPE_PC_MACHINE)); - if (x86_iommu_default) { - error_report("QEMU does not support multiple vIOMMUs " - "for x86 yet."); - exit(1); + if (pcms && + object_dynamic_cast(OBJECT(pcms->iommu), TYPE_X86_IOMMU_DEVICE)) { + return X86_IOMMU_DEVICE(pcms->iommu); } - - x86_iommu_default = x86_iommu; -} - -X86IOMMUState *x86_iommu_get_default(void) -{ - return x86_iommu_default; + return NULL; } static void x86_iommu_realize(DeviceState *dev, Error **errp) @@ -131,8 +123,6 @@ static void x86_iommu_realize(DeviceState *dev, Error **errp) if (x86_class->realize) { x86_class->realize(dev, errp); } - - x86_iommu_set_default(X86_IOMMU_DEVICE(dev)); } static Property x86_iommu_properties[] = { From patchwork Wed Oct 20 17:27:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 516027 Delivered-To: patch@linaro.org Received: by 2002:ac0:cd8c:0:0:0:0:0 with SMTP id d12csp2031568imp; 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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id n7sm2662270wrp.17.2021.10.20.10.35.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Oct 2021 10:35:00 -0700 (PDT) From: Jean-Philippe Brucker To: mst@redhat.com, imammedo@redhat.com, peter.maydell@linaro.org Subject: [PATCH v5 04/12] hw/i386/pc: Allow instantiating a virtio-iommu device Date: Wed, 20 Oct 2021 18:27:38 +0100 Message-Id: <20211020172745.620101-5-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211020172745.620101-1-jean-philippe@linaro.org> References: <20211020172745.620101-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=jean-philippe@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker , ehabkost@redhat.com, eric.auger@redhat.com, jasowang@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, peterx@redhat.com, shannon.zhaosl@gmail.com, qemu-arm@nongnu.org, ani@anisinha.ca, pbonzini@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Allow instantiating a virtio-iommu device by adding an ACPI Virtual I/O Translation table (VIOT), which describes the relation between the virtio-iommu and the endpoints it manages. Add a hotplug handler for virtio-iommu on x86 and set the necessary reserved region property. On x86, the [0xfee00000, 0xfeefffff] DMA region is reserved for MSIs. DMA transactions to this range either trigger IRQ remapping in the IOMMU or bypasses IOMMU translation. Although virtio-iommu does not support IRQ remapping it must be informed of the reserved region so that it can forward DMA transactions targeting this region. Reviewed-by: Eric Auger Tested-by: Eric Auger Signed-off-by: Jean-Philippe Brucker --- hw/i386/acpi-build.c | 10 +++++++++- hw/i386/pc.c | 16 +++++++++++++++- hw/i386/Kconfig | 1 + 3 files changed, 25 insertions(+), 2 deletions(-) -- 2.33.0 Reviewed-by: Igor Mammedov diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index ab49e799ff..3ca6cc8118 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -68,9 +68,11 @@ #include "qom/qom-qobject.h" #include "hw/i386/amd_iommu.h" #include "hw/i386/intel_iommu.h" +#include "hw/virtio/virtio-iommu.h" #include "hw/acpi/ipmi.h" #include "hw/acpi/hmat.h" +#include "hw/acpi/viot.h" /* These are used to size the ACPI tables for -M pc-i440fx-1.7 and * -M pc-i440fx-2.0. Even if the actual amount of AML generated grows @@ -2488,7 +2490,7 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine) PCMachineState *pcms = PC_MACHINE(machine); PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); X86MachineState *x86ms = X86_MACHINE(machine); - X86IOMMUState *iommu = x86_iommu_get_default(); + DeviceState *iommu = pcms->iommu; GArray *table_offsets; unsigned facs, dsdt, rsdt, fadt; AcpiPmInfo pm; @@ -2613,6 +2615,12 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine) acpi_add_table(table_offsets, tables_blob); build_dmar_q35(tables_blob, tables->linker, x86ms->oem_id, x86ms->oem_table_id); + } else if (object_dynamic_cast(OBJECT(iommu), TYPE_VIRTIO_IOMMU_PCI)) { + PCIDevice *pdev = PCI_DEVICE(iommu); + + acpi_add_table(table_offsets, tables_blob); + build_viot(machine, tables_blob, tables->linker, pci_get_bdf(pdev), + x86ms->oem_id, x86ms->oem_table_id); } if (machine->nvdimms_state->is_enabled) { nvdimm_build_acpi(table_offsets, tables_blob, tables->linker, diff --git a/hw/i386/pc.c b/hw/i386/pc.c index fcbf328e8d..f47f7866c7 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -83,6 +83,7 @@ #include "hw/i386/intel_iommu.h" #include "hw/net/ne2000-isa.h" #include "standard-headers/asm-x86/bootparam.h" +#include "hw/virtio/virtio-iommu.h" #include "hw/virtio/virtio-pmem-pci.h" #include "hw/virtio/virtio-mem-pci.h" #include "hw/mem/memory-device.h" @@ -1330,7 +1331,19 @@ static void pc_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev, } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { pc_virtio_md_pci_pre_plug(hotplug_dev, dev, errp); - } else if (object_dynamic_cast(OBJECT(dev), TYPE_X86_IOMMU_DEVICE)) { + } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { + /* Declare the APIC range as the reserved MSI region */ + char *resv_prop_str = g_strdup_printf("0xfee00000:0xfeefffff:%d", + VIRTIO_IOMMU_RESV_MEM_T_MSI); + + object_property_set_uint(OBJECT(dev), "len-reserved-regions", 1, errp); + object_property_set_str(OBJECT(dev), "reserved-regions[0]", + resv_prop_str, errp); + g_free(resv_prop_str); + } + + if (object_dynamic_cast(OBJECT(dev), TYPE_X86_IOMMU_DEVICE) || + object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { PCMachineState *pcms = PC_MACHINE(hotplug_dev); if (pcms->iommu) { @@ -1394,6 +1407,7 @@ static HotplugHandler *pc_get_hotplug_handler(MachineState *machine, object_dynamic_cast(OBJECT(dev), TYPE_CPU) || object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI) || + object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI) || object_dynamic_cast(OBJECT(dev), TYPE_X86_IOMMU_DEVICE)) { return HOTPLUG_HANDLER(machine); } diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig index 962d2c981b..d22ac4a4b9 100644 --- a/hw/i386/Kconfig +++ b/hw/i386/Kconfig @@ -59,6 +59,7 @@ config PC_ACPI select ACPI_X86 select ACPI_CPU_HOTPLUG select ACPI_MEMORY_HOTPLUG + select ACPI_VIOT select SMBUS_EEPROM select PFLASH_CFI01 depends on ACPI_SMBUS From patchwork Wed Oct 20 17:27:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 516029 Delivered-To: patch@linaro.org Received: by 2002:ac0:cd8c:0:0:0:0:0 with SMTP id d12csp2032548imp; Wed, 20 Oct 2021 10:42:48 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw+G5tizFU/KtLnsOtYB//Rsgevhq40xtC9j2InH01Vbf0AeghdziMhXNvpGOX+WI/m0Bky X-Received: by 2002:a67:e117:: with SMTP id d23mr351405vsl.13.1634751768807; Wed, 20 Oct 2021 10:42:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634751768; cv=none; d=google.com; s=arc-20160816; b=h+nVhZOKVs1Dm0ZQRcJs9xxmFUXl+M3hufLAUQaAfdKLkIPCgDOm474jvraO5k9ONB YTZkYErYDX+1CnFAi8en8CkL6CgEVUhqi9wvBIcQgmiHKQwBEQMXYzlQshUStn6kYIdw 1Dt4h69aiGBU0ec5zK24wpSB4J8ErLPJsedjcNzbSbaCfDAWrz5V7LwSB4f3ikQbWmQw wHZKr61xC/FSyFxLnLNOeCaug21Vm+0fZ+4thfWoi9lMMqU7gnW/a2dG5cOmz4IpTDxE HdnD+tfDp7fXqH+iAJBooQAKCKttN/PVt9Ww38S3ZFJZrYWkL0gkgb4HVo9M+Rf6E0Oi IxvQ== ARC-Message-Signature: i=1; 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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id n7sm2662270wrp.17.2021.10.20.10.35.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Oct 2021 10:35:01 -0700 (PDT) From: Jean-Philippe Brucker To: mst@redhat.com, imammedo@redhat.com, peter.maydell@linaro.org Subject: [PATCH v5 05/12] hw/arm/virt-acpi-build: Add VIOT table for virtio-iommu Date: Wed, 20 Oct 2021 18:27:39 +0100 Message-Id: <20211020172745.620101-6-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211020172745.620101-1-jean-philippe@linaro.org> References: <20211020172745.620101-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=jean-philippe@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker , ehabkost@redhat.com, eric.auger@redhat.com, jasowang@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, peterx@redhat.com, shannon.zhaosl@gmail.com, qemu-arm@nongnu.org, ani@anisinha.ca, pbonzini@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" When a virtio-iommu is instantiated, describe it using the ACPI VIOT table. Reviewed-by: Eric Auger Signed-off-by: Jean-Philippe Brucker Acked-by: Igor Mammedov --- hw/arm/virt-acpi-build.c | 7 +++++++ hw/arm/Kconfig | 1 + 2 files changed, 8 insertions(+) -- 2.33.0 diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 6cec97352b..e26639e1e1 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -55,6 +55,7 @@ #include "kvm_arm.h" #include "migration/vmstate.h" #include "hw/acpi/ghes.h" +#include "hw/acpi/viot.h" #define ARM_SPI_BASE 32 @@ -934,6 +935,12 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTables *tables) } #endif + if (vms->iommu == VIRT_IOMMU_VIRTIO) { + acpi_add_table(table_offsets, tables_blob); + build_viot(ms, tables_blob, tables->linker, vms->virtio_iommu_bdf, + vms->oem_id, vms->oem_table_id); + } + /* XSDT is pointed to by RSDP */ xsdt = tables_blob->len; build_xsdt(tables_blob, tables->linker, table_offsets, vms->oem_id, diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 2d37d29f02..e652590943 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -27,6 +27,7 @@ config ARM_VIRT select DIMM select ACPI_HW_REDUCED select ACPI_APEI + select ACPI_VIOT config CHEETAH bool From patchwork Wed Oct 20 17:27:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 516024 Delivered-To: patch@linaro.org Received: by 2002:ac0:cd8c:0:0:0:0:0 with SMTP id d12csp2027387imp; Wed, 20 Oct 2021 10:36:48 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyAd2Nw+bkaJw21wUR+m70sqZr7LCGlLvqPIP83/r68VSq9dqmB7xaYI1eh3mva9CujTSiB X-Received: by 2002:ab0:3d09:: with SMTP id f9mr715648uax.135.1634751408432; Wed, 20 Oct 2021 10:36:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634751408; cv=none; d=google.com; s=arc-20160816; b=ov6AUrIEqn7OHM6XQNjzOB+SjynZ3Uc/go6NYdqVpZNf+9C5KJfInRmcPtGW7TnTDh irFSCzS0HLfjkJOZsXR6i3M5pZV8JrZ+yrMEMWFBOyD9is9twqfuB1m0JAo1cHxUzdOt LqkSE9l7oBio6b6vixuNnDV30V8VJXOxUP4vRMsRZ3MOJNfnt9Kvka8pEj52bGCG7i6y E5D5z/F0qYlxmZFJ5xQhSu4JP6LGz8FnAdVkKs4343NY26JVMEcv9iKo01LRZMLNGacJ 1rh78tDYFXAb4FCK7Ma8T5A9jZOAllDjHDOAuNTgeiVXnIevMOd4r1f0dnii/aqAPPAO mrzg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=JOvNgK26X/wymWFWaeD3t7rim5VIlCPCs1/Ursd+4V0=; b=bqeRtVYirUzI7ElQ4aQ9H1sadbrIIQKjj0mctHoZWys0RXv2BppOk08bwaf58iGZVZ jj14aWqzISirx1habpqwVtzsmz35QVyj/mgXteIUocZ3+PQXfP7EfWwXGCANvQd6JfOP MzHAol1KLTrp2ORfgwxJk/3m3+CzlhrJ+rN505elPntFdY4HtXHKsel/5D0p10KeuPvi v9h2CfsqO4lthWRpNDLsIvD9kSMXqcWfK+RusXuWZK36e/xSYbXs3/kuuKxrlvEn/Y67 fw4nx/ajzmzTv7pryQiSPwDrwCTNw4FHbbnUI/0b3CkNxYJ09ClGOiFjarEF8qkGbdHP EFFA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=qwjl8s3o; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id n7sm2662270wrp.17.2021.10.20.10.35.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Oct 2021 10:35:03 -0700 (PDT) From: Jean-Philippe Brucker To: mst@redhat.com, imammedo@redhat.com, peter.maydell@linaro.org Subject: [PATCH v5 06/12] hw/arm/virt: Remove device tree restriction for virtio-iommu Date: Wed, 20 Oct 2021 18:27:40 +0100 Message-Id: <20211020172745.620101-7-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211020172745.620101-1-jean-philippe@linaro.org> References: <20211020172745.620101-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=jean-philippe@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker , ehabkost@redhat.com, eric.auger@redhat.com, jasowang@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, peterx@redhat.com, shannon.zhaosl@gmail.com, qemu-arm@nongnu.org, ani@anisinha.ca, pbonzini@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" virtio-iommu is now supported with ACPI VIOT as well as device tree. Remove the restriction that prevents from instantiating a virtio-iommu device under ACPI. Reviewed-by: Eric Auger Signed-off-by: Jean-Philippe Brucker Acked-by: Igor Mammedov --- hw/arm/virt.c | 10 ++-------- hw/virtio/virtio-iommu-pci.c | 12 ++---------- 2 files changed, 4 insertions(+), 18 deletions(-) -- 2.33.0 diff --git a/hw/arm/virt.c b/hw/arm/virt.c index f7f456bf58..3da7a86e37 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2561,16 +2561,10 @@ static HotplugHandler *virt_machine_get_hotplug_handler(MachineState *machine, MachineClass *mc = MACHINE_GET_CLASS(machine); if (device_is_dynamic_sysbus(mc, dev) || - (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM))) { + object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) || + object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { return HOTPLUG_HANDLER(machine); } - if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { - VirtMachineState *vms = VIRT_MACHINE(machine); - - if (!vms->bootinfo.firmware_loaded || !virt_is_acpi_enabled(vms)) { - return HOTPLUG_HANDLER(machine); - } - } return NULL; } diff --git a/hw/virtio/virtio-iommu-pci.c b/hw/virtio/virtio-iommu-pci.c index 770c286be7..5c0b87316a 100644 --- a/hw/virtio/virtio-iommu-pci.c +++ b/hw/virtio/virtio-iommu-pci.c @@ -48,16 +48,8 @@ static void virtio_iommu_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) VirtIOIOMMU *s = VIRTIO_IOMMU(vdev); if (!qdev_get_machine_hotplug_handler(DEVICE(vpci_dev))) { - MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine()); - - error_setg(errp, - "%s machine fails to create iommu-map device tree bindings", - mc->name); - error_append_hint(errp, - "Check your machine implements a hotplug handler " - "for the virtio-iommu-pci device\n"); - error_append_hint(errp, "Check the guest is booted without FW or with " - "-no-acpi\n"); + error_setg(errp, "Check your machine implements a hotplug handler " + "for the virtio-iommu-pci device"); return; } for (int i = 0; i < s->nb_reserved_regions; i++) { From patchwork Wed Oct 20 17:27:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 516033 Delivered-To: patch@linaro.org Received: by 2002:ac0:cd8c:0:0:0:0:0 with SMTP id d12csp2040478imp; Wed, 20 Oct 2021 10:51:31 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyNoa/0SgnMLp4BoKoD+G3LgwPbIR2sdMYVk4qevghALuFmt+X5YSUM0NIJi1cddgIwyNSV X-Received: by 2002:ab0:655a:: with SMTP id x26mr824173uap.133.1634752291600; Wed, 20 Oct 2021 10:51:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634752291; cv=none; d=google.com; s=arc-20160816; b=nSpQiy9B5VsqByTDO9IQRioEisRqtDqstgCkyVWGTq2rd40pclzGSYUuGFLgniYrQb MuVREFhzBc5lumHSUz/v2TK10y1m3FONGPAz+TlruFUyx3J4gkiF9gxxRy8NRAd6wqaV mB9OtlKxTA7GN8EyImdIDHYVDPBTfHfOihOB4I0i/bWpqxI8ETFNHUx6Ng53UzoD6uLY /DQGb+u1titCW40Eqa0cvuRjGR+dN+N3bL9MJ9ErJmu9cj6OOwl4Q1aSQySzvhVd3t1M gexCoeSJ0WpeijecLK7DF67nI+p3RC1ZVQlTHE7LBMVqQW+0VDzKCaz+I2DGxEhXJAc/ wP9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=c2ZO3QF7aKiu/qtLjz0/gkgshbB0NhJBsLRiXAH1moU=; b=gAQlX6SA/HVHN/xaq4pRkb3aCzFyf7est80I2S44tO/E+FyE4T8UjP4ehu9/CIA0Vs Wdh7WdkLCW5LLGWQGJJURMgIyhwbThUY5apzz1M1/Scp27ubGuz/TgYZqgbr4SL7K6vw GLe20hWPmnogYf8Y5bRiK1yGTUMOz/Ohzt81e+tStZ51mY32x85EVNy1A2LUDWeoUwtT ReWTkz/a5sys9eGStpv+iiR7rQnusooPqL6SSfRorhKubz3P9woL87yt9Aux5RDYK8zA U2ZvAVrfQ8mJv0mJKiiQPJDUZU1Zem0WEPXH6pvp5fT3yNbUUfr//y/E8D3rvVgD0v75 CrDQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=F5LghO36; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id n7sm2662270wrp.17.2021.10.20.10.35.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Oct 2021 10:35:04 -0700 (PDT) From: Jean-Philippe Brucker To: mst@redhat.com, imammedo@redhat.com, peter.maydell@linaro.org Subject: [PATCH v5 07/12] hw/arm/virt: Reject instantiation of multiple IOMMUs Date: Wed, 20 Oct 2021 18:27:41 +0100 Message-Id: <20211020172745.620101-8-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211020172745.620101-1-jean-philippe@linaro.org> References: <20211020172745.620101-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=jean-philippe@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker , ehabkost@redhat.com, eric.auger@redhat.com, jasowang@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, peterx@redhat.com, shannon.zhaosl@gmail.com, qemu-arm@nongnu.org, ani@anisinha.ca, pbonzini@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We do not support instantiating multiple IOMMUs. Before adding a virtio-iommu, check that no other IOMMU is present. This will detect both "iommu=smmuv3" machine parameter and another virtio-iommu instance. Fixes: 70e89132c9 ("hw/arm/virt: Add the virtio-iommu device tree mappings") Reviewed-by: Eric Auger Reviewed-by: Igor Mammedov Signed-off-by: Jean-Philippe Brucker Reviewed-by: Igor Mammedov --- hw/arm/virt.c | 5 +++++ 1 file changed, 5 insertions(+) -- 2.33.0 diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 3da7a86e37..25db8d4262 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2441,6 +2441,11 @@ static void virt_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev, hwaddr db_start = 0, db_end = 0; char *resv_prop_str; + if (vms->iommu != VIRT_IOMMU_NONE) { + error_setg(errp, "virt machine does not support multiple IOMMUs"); + return; + } + switch (vms->msi_controller) { case VIRT_MSI_CTRL_NONE: return; From patchwork Wed Oct 20 17:27:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 516028 Delivered-To: patch@linaro.org Received: by 2002:ac0:cd8c:0:0:0:0:0 with SMTP id d12csp2032444imp; Wed, 20 Oct 2021 10:42:40 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzQlryHd6+eL1lLpfqZhn8X490/cfOfh4zHZ0MOLGj09216lzhqOgy30pWp64Fab8LBztyD X-Received: by 2002:a67:ec55:: with SMTP id z21mr486460vso.29.1634751759978; Wed, 20 Oct 2021 10:42:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634751759; cv=none; d=google.com; s=arc-20160816; b=oS42evr+uHFApQgLW01aA10A3sgjDGNp9mLXaXNg3JnnaFbx+UuqOiB7HsxjIRaa4/ 9231NWo7iISwpbhrtNENNQXLcKl9X24ZrjYXkIQe5UMJIV19kOeC/vxrcutshcemf0ei Ywj0toabfq8U0HrRk4X/uXmaY0riUX1PIKNaYllU7MyHXXEf3fzw4SzwscVYa3j/F9u2 Q7yLoIKONjsOSp6uNdYVz6oSr4goK7jS9dRiBFiSOzHoMmmHne+QgfC6BKI1rLnIlzzF jVxjfC8uMQBuL/psJU6Zf43SsZlDhFOlghdwzuKadE6oN9VJeuJXIDsaoDoKRwmvR224 gKFg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=MQaHeRwjBXtlwH+HWJdlO988bBQFl1PSkeW02oBI2yE=; b=n1vJNmq6FXMU+Z+ywNmpKC5E6nQzAlHGsWNRzCBpCNDeFbeKtKXKFXlXuM1tfDtC/F q0jGpDifT5HzbSSU228O7oxWYPgQCg1B/Du625He4aHSh7jtKzDkeuOOqfIneqpOx4sk r/JhXL5W+WoPMTqh/rfYpvZvUHXnRkiAvxEvgjLfEZfF7cSTd1dk2ht0lER3JFN4hNww Ma3MXbwMYdeH0RxxflLJdPWxa/wZZL30soYS1LbxMIFZ9HgCp0ZUEbciDn+KObkbqg1j K6yndAtbk0Xblk1BC4PBQII2RIkgsZ0GlUITJndLLg0u6mUQrCFfsE+6E5YhqFa7p6YB nFnw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=cnvSmzp5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id n7sm2662270wrp.17.2021.10.20.10.35.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Oct 2021 10:35:05 -0700 (PDT) From: Jean-Philippe Brucker To: mst@redhat.com, imammedo@redhat.com, peter.maydell@linaro.org Subject: [PATCH v5 08/12] hw/arm/virt: Use object_property_set instead of qdev_prop_set Date: Wed, 20 Oct 2021 18:27:42 +0100 Message-Id: <20211020172745.620101-9-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211020172745.620101-1-jean-philippe@linaro.org> References: <20211020172745.620101-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=jean-philippe@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker , ehabkost@redhat.com, eric.auger@redhat.com, jasowang@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, peterx@redhat.com, shannon.zhaosl@gmail.com, qemu-arm@nongnu.org, ani@anisinha.ca, pbonzini@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" To propagate errors to the caller of the pre_plug callback, use the object_poperty_set*() functions directly instead of the qdev_prop_set*() helpers. Suggested-by: Igor Mammedov Reviewed-by: Eric Auger Reviewed-by: Igor Mammedov Signed-off-by: Jean-Philippe Brucker --- hw/arm/virt.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) -- 2.33.0 diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 25db8d4262..7a061ab401 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2465,8 +2465,9 @@ static void virt_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev, db_start, db_end, VIRTIO_IOMMU_RESV_MEM_T_MSI); - qdev_prop_set_uint32(dev, "len-reserved-regions", 1); - qdev_prop_set_string(dev, "reserved-regions[0]", resv_prop_str); + object_property_set_uint(OBJECT(dev), "len-reserved-regions", 1, errp); + object_property_set_str(OBJECT(dev), "reserved-regions[0]", + resv_prop_str, errp); g_free(resv_prop_str); } } From patchwork Wed Oct 20 17:27:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 516030 Delivered-To: patch@linaro.org Received: by 2002:ac0:cd8c:0:0:0:0:0 with SMTP id d12csp2035660imp; Wed, 20 Oct 2021 10:46:23 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy+5YlelMD2jz2UQ/QNzRJVkU3kJncUcD13SJ0CuCWf2xk6j1RiKcFehD2BqGEdBiHotnXV X-Received: by 2002:a05:6902:120a:: with SMTP id s10mr571728ybu.224.1634751983108; Wed, 20 Oct 2021 10:46:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634751983; cv=none; d=google.com; s=arc-20160816; b=pue0BaFPeeNM8r1lr9UtNZ9Qul7Cven9UjTtn/+jXgxMKk4YxApwI0Q4D8PrPMXY7q XkeTKt2Fmvj2SNXvfSU5o8gTV+0dJZlHRdR2InnsAmfWEdyLf0Mjm8tvgIvQHV/0WviP JfiVNuHXA1Zdyq9SdCBGzv501Pts9sOr87PB5SSeX/CLrducmxqv3XJzMKhARW6C8TbA sry8GInjcc3jMdV3VHo9keIBEQ+TUT/7IphbzvbhcMBLh/3vGDQsKE02pM3wVEVPwSPH UekNaq2IUhlVAe33a4fHjCufepd6AJTruDQ9GKRleJ9bkqpK5vn8C5Rl+XbcYdmqRib0 Eh8g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=tUzjz0DaQh9V/E1AtSG5a0bXdcLZdXoyXVjvZ0SiJck=; b=LtYaMD/hkquodD1FFeerg0ouwlHdjELb2vkAID+ttHdtvhr0xB7LZJ3F8qlltBLZ2n 8K+3zISLQsQLn86yyZ7gopYfNxb1yPC0U++4ahSuoHb5GGK3Vw1f9Dfd7wGlznyfKioM OYhvL4bItTwnAh16t2yhCU+e+xLpe+OthwzmuqWTMw8cEOnFF1QLmTKp6LMPgfOCZ7Pd VD4JEH5jw6r43yOCYVjBr23NxOQfr4Wr22/5IPYFq2F2JoNKBxcoIX4PBnV7cGlrjalw 0BNw8A8pcrf2w0nzzFzmK+jT47mJ0H7rJtYh8xttm8f2u7sUMof+s6feuiquKf/H/aM+ thUA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=ZQHFOc3l; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id n7sm2662270wrp.17.2021.10.20.10.35.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Oct 2021 10:35:07 -0700 (PDT) From: Jean-Philippe Brucker To: mst@redhat.com, imammedo@redhat.com, peter.maydell@linaro.org Subject: [PATCH v5 09/12] tests/acpi: allow updates of VIOT expected data files Date: Wed, 20 Oct 2021 18:27:43 +0100 Message-Id: <20211020172745.620101-10-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211020172745.620101-1-jean-philippe@linaro.org> References: <20211020172745.620101-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=jean-philippe@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker , ehabkost@redhat.com, eric.auger@redhat.com, jasowang@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, peterx@redhat.com, shannon.zhaosl@gmail.com, qemu-arm@nongnu.org, ani@anisinha.ca, pbonzini@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Create empty data files and allow updates for the upcoming VIOT tests. Signed-off-by: Jean-Philippe Brucker --- tests/qtest/bios-tables-test-allowed-diff.h | 3 +++ tests/data/acpi/q35/DSDT.viot | 0 tests/data/acpi/q35/VIOT.viot | 0 tests/data/acpi/virt/VIOT | 0 4 files changed, 3 insertions(+) create mode 100644 tests/data/acpi/q35/DSDT.viot create mode 100644 tests/data/acpi/q35/VIOT.viot create mode 100644 tests/data/acpi/virt/VIOT diff --git a/tests/data/acpi/q35/DSDT.viot b/tests/data/acpi/q35/DSDT.viot new file mode 100644 index 0000000000..e69de29bb2 diff --git a/tests/data/acpi/q35/VIOT.viot b/tests/data/acpi/q35/VIOT.viot new file mode 100644 index 0000000000..e69de29bb2 diff --git a/tests/data/acpi/virt/VIOT b/tests/data/acpi/virt/VIOT new file mode 100644 index 0000000000..e69de29bb2 -- 2.33.0 Reviewed-by: Eric Auger Acked-by: Igor Mammedov diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..29b5b1eabc 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,4 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/virt/VIOT", +"tests/data/acpi/q35/DSDT.viot", +"tests/data/acpi/q35/VIOT.viot", From patchwork Wed Oct 20 17:27:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 516032 Delivered-To: patch@linaro.org Received: by 2002:ac0:cd8c:0:0:0:0:0 with SMTP id d12csp2040089imp; Wed, 20 Oct 2021 10:51:09 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxQIoqflb9IOyp0I2UJDK9a1GNZjWEsOVHMPvyG70JWtOfp75PKMXmuCz8zzd49Bl2peTIk X-Received: by 2002:a67:e108:: with SMTP id d8mr934015vsl.7.1634752269395; Wed, 20 Oct 2021 10:51:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634752269; cv=none; d=google.com; s=arc-20160816; b=SgXzEmTy20CofskAJnkThjN6m5QcBCix6Afgk0aF/CiZH3KcLTbInScVhK8Dng0+AY fvjQzkJtS++QiNoTMJrFeI4RWQGkHy0HmPGTYHzezMK+xI7DhwdxPAT+AQ92WMDrci25 jNynsXHf7iXPEc8eB3vq432c5tpB4s9YXldkn5tHDFtXsEkKHGZSEjBaiOxejxwebp+Q EwKfsNvr8G6WKXQvY790UEyh6PhPEjBGgv3VEuFlfSlQzCXaJvXYaWw845CCGKj0vR2G 4RZ5q7Vz1VTJOyyn9Swwsm36T0743EMEvPoScVEmZNKAodFEtLpjUEnD+PeCU8RwQVVZ OPiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=b6FkINxR9TYPTnIwt4QFR5QO1CjWz4r+7L+WyL24pqY=; b=fQ6vc2XqJPW9VOwFlPZKQR3LosQ7e7czCf4FU12EVbPws9oBi9EynVXVblBgwA9o31 GXafhzBwLwc5N48DnmZVygkmrYTUnI3YITUyiqcN7RX3UazNL9/DUhH/3wP2zlu65ouO s4t8QOP8v+bo5/YxjRoc9NLfhAA7EoWb44f40YQmHn71h85OehTkpnDhe0qZ3IKwINkF krka9tErVtmpCupQvSwwf5Fs6li+fxYbEegYuG48L9GuKWzZxvM+fHuKOebeJijEdHZO yGkB06927xLz+Puegykt282DaHXfhY+5A6q6iyZOiug0UuWZdPThzwtgd1J1bRcF2ONz Yscw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=TUt58ZwL; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id n7sm2662270wrp.17.2021.10.20.10.35.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Oct 2021 10:35:08 -0700 (PDT) From: Jean-Philippe Brucker To: mst@redhat.com, imammedo@redhat.com, peter.maydell@linaro.org Subject: [PATCH v5 10/12] tests/acpi: add test cases for VIOT Date: Wed, 20 Oct 2021 18:27:44 +0100 Message-Id: <20211020172745.620101-11-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211020172745.620101-1-jean-philippe@linaro.org> References: <20211020172745.620101-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=jean-philippe@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker , ehabkost@redhat.com, eric.auger@redhat.com, jasowang@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, peterx@redhat.com, shannon.zhaosl@gmail.com, qemu-arm@nongnu.org, ani@anisinha.ca, pbonzini@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Add two test cases for VIOT, one on the q35 machine and the other on virt. To test complex topologies the q35 test has two PCIe buses that bypass the IOMMU (and are therefore not described by VIOT), and two buses that are translated by virtio-iommu. Reviewed-by: Eric Auger Reviewed-by: Igor Mammedov Signed-off-by: Jean-Philippe Brucker --- tests/qtest/bios-tables-test.c | 38 ++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) -- 2.33.0 diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c index 4f11d03055..599b155201 100644 --- a/tests/qtest/bios-tables-test.c +++ b/tests/qtest/bios-tables-test.c @@ -1403,6 +1403,42 @@ static void test_acpi_virt_tcg(void) free_test_data(&data); } +static void test_acpi_q35_viot(void) +{ + test_data data = { + .machine = MACHINE_Q35, + .variant = ".viot", + }; + + /* + * To keep things interesting, two buses bypass the IOMMU. + * VIOT should only describes the other two buses. + */ + test_acpi_one("-machine default_bus_bypass_iommu=on " + "-device virtio-iommu-pci " + "-device pxb-pcie,bus_nr=0x10,id=pcie.100,bus=pcie.0 " + "-device pxb-pcie,bus_nr=0x20,id=pcie.200,bus=pcie.0,bypass_iommu=on " + "-device pxb-pcie,bus_nr=0x30,id=pcie.300,bus=pcie.0", + &data); + free_test_data(&data); +} + +static void test_acpi_virt_viot(void) +{ + test_data data = { + .machine = "virt", + .uefi_fl1 = "pc-bios/edk2-aarch64-code.fd", + .uefi_fl2 = "pc-bios/edk2-arm-vars.fd", + .cd = "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2", + .ram_start = 0x40000000ULL, + .scan_len = 128ULL * 1024 * 1024, + }; + + test_acpi_one("-cpu cortex-a57 " + "-device virtio-iommu-pci", &data); + free_test_data(&data); +} + static void test_oem_fields(test_data *data) { int i; @@ -1567,12 +1603,14 @@ int main(int argc, char *argv[]) if (strcmp(arch, "x86_64") == 0) { qtest_add_func("acpi/microvm/pcie", test_acpi_microvm_pcie_tcg); } + qtest_add_func("acpi/q35/viot", test_acpi_q35_viot); } else if (strcmp(arch, "aarch64") == 0) { qtest_add_func("acpi/virt", test_acpi_virt_tcg); qtest_add_func("acpi/virt/numamem", test_acpi_virt_tcg_numamem); qtest_add_func("acpi/virt/memhp", test_acpi_virt_tcg_memhp); qtest_add_func("acpi/virt/pxb", test_acpi_virt_tcg_pxb); qtest_add_func("acpi/virt/oem-fields", test_acpi_oem_fields_virt); + qtest_add_func("acpi/virt/viot", test_acpi_virt_viot); } ret = g_test_run(); boot_sector_cleanup(disk); From patchwork Wed Oct 20 17:27:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 516034 Delivered-To: patch@linaro.org Received: by 2002:ac0:cd8c:0:0:0:0:0 with SMTP id d12csp2042130imp; Wed, 20 Oct 2021 10:53:31 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzt6RQEwrmaAH7OkDcTkGA+GZ6r0ZhItbr54JUzfD6VEUdpe1n/3nNcrsaUIt0P72uHv7bP X-Received: by 2002:a25:c8c7:: with SMTP id y190mr612520ybf.366.1634752411713; Wed, 20 Oct 2021 10:53:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1634752411; cv=none; d=google.com; s=arc-20160816; b=aPA1qSakwDP0Q32d86gu8UAslF+o9Mlb6Ea5CDY+0NHDCX4+E4TJbXbbtxZJxJwROK s4GhSQ5CW/satnu7EEjkezIqg9Oi2sOaRhrqLYkzOVTG/Io5iELG2qKfoEHCmmrTEjV/ nZGq5hSURmluoGh4HSYsuOEdK+yFa4ZZoIJ3IFKBODqnL5WCzek9F5uX46SO1Jq8w0Gd aDWC34MLcrpeBzBhq8vKV6xXY2sgZfdCilUfYA/objxOoOrBJTfIfeE5E6IshogHiS5b RZh/0aGc2GvfAqMNAtvZZzk2t59Q4XRHOpbisvoOKJVt1xRLIH8fa9TKYi3PgRZbFx4a DlYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=dozp0i//DXBHAKKI5F8x2p4gKun2eWFo2D6lVjmBtXQ=; b=SLFJcQi7i1DB4SqI/GCnQL3avX3aPek/5gwRcHt6dCscJRQ85Kp31UTypOvkSbZEkW dHEpcyLNg2kqjELjPVTSnZyusHmF9M6q3JLbeNFEXUjBRXBNk0eQEb6odMrMk67J+NzH PImcHY0l3KdRfBvZ87aEFR1uh74HuB1O0NCkQV8sxTBWZijHfV+E9jC5yQouWuihSXee tHgs8Re23xyvP2NxhQhXyALBPA9wCgcFDAZlY3ESoboIf8GWJBuSHUL3Ji+qJrShEuqe 97RXZSn5Zgu0fBZIxOPv2e7ctz/U9YJvMNz+CyecGemUjYR3jhapDWtAKdmY437QChKe k1oQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=DnI5xCZ5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id n7sm2662270wrp.17.2021.10.20.10.35.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Oct 2021 10:35:09 -0700 (PDT) From: Jean-Philippe Brucker To: mst@redhat.com, imammedo@redhat.com, peter.maydell@linaro.org Subject: [PATCH v5 11/12] tests/acpi: add expected blob for VIOT test on virt machine Date: Wed, 20 Oct 2021 18:27:45 +0100 Message-Id: <20211020172745.620101-12-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211020172745.620101-1-jean-philippe@linaro.org> References: <20211020172745.620101-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=jean-philippe@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker , ehabkost@redhat.com, eric.auger@redhat.com, jasowang@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, peterx@redhat.com, shannon.zhaosl@gmail.com, qemu-arm@nongnu.org, ani@anisinha.ca, pbonzini@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The VIOT blob contains the following: [000h 0000 4] Signature : "VIOT" [Virtual I/O Translation Table] [004h 0004 4] Table Length : 00000058 [008h 0008 1] Revision : 00 [009h 0009 1] Checksum : 66 [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 2] Node count : 0002 [026h 0038 2] Node offset : 0030 [028h 0040 8] Reserved : 0000000000000000 [030h 0048 1] Type : 03 [VirtIO-PCI IOMMU] [031h 0049 1] Reserved : 00 [032h 0050 2] Length : 0010 [034h 0052 2] PCI Segment : 0000 [036h 0054 2] PCI BDF number : 0008 [038h 0056 8] Reserved : 0000000000000000 [040h 0064 1] Type : 01 [PCI Range] [041h 0065 1] Reserved : 00 [042h 0066 2] Length : 0018 [044h 0068 4] Endpoint start : 00000000 [048h 0072 2] PCI Segment start : 0000 [04Ah 0074 2] PCI Segment end : 0000 [04Ch 0076 2] PCI BDF start : 0000 [04Eh 0078 2] PCI BDF end : 00FF [050h 0080 2] Output node : 0030 [052h 0082 6] Reserved : 000000000000 Acked-by: Ani Sinha Reviewed-by: Eric Auger Signed-off-by: Jean-Philippe Brucker --- tests/qtest/bios-tables-test-allowed-diff.h | 1 - tests/data/acpi/virt/VIOT | Bin 0 -> 88 bytes 2 files changed, 1 deletion(-) diff --git a/tests/data/acpi/virt/VIOT b/tests/data/acpi/virt/VIOT index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..921f40d88c28ba2171a4d664e119914335309e7d 100644 GIT binary patch literal 88 zcmWIZ^bd((0D?3pe`k+i1*eDrX9XZ&1PX!JAexE60Hgv8m>C3sGzXN&z`)2L0cSHX I{D-Rq0Q5fy0RR91 literal 0 HcmV?d00001 -- 2.33.0 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index 29b5b1eabc..fa213e4738 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,4 +1,3 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/virt/VIOT", "tests/data/acpi/q35/DSDT.viot", "tests/data/acpi/q35/VIOT.viot", From patchwork Wed Oct 20 17:27:46 2021 Content-Type: text/plain; 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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id n7sm2662270wrp.17.2021.10.20.10.35.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Oct 2021 10:35:10 -0700 (PDT) From: Jean-Philippe Brucker To: mst@redhat.com, imammedo@redhat.com, peter.maydell@linaro.org Subject: [PATCH v5 12/12] tests/acpi: add expected blobs for VIOT test on q35 machine Date: Wed, 20 Oct 2021 18:27:46 +0100 Message-Id: <20211020172745.620101-13-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211020172745.620101-1-jean-philippe@linaro.org> References: <20211020172745.620101-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=jean-philippe@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker , ehabkost@redhat.com, eric.auger@redhat.com, jasowang@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, peterx@redhat.com, shannon.zhaosl@gmail.com, qemu-arm@nongnu.org, ani@anisinha.ca, pbonzini@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Add expected blobs of the VIOT and DSDT table for the VIOT test on the q35 machine. Since the test instantiates a virtio device and two PCIe expander bridges, DSDT.viot has more blocks than the base DSDT. The VIOT table generated for the q35 test is: [000h 0000 4] Signature : "VIOT" [Virtual I/O Translation Table] [004h 0004 4] Table Length : 00000070 [008h 0008 1] Revision : 00 [009h 0009 1] Checksum : 3D [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 2] Node count : 0003 [026h 0038 2] Node offset : 0030 [028h 0040 8] Reserved : 0000000000000000 [030h 0048 1] Type : 03 [VirtIO-PCI IOMMU] [031h 0049 1] Reserved : 00 [032h 0050 2] Length : 0010 [034h 0052 2] PCI Segment : 0000 [036h 0054 2] PCI BDF number : 0010 [038h 0056 8] Reserved : 0000000000000000 [040h 0064 1] Type : 01 [PCI Range] [041h 0065 1] Reserved : 00 [042h 0066 2] Length : 0018 [044h 0068 4] Endpoint start : 00003000 [048h 0072 2] PCI Segment start : 0000 [04Ah 0074 2] PCI Segment end : 0000 [04Ch 0076 2] PCI BDF start : 3000 [04Eh 0078 2] PCI BDF end : 30FF [050h 0080 2] Output node : 0030 [052h 0082 6] Reserved : 000000000000 [058h 0088 1] Type : 01 [PCI Range] [059h 0089 1] Reserved : 00 [05Ah 0090 2] Length : 0018 [05Ch 0092 4] Endpoint start : 00001000 [060h 0096 2] PCI Segment start : 0000 [062h 0098 2] PCI Segment end : 0000 [064h 0100 2] PCI BDF start : 1000 [066h 0102 2] PCI BDF end : 10FF [068h 0104 2] Output node : 0030 [06Ah 0106 6] Reserved : 000000000000 And the DSDT diff is: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/q35/DSDT, Wed Oct 20 16:33:00 2021 + * Disassembly of /tmp/aml-4TWUB1, Wed Oct 20 16:16:49 2021 * * Original Table Header: * Signature "DSDT" - * Length 0x00002061 (8289) + * Length 0x000024B6 (9398) * Revision 0x01 **** 32-bit table (V1), no 64-bit math support - * Checksum 0xF9 + * Checksum 0xA6 * OEM ID "BOCHS " * OEM Table ID "BXPC " * OEM Revision 0x00000001 (1) @@ -3114,6 +3114,339 @@ } } + Scope (\_SB) + { + Device (PC30) + { + Name (_UID, 0x30) // _UID: Unique ID + Name (_BBN, 0x30) // _BBN: BIOS Bus Number + Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + CreateDWordField (Arg3, Zero, CDW1) + If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) + { + CreateDWordField (Arg3, 0x04, CDW2) + CreateDWordField (Arg3, 0x08, CDW3) + Local0 = CDW3 /* \_SB_.PC30._OSC.CDW3 */ + Local0 &= 0x1F + If ((Arg1 != One)) + { + CDW1 |= 0x08 + } + + If ((CDW3 != Local0)) + { + CDW1 |= 0x10 + } + + CDW3 = Local0 + } + Else + { + CDW1 |= 0x04 + } + + Return (Arg3) + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0030, // Range Minimum + 0x0030, // Range Maximum + 0x0000, // Translation Offset + 0x0001, // Length + ,, ) + }) + } + } + + Scope (\_SB) + { + Device (PC20) + { + Name (_UID, 0x20) // _UID: Unique ID + Name (_BBN, 0x20) // _BBN: BIOS Bus Number + Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + CreateDWordField (Arg3, Zero, CDW1) + If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) + { + CreateDWordField (Arg3, 0x04, CDW2) + CreateDWordField (Arg3, 0x08, CDW3) + Local0 = CDW3 /* \_SB_.PC20._OSC.CDW3 */ + Local0 &= 0x1F + If ((Arg1 != One)) + { + CDW1 |= 0x08 + } + + If ((CDW3 != Local0)) + { + CDW1 |= 0x10 + } + + CDW3 = Local0 + } + Else + { + CDW1 |= 0x04 + } + + Return (Arg3) + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0020, // Range Minimum + 0x0020, // Range Maximum + 0x0000, // Translation Offset + 0x0001, // Length + ,, ) + }) + } + } + + Scope (\_SB) + { + Device (PC10) + { + Name (_UID, 0x10) // _UID: Unique ID + Name (_BBN, 0x10) // _BBN: BIOS Bus Number + Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + CreateDWordField (Arg3, Zero, CDW1) + If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) + { + CreateDWordField (Arg3, 0x04, CDW2) + CreateDWordField (Arg3, 0x08, CDW3) + Local0 = CDW3 /* \_SB_.PC10._OSC.CDW3 */ + Local0 &= 0x1F + If ((Arg1 != One)) + { + CDW1 |= 0x08 + } + + If ((CDW3 != Local0)) + { + CDW1 |= 0x10 + } + + CDW3 = Local0 + } + Else + { + CDW1 |= 0x04 + } + + Return (Arg3) + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0010, // Range Minimum + 0x0010, // Range Maximum + 0x0000, // Translation Offset + 0x0001, // Length + ,, ) + }) + } + } + Scope (\_SB.PCI0) { Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings @@ -3121,9 +3454,9 @@ WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum - 0x00FF, // Range Maximum + 0x000F, // Range Maximum 0x0000, // Translation Offset - 0x0100, // Length + 0x0010, // Length ,, ) IO (Decode16, 0x0CF8, // Range Minimum @@ -3278,6 +3611,26 @@ } } + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + } + + Device (S18) + { + Name (_ADR, 0x00030000) // _ADR: Address + } + + Device (S20) + { + Name (_ADR, 0x00040000) // _ADR: Address + } + + Device (S28) + { + Name (_ADR, 0x00050000) // _ADR: Address + } + Method (PCNT, 0, NotSerialized) { } Reviewed-by: Eric Auger Signed-off-by: Jean-Philippe Brucker --- tests/qtest/bios-tables-test-allowed-diff.h | 2 -- tests/data/acpi/q35/DSDT.viot | Bin 0 -> 9398 bytes tests/data/acpi/q35/VIOT.viot | Bin 0 -> 112 bytes 3 files changed, 2 deletions(-) diff --git a/tests/data/acpi/q35/DSDT.viot b/tests/data/acpi/q35/DSDT.viot index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..20e5c87b6be3be9df70a8a74d82f68bb2c6a25cf 100644 GIT binary patch literal 9398 zcmeHNO>7&-8J*>iv|O&FB}G~OOGG$H|5C)1oWHhc5OS9yDTx$CQgH$r;8Idr*-4Q_ z5(9Az1F`}niVsB-#zBvCpcK8er(A2Gm-gmc1N78GFS!;)e6sq!nH_0{q=4wuOC(@- zzuEWZn>V|&Z#cVN(`$Y8BxA-O3af6pnJv6pceD627-Muyd#4h+!rD7tq0}*wk(klG zo#e;Z6wJ&|y~29Q`2Dv3x$nRGk#BSZw(*5?ccUA8u;*_u0$tw-EQ=1D;$){;=(KlT ztL|2EW~W^7?EC}EG&`<1ikh9g*I;I6z2dRV%6MnB>BjE7!Cde1e7_d&ZKtL!r(ON$ zrEllXzx?^-ck}mu`Hx@SdBchUuzkY4y%{<>}w(=~X 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zcmWIZ^baXu00LVle`k+i1*eDrX9XZ&1PX!JAex!M0Hgv8m>C3sGzdcgBZCA3T-xBj Q0Zb)W9Hva*zW_`e0M!8s0RR91 literal 0 HcmV?d00001 -- 2.33.0 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index fa213e4738..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,3 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/q35/DSDT.viot", -"tests/data/acpi/q35/VIOT.viot",