From patchwork Fri Dec 17 16:59:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 525177 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22CF7C433EF for ; Fri, 17 Dec 2021 16:59:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239500AbhLQQ72 (ORCPT ); Fri, 17 Dec 2021 11:59:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50990 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236035AbhLQQ7Z (ORCPT ); Fri, 17 Dec 2021 11:59:25 -0500 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [IPv6:2a00:1450:4864:20::434]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 13F40C061574; Fri, 17 Dec 2021 08:59:25 -0800 (PST) Received: by mail-wr1-x434.google.com with SMTP id s1so5308603wrg.1; Fri, 17 Dec 2021 08:59:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=n50XPIjlROmdpqTND1KrzUG6N3eU7uscwN5ADZRFYWE=; b=fgoapQ9eZodQi0HD7+mkYJNWsF5XplxwTuJJfJn6eaVjHkf6Ospz0OGLi5yAL9iFAD 9bqxz5kxiT4stXQoUM7Xoxxn0uSiMWcXJYoX4EDrskzF1HJKpWdTYJu4MIu63GAM7afX Rb/tsNut9CZQQHVIAVnnluJjieyP7laZFraaAPhqpb4IjfUU1hLT3VOOM33aMyBZjyNO EpaMfSbhz9kImUvUzM8NB2ZEpyTcFybRQNo2JseDC+/vl7i8S8hUKDrTpoDObyXoEARO vvwbZldmLeOd75GPxEOW33ryEwHBZ676VsqOR6eL4hzlNu5fQr0tql+3NV1TvtVCm2Qj /RXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=n50XPIjlROmdpqTND1KrzUG6N3eU7uscwN5ADZRFYWE=; b=zZgtFkkzmKcHXdQzy+Q2WKogSZgScpqIEDgkbMjGVwBd39w2xi/OHLIU0uwAtHmiTs G2VDuxFCmCLjej1xuVT8ja0VjgcKsz6N9vHIrMYia0WY92XtH0VCegO9Xz2sWu8syhx0 P7y7RbAakgRGYFB/XOK07uap1HAvAxZDYDAb1dMtdbQ6TlIVpFpE4tHMxOwUQvA6BclT 16dV4ej4MQKTCrSz69UitFFeX89NdXuxp4RsmNpVVedEt3R9MTOSgFA/ksUU2fR1L2pc Ly3jfu16T3kfpYHUX8tv8Sb7tYXuZOqcnUJVhhcNHdT8UpujKd7GUqvW3MQZ1YXSkDP8 mRfQ== X-Gm-Message-State: AOAM532l3u4QU3Lm+cDBNOJrO6dfrmwOFoLGGg5uSSg8R+nG/4XfE7pQ odw6Zbecv+CObMx9v5e0sFI= X-Google-Smtp-Source: ABdhPJzZDUEiZZB5XMPnHzCxrBYkIN2mtMwCwQFOvhjnWuSpuMksMJFVoORXs6O6eLpFJW1CdnalIA== X-Received: by 2002:a5d:604e:: with SMTP id j14mr3076097wrt.119.1639760363678; Fri, 17 Dec 2021 08:59:23 -0800 (PST) Received: from localhost ([193.209.96.43]) by smtp.gmail.com with ESMTPSA id a10sm12440291wmq.27.2021.12.17.08.59.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Dec 2021 08:59:23 -0800 (PST) From: Thierry Reding To: Krzysztof Kozlowski , Rob Herring Cc: Jon Hunter , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/5] dt-bindings: memory: Add Tegra210 memory controller bindings Date: Fri, 17 Dec 2021 17:59:16 +0100 Message-Id: <20211217165919.2700920-2-thierry.reding@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211217165919.2700920-1-thierry.reding@gmail.com> References: <20211217165919.2700920-1-thierry.reding@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Thierry Reding Document the bindings for the memory controller found on Tegra210 SoCs. Signed-off-by: Thierry Reding --- .../nvidia,tegra210-mc.yaml | 77 +++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-mc.yaml diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-mc.yaml new file mode 100644 index 000000000000..ef21c11052e3 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-mc.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra210-mc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra210 SoC Memory Controller + +maintainers: + - Thierry Reding + - Jon Hunter + +description: | + The NVIDIA Tegra210 SoC features a 64 bit memory controller that is split into two 32 bit + channels to support LPDDR3 and LPDDR4 with x16 subpartitions. The MC handles memory requests for + 34-bit virtual addresses from internal clients and arbitrates among them to allocate memory + bandwidth. + + Up to 8 GiB of physical memory can be supported. Security features such as encryption of traffic + to and from DRAM via general security apertures are available for video and other secure + applications. + +properties: + $nodename: + pattern: "^memory-controller@[0-9a-f]+$" + + compatible: + items: + - enum: + - nvidia,tegra210-mc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: module clock + + clock-names: + items: + - const: mc + + "#iommu-cells": + const: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - "#iommu-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + #include + #include + + mc: memory-controller@70019000 { + compatible = "nvidia,tegra210-mc"; + reg = <0x70019000 0x1000>; + interrupts = ; + clocks = <&tegra_car TEGRA210_CLK_MC>; + clock-names = "mc"; + + #iommu-cells = <1>; + #reset-cells = <1>; + }; From patchwork Fri Dec 17 16:59:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 525176 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7CBA7C433EF for ; Fri, 17 Dec 2021 16:59:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239546AbhLQQ7e (ORCPT ); Fri, 17 Dec 2021 11:59:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239521AbhLQQ7a (ORCPT ); Fri, 17 Dec 2021 11:59:30 -0500 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [IPv6:2a00:1450:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CF010C06173F; Fri, 17 Dec 2021 08:59:29 -0800 (PST) Received: by mail-wm1-x331.google.com with SMTP id a83-20020a1c9856000000b00344731e044bso1949713wme.1; Fri, 17 Dec 2021 08:59:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=iAdQHmcxXJRdSaN4NZqNsTb5GeS4QMgyYMJbKis0ZM4=; b=MXZX7bj2HV6urtBpIAD/q393zakFtZvmE1pzmdz4NiOCOB18rJnf+KEWnyD3p2AWx5 4HmzREIUQWCGjMbYeuZW5cbEl1SAx+oOys15lMDlREf2XZLBVRY0BqOGKbG2f8ITLwDI V5ktaMmXZUNZ5p2QHchSMMZ5j37xpcrD7nswbWjIidptamf8azrM1hzRu6yrSwZyWExW fpaOgSU0lk7JQapErC2mTOQ91ZscpNi4Y2kCEBgnHI4yRGYQCsuvlnTGo5SBz1h9u8hH BZYfT9vUw+c2rjQndeaiJHZI6JGnQD3eYn97eF3FJZvs08/THi7wdrpSUZ6r6+hN6cu8 5xaw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=iAdQHmcxXJRdSaN4NZqNsTb5GeS4QMgyYMJbKis0ZM4=; b=vgoOyi/6/IM1ZExGTvZrItwxjNnBGtFWNJziMPbsVoiTST810vNK+IIG8+XPDorNJb MBb2tBkCA67wZaKhzCHG7fp1hj6gstCS8aaM8L81uWQCwwvZ9pLv9yUEQElnghSmtOOL 21hwlK31m0mVrrIgptowp1intH/LVwhiJn447nBiQZzYB8Jo5PMnSdYIJIYB/rCfjvEo 2Hcgd/RPGohmMjM+xiAPv23A0VWYRMO4vbv5K56r6ncTkJbQcIuxL8KbxomcJ7LeK+yh nZvGql8SVNXp86wUuvINlQqsjD0riD7KlkGLGjh6S7cVTGbTUJ41WhFGdV+7ZpiGuHaQ QJrA== X-Gm-Message-State: AOAM531/7pWD6g72HoPIStu5/jNCAnLhR4MNq21TY5MXwdxUwbYHHJ3I iHoqu6zgKO/vONAZeN9iigc= X-Google-Smtp-Source: ABdhPJwYovI0k+5flN+Sv+3NYUj+Z5Suv3NUMSNies4QrfLOejlbTPTVXYci7OCqbP8HQT9wsZpk8g== X-Received: by 2002:a7b:cb51:: with SMTP id v17mr8705440wmj.185.1639760368390; Fri, 17 Dec 2021 08:59:28 -0800 (PST) Received: from localhost ([193.209.96.43]) by smtp.gmail.com with ESMTPSA id m6sm10264243wrp.34.2021.12.17.08.59.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Dec 2021 08:59:27 -0800 (PST) From: Thierry Reding To: Krzysztof Kozlowski , Rob Herring Cc: Jon Hunter , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/5] dt-bindings: memory: tegra: Fix Tegra132 compatible string Date: Fri, 17 Dec 2021 17:59:18 +0100 Message-Id: <20211217165919.2700920-4-thierry.reding@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211217165919.2700920-1-thierry.reding@gmail.com> References: <20211217165919.2700920-1-thierry.reding@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Thierry Reding While the memory controller found on Tegra132 is largely compatible with the one found on Tegra124, there are some differences that may require more specific matching on a Tegra132 compatible string, so add one to the list of compatible strings. Signed-off-by: Thierry Reding --- .../bindings/memory-controllers/nvidia,tegra124-emc.yaml | 6 +++++- .../bindings/memory-controllers/nvidia,tegra124-mc.yaml | 4 +++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml index 9163c3f12a85..90666e8d2de7 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml @@ -16,7 +16,11 @@ description: | properties: compatible: - const: nvidia,tegra124-emc + oneOf: + - const: nvidia,tegra124-emc + - items: + - const: nvidia,tegra132-emc + - const: nvidia,tegra124-emc reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.yaml index 7b18b4d11e0a..887917e02bfa 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.yaml @@ -19,7 +19,9 @@ description: | properties: compatible: - const: nvidia,tegra124-mc + enum: + - nvidia,tegra124-mc + - nvidia,tegra132-mc reg: maxItems: 1 From patchwork Fri Dec 17 16:59:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 525175 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84293C433FE for ; Fri, 17 Dec 2021 16:59:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239529AbhLQQ7i (ORCPT ); Fri, 17 Dec 2021 11:59:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51034 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239541AbhLQQ7d (ORCPT ); Fri, 17 Dec 2021 11:59:33 -0500 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [IPv6:2a00:1450:4864:20::32e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B5FB5C061746; Fri, 17 Dec 2021 08:59:32 -0800 (PST) Received: by mail-wm1-x32e.google.com with SMTP id o29so2065512wms.2; Fri, 17 Dec 2021 08:59:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dFHoQPOrbV6E0S61sp0iENhRWxLWfzEEYHIRAwtb27w=; b=LTRIldyNB62poDhP4+555c0Gp8yEd3nIJemwakeK+eB1hYwlAey3xvYAej6umEpWlY /2rhUFYfz6uXMOEKxC0R67Khu+1qYbsK/JThPIu9blSmwI07Kd6nWPH5ZCSp6xvNcCKX npoV3oBxrWhYT7lV3C7UwRV0EaNayGnp89H000YhFfZu++9dn7h3VKjgzFSes5OYMOu6 BWHobu1/VuzCyvwMxcsshtg4ivfNGQGrG276SJUelvfYclajV64YBdsOtdBd67ds9dc3 6cJUev8j7uq8r9jofX2q+FJf8v7X1+fwUKB7pDmdKkyYCa6/4mD9DDFu2juhhkjTSdec rqbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dFHoQPOrbV6E0S61sp0iENhRWxLWfzEEYHIRAwtb27w=; b=VhwndRUNr9yfQqxQ0USToTLCFNMiuD/snXfcIgvoXEdYGI7Kz/QPMTztBOeEp4IWWD zDzqSvaSADRMmEAinfRnYKbbxF5jdpf9XIdxXobNzit4JNUoB2BdGXQf84VSzpWGab1s xI9WnOKyO+BRQPEloXA4in2th7UEecWRzSnkjjdf0vvO9rhQLHlIY3sd2bHsV8RQ93Do Bqw3e3OVvWefuOpu7eieJ6QsDSQXh87bwcYYh3kfN1AuY6G2FS/eiE17vUY0hxjh2eUe DtXM/5MXxQ/n4+kX2r/oq01JCsg1uF97M+F3vTH5zV/COH2bQC8R8mXMCbshiMCpTcsX LgGw== X-Gm-Message-State: AOAM532mHoMmJBFkdFyPqWQ0tvcsXPeteNBHc2qmqBeOF32JOLXW38v0 dUyAJfp3HiixiEnIywCP09w= X-Google-Smtp-Source: ABdhPJzXXneTut0iRLJDi7+nLqEKV8Tl49rdcNwK7q3KKgYJK3L0zJ2sXWk7DiolnQr+N/9dh2DV1A== X-Received: by 2002:a05:600c:19d0:: with SMTP id u16mr3457837wmq.111.1639760371336; Fri, 17 Dec 2021 08:59:31 -0800 (PST) Received: from localhost ([193.209.96.43]) by smtp.gmail.com with ESMTPSA id t11sm7543851wrz.97.2021.12.17.08.59.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Dec 2021 08:59:30 -0800 (PST) From: Thierry Reding To: Krzysztof Kozlowski , Rob Herring Cc: Jon Hunter , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/5] dt-bindings: memory: tegra210: Mark EMC as cooling device Date: Fri, 17 Dec 2021 17:59:19 +0100 Message-Id: <20211217165919.2700920-5-thierry.reding@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211217165919.2700920-1-thierry.reding@gmail.com> References: <20211217165919.2700920-1-thierry.reding@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Thierry Reding The external memory controller found on Tegra210 can use throttling of the EMC frequency in order to reduce the memory chip temperature. Mark the memory controller as a cooling device to take advantage of this functionality. Signed-off-by: Thierry Reding --- .../bindings/memory-controllers/nvidia,tegra210-emc.yaml | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-emc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-emc.yaml index bc8477e7ab19..95c14deb8941 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-emc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-emc.yaml @@ -44,6 +44,11 @@ properties: description: phandle of the memory controller node +allOf: + - $ref: ../thermal/thermal-cooling-devices.yaml + +unevaluatedProperties: false + required: - compatible - reg @@ -51,8 +56,6 @@ required: - clock-names - nvidia,memory-controller -additionalProperties: false - examples: - | #include @@ -79,4 +82,5 @@ examples: interrupts = ; memory-region = <&emc_table>; nvidia,memory-controller = <&mc>; + #cooling-cells = <2>; };