From patchwork Wed Nov 28 16:49:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 152319 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1322060ljp; Wed, 28 Nov 2018 08:53:04 -0800 (PST) X-Google-Smtp-Source: AFSGD/WiFwSig+u5JsW4vpKhymHQX3eRXjZjQX5jcsLp1msSHXTtOjO2UhxUMdcGno0W4FYxqfNd X-Received: by 2002:a25:6602:: with SMTP id a2-v6mr37877120ybc.75.1543423984714; Wed, 28 Nov 2018 08:53:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543423984; cv=none; d=google.com; s=arc-20160816; b=qlILH9B2rDaLk9eMdXupmto+LxHaKNkIoulDy5lYaDNkhHklhBQf6PoIttjoh3l1iK BeTmP+ItmAmtLxcThZdMoHBefxNCi/dTGpeXyYpxoYjiLnnZ6sPltz6jxSFmFrdY7LTV MiQXw7yhmFdyvzs4CCg/m1e9PkuU9vzkMt3FtV15EEF2d0fPchR/jNY29wrl/Jm6HTsr 0sXbrOt75jtLuwDLGF7UX8Fd2E0siesmqE8yA4HTFqzrDBRHzYgrgWhuPaCfJKhsnxJX WymlZrvGPk7HVHzOIRkVATpWniB+cDgOgErLP3ZlhC0GxGFIsLduZskYTINdyruX7LCG pYwQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=UNzfET5nXwjKeiwTTcKeL8GECOzH9JSDdbqhQX35stE=; b=uPBC8LRskWIQmt8pxgKXBaKHwf1bPzkzi8ly5kHo0azliAYTg1Hev+QZIsLl9/RbPn V/g++qjZkoREbQ1K9R3t1eDDalBCJfr3aH4GWp3kuJatwNQ/fQhHngNyrxaAVwxgfOO1 I5uxOvEtF6qSjYI/gduCQ8pBQx5lzCM69leAq76KTxlAmn7wQgzrXXmMonMo4owxIncF yJwjbQUClXqS7/RPuGcGvK3pxxTfnzWxNYQylduSJLcnh9akXVzXuEFeRCOggz96dOs4 ubp0vmf0K1bC3tyW82Kx+antgPf2KFDYbd/ZJLLnHm5JmJH4MH+hOmNxvaxWOve3DVm8 QbZQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id s2-v6si4996341ybf.293.2018.11.28.08.53.04 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 28 Nov 2018 08:53:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS327-0000qj-BD; Wed, 28 Nov 2018 16:49:51 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS325-0000qU-SZ for xen-devel@lists.xenproject.org; Wed, 28 Nov 2018 16:49:49 +0000 X-Inumbo-ID: 9e2bc52c-f32d-11e8-9a16-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 9e2bc52c-f32d-11e8-9a16-bc764e045a96; Wed, 28 Nov 2018 16:49:48 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 80BF5382E; Wed, 28 Nov 2018 08:49:48 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 934993F575; Wed, 28 Nov 2018 08:49:47 -0800 (PST) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Wed, 28 Nov 2018 16:49:32 +0000 Message-Id: <20181128164939.8329-2-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181128164939.8329-1-julien.grall@arm.com> References: <20181128164939.8329-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH for-4.12 1/8] xen/arm: Only set necessary flags when initializing HCR_EL2 X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , sstabellini@kernel.org MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Only {A,F,I}MO are necessary to receive interrupts until a guest vCPU is loaded. The rest have no effect on Xen and it is better to avoid setting them. Signed-off-by: Julien Grall Reviewed-by: Andrii Anisov Reviewed-by: Stefano Stabellini --- xen/arch/arm/traps.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 88ffeeb480..1eec966299 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -181,8 +181,12 @@ void init_traps(void) WRITE_SYSREG((HCPTR_CP_MASK & ~(HCPTR_CP(10) | HCPTR_CP(11))) | HCPTR_TTA, CPTR_EL2); - /* Setup hypervisor traps */ - WRITE_SYSREG(get_default_hcr_flags(), HCR_EL2); + /* + * Configure HCR_EL2 with the bareminimum to run Xen until a guest + * is scheduled. {A,I,F}MO bits are set to allow EL2 receiving + * interrupts. + */ + WRITE_SYSREG(HCR_AMO | HCR_FMO | HCR_IMO, HCR_EL2); isb(); } From patchwork Wed Nov 28 16:49:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 152314 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1321485ljp; Wed, 28 Nov 2018 08:52:26 -0800 (PST) X-Google-Smtp-Source: AFSGD/VjKSs6vS1b2TEX7Inx94acL7bPDesWVOtuBb814Th/tZNrjBW0syQE4Y0S7DfduubHiOOS X-Received: by 2002:a25:9c09:: with SMTP id c9-v6mr38695413ybo.1.1543423946491; Wed, 28 Nov 2018 08:52:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543423946; cv=none; d=google.com; s=arc-20160816; b=DxK7L7ECGS6N6MXAJ5fod7EZSSy886nTyLo/ugJVBy4XmGwHxjvpv8mxwXCfCpUiWr HS37w3Q9dy/YgtINdbelU/8HL6U0mKpNnnh7wbXni5hQN5bhR6X4FBbWGhkWfxBncxHy x+ru+GfJqrt6Vt6Eqi6mvCwuHEX7arWCPc3WlCusv5JfBreds9bIM+uEFOAx7HthVQn/ J2zBdd1mDUCBFbF1hXOMCJmOdc5tTQxqd7oaquhgGXL9Ey6TCZct6qo60vBSn5/Gr5TH xVtmZk/8ruF+jKFqHT+FlwehikEh1r0EB7uL0urf62L6+U/usBX+t1NNUpfTFDcxFECd mXEA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=WPg3novGpngwZxssf5JutRxohN2dIPf9r1qMlX1naSc=; b=Hn9mN2IKSYYR34SkRVaFz0dpOySbBNKX2bcjpUHt3OHGNSUz/AReCGrcX77EjEh+kc Fj8gVv483gArHR4/ruElV6cHiVcK8tJCT1otWm1oijlrkUZawRvaKtKhGC/oZWp7OUsF Av28efdiaS3KDkDg9QGT3EwSC715d1Z5iXgUUyJ8HmfyMsNGlPZjDd6/ALuoHAOjDl3I 6k3nCr0dXRCsPjFkj7/CHzJWHllnrItIp7Z8pOPKnZHMBEJ4QHl5nJxXCowVGphZs2yB fKBSp+L08bezd7ax3tFu0Z/PaYipBCFIEFy4/EcEs0C0Fse8Ni1m1QqYRZyNDDWZGuD0 4nZg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id i17-v6si5497481ybe.230.2018.11.28.08.52.26 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 28 Nov 2018 08:52:26 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS32c-0001hh-0D; Wed, 28 Nov 2018 16:50:22 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS32a-0001hC-JB for xen-devel@lists.xenproject.org; Wed, 28 Nov 2018 16:50:20 +0000 X-Inumbo-ID: b0ba2ba6-f32d-11e8-9a16-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id b0ba2ba6-f32d-11e8-9a16-bc764e045a96; Wed, 28 Nov 2018 16:50:19 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A9A25382C; Wed, 28 Nov 2018 08:49:49 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BCC2A3F575; Wed, 28 Nov 2018 08:49:48 -0800 (PST) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Wed, 28 Nov 2018 16:49:33 +0000 Message-Id: <20181128164939.8329-3-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181128164939.8329-1-julien.grall@arm.com> References: <20181128164939.8329-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH for-4.12 2/8] xen/arm: p2m: Provide an helper to generate the VTTBR X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , sstabellini@kernel.org MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" A follow-up patch will need to generate the VTTBR in a few places. Signed-off-by: Julien Grall Reviewed-by: Andrii Anisov Reviewed-by: Stefano Stabellini --- xen/arch/arm/p2m.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c index 6c76298ebc..8ebf1e8dba 100644 --- a/xen/arch/arm/p2m.c +++ b/xen/arch/arm/p2m.c @@ -47,6 +47,11 @@ static const paddr_t level_masks[] = static const uint8_t level_orders[] = { ZEROETH_ORDER, FIRST_ORDER, SECOND_ORDER, THIRD_ORDER }; +static uint64_t generate_vttbr(uint16_t vmid, mfn_t root_mfn) +{ + return (mfn_to_maddr(root_mfn) | ((uint64_t)vmid << 48)); +} + /* Unlock the flush and do a P2M TLB flush if necessary */ void p2m_write_unlock(struct p2m_domain *p2m) { @@ -1147,7 +1152,7 @@ static int p2m_alloc_table(struct domain *d) p2m->root = page; - p2m->vttbr = page_to_maddr(p2m->root) | ((uint64_t)p2m->vmid << 48); + p2m->vttbr = generate_vttbr(p2m->vmid, page_to_mfn(p2m->root)); /* * Make sure that all TLBs corresponding to the new VMID are flushed From patchwork Wed Nov 28 16:49:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 152311 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1321025ljp; Wed, 28 Nov 2018 08:51:59 -0800 (PST) X-Google-Smtp-Source: AFSGD/Vnz9eblg8UNzalJWYSQUvp4cED2xXKsAzLzA7OmeTiq7AXAs2gOZgGZSPfb5Phg15Ao24d X-Received: by 2002:a25:7a43:: with SMTP id v64-v6mr13135518ybc.187.1543423919575; Wed, 28 Nov 2018 08:51:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543423919; cv=none; d=google.com; s=arc-20160816; b=FlO/aFtTVeFnaDXyfn5P+lzgL861iCiiop1vmab5EEvKYIByxFTT/0axD3Sr2KLwGl LPqTLJO1WZfL1HjZZ7Ekfu48QTLiogmacQ1xfJh3ML8Kewz9vY6BzrJ5WZAVbC4E8sZa 1fDVsNL8bOe3cKpZ96tC0Ni5oiRgW/PR7Qj24JuY0iFtvhfkRgj8YygHfcZi8tXBeS4F OTPjOze5c0Ej7S5C4teUNhUGY5xZDwECvOGdqwZfQdmMSRlHrOqIZ0KxiQ0fPlVsgEUa K+O91hiXx2kgY8KRHpaUBsX/m6w72JFV36mHwwoEjmfv/Bfc1+HFHgmLEqEzPmxJXy3p Gg2A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=+An0hepsK1qfjfb199zOVOemDCma7pWftIPg5FiQhBU=; b=dioXMf5/SCwRtlB3T3G/iUbNK4H2BTJV8g4Tcxu/jm3i+f7uzCRN2xgOACmecd43ho V3JGIpbFvwE7XN7xpkV1ShTTyxxvz8xICFU1iFkDPJGFP5AmffLJ00o/W+V0DZ5BgWHp TJcnoIFCA0Stzg7Y5HPYoVhoy+WH0NP2gIJuna0xs12/wJZdPxzNNEDYpSndrR0i5om0 XsFqVwapbO4QpH8dTVi3Sm4Mc6y4JDPr2A0k8qdBZ/TAXKfAvSIHBtWee1U0Rww1o0Dp sjhalgJyFHcrvWfeGI3megL1zUrUrr9LCZta92jXGCJYKZYn6tU7GQfIW3MS/6z6U4MT skPA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id k84si3013349ywb.147.2018.11.28.08.51.59 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 28 Nov 2018 08:51:59 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS328-0000rA-MS; Wed, 28 Nov 2018 16:49:52 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS328-0000qv-6G for xen-devel@lists.xenproject.org; Wed, 28 Nov 2018 16:49:52 +0000 X-Inumbo-ID: 9f996d6b-f32d-11e8-9a16-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 9f996d6b-f32d-11e8-9a16-bc764e045a96; Wed, 28 Nov 2018 16:49:51 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D2768382E; Wed, 28 Nov 2018 08:49:50 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E63063F575; Wed, 28 Nov 2018 08:49:49 -0800 (PST) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Wed, 28 Nov 2018 16:49:34 +0000 Message-Id: <20181128164939.8329-4-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181128164939.8329-1-julien.grall@arm.com> References: <20181128164939.8329-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH for-4.12 3/8] xen/arm: p2m: Introduce an helper to allocate the root page-table X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , sstabellini@kernel.org MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" A follow-up patch will require to allocate the root page-table without having a domain in hand. Signed-off-by: Julien Grall Reviewed-by: Andrii Anisov Reviewed-by: Stefano Stabellini --- xen/arch/arm/p2m.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c index 8ebf1e8dba..e8bacab9d2 100644 --- a/xen/arch/arm/p2m.c +++ b/xen/arch/arm/p2m.c @@ -1136,21 +1136,29 @@ int guest_physmap_remove_page(struct domain *d, gfn_t gfn, mfn_t mfn, return p2m_remove_mapping(d, gfn, (1 << page_order), mfn); } -static int p2m_alloc_table(struct domain *d) +static struct page_info *p2m_allocate_root(void) { - struct p2m_domain *p2m = p2m_get_hostp2m(d); struct page_info *page; unsigned int i; page = alloc_domheap_pages(NULL, P2M_ROOT_ORDER, 0); if ( page == NULL ) - return -ENOMEM; + return NULL; /* Clear both first level pages */ for ( i = 0; i < P2M_ROOT_PAGES; i++ ) clear_and_clean_page(page + i); - p2m->root = page; + return page; +} + +static int p2m_alloc_table(struct domain *d) +{ + struct p2m_domain *p2m = p2m_get_hostp2m(d); + + p2m->root = p2m_allocate_root(); + if ( !p2m->root ) + return -ENOMEM; p2m->vttbr = generate_vttbr(p2m->vmid, page_to_mfn(p2m->root)); From patchwork Wed Nov 28 16:49:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 152313 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1321306ljp; Wed, 28 Nov 2018 08:52:15 -0800 (PST) X-Google-Smtp-Source: AFSGD/WK+yn4Nc0wPCDd3gHuwckq/VM34I4eU2ov3eO7Y0rj674Eusz05Q2dPebkcWBNaMV19POT X-Received: by 2002:a81:e50d:: with SMTP id s13mr38229230ywl.405.1543423935781; Wed, 28 Nov 2018 08:52:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543423935; cv=none; d=google.com; s=arc-20160816; b=u6mnJcBYG2sOrPiIMlvSFwzzvapP/71TAuXy2v5VcNFDINpAQtjD2pGkSqsgGjdwlI L2RbiIVe+FLqALCP4McNcOKEyLXtkIhwCwANcWm3cK4kT1cl0I3hi7gOCu2dX6bXp3N0 +LTLr26KC1MWr7Utjgmww3LDAQh7PiAsZgVat4o8d9KlZLTChEa8IEE+mTDXGBXrShEg GCGvF0j+3+HUYvg4Ob+YfpTAL36FhfneQPgC0Yh1Ju/99i/FeA6UBSxgJ4tJpTz5JUOK hLE9A75y0AcIiL19cKC8t3WuycCPaujzHz2F7opNpE6Up8SwLtvtrJefxZammOYvzCe1 ROUA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=PvjxcZkiqPd/JkbrAOUBh5ovtTZKW2Y/6kQBMSVaX8g=; b=b1fS8PAL3mn3/WPojFaC8/WoC84dFI9/YsdFwbmTzvm13lhDEJ4vJyN8/nu7PnvwDx AQTSCJdGpjE7AjXwiw8eFGCeSUFGBpImT9Th8ld9k45uyNto6tcdsPrFXUThKF0XC/bE 05cLPoPa26tc6qlgpJyd9y9+Od+qyh/6VvQam0uqs57QWU/KH0jfs28mWGsp7TjVg7L7 kj+jNrso24uWHbWdWHo8fdJO285/BuKN4IkiXtLNRytdwyRIWqsZ1Yu6wz+2MDZGaKjx Ejez3r+UCXbbhanUYEAm/rTBe5XlE2xmutBYG2AI3ckG4/8pclSlKDtucHEmZv4tRJir LvEw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id s14-v6si5451015ybi.436.2018.11.28.08.52.15 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 28 Nov 2018 08:52:15 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS32B-0000sX-0q; Wed, 28 Nov 2018 16:49:55 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS329-0000rQ-Gp for xen-devel@lists.xenproject.org; Wed, 28 Nov 2018 16:49:53 +0000 X-Inumbo-ID: a03cc344-f32d-11e8-9a16-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id a03cc344-f32d-11e8-9a16-bc764e045a96; Wed, 28 Nov 2018 16:49:52 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 096AA3830; Wed, 28 Nov 2018 08:49:52 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 1B5D83F575; Wed, 28 Nov 2018 08:49:50 -0800 (PST) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Wed, 28 Nov 2018 16:49:35 +0000 Message-Id: <20181128164939.8329-5-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181128164939.8329-1-julien.grall@arm.com> References: <20181128164939.8329-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH for-4.12 4/8] xen/arm: domain_build: Don't switch to the guest P2M when copying data X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , sstabellini@kernel.org MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Until recently, kernel/initrd/dtb were loaded using guest VA and therefore requiring to restore temporarily the P2M. This reworked in a series of commits (up to 9292086 "xen/arm: domain_build: Use copy_to_guest_phys_flush_dcache in dtb_load") to use a guest PA. This will also help a follow-up patch which will require p2m_{save,restore}_state to work in pair to workaround an erratum. Signed-off-by: Julien Grall Reviewed-by: Andrii Anisov Reviewed-by: Stefano Stabellini --- xen/arch/arm/domain_build.c | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index b0ec3f0b72..ffbf7c6760 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -1920,7 +1920,6 @@ static void __init find_gnttab_region(struct domain *d, static int __init construct_domain(struct domain *d, struct kernel_info *kinfo) { - struct vcpu *saved_current; int i, cpu; struct vcpu *v = d->vcpu[0]; struct cpu_user_regs *regs = &v->arch.cpu_info->guest_cpu_user_regs; @@ -1942,14 +1941,6 @@ static int __init construct_domain(struct domain *d, struct kernel_info *kinfo) #endif /* - * The following loads use the domain's p2m and require current to - * be a vcpu of the domain, temporarily switch - */ - saved_current = current; - p2m_restore_state(v); - set_current(v); - - /* * kernel_load will determine the placement of the kernel as well * as the initrd & fdt in RAM, so call it first. */ @@ -1958,10 +1949,6 @@ static int __init construct_domain(struct domain *d, struct kernel_info *kinfo) initrd_load(kinfo); dtb_load(kinfo); - /* Now that we are done restore the original p2m and current. */ - set_current(saved_current); - p2m_restore_state(saved_current); - memset(regs, 0, sizeof(*regs)); regs->pc = (register_t)kinfo->entry; From patchwork Wed Nov 28 16:49:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 152317 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1321794ljp; Wed, 28 Nov 2018 08:52:48 -0800 (PST) X-Google-Smtp-Source: AFSGD/WNcbTvSSgkF9RZiXa3BLlsWJKC7yJVRe3dhha8OTUhv7jSkkA2t9Z2rpZ4tbbr1WRXMgYz X-Received: by 2002:a25:3813:: with SMTP id f19-v6mr37732604yba.237.1543423968479; Wed, 28 Nov 2018 08:52:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543423968; cv=none; d=google.com; s=arc-20160816; b=XIrowzjLyhGr9VsISyW0TUTEGbcHD9PZ4XxKnh48u6ECj7Rhh/IUsCq0eBwA1I6iuT iHEnWsgjHugj28TD/XuPGQv4ES83VfAmsRhlybVNzeV/Mm/GFN0bY0keicMg/0+uaj9E GZEQld9qgzgXG6dz8Dt1Xl23lVpPQ+y/sYcKbr9dXlsaYQjbz6DZPR5LCK4jiMGs17Ns A2LBhGnOEM4/nqunMzzm9zAZAbtipR8dIrZo9dqt3aX/EvGaAvXLWH/Ara08GQEwYtze eOJikB4irTki56oCgPT9gX03odLms8Gd0LPlZxFsZiOXYWMDCVPZmualvf7HnI6wtAZO qssA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=eW3z8x/h0oTXIeGqZAo9R89R5fV7F+AjGG1ya4znETE=; b=WC6se79YvkMske9CMPpfiHC92fIoy8PTJyKTJlcIyV0OpCv/ZCdjc+VHf7t+Ytw7QY VTccpwNt+Fi4LLTDO3WqPaBymkWBhR1XXyVOHSia/1ExY5jcrXc/dZVVb3aKiGSrIEOy RbM0oeSUf++wgdGZAU91j3fibb6FxJnRuhKVAf0nvV42dvNsbFZuO2AHlvd517rnIiPt sGdtdNSZlMD4iWZrRXzqE3gakTj/ouZ9nAJmAXcbIVvgWpI8KyMN3C9jHGBfukf1LgPD F2b4o32tbp7Ng5Z9pwYIelxKVh3FRbuHqtP4DL/zqO+D+Hn9BhfccgAE6YLx9LzCb+lk rHGQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id a186si5543367ywe.43.2018.11.28.08.52.48 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 28 Nov 2018 08:52:48 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS32C-0000t4-B9; Wed, 28 Nov 2018 16:49:56 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS32A-0000sE-Po for xen-devel@lists.xenproject.org; Wed, 28 Nov 2018 16:49:54 +0000 X-Inumbo-ID: a0ec9607-f32d-11e8-9a16-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id a0ec9607-f32d-11e8-9a16-bc764e045a96; Wed, 28 Nov 2018 16:49:53 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 31839382E; Wed, 28 Nov 2018 08:49:53 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 44C573F575; Wed, 28 Nov 2018 08:49:52 -0800 (PST) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Wed, 28 Nov 2018 16:49:36 +0000 Message-Id: <20181128164939.8329-6-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181128164939.8329-1-julien.grall@arm.com> References: <20181128164939.8329-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH for-4.12 5/8] xen/arm: p2m: Only use isb() when it is necessary X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , sstabellini@kernel.org MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The EL1 translation regime is out-of-context when running at EL2. This means the processor cannot speculate memory accesses using the registers associated to that regime. An isb() is only need if Xen is going to use the translation regime before returning to the guest (exception returns will synchronized the context). Remove unecessary isb() and document the ones left. Signed-off-by: Julien Grall Reviewed-by: Andrii Anisov --- xen/arch/arm/p2m.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c index e8bacab9d2..844833c4c3 100644 --- a/xen/arch/arm/p2m.c +++ b/xen/arch/arm/p2m.c @@ -112,22 +112,28 @@ void p2m_restore_state(struct vcpu *n) return; WRITE_SYSREG64(p2m->vttbr, VTTBR_EL2); - isb(); - WRITE_SYSREG(n->arch.sctlr, SCTLR_EL1); - isb(); - WRITE_SYSREG(n->arch.hcr_el2, HCR_EL2); - isb(); last_vcpu_ran = &p2m->last_vcpu_ran[smp_processor_id()]; /* + * While we are restoring an out-of-context translation regime + * we still need to ensure: + * - VTTBR_EL2 is synchronized before flushing the TLBs + * - All registers for EL1 are synchronized before executing an AT + * instructions targeting S1/S2. + */ + isb(); + + /* * Flush local TLB for the domain to prevent wrong TLB translation * when running multiple vCPU of the same domain on a single pCPU. */ if ( *last_vcpu_ran != INVALID_VCPU_ID && *last_vcpu_ran != n->vcpu_id ) + { flush_tlb_local(); + } *last_vcpu_ran = n->vcpu_id; } @@ -153,6 +159,7 @@ static void p2m_force_tlb_flush_sync(struct p2m_domain *p2m) { local_irq_save(flags); WRITE_SYSREG64(p2m->vttbr, VTTBR_EL2); + /* Ensure VTTBR_EL2 is synchronized before flushing the TLBs */ isb(); } @@ -161,6 +168,7 @@ static void p2m_force_tlb_flush_sync(struct p2m_domain *p2m) if ( ovttbr != READ_SYSREG64(VTTBR_EL2) ) { WRITE_SYSREG64(ovttbr, VTTBR_EL2); + /* Ensure VTTBR_EL2 is back in place before continuing. */ isb(); local_irq_restore(flags); } @@ -1496,7 +1504,6 @@ static uint32_t __read_mostly vtcr; static void setup_virt_paging_one(void *data) { WRITE_SYSREG32(vtcr, VTCR_EL2); - isb(); } void __init setup_virt_paging(void) From patchwork Wed Nov 28 16:49:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 152318 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1321954ljp; Wed, 28 Nov 2018 08:52:58 -0800 (PST) X-Google-Smtp-Source: AJdET5cABEczjGqLVHpyLi+kr461SXGg3be+odKEApqI/qHFBY5rSv12LQ2YUaPyvMsvrHYTs+bE X-Received: by 2002:a81:ae58:: with SMTP id g24mr39345531ywk.458.1543423978854; Wed, 28 Nov 2018 08:52:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543423978; cv=none; d=google.com; s=arc-20160816; b=NTQpr9ZDNTx2NkVeW/9gv+0feEa0a9Z425Ofa2K/swiOFiP9Ko0uRYoeyzfiFQ8v2j NAk2HEIJWnfNkiyoAz/ntmFMQksvtfnaKPJDha46aWEaZUqidkdBbCqiEv7dtlvCUu/K Mb4hkR/Fk+idmMn1BGoCLybedXVUqwe7+ABR2MjmCzJVt6ljuhpTMTPps6KZJYC8tFBj K/pGrkNf7pZMrVFckIZlzBzCHSauzG2kqCYgIIDcXt2SsR3pTQm5T/4buHaZFe3YZ+gs 06uIfCHstvkbacWoMlTrlWpASQTeSAuYIxXKyX51T2xXFUmLcZDyCxxVsUJNOw/bsImV N9Ng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=TObkTAXeXavHuWtrcZreCJJWVdsIEoOxAvwJFyc/NzU=; b=uNpSfJqlvzQggFMBVulTa1IZOHH4xnn/7gIaCDEPGtxt+H+DHytE6GLcJN0nYv2M8W XluttBcnp8+/ba7yQ1cke5NOtnekihTd3f8SXBffXRW03lwgDal15o0D3YeKDxadN+Nd NFRWM58yK8IlAVGdx1aRk+eC9xCmuQ+V7Jys41s9b3+MBf9ifONwsjRx8OuDBLpGhJAL LjtGhWhBlnLZEFTLuAbmZjRdiwD6O8doocBV0gspkIygCqlYjyXDmY44wUn2g33EAoaJ T5MD58t6vw2tQBMj3PAFRRcDF7e+U0Is8w3gRC+4Bumm+vBe5RlKUQIDWbcMnRYjdg8d pQfw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id l36si5327240ywa.187.2018.11.28.08.52.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 28 Nov 2018 08:52:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS32C-0000tb-NN; Wed, 28 Nov 2018 16:49:56 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS32C-0000su-3c for xen-devel@lists.xenproject.org; Wed, 28 Nov 2018 16:49:56 +0000 X-Inumbo-ID: a1ab8078-f32d-11e8-9a16-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id a1ab8078-f32d-11e8-9a16-bc764e045a96; Wed, 28 Nov 2018 16:49:54 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 87851382E; Wed, 28 Nov 2018 08:49:54 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6E2D43F575; Wed, 28 Nov 2018 08:49:53 -0800 (PST) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Wed, 28 Nov 2018 16:49:37 +0000 Message-Id: <20181128164939.8329-7-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181128164939.8329-1-julien.grall@arm.com> References: <20181128164939.8329-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH for-4.12 6/8] xen/arm: Implement workaround for Cortex-A76 erratum 1165522 X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , sstabellini@kernel.org MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Early version of Cortex-A76 can end-up with corrupt TLBs if they speculate an AT instruction while the S1/S2 system registers are in an inconsistent state. This can happen during guest context switch and when invalidating the TLBs for other than the current VMID. The workaround implemented in Xen will: - Use an empty stage-2 with a reserved VMID while context switching between 2 guests - Use an empty stage-2 with the VMID where TLBs need to be flushed Signed-off-by: Julien Grall Reviewed-by: Andrii Anisov Reviewed-by: Stefano Stabellini --- docs/misc/arm/silicon-errata.txt | 1 + xen/arch/arm/cpuerrata.c | 6 ++++ xen/arch/arm/domain.c | 8 +++-- xen/arch/arm/p2m.c | 78 ++++++++++++++++++++++++++++++++++++++-- xen/include/asm-arm/cpufeature.h | 3 +- xen/include/asm-arm/processor.h | 2 ++ 6 files changed, 93 insertions(+), 5 deletions(-) diff --git a/docs/misc/arm/silicon-errata.txt b/docs/misc/arm/silicon-errata.txt index 906bf5fd48..6cd1366f15 100644 --- a/docs/misc/arm/silicon-errata.txt +++ b/docs/misc/arm/silicon-errata.txt @@ -48,4 +48,5 @@ stable hypervisors. | ARM | Cortex-A57 | #852523 | N/A | | ARM | Cortex-A57 | #832075 | ARM64_ERRATUM_832075 | | ARM | Cortex-A57 | #834220 | ARM64_ERRATUM_834220 | +| ARM | Cortex-A76 | #1165522 | N/A | | ARM | MMU-500 | #842869 | N/A | diff --git a/xen/arch/arm/cpuerrata.c b/xen/arch/arm/cpuerrata.c index adf88e7bdc..61c64b9816 100644 --- a/xen/arch/arm/cpuerrata.c +++ b/xen/arch/arm/cpuerrata.c @@ -489,6 +489,12 @@ static const struct arm_cpu_capabilities arm_errata[] = { .matches = has_ssbd_mitigation, }, #endif + { + /* Cortex-A76 r0p0 - r2p0 */ + .desc = "ARM erratum 116522", + .capability = ARM64_WORKAROUND_AT_SPECULATE, + MIDR_RANGE(MIDR_CORTEX_A76, 0, 2 << MIDR_VARIANT_SHIFT), + }, {}, }; diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 1d926dcb29..3180edd89d 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -181,8 +181,6 @@ static void ctxt_switch_to(struct vcpu *n) if ( is_idle_vcpu(n) ) return; - p2m_restore_state(n); - vpidr = READ_SYSREG32(MIDR_EL1); WRITE_SYSREG32(vpidr, VPIDR_EL2); WRITE_SYSREG(n->arch.vmpidr, VMPIDR_EL2); @@ -235,6 +233,12 @@ static void ctxt_switch_to(struct vcpu *n) #endif isb(); + /* + * ARM64_WORKAROUND_AT_SPECULATE: The P2M should be restored after + * the stage-1 MMU sysregs have been restored. + */ + p2m_restore_state(n); + /* Control Registers */ WRITE_SYSREG(n->arch.cpacr, CPACR_EL1); diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c index 844833c4c3..0facb66096 100644 --- a/xen/arch/arm/p2m.c +++ b/xen/arch/arm/p2m.c @@ -15,6 +15,7 @@ #include #include #include +#include #define MAX_VMID_8_BIT (1UL << 8) #define MAX_VMID_16_BIT (1UL << 16) @@ -47,6 +48,8 @@ static const paddr_t level_masks[] = static const uint8_t level_orders[] = { ZEROETH_ORDER, FIRST_ORDER, SECOND_ORDER, THIRD_ORDER }; +static mfn_t __read_mostly empty_root_mfn; + static uint64_t generate_vttbr(uint16_t vmid, mfn_t root_mfn) { return (mfn_to_maddr(root_mfn) | ((uint64_t)vmid << 48)); @@ -98,9 +101,25 @@ void dump_p2m_lookup(struct domain *d, paddr_t addr) P2M_ROOT_LEVEL, P2M_ROOT_PAGES); } +/* + * p2m_save_state and p2m_restore_state works in pair to workaround + * ARM64_WORKAROUND_AT_SPECULATE. p2m_save_state will set-up VTTBR to + * point to the empty page-tables to stop allocating TLB entries. + */ void p2m_save_state(struct vcpu *p) { p->arch.sctlr = READ_SYSREG(SCTLR_EL1); + + if ( cpus_have_const_cap(ARM64_WORKAROUND_AT_SPECULATE) ) + { + WRITE_SYSREG64(generate_vttbr(INVALID_VMID, empty_root_mfn), VTTBR_EL2); + /* + * Ensure VTTBR_EL2 is correctly synchronized so we can restore + * the next vCPU context without worrying about AT instruction + * speculation. + */ + isb(); + } } void p2m_restore_state(struct vcpu *n) @@ -111,10 +130,17 @@ void p2m_restore_state(struct vcpu *n) if ( is_idle_vcpu(n) ) return; - WRITE_SYSREG64(p2m->vttbr, VTTBR_EL2); WRITE_SYSREG(n->arch.sctlr, SCTLR_EL1); WRITE_SYSREG(n->arch.hcr_el2, HCR_EL2); + /* + * ARM64_WORKAROUND_AT_SPECULATE: VTTBR_EL2 should be restored after all + * registers associated to EL1/EL0 translations regime have been + * synchronized. + */ + asm volatile(ALTERNATIVE("nop", "isb", ARM64_WORKAROUND_AT_SPECULATE)); + WRITE_SYSREG64(p2m->vttbr, VTTBR_EL2); + last_vcpu_ran = &p2m->last_vcpu_ran[smp_processor_id()]; /* @@ -157,8 +183,23 @@ static void p2m_force_tlb_flush_sync(struct p2m_domain *p2m) ovttbr = READ_SYSREG64(VTTBR_EL2); if ( ovttbr != p2m->vttbr ) { + uint64_t vttbr; + local_irq_save(flags); - WRITE_SYSREG64(p2m->vttbr, VTTBR_EL2); + + /* + * ARM64_WORKAROUND_AT_SPECULATE: We need to stop AT to allocate + * TLBs entries because the context is partially modified. We + * only need the VMID for flushing the TLBs, so we can generate + * a new VTTBR with the VMID to flush and the empty root table. + */ + if ( !cpus_have_const_cap(ARM64_WORKAROUND_AT_SPECULATE) ) + vttbr = p2m->vttbr; + else + vttbr = generate_vttbr(p2m->vmid, empty_root_mfn); + + WRITE_SYSREG64(vttbr, VTTBR_EL2); + /* Ensure VTTBR_EL2 is synchronized before flushing the TLBs */ isb(); } @@ -1504,6 +1545,23 @@ static uint32_t __read_mostly vtcr; static void setup_virt_paging_one(void *data) { WRITE_SYSREG32(vtcr, VTCR_EL2); + + /* + * ARM64_WORKAROUND_AT_SPECULATE: We want to keep the TLBs free from + * entries related to EL1/EL0 translation regime until a guest vCPU + * is running. For that, we need to set-up VTTBR to point to an empty + * page-table and turn on stage-2 translation. The TLB entries + * associated with EL1/EL0 translation regime will also be flushed in case + * an AT instruction was speculated before hand. + */ + if ( cpus_have_cap(ARM64_WORKAROUND_AT_SPECULATE) ) + { + WRITE_SYSREG64(generate_vttbr(INVALID_VMID, empty_root_mfn), VTTBR_EL2); + WRITE_SYSREG(READ_SYSREG(HCR_EL2) | HCR_VM, HCR_EL2); + isb(); + + flush_tlb_all_local(); + } } void __init setup_virt_paging(void) @@ -1587,6 +1645,22 @@ void __init setup_virt_paging(void) /* It is not allowed to concatenate a level zero root */ BUG_ON( P2M_ROOT_LEVEL == 0 && P2M_ROOT_ORDER > 0 ); vtcr = val; + + /* + * ARM64_WORKAROUND_AT_SPECULATE requires to allocate root table + * with all entries zeroed. + */ + if ( cpus_have_cap(ARM64_WORKAROUND_AT_SPECULATE) ) + { + struct page_info *root; + + root = p2m_allocate_root(); + if ( !root ) + panic("Unable to allocate root table for ARM64_WORKAROUND_AT_SPECULATE\n"); + + empty_root_mfn = page_to_mfn(root); + } + setup_virt_paging_one(NULL); smp_call_function(setup_virt_paging_one, NULL, 1); } diff --git a/xen/include/asm-arm/cpufeature.h b/xen/include/asm-arm/cpufeature.h index 17de928467..c2c8f3417c 100644 --- a/xen/include/asm-arm/cpufeature.h +++ b/xen/include/asm-arm/cpufeature.h @@ -45,8 +45,9 @@ #define ARM_HARDEN_BRANCH_PREDICTOR 7 #define ARM_SSBD 8 #define ARM_SMCCC_1_1 9 +#define ARM64_WORKAROUND_AT_SPECULATE 10 -#define ARM_NCAPS 10 +#define ARM_NCAPS 11 #ifndef __ASSEMBLY__ diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h index 72ddc42778..d03ec6e272 100644 --- a/xen/include/asm-arm/processor.h +++ b/xen/include/asm-arm/processor.h @@ -52,6 +52,7 @@ #define ARM_CPU_PART_CORTEX_A72 0xD08 #define ARM_CPU_PART_CORTEX_A73 0xD09 #define ARM_CPU_PART_CORTEX_A75 0xD0A +#define ARM_CPU_PART_CORTEX_A76 0xD0B #define MIDR_CORTEX_A12 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A12) #define MIDR_CORTEX_A17 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A17) @@ -61,6 +62,7 @@ #define MIDR_CORTEX_A72 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A72) #define MIDR_CORTEX_A73 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A73) #define MIDR_CORTEX_A75 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A75) +#define MIDR_CORTEX_A76 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76) /* MPIDR Multiprocessor Affinity Register */ #define _MPIDR_UP (30) From patchwork Wed Nov 28 16:49:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 152315 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1321608ljp; Wed, 28 Nov 2018 08:52:33 -0800 (PST) X-Google-Smtp-Source: AJdET5e6xEad0Neiu3D7O8CPTC9/R6r7TJSza2q9r+RZ5jyY5YM848jIntH5Qh4E5tf5d8aWQt3E X-Received: by 2002:a0d:c306:: with SMTP id f6-v6mr39529821ywd.356.1543423953629; Wed, 28 Nov 2018 08:52:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543423953; cv=none; d=google.com; s=arc-20160816; b=UPNjPETvZY6nppHDyVeHKwVK6QL5WLxgftNGGVqxB1YYPGZTzKX6DT8XUj0EzVinvp kNqtEyJ2BUOJI1tQ1W2k1WfI4PVSFBLZguC4FPhXAVEzEW8uX/6VsrQ0L7WcKRWcsShY zn+ngBnlObohIg+AmRyXkjW2bds5bfL8/CVWs8dxMdQSkfqsecWrwdtgjv/p/oYACThe v/3uMiPYW+M28E8Ev+qSfOkQ3y6gbOExOFtGCtdnu9ntfsTQm09hLhFh+h2bVHdsyNeu TJ21V1bDRtyOCIDi3u/5/ELEKXGHqP7MBbNMUcKW4l/9BSc+Lz8j9QIHKJXkIOVgLs/P sWZg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=AKN+ad3e8gw7uDmVe87obgv7wy0NvxwINPnqYG54hIQ=; b=UoF/RX9t8saBUK3g+OrmQsxjvWBxrHxTaAIMLjtsgc+XdMSDyQ4icXTaatfppQA1ac OPLn78cZnot6X8FPrwi3pvXnkZkTIK6KO4Z5BEohb5Yo0FZSVi0s53FTAjmu3iS3OP9b E5QXaf/47HT/fz1nRA9QhFoXgTtUEvOMX1HavvbjbPqLb+6XoWvesP4HrjcC44Z05/Gg bicHmlHSp6+fU7KMMZTD4Z/d5EavotVp/sh4A+4HgxLdWTXsPtXzZ7TLknefpL9s9ema RnSWnfUmD8VBlMqooIhzmpkZRUoB1BnTrTzCGYSEaElEYBLOsyAfN9nSgqJaZvMTsAT6 a9Wg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id w126-v6si5346587yba.122.2018.11.28.08.52.33 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 28 Nov 2018 08:52:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS32D-0000u6-2Q; Wed, 28 Nov 2018 16:49:57 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS32C-0000sz-9v for xen-devel@lists.xenproject.org; Wed, 28 Nov 2018 16:49:56 +0000 X-Inumbo-ID: a25fec8c-f32d-11e8-9a16-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id a25fec8c-f32d-11e8-9a16-bc764e045a96; Wed, 28 Nov 2018 16:49:55 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B09FF3830; Wed, 28 Nov 2018 08:49:55 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C44863F575; Wed, 28 Nov 2018 08:49:54 -0800 (PST) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Wed, 28 Nov 2018 16:49:38 +0000 Message-Id: <20181128164939.8329-8-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181128164939.8329-1-julien.grall@arm.com> References: <20181128164939.8329-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH for-4.12 7/8] xen/arm: p2m: Clean-up headers included and order them alphabetically X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , sstabellini@kernel.org MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" A lot of the headers are not necessary, so remove them. At the same time, re-order them alphabetically. Signed-off-by: Julien Grall Reviewed-by: Andrii Anisov --- xen/arch/arm/p2m.c | 20 ++++++-------------- 1 file changed, 6 insertions(+), 14 deletions(-) diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c index 0facb66096..3a92fd0775 100644 --- a/xen/arch/arm/p2m.c +++ b/xen/arch/arm/p2m.c @@ -1,21 +1,13 @@ -#include -#include -#include +#include #include -#include -#include -#include #include -#include -#include -#include -#include -#include -#include +#include +#include + +#include #include -#include +#include #include -#include #define MAX_VMID_8_BIT (1UL << 8) #define MAX_VMID_16_BIT (1UL << 16) From patchwork Wed Nov 28 16:49:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 152316 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1321692ljp; Wed, 28 Nov 2018 08:52:39 -0800 (PST) X-Google-Smtp-Source: AFSGD/X8DI5tn7URhRzHPSbGixUuI6IXRx07Da6MMAowkKhUvoQW2bf5AA7pkqkhjTs1OTGNY2V4 X-Received: by 2002:a25:be06:: with SMTP id h6-v6mr30027152ybk.324.1543423959777; Wed, 28 Nov 2018 08:52:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543423959; cv=none; d=google.com; s=arc-20160816; b=xcj8lEHn+ilBf/6K3LFWAPBdt+YDmVSN9GDNoOvL2zyD2mqgYZBIDIYJ+egqYDHV5P cu9TDK9z3QHS9OFIDCQ5R8OjxeCuIFgFQiC0Z3P7sgA3dLXacmBxIRFRpBAcAFerJCr7 2gQUqvgsF51ROIU2F2yEE/StWl+3oHZqszGISWMsGkMz6MGBNUlqOFssmBP6RSKs+zRV UA36EYBtSUXVHgpMlGgSBGSoToq4LTYM57ddI6RWKaCQkS6yO/aETawYRm394gNi4XkE XviPm+bLRnW5czYO2EEO1Pa1Tn/au7yrfF2MCIbC5SQM3KlFMyKZ0EP/JSndvb6lSoPH gSCA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=b9qzJibyf1810rNWpyM4ScfMwGYFy01zZ/RqnhLlIDA=; b=cLOse+WNhnBDYTHoR1TbjQ+ZO+KPYaBZ/xrJbbx0Ngl4Uojb/i7tpZjW6HyJPtJlZT KAAGqMAeAwnYnllGIqeabLZ8in+a9xT7rQBIiTykTq7NsPr012FlZvGoBTavRS2Sml30 CpNGRF3bqIsSkD+Tf2Hi7dXqkhxpiGEdMExGfmFDGZbBlnnCRNsE6S6r8XLviYG6/qnI hts2ZAFCHxV7BVzdGIEEpznahacFrBOm9HhNRH5Q1jOMhPVRf7ljF7ajPdZN7mUuCLnf Xev1tKOKA5N9SAGaiBAkFXH61Ub8sHjS3HKkJlZj41amcT6is2OZHLOJk5xqNqxhPNd3 wp1A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id f128si5005886ywd.83.2018.11.28.08.52.39 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 28 Nov 2018 08:52:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS32G-0000xg-JU; Wed, 28 Nov 2018 16:50:00 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS32E-0000vu-IV for xen-devel@lists.xenproject.org; Wed, 28 Nov 2018 16:49:58 +0000 X-Inumbo-ID: a315d03e-f32d-11e8-9a16-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id a315d03e-f32d-11e8-9a16-bc764e045a96; Wed, 28 Nov 2018 16:49:57 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DA8D6382E; Wed, 28 Nov 2018 08:49:56 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EDCDF3F575; Wed, 28 Nov 2018 08:49:55 -0800 (PST) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Wed, 28 Nov 2018 16:49:39 +0000 Message-Id: <20181128164939.8329-9-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181128164939.8329-1-julien.grall@arm.com> References: <20181128164939.8329-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH for-4.12 8/8] DO NOT APPLY Allow testing the new AT speculate workaround code X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , sstabellini@kernel.org MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Signed-off-by: Julien Grall --- xen/arch/arm/cpuerrata.c | 10 ++++++++++ xen/arch/arm/p2m.c | 2 ++ 2 files changed, 12 insertions(+) diff --git a/xen/arch/arm/cpuerrata.c b/xen/arch/arm/cpuerrata.c index 61c64b9816..e7278f2899 100644 --- a/xen/arch/arm/cpuerrata.c +++ b/xen/arch/arm/cpuerrata.c @@ -381,6 +381,11 @@ static bool has_ssbd_mitigation(const struct arm_cpu_capabilities *entry) } #endif +static bool has_at_speculate(const struct arm_cpu_capabilities *entry) +{ + return true; +} + #define MIDR_RANGE(model, min, max) \ .matches = is_affected_midr_range, \ .midr_model = model, \ @@ -495,6 +500,11 @@ static const struct arm_cpu_capabilities arm_errata[] = { .capability = ARM64_WORKAROUND_AT_SPECULATE, MIDR_RANGE(MIDR_CORTEX_A76, 0, 2 << MIDR_VARIANT_SHIFT), }, + { + .desc = "AT speculate", + .capability = ARM64_WORKAROUND_AT_SPECULATE, + .matches = has_at_speculate, + }, {}, }; diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c index 3a92fd0775..403bfbfcb6 100644 --- a/xen/arch/arm/p2m.c +++ b/xen/arch/arm/p2m.c @@ -122,6 +122,8 @@ void p2m_restore_state(struct vcpu *n) if ( is_idle_vcpu(n) ) return; + ASSERT(READ_SYSREG64(VTTBR_EL2) == (generate_vttbr(INVALID_VMID, empty_root_mfn))); + WRITE_SYSREG(n->arch.sctlr, SCTLR_EL1); WRITE_SYSREG(n->arch.hcr_el2, HCR_EL2);