From patchwork Fri Feb 18 00:29:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 543914 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12AC9C43217 for ; Fri, 18 Feb 2022 00:30:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230084AbiBRAaO (ORCPT ); Thu, 17 Feb 2022 19:30:14 -0500 Received: from gmail-smtp-in.l.google.com ([23.128.96.19]:42766 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229968AbiBRAaO (ORCPT ); Thu, 17 Feb 2022 19:30:14 -0500 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 529135E749; Thu, 17 Feb 2022 16:29:58 -0800 (PST) Received: by mail-wr1-x432.google.com with SMTP id w11so11755087wra.4; Thu, 17 Feb 2022 16:29:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kenzeLE/QK4xsXZwypHLjD1liPO03+eqYkLmazUP49s=; b=hfVBMkjM5hFowFo6txsQVXiIYjiPBU2FaQM3rzOYvLIabGfbKrTt2PCoG9nc90mDgp 1PDSLbN93cI2m2Dq61lyGxYuC0p/KxYkgF1Qa74B90NOFbyRQKYcwP6jWSyHK/Pba3Cu OuwaNLgxyBbEh57Aw8EjTFWSuqe24x4dyukkShaBHWdrTPVz+OpoR8huV4Jrd2Thr85Y DrwlmGY7Cah8E5MVi5hmC4CHgykZ9qka7oUo0qmaY6VkQMx2FhHhXD+vsNS5xQD7rnHN E98CAeQv0gm3zd49DFHPHaxnMBVfMbSgxQIfnbvNZFgfHpmsVqswYCOgaOuX8SVYmYRO IjKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kenzeLE/QK4xsXZwypHLjD1liPO03+eqYkLmazUP49s=; b=c4idwDoFDz+NmzHjCTsRE5jGgKISEECEmpvgn+kDg+tWa0uwuQ5c0/7ROQvZx3hPOE OA37ec9x909Hu/KpEWCX+nWDnIRXphhSu6UKI+2AniJka+DQ5H4dQyqNpLviy6MGbcLn bqg2cyT7Ju+wU6lkxlCDMo8t/SsPif5eaBnnxUejVX7phMSaVPDq99/bpOhkESbDwGQs m3f/CUFZ4MogDe2LIdq0sMRU/i0z2XQ36K0mhhduUF0z78KCjBLOiFodp2ujBAF380SC GMxPACvFMWp3WgWlLQ7D+ooUwDP+lWnSleRiArMkoHSKHgflyC1JrS6jyO9TlA6aK0WQ pnhw== X-Gm-Message-State: AOAM531ErREkrS0rZOhOjNRK5cp437vX2QpXYMe8kajGEz7XL7LlZB5S PZkA+1phNRZn/YwxP5EETX0= X-Google-Smtp-Source: ABdhPJw4AImeogmuit+wCghBsEiV25MP6L+To2pUlKQXGWSZ74iDUofaW6Nex7qvCv8FI9MRP+MnhA== X-Received: by 2002:adf:e185:0:b0:1e2:6421:f2d0 with SMTP id az5-20020adfe185000000b001e26421f2d0mr4174052wrb.703.1645144196875; Thu, 17 Feb 2022 16:29:56 -0800 (PST) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id d29sm3640406wra.63.2022.02.17.16.29.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Feb 2022 16:29:56 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith Subject: [PATCH v2 01/18] ARM: dts: qcom: add multiple missing pin definition for ipq8064 Date: Fri, 18 Feb 2022 01:29:39 +0100 Message-Id: <20220218002956.6590-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220218002956.6590-1-ansuelsmth@gmail.com> References: <20220218002956.6590-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add missing definition for mdio0 pins used for gpio-bitbang driver,i2c4 pins and rgmii2 pins for ipq8064. Signed-off-by: Ansuel Smith --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 34 +++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 11481313bdb6..cc6ca9013ab1 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -382,6 +382,15 @@ mux { }; }; + i2c4_pins: i2c4_pinmux { + mux { + pins = "gpio12", "gpio13"; + function = "gsbi4"; + drive-strength = <12>; + bias-disable; + }; + }; + spi_pins: spi_pins { mux { pins = "gpio18", "gpio19", "gpio21"; @@ -424,6 +433,8 @@ mux { pullups { pins = "gpio39"; + function = "nand"; + drive-strength = <10>; bias-pull-up; }; @@ -431,9 +442,32 @@ hold { pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44", "gpio45", "gpio46", "gpio47"; + function = "nand"; + drive-strength = <10>; bias-bus-hold; }; }; + + mdio0_pins: mdio0_pins { + mux { + pins = "gpio0", "gpio1"; + function = "mdio"; + drive-strength = <8>; + bias-disable; + }; + }; + + rgmii2_pins: rgmii2_pins { + mux { + pins = "gpio27", "gpio28", "gpio29", + "gpio30", "gpio31", "gpio32", + "gpio51", "gpio52", "gpio59", + "gpio60", "gpio61", "gpio62"; + function = "rgmii2"; + drive-strength = <8>; + bias-disable; + }; + }; }; intc: interrupt-controller@2000000 { From patchwork Fri Feb 18 00:29:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 543913 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2393CC433EF for ; Fri, 18 Feb 2022 00:30:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230135AbiBRAaV (ORCPT ); Thu, 17 Feb 2022 19:30:21 -0500 Received: from gmail-smtp-in.l.google.com ([23.128.96.19]:43682 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230098AbiBRAaU (ORCPT ); Thu, 17 Feb 2022 19:30:20 -0500 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7D53F5EDE0; Thu, 17 Feb 2022 16:30:00 -0800 (PST) Received: by mail-wr1-x432.google.com with SMTP id x5so6905594wrg.13; Thu, 17 Feb 2022 16:30:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NfXxys0gIqOkj8EIWl7atX09ysCcskDGiUZE+bzH3po=; b=jvfZNtX6wsUR5XbjXhZId1mTasjM32M7m+diQdr7jRDbnPASqblK2Q74uNIlgmA5wx 8NAUagsgb8mt/dV9Hm/F+48yykw8buYSXnk442VMO9V63/3voQxYAj6m4WTVZvY12RL8 QAwhks7p1I7koYGaiGYcj+alfQzgaIHou9gXDPAEmCgPu7d3rM4krLEQB1G9W2OOQFjj zhrlxDkshTMmzditjzxQnyXqVcUJXXNqk7cnPYOiaVocwNtBZ5UBdt+/osvUsE8ZhYSz wAwBnnnbm9TtPhMyf/Vls1E5bii/+4vsBRfwT7lhcdHXCvkJkVxOtMboWQoULr0+b3l7 bBkQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NfXxys0gIqOkj8EIWl7atX09ysCcskDGiUZE+bzH3po=; b=xFZqXr81/ADzevXezlRcP7qTDB0QLaOWrquF35Nyw28HL5eJMWKt82MNWdSk2c8GyM fl+F8BHNkbl+n0pFx18J+/7vviEvJiVjeZFQ8ghkZzGK9HDfUsIYtl2gTqDz7DlzOPoI mPZAxp3V8bk7HzCVG3tV0NC274HFFvAAN7fkjaySf/TriK7riaNLNN9+OkO7t2TbnCD/ mzuBTO/ztCE6OxSMzhIX29Id9FD9KZsrT3lzarR9wsUSAPhjv3qoIA3x9LMNEZPnRtxA 6S58PVUUDkvaQ76Gt/hOPU6aY1c9cj9TCGeVWolf0WiYJGCkTqX4CgB0zAanEVpnmufz QHGw== X-Gm-Message-State: AOAM532M3BsbaKV+t21jiB2FdFdH4rhC82XBhayBVPrEybqftax4Zq73 NPOJjCe4f5AzWHcyo5YxDdE= X-Google-Smtp-Source: ABdhPJwTZP+282w0cpFEV3gJxtbMurSdUbhC6Djt+V0ktY83O1R/qQ0650vtMuaIw47Vz/p04R2SGg== X-Received: by 2002:a05:6000:349:b0:1e3:2bf6:2890 with SMTP id e9-20020a056000034900b001e32bf62890mr4146038wre.225.1645144198871; Thu, 17 Feb 2022 16:29:58 -0800 (PST) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id d29sm3640406wra.63.2022.02.17.16.29.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Feb 2022 16:29:58 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith Subject: [PATCH v2 03/18] ARM: dts: qcom: add missing rpm regulators and cells for ipq8064 Date: Fri, 18 Feb 2022 01:29:41 +0100 Message-Id: <20220218002956.6590-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220218002956.6590-1-ansuelsmth@gmail.com> References: <20220218002956.6590-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add cells definition for rpm node and add missing regulators for the 4 regulator present on ipq8064. There regulators are controlled by rpm and to correctly works gsbi4_i2c require to be NEVER disabled or rpm will reject any regulator change request. Signed-off-by: Ansuel Smith --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 36 +++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index b309bc0fbbcd..0938838a4af8 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -842,10 +842,46 @@ rpm: rpm@108000 { clocks = <&gcc RPM_MSG_RAM_H_CLK>; clock-names = "ram"; + #address-cells = <1>; + #size-cells = <0>; + rpmcc: clock-controller { compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc"; #clock-cells = <1>; }; + + smb208_regulators: regulators { + compatible = "qcom,rpm-smb208-regulators"; + status = "okay"; + + smb208_s1a: s1a { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1150000>; + + qcom,switch-mode-frequency = <1200000>; + }; + + smb208_s1b: s1b { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1150000>; + + qcom,switch-mode-frequency = <1200000>; + }; + + smb208_s2a: s2a { + regulator-min-microvolt = < 800000>; + regulator-max-microvolt = <1250000>; + + qcom,switch-mode-frequency = <1200000>; + }; + + smb208_s2b: s2b { + regulator-min-microvolt = < 800000>; + regulator-max-microvolt = <1250000>; + + qcom,switch-mode-frequency = <1200000>; + }; + }; }; tcsr: syscon@1a400000 { From patchwork Fri Feb 18 00:29:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 543912 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03860C433FE for ; Fri, 18 Feb 2022 00:30:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230176AbiBRAa1 (ORCPT ); Thu, 17 Feb 2022 19:30:27 -0500 Received: from gmail-smtp-in.l.google.com ([23.128.96.19]:44484 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230178AbiBRAa0 (ORCPT ); Thu, 17 Feb 2022 19:30:26 -0500 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [IPv6:2a00:1450:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 28CD75FF23; Thu, 17 Feb 2022 16:30:04 -0800 (PST) Received: by mail-wr1-x42d.google.com with SMTP id o24so11773709wro.3; Thu, 17 Feb 2022 16:30:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=E4soHMSATnNXl5TODVc2MH8fE4HFAE18vCS3jN0AyCU=; b=eTt+PB3ZXWEDlQ98HexFmltN5qSpGv9AHykfbj2LCIiz9okn86PyW/bYrj4Wb0GKBm rJZ6kOUtkHDHyaM98dC16RwD8ZKSVUbt5SuaGs9NpXnVUcSgMJwgmf4LO2qk+eowMmZS 6hIk1THOFd2KlbTnBPKoHZsJ3chiDcKVIRCJBpVoNqohC8EMV2zdzwmpZd31waP+i266 pMXkVf+45yZbnLBM/+4pFybbTUXnpqoqt2Ez6Tv0BRl5oWqCJhRJNYtkuk2twgRQI/8u Ik3dwHkPrxg4aY8uu+pT8T9dy56lv66NsLZwH57lXkROK1jxZnCHfjbHzRDu6kn1PHMQ yw0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=E4soHMSATnNXl5TODVc2MH8fE4HFAE18vCS3jN0AyCU=; b=gh8pfc51VVVK5+2xmXk55YOFk1D1LHxicgmrZ2oHVNUMO3ZHWiE+hXOlyW4b4fEElb nLw39KG6moKY4K/jH8jc3BIADElSyaHCCuFgVRwO8+4aMsbtzurXLXDO5Fh2FoZeGE1v vssqWocwEuEXLXhsdOnjAMSfkKJGdCTQmgbOSyD57/Oh8t8M0L4x3pPCABxgV3l80Nja mxPLQ75IPGPdkZ9uiFC4BS9Dv55xxG4Q/XdtSY8W+/XFnnSLJ2WRcVR+tpxGQEFwU8Pa KTnozfqPTtqW2jdjSLMMfZoE97uXP1IUsmjdnoXF7Kayfe+uwVKCzNtiwY0ukwxf6qUF DbLA== X-Gm-Message-State: AOAM533hcCwOWgsx7YDfbgzlQJDXMRlVIRzHjEAoAQ5JXxJgS0mm3SGm NGFf8D2SwtnpE2fN6Wt31cE= X-Google-Smtp-Source: ABdhPJxtrSYvDBVuWr0TKfvdX56ZBXqXbv3sIzVqEjkRlEDZtqcPZoS+/Z1ClDldA8i9Y55B2t0vyQ== X-Received: by 2002:adf:face:0:b0:1e3:260c:f824 with SMTP id a14-20020adfface000000b001e3260cf824mr4057543wrs.181.1645144201541; Thu, 17 Feb 2022 16:30:01 -0800 (PST) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id d29sm3640406wra.63.2022.02.17.16.30.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Feb 2022 16:30:01 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith Subject: [PATCH v2 06/18] ARM: dts: qcom: enable usb phy by default for ipq8064 Date: Fri, 18 Feb 2022 01:29:44 +0100 Message-Id: <20220218002956.6590-7-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220218002956.6590-1-ansuelsmth@gmail.com> References: <20220218002956.6590-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable usb phy by default. When the usb phy were pushed, half of them were flagged as disabled by mistake. Fix this to correctly init dwc3 node on any ipq8064 based SoC. Signed-off-by: Ansuel Smith --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 9d658fcc1f12..e247bf51df01 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -1175,8 +1175,6 @@ hs_phy_0: phy@100f8800 { clocks = <&gcc USB30_0_UTMI_CLK>; clock-names = "ref"; #phy-cells = <0>; - - status = "disabled"; }; ss_phy_0: phy@100f8830 { @@ -1185,8 +1183,6 @@ ss_phy_0: phy@100f8830 { clocks = <&gcc USB30_0_MASTER_CLK>; clock-names = "ref"; #phy-cells = <0>; - - status = "disabled"; }; usb3_0: usb3@100f8800 { From patchwork Fri Feb 18 00:29:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 543911 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92B3FC433FE for ; Fri, 18 Feb 2022 00:30:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230281AbiBRAal (ORCPT ); Thu, 17 Feb 2022 19:30:41 -0500 Received: from gmail-smtp-in.l.google.com ([23.128.96.19]:46354 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230268AbiBRAaj (ORCPT ); Thu, 17 Feb 2022 19:30:39 -0500 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 21CD45F260; Thu, 17 Feb 2022 16:30:09 -0800 (PST) Received: by mail-wr1-x42b.google.com with SMTP id k1so11740267wrd.8; Thu, 17 Feb 2022 16:30:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8Pkbf/0AvfPHS5Qks1C72P4zaKgvYZBLMpXBGJAMl3s=; b=oDhr2gcLCuQDua9ie61E+ZSr11QCPKk9mD3i+7uPo/mLYlgDYV+zaaxRdc0wiI64ml tkmNexY9vcWOvZWh5nGyDmLW4ZTAO+ZraOdbLgeZFhOLO8I9S+xzJh+0JJhsGPqQeNU1 /S4FlyXVSv2zEZlnujq/EJeEyGzCaHdAW2aWxhdwZYiGmn9ffhrGaWJzGtSzb8+zxKZr 624GvbInhXp9YFD/Dc15J8XQAoastPZ5v/u5dATlGumVx3IDpPErh8hv9DMpaZ4cxSsO 1sVgSvYGHZx5JTrZP9VT08es9swdU5PkVG2IDp3Hx4y7nQH/g78//Q9GSGQIRwrRSG/f qg6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8Pkbf/0AvfPHS5Qks1C72P4zaKgvYZBLMpXBGJAMl3s=; b=F6cmi7ZAKyP8y/osWhor9XhRT3+RY9JukIOwit/8axZnU1bMPE4UNXKkZT/AFvor1F gRCNqyhmBgDINhxcaiU8IefXZNllGfJBOOub0suHgi7Ap+cAWdO7dFHBeBeTMC294GcC 6H3foIRXHVLr4wSKKBkOHbm/j7eGAcnLC5UXL59cMyer+l/pNYXidTrQMxo0SYLpP62l 2M3j2dhm4K950I5X5pAEqlMrlKBDD+4qpc2yzIF0N6hjqQIbOUN/alFGksW5sgm8RJwa 8rFT7rOThf3IESJYUKpaflrnsexU+OQ2QZCoesi9tey68h3MawkUfmhasQDkJnRlg2Se GCrw== X-Gm-Message-State: AOAM531gC3S9bLESxiXpXTNl3nZQ6NkEIHLG560b6001sd1J+LDM8elb OaR5NjSTfpnQk6eSxz9+lbM= X-Google-Smtp-Source: ABdhPJx8IkNpLwkoJuv4VugASkNxp2w9xcRIazJ2VDgMq0qN2VX6dxHNc9YVpKXxDMIY5whAtpg5IA== X-Received: by 2002:a5d:58d9:0:b0:1e5:6b50:24f3 with SMTP id o25-20020a5d58d9000000b001e56b5024f3mr4066376wrf.622.1645144204379; Thu, 17 Feb 2022 16:30:04 -0800 (PST) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id d29sm3640406wra.63.2022.02.17.16.30.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Feb 2022 16:30:04 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith Subject: [PATCH v2 09/18] ARM: dts: qcom: add smem node for ipq8064 Date: Fri, 18 Feb 2022 01:29:47 +0100 Message-Id: <20220218002956.6590-10-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220218002956.6590-1-ansuelsmth@gmail.com> References: <20220218002956.6590-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add missing smem node for ipq8064. Signed-off-by: Ansuel Smith --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 6768f7ba0d04..c579fb09e768 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -906,6 +906,11 @@ lcc: clock-controller@28000000 { #reset-cells = <1>; }; + sfpb_mutex_block: syscon@1200600 { + compatible = "syscon"; + reg = <0x01200600 0x100>; + }; + pcie0: pci@1b500000 { compatible = "qcom,pcie-ipq8064"; reg = <0x1b500000 0x1000 @@ -1330,4 +1335,17 @@ sdcc3: mmc@12180000 { }; }; }; + + sfpb_mutex: sfpb-mutex { + compatible = "qcom,sfpb-mutex"; + syscon = <&sfpb_mutex_block 4 4>; + + #hwlock-cells = <1>; + }; + + smem { + compatible = "qcom,smem"; + memory-region = <&smem>; + hwlocks = <&sfpb_mutex 3>; + }; }; From patchwork Fri Feb 18 00:29:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 543910 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE6CFC4332F for ; Fri, 18 Feb 2022 00:30:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230226AbiBRAap (ORCPT ); Thu, 17 Feb 2022 19:30:45 -0500 Received: from gmail-smtp-in.l.google.com ([23.128.96.19]:46276 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230285AbiBRAaj (ORCPT ); Thu, 17 Feb 2022 19:30:39 -0500 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2E9E9606F8; Thu, 17 Feb 2022 16:30:10 -0800 (PST) Received: by mail-wr1-x431.google.com with SMTP id v12so11790226wrv.2; Thu, 17 Feb 2022 16:30:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=s+1VYbMqYXYk/nrcO50yFLaIf+M6b7LtE3hpy+aBels=; b=aWXn3iOZzgCxTZbsZKhOeovRputQ4CCMj1yZKPSPuPcjT4Mg3ADLi6aAQgXxPRqqzW p2ZPEV6hq5nPi9e3Gwz3v3jdmc16OR4RjWW2gOkQ1W0hMSuUxrCG0YSt+vCoyaZ10QCx jJIRXD2GKnq88RZak3LwEht+M9yrbt6PqsAN+uPYcy4yGFgKTQCDxTsRYBEk1VfduECm eqJqKkNbrqgjAY+WvlBH8mD+IVc5KvxSC77NbKyUpWwLCMFS9k3Xaw6dV8hGVT9NXkGB 0MeccceIVW7vSqbMMHrkTtBjSCHkwvgkcsMoDcKtx0HezYaoBKilIbmrum4m3s6YHZdL 9Xbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=s+1VYbMqYXYk/nrcO50yFLaIf+M6b7LtE3hpy+aBels=; b=EV1ahNfaAnx3mLlhYVcC8KivTvRduumjXPHt6DesrLo+y9xVPyM2Ss41jjJjkyyCzM C71Lrj3tkqcT+QGDC3xwUrNfsJdxWG6TaHWJbX8teVHrRGzX2UuK9aINtrHI5fc06vIf 9Iyq9Tre0vqKMwv0QcujP/vWboDkpEEZHFy0xwb1TZ/4fVqQtQFH7F4mQSHjBS2MBmcy QLQeGs/CN3v2zNsZ0lwqeh4pfXVQoiWRcGLU1xB0i+LPyIWmSObFQoJL1rxRJra0Z6LQ nBEfrnAQS9iHaFxA7TOEb5ui5jJ6/YTDZ3XTWjbA9ulxo/pY7FBVCaGLNSpnf7i4M5vr 20kw== X-Gm-Message-State: AOAM532w0u3wXNhe7MQrJtJpaAuHDYfJhVEv55rlxj6b+Na9Vty4+8fU w1IPIxnF+SZHiy5zGp/3u5cwy/KbLvY= X-Google-Smtp-Source: ABdhPJzZYm75d8QTJQ+TnjK2lrIt+wi5zWHjCrlO5T7TS1DXu66mwd3P4jiOVWdqua/jYdNztrewoQ== X-Received: by 2002:a05:6000:1817:b0:1e4:bb97:d844 with SMTP id m23-20020a056000181700b001e4bb97d844mr3862237wrh.628.1645144205256; Thu, 17 Feb 2022 16:30:05 -0800 (PST) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id d29sm3640406wra.63.2022.02.17.16.30.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Feb 2022 16:30:04 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith Subject: [PATCH v2 10/18] ARM: dts: qcom: add saw for l2 cache and kraitcc for ipq8064 Date: Fri, 18 Feb 2022 01:29:48 +0100 Message-Id: <20220218002956.6590-11-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220218002956.6590-1-ansuelsmth@gmail.com> References: <20220218002956.6590-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add saw compatible for l2 cache and kraitcc node for ipq8064 dtsi. Also declare clock-output-names for acc0 and acc1 and qsb fixed clock for the secondary mux. Signed-off-by: Ansuel Smith --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 34 +++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index c579fb09e768..7df1c1482220 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -298,6 +298,12 @@ smem: smem@41000000 { }; clocks { + qsb: qsb { + compatible = "fixed-clock"; + clock-frequency = <384000000>; + #clock-cells = <0>; + }; + cxo_board { compatible = "fixed-clock"; #clock-cells = <0>; @@ -504,11 +510,19 @@ IRQ_TYPE_EDGE_RISING)>, acc0: clock-controller@2088000 { compatible = "qcom,kpss-acc-v1"; reg = <0x02088000 0x1000>, <0x02008000 0x1000>; + clock-output-names = "acpu0_aux"; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; + clock-names = "pll8_vote", "pxo"; + #clock-cells = <0>; }; acc1: clock-controller@2098000 { compatible = "qcom,kpss-acc-v1"; reg = <0x02098000 0x1000>, <0x02008000 0x1000>; + clock-output-names = "acpu1_aux"; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; + clock-names = "pll8_vote", "pxo"; + #clock-cells = <0>; }; adm_dma: dma-controller@18300000 { @@ -532,17 +546,23 @@ adm_dma: dma-controller@18300000 { }; saw0: regulator@2089000 { - compatible = "qcom,saw2"; + compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon"; reg = <0x02089000 0x1000>, <0x02009000 0x1000>; regulator; }; saw1: regulator@2099000 { - compatible = "qcom,saw2"; + compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon"; reg = <0x02099000 0x1000>, <0x02009000 0x1000>; regulator; }; + saw_l2: regulator@02012000 { + compatible = "qcom,saw2", "syscon"; + reg = <0x02012000 0x1000>; + regulator; + }; + gsbi2: gsbi@12480000 { compatible = "qcom,gsbi-v1.0.0"; cell-index = <2>; @@ -899,6 +919,16 @@ l2cc: clock-controller@2011000 { clock-output-names = "acpu_l2_aux"; }; + kraitcc: clock-controller { + compatible = "qcom,krait-cc-v1"; + clocks = <&gcc PLL9>, <&gcc PLL10>, <&gcc PLL12>, + <&acc0>, <&acc1>, <&l2cc>, <&qsb>; + clock-names = "hfpll0", "hfpll1", "hfpll_l2", + "acpu0_aux", "acpu1_aux", "acpu_l2_aux", + "qsb"; + #clock-cells = <1>; + }; + lcc: clock-controller@28000000 { compatible = "qcom,lcc-ipq8064"; reg = <0x28000000 0x1000>; From patchwork Fri Feb 18 00:29:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 543909 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68792C433FE for ; Fri, 18 Feb 2022 00:30:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230314AbiBRAau (ORCPT ); Thu, 17 Feb 2022 19:30:50 -0500 Received: from gmail-smtp-in.l.google.com ([23.128.96.19]:47794 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230292AbiBRAar (ORCPT ); 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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id d29sm3640406wra.63.2022.02.17.16.30.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Feb 2022 16:30:05 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith Subject: [PATCH v2 11/18] ARM: dts: qcom: add sic non secure node for ipq8064 Date: Fri, 18 Feb 2022 01:29:49 +0100 Message-Id: <20220218002956.6590-12-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220218002956.6590-1-ansuelsmth@gmail.com> References: <20220218002956.6590-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add missing sic non secure node for ipq8064. Signed-off-by: Ansuel Smith --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 7df1c1482220..df2702e6136d 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -563,6 +563,11 @@ saw_l2: regulator@02012000 { regulator; }; + sic_non_secure: sic-non-secure@12100000 { + compatible = "syscon"; + reg = <0x12100000 0x10000>; + }; + gsbi2: gsbi@12480000 { compatible = "qcom,gsbi-v1.0.0"; cell-index = <2>; From patchwork Fri Feb 18 00:29:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 543908 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99E78C433EF for ; Fri, 18 Feb 2022 00:30:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230317AbiBRAa4 (ORCPT ); Thu, 17 Feb 2022 19:30:56 -0500 Received: from gmail-smtp-in.l.google.com ([23.128.96.19]:48112 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230312AbiBRAau (ORCPT ); Thu, 17 Feb 2022 19:30:50 -0500 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [IPv6:2a00:1450:4864:20::334]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0431C674CF; Thu, 17 Feb 2022 16:30:28 -0800 (PST) Received: by mail-wm1-x334.google.com with SMTP id l67-20020a1c2546000000b00353951c3f62so5213884wml.5; Thu, 17 Feb 2022 16:30:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wDwyZnWxamRTsoYfzAkv2d0Y/zklcsBany9cWTtij48=; b=IZ9LNRqG1d+/6Apsw17xrj42gtDjqXVt9PSeMycsd5XaTpiXJIzH6IX3HBYRwJb21p i8px4n2DiZPl1oZuO9hdPQLStNeTBt8Eh7gYnV8cr1tdc+d4rLfKOT33XuuSLuzgmm0d zg08aZXuZTwRV9SamW1VHo5heL8qETQ02ipWO1VuZX6AjHz5QtfwiooC4Zc7niwuvkZb gGAigyUvQ1E+6r/f8CAE3lXDCD8nILiWwOImRvVNMniYk0S334uJDyoyjbXxikD2UWCw RFzD3xaNsaAhUqWZGXtbA4I17kWM/XRfItL09S46/tdTgx2qqVGRu2CYMOGgf/RW285p H8Kw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wDwyZnWxamRTsoYfzAkv2d0Y/zklcsBany9cWTtij48=; b=I1hPyHlIDbizzkeAblxWbBnXjZN0hAQj5kw/dApJ9yTF9vL2N3FjBz9KBXQgSUkdvi 9hJNMUMR5zuXqaUsRm7xn8vMq0dIoNzahh9eVoMmgk40zUmQOs6EF8UCMpsrwRyQB9MR FiB4LXhuDMYJttj/o3ZMQ0MDSCKor8QzIZUQhkr6zO/sYc/24/n1QeHjrixFAcvpr9z4 h/ethavBMhBzwYNvnIldKGm9MMgj0cdn25lEx0rOLW1ttm2HGAQVjxoSjiNZKe9xua6B +0CuBJ0bMC4FFq/tsyCUUAIQMGNqVRht2M4L9+rwJuVKeGiI0iHRZBiRTx1xYWdYEhph o+nw== X-Gm-Message-State: AOAM532LvqJ50jJng0bKA8gKBzXhmQ+mwAwwt9UKZrw8ItRjAAdlxwVY BdxzRvRM1fJpEXffk9Y8+tZzkEqN1JQ= X-Google-Smtp-Source: ABdhPJx7FXzTQGNEmv/XQH7bFallE+L5eGA3mZuRmAEzMN5lIX7S+ATl9VORodQRwPDGtb3Wl7IScw== X-Received: by 2002:a1c:e915:0:b0:37b:d847:e127 with SMTP id q21-20020a1ce915000000b0037bd847e127mr4806931wmc.180.1645144207993; Thu, 17 Feb 2022 16:30:07 -0800 (PST) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id d29sm3640406wra.63.2022.02.17.16.30.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Feb 2022 16:30:07 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith Subject: [PATCH v2 13/18] ARM: dts: qcom: add opp table for cpu and l2 for ipq8064 Date: Fri, 18 Feb 2022 01:29:51 +0100 Message-Id: <20220218002956.6590-14-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220218002956.6590-1-ansuelsmth@gmail.com> References: <20220218002956.6590-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add opp table for cpu and l2 cache. While the current cpufreq is the generic one that doesn't scale the L2 cache, we add the l2 cache opp anyway for the sake of completeness. This will be handy in the future when a dedicated cpufreq driver is introduced for krait cores that will correctly scale l2 cache with the core freq. Opp-level is set based on the logic of 0: idle level 1: normal level 2: turbo level Signed-off-by: Ansuel Smith --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 99 +++++++++++++++++++++++++++++ 1 file changed, 99 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 7dd0b901cd30..a1079583def9 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -48,6 +48,105 @@ L2: l2-cache { }; }; + opp_table_l2: opp_table_l2 { + compatible = "operating-points-v2"; + + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + opp-microvolt = <1100000>; + clock-latency-ns = <100000>; + opp-level = <0>; + }; + + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <1100000>; + clock-latency-ns = <100000>; + opp-level = <1>; + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1150000>; + clock-latency-ns = <100000>; + opp-level = <2>; + }; + }; + + opp_table0: opp_table0 { + compatible = "operating-points-v2-kryo-cpu"; + nvmem-cells = <&speedbin_efuse>; + + /* + * Voltage thresholds are + */ + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>; + opp-microvolt-speed0-pvs1-v0 = <925000 878750 971250>; + opp-microvolt-speed0-pvs2-v0 = <875000 831250 918750>; + opp-microvolt-speed0-pvs3-v0 = <800000 760000 840000>; + opp-supported-hw = <0x1>; + clock-latency-ns = <100000>; + opp-level = <0>; + }; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>; + opp-microvolt-speed0-pvs1-v0 = <975000 926250 1023750>; + opp-microvolt-speed0-pvs2-v0 = <925000 878750 971250>; + opp-microvolt-speed0-pvs3-v0 = <850000 807500 892500>; + opp-supported-hw = <0x1>; + clock-latency-ns = <100000>; + opp-level = <1>; + }; + + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>; + opp-microvolt-speed0-pvs1-v0 = <1025000 973750 1076250>; + opp-microvolt-speed0-pvs2-v0 = <995000 945250 1044750>; + opp-microvolt-speed0-pvs3-v0 = <900000 855000 945000>; + opp-supported-hw = <0x1>; + clock-latency-ns = <100000>; + opp-level = <1>; + }; + + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt-speed0-pvs0-v0 = <1150000 1092500 1207500>; + opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>; + opp-microvolt-speed0-pvs2-v0 = <1025000 973750 1076250>; + opp-microvolt-speed0-pvs3-v0 = <950000 902500 997500>; + opp-supported-hw = <0x1>; + clock-latency-ns = <100000>; + opp-level = <1>; + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt-speed0-pvs0-v0 = <1200000 1140000 1260000>; + opp-microvolt-speed0-pvs1-v0 = <1125000 1068750 1181250>; + opp-microvolt-speed0-pvs2-v0 = <1075000 1021250 1128750>; + opp-microvolt-speed0-pvs3-v0 = <1000000 950000 1050000>; + opp-supported-hw = <0x1>; + clock-latency-ns = <100000>; + opp-level = <2>; + }; + + opp-1400000000 { + opp-hz = /bits/ 64 <1400000000>; + opp-microvolt-speed0-pvs0-v0 = <1250000 1187500 1312500>; + opp-microvolt-speed0-pvs1-v0 = <1175000 1116250 1233750>; + opp-microvolt-speed0-pvs2-v0 = <1125000 1068750 1181250>; + opp-microvolt-speed0-pvs3-v0 = <1050000 997500 1102500>; + opp-supported-hw = <0x1>; + clock-latency-ns = <100000>; + opp-level = <2>; + }; + }; + thermal-zones { sensor0-thermal { polling-delay-passive = <0>; From patchwork Fri Feb 18 00:29:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 543907 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA23CC433F5 for ; Fri, 18 Feb 2022 00:30:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230356AbiBRAbJ (ORCPT ); Thu, 17 Feb 2022 19:31:09 -0500 Received: from gmail-smtp-in.l.google.com ([23.128.96.19]:50816 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230361AbiBRAbI (ORCPT ); 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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id d29sm3640406wra.63.2022.02.17.16.30.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Feb 2022 16:30:09 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith Subject: [PATCH v2 15/18] ARM: dts: qcom: add multiple missing binding for cpu and l2 for ipq8064 Date: Fri, 18 Feb 2022 01:29:53 +0100 Message-Id: <20220218002956.6590-16-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220218002956.6590-1-ansuelsmth@gmail.com> References: <20220218002956.6590-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add multiple binding for cpu node, l2 node and add idle-states definition for ipq8064 dtsi. Signed-off-by: Ansuel Smith --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 36 +++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 629e22236f5b..1079572f4f5d 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -30,6 +30,16 @@ cpu0: cpu@0 { next-level-cache = <&L2>; qcom,acc = <&acc0>; qcom,saw = <&saw0>; + clocks = <&kraitcc 0>, <&kraitcc 4>; + clock-names = "cpu", "l2"; + clock-latency = <100000>; + cpu-supply = <&smb208_s2a>; + operating-points-v2 = <&opp_table0>; + voltage-tolerance = <5>; + cooling-min-state = <0>; + cooling-max-state = <10>; + #cooling-cells = <2>; + cpu-idle-states = <&CPU_SPC>; }; cpu1: cpu@1 { @@ -40,11 +50,37 @@ cpu1: cpu@1 { next-level-cache = <&L2>; qcom,acc = <&acc1>; qcom,saw = <&saw1>; + clocks = <&kraitcc 1>, <&kraitcc 4>; + clock-names = "cpu", "l2"; + clock-latency = <100000>; + cpu-supply = <&smb208_s2b>; + operating-points-v2 = <&opp_table0>; + voltage-tolerance = <5>; + cooling-min-state = <0>; + cooling-max-state = <10>; + #cooling-cells = <2>; + cpu-idle-states = <&CPU_SPC>; + }; + + idle-states { + CPU_SPC: spc { + compatible = "qcom,idle-state-spc"; + status = "disabled"; + entry-latency-us = <400>; + exit-latency-us = <900>; + min-residency-us = <3000>; + }; }; L2: l2-cache { compatible = "cache"; cache-level = <2>; + qcom,saw = <&saw_l2>; + + clocks = <&kraitcc 4>; + clock-names = "l2"; + l2-supply = <&smb208_s1a>; + operating-points-v2 = <&opp_table_l2>; }; }; From patchwork Fri Feb 18 00:29:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 543906 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 962B7C433F5 for ; Fri, 18 Feb 2022 00:31:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230390AbiBRAbX (ORCPT ); Thu, 17 Feb 2022 19:31:23 -0500 Received: from gmail-smtp-in.l.google.com ([23.128.96.19]:52200 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230383AbiBRAbR (ORCPT ); Thu, 17 Feb 2022 19:31:17 -0500 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [IPv6:2a00:1450:4864:20::330]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2E98280908; Thu, 17 Feb 2022 16:30:53 -0800 (PST) Received: by mail-wm1-x330.google.com with SMTP id l12-20020a7bc34c000000b003467c58cbdfso7410800wmj.2; Thu, 17 Feb 2022 16:30:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FwXakkCqC6nmpx2sSEyZ8WtyKHDP7IREPYU/Cq/R1TI=; b=ezSh9CjufdmAx+UAIH25lH4nwSIZ1EqSpTg7eks5CUf63nGyhv9M8ViITSxYH1KZgU buLM/7ofV1KFSJc2eO2XHldysQGonZ7XphIMxOoGpOn55RG/xaOcR9eE60nTzr6Cvb+u 6bU+WuGh8Wu/2R9YQn3UouFPUI3XYFhOIvLIB7Iup3M6MW52ZLihLwYPEnxQkQKYi6yb X0rEIiM5SjIQrrF0npO+gWzezbqzWHBnsmWllkU0Pi81m7xw3CH/zQKPSbYp3uQbTkI+ Hki3A2fujtH36LkBGGxwVK9LX0Vv7dR5PyaW2b4fBy0yJhkJgHyUom9ld4qBzX1r8qO6 yRYw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FwXakkCqC6nmpx2sSEyZ8WtyKHDP7IREPYU/Cq/R1TI=; b=BedgHrFqhrJL4UaiKGKUKLo8W5H4tgZai7G9xVm0YqWs/lBzdkN2Q9nS4RR/8hl4Ys 9+PK4EnqWVnjvQd4Y+9X/ei+7hRkXhqMgGdQsYBmKDLtYsr1FFHn6iyppbJdAoR86XyR SL18inQkNPOZj7XICdhpdtlns+yqfS3xdJbAr2sHqtf3HNjlkMBREEdEpLDqYqUKhXQm bz3Wt+EaEqv6sGW/cLcifoQJmmjum/XCgpPTY2V4AuPWijdZbYMQCkZOLdZdm5Gtzq6M dx1XIh9bLgXtNQ8wmie+HVG/IuLtx5GzYO/ZZt2sWZHqZU7cjzQuxkFOao2HV/O/yM0Z OVug== X-Gm-Message-State: AOAM531fZnX4bDQaHLbVR+uy0GiO5NN9RLIMcY48ki+wxldThmB0HbHv cwFrHKLXhwi6S72Sp1GkH0w= X-Google-Smtp-Source: ABdhPJx5uQAGsw/nGgDP4S25kKdy5cFnt7vF3amEslZJG1tB5Jv5BJhwrS/m+2KV3DbzJ2a8NNyhOQ== X-Received: by 2002:a05:600c:1e8e:b0:37b:e97a:d4c8 with SMTP id be14-20020a05600c1e8e00b0037be97ad4c8mr8205332wmb.189.1645144211680; Thu, 17 Feb 2022 16:30:11 -0800 (PST) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id d29sm3640406wra.63.2022.02.17.16.30.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Feb 2022 16:30:11 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith Subject: [PATCH v2 17/18] ARM: dts: qcom: add ipq8064-v2.0 dtsi Date: Fri, 18 Feb 2022 01:29:55 +0100 Message-Id: <20220218002956.6590-18-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220218002956.6590-1-ansuelsmth@gmail.com> References: <20220218002956.6590-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Many devices are based on the v2.0 of the ipq8064 SoC. Main difference is a change in the pci compatible and different way to configre the usb phy. Signed-off-by: Ansuel Smith --- arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi | 70 ++++++++++++++++++++++++ 1 file changed, 70 insertions(+) create mode 100644 arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi diff --git a/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi b/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi new file mode 100644 index 000000000000..c082c3cd1a19 --- /dev/null +++ b/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi @@ -0,0 +1,70 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "qcom-ipq8064.dtsi" + +/ { + aliases { + serial0 = &gsbi4_serial; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + rsvd@41200000 { + reg = <0x41200000 0x300000>; + no-map; + }; + }; +}; + +&gsbi4 { + qcom,mode = ; + status = "okay"; + + serial@16340000 { + status = "okay"; + }; + /* + * The i2c device on gsbi4 should not be enabled. + * On ipq806x designs gsbi4 i2c is meant for exclusive + * RPM usage. Turning this on in kernel manifests as + * i2c failure for the RPM. + */ +}; + +&CPU_SPC { + status = "okay"; +}; + +&pcie0 { + compatible = "qcom,pcie-ipq8064-v2"; +}; + +&pcie1 { + compatible = "qcom,pcie-ipq8064-v2"; +}; + +&pcie2 { + compatible = "qcom,pcie-ipq8064-v2"; +}; + +&sata { + ports-implemented = <0x1>; +}; + +&ss_phy_0 { + qcom,rx-eq = <2>; + qcom,tx-deamp_3_5db = <32>; + qcom,mpll = <5>; +}; + +&ss_phy_1 { + qcom,rx-eq = <2>; + qcom,tx-deamp_3_5db = <32>; + qcom,mpll = <5>; +};