From patchwork Fri Nov 30 11:53:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 152529 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3562662ljp; Fri, 30 Nov 2018 03:53:43 -0800 (PST) X-Google-Smtp-Source: AFSGD/X8pLfQDNtrqNgvn+ZF5nRR6FCutuWTlVvsH/uX4RUAbr+7f+lqkb/wgigmgqMjrtsdR7qc X-Received: by 2002:a17:902:e18c:: with SMTP id cd12mr5072712plb.279.1543578823412; Fri, 30 Nov 2018 03:53:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543578823; cv=none; d=google.com; s=arc-20160816; b=lkTasuI8gknUF0MfUYiNhZQ0Xk/psAs0LMHQKRtWXuVReKKmV0YkxQqkgJYFcxtMPP J3fHT4F2e/fNXaKpxTFWvjt6pmUYBERuH39f4StUX6LkLjOcZ4wifRyKbvkMCs6aP2Lk /RVZ3zXnFhwK1+mp2/XVg2k8v4yTAte5wIubAD7x7MYgf4coxWZHXq1DsG15d41uHu+p 3m/vAyKhHkHqHPwtSzRWM21GXlNA/3B9HMcf3nyS1JaPs8idhBj0yKvsWn7J22C/tkNP JNmG4e7GElpz2Ks6ZMhHC1ePofRMw/qrfAIaZMXQRfirNT1xQ8YOq1rUQ4hIHxb/HlQ0 5PWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=9Cu0F8XcCviwOyppZmYtR99atTDBIspjwFBk1xADlAk=; b=QHHy+Za+2786dE4x3P0NLRlWQl+VeD1w9qxpivKxdJfvb2XvCRBLeVTek/spCdRgs4 25e42Ec74QCUdey9vk+ZzhNnDYpT/VY2G9yWBWoXB7NawN8lTaFvWTEwuEPpIDjdmZ/f Yc5vIvuSIUBBH3ONXZc3qabi75cfIzbsxnMdPny3g0P9nTOtqponrKBdDs+Pm4nDhh2f er4BANjN8+OBhXnSDrRJEm8CXX2ykdG0dB6KA82JTW3eybIiEZ9zCLftc9iRWdaNltsU XmfhXsgSew6A+aV56UxE5MTTi63d9e/t9tcMp7PjRqjS+fzctjpVmfXhxp1zIlEqCv1k NPww== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=URlN7obK; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[86.30.250.44]) by smtp.gmail.com with ESMTPSA id t10-v6sm767932ejg.41.2018.11.30.03.53.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 30 Nov 2018 03:53:36 -0800 (PST) From: Srinivas Kandagatla To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Alexandre Belloni , Srinivas Kandagatla Subject: [PATCH 1/6] nvmem: add type attribute Date: Fri, 30 Nov 2018 11:53:20 +0000 Message-Id: <20181130115325.16539-2-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181130115325.16539-1-srinivas.kandagatla@linaro.org> References: <20181130115325.16539-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Alexandre Belloni Add a type attribute so userspace is able to know how the data is stored as this can help taking the correct decision when selecting which device to use. This will also help program display the proper warnings when burning fuses for example. Signed-off-by: Alexandre Belloni Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/core.c | 21 +++++++++++++++++++++ include/linux/nvmem-provider.h | 16 ++++++++++++++++ 2 files changed, 37 insertions(+) -- 2.19.2 diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c index 27f67dfa649d..d9fd11033c1c 100644 --- a/drivers/nvmem/core.c +++ b/drivers/nvmem/core.c @@ -28,6 +28,7 @@ struct nvmem_device { size_t size; bool read_only; int flags; + enum nvmem_type type; struct bin_attribute eeprom; struct device *base_dev; struct list_head cells; @@ -83,6 +84,21 @@ static int nvmem_reg_write(struct nvmem_device *nvmem, unsigned int offset, return -EINVAL; } +static ssize_t type_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct nvmem_device *nvmem = to_nvmem_device(dev); + + return sprintf(buf, "%s\n", nvmem_type_str[nvmem->type]); +} + +static DEVICE_ATTR_RO(type); + +static struct attribute *nvmem_attrs[] = { + &dev_attr_type.attr, + NULL, +}; + static ssize_t bin_attr_nvmem_read(struct file *filp, struct kobject *kobj, struct bin_attribute *attr, char *buf, loff_t pos, size_t count) @@ -168,6 +184,7 @@ static struct bin_attribute *nvmem_bin_rw_attributes[] = { static const struct attribute_group nvmem_bin_rw_group = { .bin_attrs = nvmem_bin_rw_attributes, + .attrs = nvmem_attrs, }; static const struct attribute_group *nvmem_rw_dev_groups[] = { @@ -191,6 +208,7 @@ static struct bin_attribute *nvmem_bin_ro_attributes[] = { static const struct attribute_group nvmem_bin_ro_group = { .bin_attrs = nvmem_bin_ro_attributes, + .attrs = nvmem_attrs, }; static const struct attribute_group *nvmem_ro_dev_groups[] = { @@ -215,6 +233,7 @@ static struct bin_attribute *nvmem_bin_rw_root_attributes[] = { static const struct attribute_group nvmem_bin_rw_root_group = { .bin_attrs = nvmem_bin_rw_root_attributes, + .attrs = nvmem_attrs, }; static const struct attribute_group *nvmem_rw_root_dev_groups[] = { @@ -238,6 +257,7 @@ static struct bin_attribute *nvmem_bin_ro_root_attributes[] = { static const struct attribute_group nvmem_bin_ro_root_group = { .bin_attrs = nvmem_bin_ro_root_attributes, + .attrs = nvmem_attrs, }; static const struct attribute_group *nvmem_ro_root_dev_groups[] = { @@ -605,6 +625,7 @@ struct nvmem_device *nvmem_register(const struct nvmem_config *config) nvmem->dev.bus = &nvmem_bus_type; nvmem->dev.parent = config->dev; nvmem->priv = config->priv; + nvmem->type = config->type; nvmem->reg_read = config->reg_read; nvmem->reg_write = config->reg_write; nvmem->dev.of_node = config->dev->of_node; diff --git a/include/linux/nvmem-provider.h b/include/linux/nvmem-provider.h index 1e3283c2af77..00ff92571683 100644 --- a/include/linux/nvmem-provider.h +++ b/include/linux/nvmem-provider.h @@ -19,6 +19,20 @@ typedef int (*nvmem_reg_read_t)(void *priv, unsigned int offset, typedef int (*nvmem_reg_write_t)(void *priv, unsigned int offset, void *val, size_t bytes); +enum nvmem_type { + NVMEM_TYPE_UNKNOWN = 0, + NVMEM_TYPE_EEPROM, + NVMEM_TYPE_OTP, + NVMEM_TYPE_BATTERY_BACKED, +}; + +static const char * const nvmem_type_str[] = { + [NVMEM_TYPE_UNKNOWN] = "Unknown", + [NVMEM_TYPE_EEPROM] = "EEPROM", + [NVMEM_TYPE_OTP] = "OTP", + [NVMEM_TYPE_BATTERY_BACKED] = "Battery backed", +}; + /** * struct nvmem_config - NVMEM device configuration * @@ -28,6 +42,7 @@ typedef int (*nvmem_reg_write_t)(void *priv, unsigned int offset, * @owner: Pointer to exporter module. Used for refcounting. * @cells: Optional array of pre-defined NVMEM cells. * @ncells: Number of elements in cells. + * @type: Type of the nvmem storage * @read_only: Device is read-only. * @root_only: Device is accessibly to root only. * @reg_read: Callback to read data. @@ -51,6 +66,7 @@ struct nvmem_config { struct module *owner; const struct nvmem_cell_info *cells; int ncells; + enum nvmem_type type; bool read_only; bool root_only; nvmem_reg_read_t reg_read; From patchwork Fri Nov 30 11:53:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 152530 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3562686ljp; Fri, 30 Nov 2018 03:53:44 -0800 (PST) X-Google-Smtp-Source: AFSGD/X+TB5Filnalsxynh3pYRseQTYjiukRQpFXrkJims/VBRS3uRE7i026DK5SNrW27Vv1jxbQ X-Received: by 2002:a63:4c04:: with SMTP id z4mr4673592pga.312.1543578824789; Fri, 30 Nov 2018 03:53:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543578824; cv=none; d=google.com; s=arc-20160816; b=Ak6pxdVu2WtHnwOpZLlJAvDW4EZUQYBQAypjP2juOL+OKQgoCSZnFaK3d8c6EmX0/B 81rKopnqroxkzdB5YwmH5Sve+0aoGu4kZ6aDrRbkAROrh0ylDe8+Ftj6XCc/qc/pcUNm RZ6NFbkEIoHFzGZe4ZnLuteCHvMgrAhxlInWQdFECG9YGNovohrliev7prkTRvk9JFTF VA4S1RZ/9+VoAeqGgJidUes1IBn73+i/p9YaB6TlzRQuRuk2foBj3ieW/xfYhEFjBgxK uO52QKPVK6gP5OMXyhX1239/2+3W5eV99H8ZeZjZ5KCd3i9/Az9VFtdSR5NshSfBvN9K pbsA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=zXEVfusJTtHYF8K5u4w1iFuAS8eAG0ioA/9REdMjm+I=; b=KMs78ndyEeNeXBIRpRD9gNvpe5LjXXO3xOgsG/024I8NB2WQeyTTeHzJ4tifeEn0vT j4G+VDhqitiD48rzgDIdGJjLeBkpTmZ75g7AcN7SzrcQTU/AdHvdLkk9bMePbaWsP2sK 3Lo6AMU5gtG1bPxCmwEw3xghcX5669uZ6mglsyzF9/tbKJAqfteq7fe4V4zbqzw4Z3ir cmnuPtssYombNnqxQRMzkTYUrmf6DpOSxI1EGHZ+2YPsDMiUxf6TnjtJ81xAGwg1PSd2 wZtwLtdnWyxBusISUJozJtDgUsqlCrQvHHaun0leATT39iI5w4X9JuRogSFvZp9VN+D0 zItw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NwobcONk; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[86.30.250.44]) by smtp.gmail.com with ESMTPSA id t10-v6sm767932ejg.41.2018.11.30.03.53.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 30 Nov 2018 03:53:37 -0800 (PST) From: Srinivas Kandagatla To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Jerome Brunet , Srinivas Kandagatla Subject: [PATCH 2/6] nvmem: meson-efuse: add error message on user_max failure. Date: Fri, 30 Nov 2018 11:53:21 +0000 Message-Id: <20181130115325.16539-3-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181130115325.16539-1-srinivas.kandagatla@linaro.org> References: <20181130115325.16539-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jerome Brunet Add an explicit error message when SM_EFUSE_USER_MAX command fails Signed-off-by: Jerome Brunet Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/meson-efuse.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) -- 2.19.2 diff --git a/drivers/nvmem/meson-efuse.c b/drivers/nvmem/meson-efuse.c index d769840d1e18..40b9df1d030d 100644 --- a/drivers/nvmem/meson-efuse.c +++ b/drivers/nvmem/meson-efuse.c @@ -48,8 +48,10 @@ static int meson_efuse_probe(struct platform_device *pdev) struct nvmem_config *econfig; unsigned int size; - if (meson_sm_call(SM_EFUSE_USER_MAX, &size, 0, 0, 0, 0, 0) < 0) + if (meson_sm_call(SM_EFUSE_USER_MAX, &size, 0, 0, 0, 0, 0) < 0) { + dev_err(dev, "failed to get max user"); return -EINVAL; + } econfig = devm_kzalloc(dev, sizeof(*econfig), GFP_KERNEL); if (!econfig) From patchwork Fri Nov 30 11:53:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 152531 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3562707ljp; Fri, 30 Nov 2018 03:53:46 -0800 (PST) X-Google-Smtp-Source: AFSGD/V5IGhdiehXE9mS/7ATfWOb1gC7wvBSLtC0W1tNYrI/MhLfYiwlnozrVg+TiqvYxYy21MwY X-Received: by 2002:a63:5b48:: with SMTP id l8mr4648050pgm.80.1543578826158; Fri, 30 Nov 2018 03:53:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543578826; cv=none; d=google.com; s=arc-20160816; b=clHLWRoxJ+C6yUCKSYFf6PuDhy8Lmz63Oj+h+YliGxpIYYYcS6/djt612zrFLdfLdJ 4sM8OSyb8afI1MeM0W8Vj6zQloDX6LJXY59uMzK8yQnTVXTa2RRp1EKF7Ue5s7v5PMnO LXGhLSBum4v6H16bhlHLGKiVVNl8XKOhoBn3JvW7XjC4tErZG1g1D5wY/WMpVR77haUC FF1t1wCNR+f9Oou75Rd+LrTgX/m5A/eqdY0O/0hxQf7R2AC5MilrGmkn06MR0cQeXn51 gbdueEkU2cNgXNf9l0NF561/L7RZ3PJDjwmsp2EBB9sFA+nSzCFRZqbGX+KxQSUBmGCS gNeQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=H33ktSuQAG7GnDXaINaiGeybXobaVgyReSvlLCj+Svk=; b=d3XmoibD1DFM9o3PSgue4Wn3prw6Nj6Pn1xYnieJF7ow8uKtVJi4j4fGP6Op29XYVn CDEuHd9Q0nYHUub2Ym/nx7J9RcFA9zWXILk6q8frVZuhpekml9WI9NNzLN+ktlmB65S4 20vzkAgq4gBwmMAteM7eh+rOPW/bQXjvdZGcPprfCR3QZ8l3lrZ7WmL+R4h9xdQI8IHS jVVxwFOxA9iuBFEvLmbVb8jh2KhUIHtr5+V8Uj10iS1yrOTRMvPFB8FGQP+fcpCO0hR7 zVWbe2BhzLasAg+Ne7Tsz/dhHvqhGUD+Qd6OAhJLS2cyu2FlD7bEc023p9ZzLQPZz5U6 wxWQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MK3iAAUw; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[86.30.250.44]) by smtp.gmail.com with ESMTPSA id t10-v6sm767932ejg.41.2018.11.30.03.53.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 30 Nov 2018 03:53:40 -0800 (PST) From: Srinivas Kandagatla To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Jerome Brunet , Srinivas Kandagatla Subject: [PATCH 3/6] nvmem: meson-efuse: bindings: add peripheral clock Date: Fri, 30 Nov 2018 11:53:22 +0000 Message-Id: <20181130115325.16539-4-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181130115325.16539-1-srinivas.kandagatla@linaro.org> References: <20181130115325.16539-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jerome Brunet The efuse found in gx SoC requires a peripheral clock to properly operate. We have been able to work without it until now because the clock was on by default, and left on by the CCF. Soon, it will not be the case anymore, so the device needs to claim the clock it needs Signed-off-by: Jerome Brunet Reviewed-by: Rob Herring Signed-off-by: Srinivas Kandagatla --- Documentation/devicetree/bindings/nvmem/amlogic-efuse.txt | 3 +++ 1 file changed, 3 insertions(+) -- 2.19.2 diff --git a/Documentation/devicetree/bindings/nvmem/amlogic-efuse.txt b/Documentation/devicetree/bindings/nvmem/amlogic-efuse.txt index e3298e18de26..2e0723ab3384 100644 --- a/Documentation/devicetree/bindings/nvmem/amlogic-efuse.txt +++ b/Documentation/devicetree/bindings/nvmem/amlogic-efuse.txt @@ -2,6 +2,8 @@ Required properties: - compatible: should be "amlogic,meson-gxbb-efuse" +- clocks: phandle to the efuse peripheral clock provided by the + clock controller. = Data cells = Are child nodes of eFuse, bindings of which as described in @@ -11,6 +13,7 @@ Example: efuse: efuse { compatible = "amlogic,meson-gxbb-efuse"; + clocks = <&clkc CLKID_EFUSE>; #address-cells = <1>; #size-cells = <1>; From patchwork Fri Nov 30 11:53:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 152534 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3562955ljp; Fri, 30 Nov 2018 03:54:01 -0800 (PST) X-Google-Smtp-Source: AFSGD/V1cljflC45Ml5kTnNEMb3cSZXPmT5s8XAjVGlESDnnlcy8bIGKqX+USBBaM4BdHZ6qDq03 X-Received: by 2002:a17:902:8d8e:: with SMTP id v14mr5353388plo.133.1543578840952; Fri, 30 Nov 2018 03:54:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543578840; cv=none; d=google.com; s=arc-20160816; b=WO8jWe3/Ze0pLckFdq9L/YdYMKqr9C4Xixo26nuiWFgHy0Z4ieRUqU1WOFS8X8ORm8 LV9mnwR2Trr5EnmtXPUxsSdPSMokiaELUiQtP2b8ZrntL/14qzPJk7KLusElyzngPNc5 +JT6b8CjToMhRkBxFTmOoqATcagkGOVDN1+7Mpn8CXJxqFRQG0VSg1tNDxAqZSZn46tG IRaK/m14odAWpa2Rgy2xmgd6Og2opHL6wRrXcdpxjxXwgSjGakwd0qXaoH4aei7TJ3wu gK/T85tEgME9p8lprCC5kb6J1hvDyMMU2gtqyrasUzJnSHXaW1a2EGT0CFfovWKPCAav TFvA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=zehP8SR5e83ZAa8EuIqw69rvUStjAg1EoGYsdwg63ew=; b=RocsCox9cSNlgvxxG5rrQDvwDtRc8fnpst+bTq3iC+G9A3Wi398pcXDdOhNvE/LIAm mfXFolKJ7C6gplGDPCa4j8HvrbtN2GtZQz+ZQnWLDZ0TuoGqoQalK/A6P5IP8U8cKAxn xyNmsdgE9GIpUkKDFCOT3MnWVFOZS383/PmeW0fGE2ev7HRxGN+OiuECsGTbo8HJ1xQJ kX+D00Sl2URrNCYJsOJfy8LKR4mn6anCifGM7hMERhUZme6CJe3u6QAiTHRxHysx9a4U RNvs5UrmfQskMi/kgwaxEmhVKCqapWquURhBPIkKakcRnUfPY2LJMh8PSafs9419Dc5W gYNA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fVIJri1Z; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[86.30.250.44]) by smtp.gmail.com with ESMTPSA id t10-v6sm767932ejg.41.2018.11.30.03.53.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 30 Nov 2018 03:53:41 -0800 (PST) From: Srinivas Kandagatla To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Jerome Brunet , Srinivas Kandagatla Subject: [PATCH 4/6] nvmem: meson-efuse: add peripheral clock Date: Fri, 30 Nov 2018 11:53:23 +0000 Message-Id: <20181130115325.16539-5-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181130115325.16539-1-srinivas.kandagatla@linaro.org> References: <20181130115325.16539-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jerome Brunet Get and enable the peripheral clock required by the efuse device. The driver has been handle to work without it so far because the clock was left enabled by default but it won't be the case soon. Signed-off-by: Jerome Brunet Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/meson-efuse.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) -- 2.19.2 diff --git a/drivers/nvmem/meson-efuse.c b/drivers/nvmem/meson-efuse.c index 40b9df1d030d..99372768446b 100644 --- a/drivers/nvmem/meson-efuse.c +++ b/drivers/nvmem/meson-efuse.c @@ -14,6 +14,7 @@ * more details. */ +#include #include #include #include @@ -46,7 +47,31 @@ static int meson_efuse_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct nvmem_device *nvmem; struct nvmem_config *econfig; + struct clk *clk; unsigned int size; + int ret; + + clk = devm_clk_get(dev, NULL); + if (IS_ERR(clk)) { + ret = PTR_ERR(clk); + if (ret != -EPROBE_DEFER) + dev_err(dev, "failed to get efuse gate"); + return ret; + } + + ret = clk_prepare_enable(clk); + if (ret) { + dev_err(dev, "failed to enable gate"); + return ret; + } + + ret = devm_add_action_or_reset(dev, + (void(*)(void *))clk_disable_unprepare, + clk); + if (ret) { + dev_err(dev, "failed to add disable callback"); + return ret; + } if (meson_sm_call(SM_EFUSE_USER_MAX, &size, 0, 0, 0, 0, 0) < 0) { dev_err(dev, "failed to get max user"); From patchwork Fri Nov 30 11:53:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 152532 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3562738ljp; Fri, 30 Nov 2018 03:53:48 -0800 (PST) X-Google-Smtp-Source: AFSGD/VUUJYsCGBMZOE7bKfO66o2+MnMHwDvWUHxI8r+0fZO7Zvd/nasCpQDDVpTfIOUZ4a0+cPz X-Received: by 2002:a63:d10:: with SMTP id c16mr4633835pgl.382.1543578828119; Fri, 30 Nov 2018 03:53:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543578828; cv=none; d=google.com; s=arc-20160816; b=uceIw+JaevVD+MW0niilUTDPcKv97qp7P37M+bnh5+PKI5iObGt6yrMPExinl3ACnt dJgJurjnw7coCJLMq5y0tXdSTgRPedUG4US4ieEPn+42Gy6JLtDo+B00/9zbbl1eVDl/ hE32dD2iyTlKUdM4lfqAx+yDby9uua+kM8e84Xd5oXiekpKFr2F8TxldEd3NQFfWZfye VOio3Z3jpTH4IiYFFAmoGCl2JLstmDOY7Mb6ozphJ1xlA26EbiO+V0IPwveh+SI2IfEz MSImIm1LjFYP1b1qajPA4Ik8aesh0dX1Cp+ksiowT9XakCE0pM375FZ4ZzcRZynlESx6 lDTg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=S2XBbpoddUxn8L0Ic4aH0nP9i4f9kF4ywqyELelq9lw=; b=SMLUyerA94kYwPBeoscF8UbidN0ZWOXkSDugRRgR9603eKFzbQhrEAGfh5eaOsK49z SSg7n0ekfIvdkBDmasAJT3Ie4QC3u3nH4WoKM1wqK+huN5yn0+pycmJsOHaPjYThrWVZ 2ylrFg+q48nbYmcNv5XpQIWMQJLn8jBxLpPZxz6pLntRzKlKrgyjCrOjP6wB/5w902MP euvLdDmfbHjosZ/5Fw9el4UOxC9lDYS9YN135Hd8EgcmC2MNlQuqB5Qw+2Ovw7wmBgoX H6Ln1UTQl1sFU7yiYr/Bcl3CJ7oB8u+9XVbG1Ts1kZbSiSYVM4HSUlE0gZET2CTeZO/k BHTg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Dvl/HPIx"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[86.30.250.44]) by smtp.gmail.com with ESMTPSA id t10-v6sm767932ejg.41.2018.11.30.03.53.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 30 Nov 2018 03:53:42 -0800 (PST) From: Srinivas Kandagatla To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Andy Shevchenko , Srinivas Kandagatla Subject: [PATCH 5/6] nvmem: Move nvmem_type_str array to its only user Date: Fri, 30 Nov 2018 11:53:24 +0000 Message-Id: <20181130115325.16539-6-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181130115325.16539-1-srinivas.kandagatla@linaro.org> References: <20181130115325.16539-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Andy Shevchenko Since we put static variable to a header file it's copied to each module that includes the header. But not all of them are actually using it. Move nvmem_type_str array to its only user to make a compiler happy: In file included from include/linux/rtc.h:18, from drivers/rtc/rtc-proc.c:15: include/linux/nvmem-provider.h:29:27: warning: 'nvmem_type_str' defined but not used [-Wunused-const-variable=] static const char * const nvmem_type_str[] = { ^~~~~~~~~~~~~~ Suggested-by: Alexandre Belloni Suggested-by: Joe Perches Cc: Srinivas Kandagatla Signed-off-by: Andy Shevchenko Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/core.c | 7 +++++++ include/linux/nvmem-provider.h | 7 ------- 2 files changed, 7 insertions(+), 7 deletions(-) -- 2.19.2 diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c index d9fd11033c1c..22345e65a301 100644 --- a/drivers/nvmem/core.c +++ b/drivers/nvmem/core.c @@ -61,6 +61,13 @@ static LIST_HEAD(nvmem_lookup_list); static BLOCKING_NOTIFIER_HEAD(nvmem_notifier); +static const char * const nvmem_type_str[] = { + [NVMEM_TYPE_UNKNOWN] = "Unknown", + [NVMEM_TYPE_EEPROM] = "EEPROM", + [NVMEM_TYPE_OTP] = "OTP", + [NVMEM_TYPE_BATTERY_BACKED] = "Battery backed", +}; + #ifdef CONFIG_DEBUG_LOCK_ALLOC static struct lock_class_key eeprom_lock_key; #endif diff --git a/include/linux/nvmem-provider.h b/include/linux/nvmem-provider.h index 00ff92571683..5b2dd0a987d2 100644 --- a/include/linux/nvmem-provider.h +++ b/include/linux/nvmem-provider.h @@ -26,13 +26,6 @@ enum nvmem_type { NVMEM_TYPE_BATTERY_BACKED, }; -static const char * const nvmem_type_str[] = { - [NVMEM_TYPE_UNKNOWN] = "Unknown", - [NVMEM_TYPE_EEPROM] = "EEPROM", - [NVMEM_TYPE_OTP] = "OTP", - [NVMEM_TYPE_BATTERY_BACKED] = "Battery backed", -}; - /** * struct nvmem_config - NVMEM device configuration * From patchwork Fri Nov 30 11:53:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 152533 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3562754ljp; Fri, 30 Nov 2018 03:53:49 -0800 (PST) X-Google-Smtp-Source: AFSGD/Xf8iQff4vQ0sVySqLvxlU64T48ucjtIXQn1I+gWu/9HiQQ1B1uHAGtWkKkJuzNcULIN6Md X-Received: by 2002:a62:1c06:: with SMTP id c6mr5203126pfc.157.1543578829282; Fri, 30 Nov 2018 03:53:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543578829; cv=none; d=google.com; s=arc-20160816; b=xVSi1zGktqA2lcPu0uovjPymn0LVejTOdykSGKH85eKIXKfwDLqXIMHvlubrsX3Rnz A7v1ZLRQ7mBpccZxDQNmxDlkyS1XfYrKDWf9MnhnKfmgxfVAmPTjB/ZfJnd56k54Ozuk lxf787XS23+Xf2irxcSxdMo0PSegGQRgEu0FqU78pSToJH9oZLB7PHkHwR6sTOw2Ax2K CwPInY8aDQPBkVNEko0LzrWsLfElPH/PQ9Vi67JipJVfVZDJnsdGNG2OePkG17c/ixYc Ct8SCyInC61WThWZ03eW/UTOFP6qju8pm8gakELgQUK7MgVlbjL8NsF6uUPg+shm32D/ OSzg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Uj1/fNKFSJQYG76kuDm1FhuBMKBVCAd9YSvKr8WrTa4=; b=p/AhP9/iKFWG0xyhGcGCaZnbDQnJP5AVLQZjv/uBrzTL3E83oiUfK7UAnWDmMaFWrK ivlYC5rZVxUQFd8nAzCaBpMyrp+KO9R9S6H9XMcuAvJ6KRlMllGg5K94542bxlO6DU3U V3bVlumI+ZFkqA1KLFai6TFUhxqmwgBvMXvEKDwTu0jPzeiOOIC0PUUHG1cm8xd3U+1L STeMCaVjrps8hmwvBmHEuFmvjLQVksTkEhpTTOdoF+VEHaAbNpYUHXLRRqOx4yHR2XQ0 u/H/h0wGq2Chje+71bJGNuGGQETJcssmwfnHcjItZfxBZFMMD0wLbZMNuaN4hKdr7/3Q ILrw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iGi6bGe9; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[86.30.250.44]) by smtp.gmail.com with ESMTPSA id t10-v6sm767932ejg.41.2018.11.30.03.53.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 30 Nov 2018 03:53:43 -0800 (PST) From: Srinivas Kandagatla To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Bartosz Golaszewski , Srinivas Kandagatla Subject: [PATCH 6/6] nvmem: add new config option Date: Fri, 30 Nov 2018 11:53:25 +0000 Message-Id: <20181130115325.16539-7-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181130115325.16539-1-srinivas.kandagatla@linaro.org> References: <20181130115325.16539-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bartosz Golaszewski We want to add nvmem support for MTD. TI DaVinci is the first platform that will be using it, but only in non-DT mode. In order not to introduce any new interface to supporting of which we would have to commit - add a new config option that tells nvmem not to use the DT node of the parent device. This way we won't be creating nvmem devices corresponding with MTD partitions defined in device tree. By default MTD will set this new field to true. Once a set of bindings for MTD nvmem cells is agreed upon, we'll be able to remove this option. Signed-off-by: Bartosz Golaszewski Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/core.c | 3 ++- include/linux/nvmem-provider.h | 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-) -- 2.19.2 diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c index 22345e65a301..f7301bb4ef3b 100644 --- a/drivers/nvmem/core.c +++ b/drivers/nvmem/core.c @@ -635,7 +635,8 @@ struct nvmem_device *nvmem_register(const struct nvmem_config *config) nvmem->type = config->type; nvmem->reg_read = config->reg_read; nvmem->reg_write = config->reg_write; - nvmem->dev.of_node = config->dev->of_node; + if (!config->no_of_node) + nvmem->dev.of_node = config->dev->of_node; if (config->id == -1 && config->name) { dev_set_name(&nvmem->dev, "%s", config->name); diff --git a/include/linux/nvmem-provider.h b/include/linux/nvmem-provider.h index 5b2dd0a987d2..fe051323be0a 100644 --- a/include/linux/nvmem-provider.h +++ b/include/linux/nvmem-provider.h @@ -38,6 +38,7 @@ enum nvmem_type { * @type: Type of the nvmem storage * @read_only: Device is read-only. * @root_only: Device is accessibly to root only. + * @no_of_node: Device should not use the parent's of_node even if it's !NULL. * @reg_read: Callback to read data. * @reg_write: Callback to write data. * @size: Device size. @@ -62,6 +63,7 @@ struct nvmem_config { enum nvmem_type type; bool read_only; bool root_only; + bool no_of_node; nvmem_reg_read_t reg_read; nvmem_reg_write_t reg_write; int size;