From patchwork Fri Mar 4 09:05:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianqun Xu X-Patchwork-Id: 548630 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0418DC433F5 for ; Fri, 4 Mar 2022 09:06:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234173AbiCDJHM (ORCPT ); Fri, 4 Mar 2022 04:07:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58360 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236109AbiCDJG2 (ORCPT ); Fri, 4 Mar 2022 04:06:28 -0500 Received: from mail-m17661.qiye.163.com (mail-m17661.qiye.163.com [59.111.176.61]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8392A1A06C1 for ; Fri, 4 Mar 2022 01:05:27 -0800 (PST) Received: from localhost.localdomain (unknown [58.22.7.114]) by mail-m17661.qiye.163.com (Hmail) with ESMTPA id DE0C41DFBA5; Fri, 4 Mar 2022 17:05:25 +0800 (CST) From: Jianqun Xu To: heiko@sntech.de Cc: linus.walleij@linaro.org, linux-rockchip@lists.infradead.org, linux-gpio@vger.kernel.org, Jianqun Xu Subject: [PATCH 1/3] gpio: rockchip: make gpio work without cru module Date: Fri, 4 Mar 2022 17:05:21 +0800 Message-Id: <20220304090523.1748297-2-jay.xu@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220304090523.1748297-1-jay.xu@rock-chips.com> References: <20220304090523.1748297-1-jay.xu@rock-chips.com> MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUtXWQgPGg8OCBgUHx5ZQUlOS1dZCBgUCR5ZQVlLVUtZV1 kWDxoPAgseWUFZKDYvK1lXWShZQUlKS0tKN1dZLVlBSVdZDwkaFQgSH1lBWRkZGE9WGBlOQh0eSx kdThpPVRMBExYaEhckFA4PWVdZFhoPEhUdFFlBWU9LSFVKSktISkNVS1kG X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6PSI6Dgw6Pz4DHT88LSEYLBQC MjRPCjFVSlVKTU9NSENPTElNTklLVTMWGhIXVREaAlUDDjsJFBgQVhgTEgsIVRgUFkVZV1kSC1lB WU5DVUlJVUxVSkpPWVdZCAFZQUlDTEg3Bg++ X-HM-Tid: 0a7f542d4006da2bkuwsde0c41dfba5 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org In some case the system may has no builtin cru module, the gpio driver will fail to get periph clock and debounce clock. On rockchip SoCs, the pclk and dbg clk are default to be enabled and ungated, the gpio possible to work without cru module. This patch makes gpio work fine without cru module. Signed-off-by: Jianqun Xu --- drivers/gpio/gpio-rockchip.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c index a4c4e4584f5b..1da0324445cc 100644 --- a/drivers/gpio/gpio-rockchip.c +++ b/drivers/gpio/gpio-rockchip.c @@ -195,6 +195,9 @@ static int rockchip_gpio_set_debounce(struct gpio_chip *gc, unsigned int cur_div_reg; u64 div; + if (!bank->db_clk) + return -ENOENT; + if (bank->gpio_type == GPIO_TYPE_V2 && !IS_ERR(bank->db_clk)) { div_debounce_support = true; freq = clk_get_rate(bank->db_clk); @@ -654,8 +657,10 @@ static int rockchip_get_bank_data(struct rockchip_pin_bank *bank) return -EINVAL; bank->clk = of_clk_get(bank->of_node, 0); - if (IS_ERR(bank->clk)) - return PTR_ERR(bank->clk); + if (IS_ERR(bank->clk)) { + bank->clk = NULL; + dev_warn(bank->dev, "works without clk pm\n"); + } clk_prepare_enable(bank->clk); id = readl(bank->reg_base + gpio_regs_v2.version_id); @@ -666,9 +671,8 @@ static int rockchip_get_bank_data(struct rockchip_pin_bank *bank) bank->gpio_type = GPIO_TYPE_V2; bank->db_clk = of_clk_get(bank->of_node, 1); if (IS_ERR(bank->db_clk)) { - dev_err(bank->dev, "cannot find debounce clk\n"); - clk_disable_unprepare(bank->clk); - return -EINVAL; + bank->db_clk = NULL; + dev_warn(bank->dev, "works without debounce clk pm\n"); } } else { bank->gpio_regs = &gpio_regs_v1; From patchwork Fri Mar 4 09:05:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianqun Xu X-Patchwork-Id: 548631 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D726FC433F5 for ; Fri, 4 Mar 2022 09:06:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236686AbiCDJHB (ORCPT ); Fri, 4 Mar 2022 04:07:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58654 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236689AbiCDJG2 (ORCPT ); Fri, 4 Mar 2022 04:06:28 -0500 Received: from mail-m17661.qiye.163.com (mail-m17661.qiye.163.com [59.111.176.61]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9C0FE18C7AE for ; Fri, 4 Mar 2022 01:05:28 -0800 (PST) Received: from localhost.localdomain (unknown [58.22.7.114]) by mail-m17661.qiye.163.com (Hmail) with ESMTPA id 8C1CC1DFEB0; Fri, 4 Mar 2022 17:05:26 +0800 (CST) From: Jianqun Xu To: heiko@sntech.de Cc: linus.walleij@linaro.org, linux-rockchip@lists.infradead.org, linux-gpio@vger.kernel.org, Jianqun Xu Subject: [PATCH 2/3] gpio: rockchip: get pinctrl node from 'gpio-ranges' property Date: Fri, 4 Mar 2022 17:05:22 +0800 Message-Id: <20220304090523.1748297-3-jay.xu@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220304090523.1748297-1-jay.xu@rock-chips.com> References: <20220304090523.1748297-1-jay.xu@rock-chips.com> MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUtXWQgPGg8OCBgUHx5ZQUlOS1dZCBgUCR5ZQVlLVUtZV1 kWDxoPAgseWUFZKDYvK1lXWShZQUlKS0tKN1dZLVlBSVdZDwkaFQgSH1lBWRpPHxpWHUlIGU4eQh odSU1CVRMBExYaEhckFA4PWVdZFhoPEhUdFFlBWU9LSFVKSktITUpVS1kG X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6MBA6Qzo6Ez5PDT9OFxkdLAss GDowFCtVSlVKTU9NSENPTElNQkpKVTMWGhIXVREaAlUDDjsJFBgQVhgTEgsIVRgUFkVZV1kSC1lB WU5DVUlJVUxVSkpPWVdZCAFZQUlDS083Bg++ X-HM-Tid: 0a7f542d429fda2bkuws8c1cc1dfeb0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The dt nodes for rockchip soc designes as pinctrl: pinctrl { gpio { }; }; Currently, we get the pinctrl dt node from parent of gpio, this patch try to get pinctrl dt node from 'gpio-ranges' property. After this patch, the dt nodes possible to be gpio { gpio-ranges = <&pinctrl xxx>; }; pinctrl: pinctrl { }; then the gpio driver could register as platform device itself, but not populate from pinctrl driver. Signed-off-by: Jianqun Xu --- drivers/gpio/gpio-rockchip.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c index 1da0324445cc..46c54dff92db 100644 --- a/drivers/gpio/gpio-rockchip.c +++ b/drivers/gpio/gpio-rockchip.c @@ -690,6 +690,9 @@ rockchip_gpio_find_bank(struct pinctrl_dev *pctldev, int id) int i, found = 0; info = pinctrl_dev_get_drvdata(pctldev); + if (!info) + return NULL; + bank = info->ctrl->pin_banks; for (i = 0; i < info->ctrl->nr_banks; i++, bank++) { if (bank->bank_num == id) { @@ -705,15 +708,16 @@ static int rockchip_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct device_node *np = dev->of_node; - struct device_node *pctlnp = of_get_parent(np); + struct device_node *pctlnp = NULL; struct pinctrl_dev *pctldev = NULL; struct rockchip_pin_bank *bank = NULL; struct rockchip_pin_output_deferred *cfg; static int gpio; int id, ret; - if (!np || !pctlnp) - return -ENODEV; + pctlnp = of_parse_phandle(np, "gpio-ranges", 0); + if (!pctlnp) + pctlnp = of_get_parent(np); pctldev = of_pinctrl_get(pctlnp); if (!pctldev) From patchwork Fri Mar 4 09:05:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianqun Xu X-Patchwork-Id: 548381 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7FA53C4332F for ; Fri, 4 Mar 2022 09:06:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236545AbiCDJHC (ORCPT ); Fri, 4 Mar 2022 04:07:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236726AbiCDJG3 (ORCPT ); Fri, 4 Mar 2022 04:06:29 -0500 Received: from mail-m17661.qiye.163.com (mail-m17661.qiye.163.com [59.111.176.61]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C80D2192E36 for ; Fri, 4 Mar 2022 01:05:28 -0800 (PST) Received: from localhost.localdomain (unknown [58.22.7.114]) by mail-m17661.qiye.163.com (Hmail) with ESMTPA id EB3B01DFE78; Fri, 4 Mar 2022 17:05:26 +0800 (CST) From: Jianqun Xu To: heiko@sntech.de Cc: linus.walleij@linaro.org, linux-rockchip@lists.infradead.org, linux-gpio@vger.kernel.org, Jianqun Xu Subject: [PATCH 3/3] dt-bindings: gpio: rockchip,gpio add optional 'gpio-ranges' Date: Fri, 4 Mar 2022 17:05:23 +0800 Message-Id: <20220304090523.1748297-4-jay.xu@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220304090523.1748297-1-jay.xu@rock-chips.com> References: <20220304090523.1748297-1-jay.xu@rock-chips.com> MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUtXWQgPGg8OCBgUHx5ZQUlOS1dZCBgUCR5ZQVlLVUtZV1 kWDxoPAgseWUFZKDYvK1lXWShZQUlKS0tKN1dZLVlBSVdZDwkaFQgSH1lBWUNMSUhWSUJCTBlKTU wYS0kaVRMBExYaEhckFA4PWVdZFhoPEhUdFFlBWU9LSFVKSktISkNVS1kG X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6PBg6TDo*UT5PSj9WLSEvLBdD EgkKC0xVSlVKTU9NSENPTElMSEtIVTMWGhIXVREaAlUDDjsJFBgQVhgTEgsIVRgUFkVZV1kSC1lB WU5DVUlJVUxVSkpPWVdZCAFZQUlKQ0I3Bg++ X-HM-Tid: 0a7f542d4426da2bkuwseb3b01dfe78 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add a optional property 'gpio-ranges', such as gpio-ranges = <&pinctrl 0 0 32>; When the gpio nodes are under pinctrl, the property 'gpio-ranges' is a optional property, but when they are under root node, the property 'gpio-ranges' is a required property. Signed-off-by: Jianqun Xu --- .../devicetree/bindings/gpio/rockchip,gpio-bank.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml index d4e42c2b995b..7a075fcea75f 100644 --- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml @@ -49,7 +49,12 @@ required: - interrupt-controller - "#interrupt-cells" -additionalProperties: false +additionalProperties: true + gpio-ranges: + maxItems: 1 + description: | + The property is a optional if gpio node under pinctrl node; + but it is a required property if the gpio is under root node. examples: - |