From patchwork Tue Apr 19 13:36:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 563880 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A8FCC433F5 for ; Tue, 19 Apr 2022 13:41:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240499AbiDSNn7 (ORCPT ); Tue, 19 Apr 2022 09:43:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37002 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352553AbiDSNls (ORCPT ); Tue, 19 Apr 2022 09:41:48 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5C26D381AA; Tue, 19 Apr 2022 06:38:55 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id EE5CF616A7; Tue, 19 Apr 2022 13:38:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2F1F3C385B0; Tue, 19 Apr 2022 13:38:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1650375534; bh=4iDu1ZR93Hpdk0ePDMtItzf+hxINHA/lI2UqgUNvzAk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iYu4XDHn5LNc7q3bp0MnU+38E/Ct276pZyBclM70B5U7U15YheXM7tnLSDrpUiUFQ LOdrjAjpzyttsvLOqFC2b7tDcSoaZFMybnxyY5aUJrfJtURup3vbi2iY75ltYnDLuS R0BLoJT+6r95ZIXxT2lNCWCFV7jGVZ7Sde1XjlYMf9LdvnqvV4unQN9PnYwj+Xjx8X 7eBiNtO4k2iiNvODCKeMIIYXlu+l9Iz92DSuTWievPEejspI9ZHnElvJr2WOS2dbqw lFRLt6aXKxLOfia2VmyXNyqNDgSTrk89Sgbp424LQiBRKM9tKYyKriV+ZzqFh6k3u5 x1pStxY//K6Sg== From: Arnd Bergmann To: linux-omap@vger.kernel.org, tony@atomide.com, aaro.koskinen@iki.fi, jmkrzyszt@gmail.com Cc: Arnd Bergmann , Russell King , Paul Walmsley , Kevin Hilman , Peter Ujfalusi , Vinod Koul , Dmitry Torokhov , Ulf Hansson , Dominik Brodowski , Mark Brown , Felipe Balbi , Alan Stern , Lee Jones , Daniel Thompson , Jingoo Han , Helge Deller , Linus Walleij , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, dmaengine@vger.kernel.org, linux-input@vger.kernel.org, linux-mmc@vger.kernel.org, linux-serial@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org, alsa-devel@alsa-project.org Subject: [PATCH 10/41] ARM: omap1: move CF chipselect setup to board file Date: Tue, 19 Apr 2022 15:36:52 +0200 Message-Id: <20220419133723.1394715-11-arnd@kernel.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20220419133723.1394715-1-arnd@kernel.org> References: <20220419133723.1394715-1-arnd@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Arnd Bergmann There is only one board that uses the omap_cf driver, so moving the chipselect configuration there does not lead to code duplication but avoids the use of mach/tc.h in drivers. Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/board-osk.c | 38 ++++++++++++++++++++++++++++----- drivers/pcmcia/Kconfig | 3 ++- drivers/pcmcia/omap_cf.c | 38 ++++++--------------------------- 3 files changed, 42 insertions(+), 37 deletions(-) diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index b627a4351cf0..5dbc8f109aa7 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -153,14 +153,14 @@ static struct resource osk5912_cf_resources[] = { [0] = { .flags = IORESOURCE_IRQ, }, + [1] = { + .flags = IORESOURCE_MEM, + }, }; static struct platform_device osk5912_cf_device = { .name = "omap_cf", .id = -1, - .dev = { - .platform_data = (void *) 2 /* CS2 */, - }, .num_resources = ARRAY_SIZE(osk5912_cf_resources), .resource = osk5912_cf_resources, }; @@ -275,13 +275,41 @@ static void __init osk_init_smc91x(void) omap_writel(l, EMIFS_CCS(1)); } -static void __init osk_init_cf(void) +static void __init osk_init_cf(int seg) { + struct resource *res = &osk5912_cf_resources[1]; + omap_cfg_reg(M7_1610_GPIO62); if ((gpio_request(62, "cf_irq")) < 0) { printk("Error requesting gpio 62 for CF irq\n"); return; } + + switch (seg) { + /* NOTE: CS0 could be configured too ... */ + case 1: + res->start = OMAP_CS1_PHYS; + break; + case 2: + res->start = OMAP_CS2_PHYS; + break; + case 3: + res->start = omap_cs3_phys(); + break; + } + + res->end = res->start + SZ_8K - 1; + osk5912_cf_device.dev.platform_data = (void *)(uintptr_t)seg; + + /* NOTE: better EMIFS setup might support more cards; but the + * TRM only shows how to affect regular flash signals, not their + * CF/PCMCIA variants... + */ + pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", __func__, + seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg))); + omap_writel(0x0004a1b3, EMIFS_CCS(seg)); /* synch mode 4 etc */ + omap_writel(0x00000000, EMIFS_ACS(seg)); /* OE hold/setup */ + /* the CF I/O IRQ is really active-low */ irq_set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING); } @@ -580,7 +608,7 @@ static void __init osk_init(void) u32 l; osk_init_smc91x(); - osk_init_cf(); + osk_init_cf(2); /* CS2 */ /* Workaround for wrong CS3 (NOR flash) timing * There are some U-Boot versions out there which configure diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig index 2ce261cfff8e..ec977f031bc2 100644 --- a/drivers/pcmcia/Kconfig +++ b/drivers/pcmcia/Kconfig @@ -246,7 +246,8 @@ config PCMCIA_VRC4171 config OMAP_CF tristate "OMAP CompactFlash Controller" - depends on PCMCIA && ARCH_OMAP16XX + depends on PCMCIA + depends on ARCH_OMAP16XX || (ARM && COMPILE_TEST) help Say Y here to support the CompactFlash controller on OMAP. Note that this doesn't support "True IDE" mode. diff --git a/drivers/pcmcia/omap_cf.c b/drivers/pcmcia/omap_cf.c index f0b2c2d03469..093022ce7d91 100644 --- a/drivers/pcmcia/omap_cf.c +++ b/drivers/pcmcia/omap_cf.c @@ -16,13 +16,12 @@ #include -#include #include #include -#include -#include - +#include +#include +#include /* NOTE: don't expect this to support many I/O cards. The 16xx chips have * hard-wired timings to support Compact Flash memory cards; they won't work @@ -205,6 +204,7 @@ static int __init omap_cf_probe(struct platform_device *pdev) struct omap_cf_socket *cf; int irq; int status; + struct resource *res; seg = (int) pdev->dev.platform_data; if (seg == 0 || seg > 3) @@ -215,6 +215,8 @@ static int __init omap_cf_probe(struct platform_device *pdev) if (irq < 0) return -EINVAL; + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + cf = kzalloc(sizeof *cf, GFP_KERNEL); if (!cf) return -ENOMEM; @@ -230,24 +232,7 @@ static int __init omap_cf_probe(struct platform_device *pdev) goto fail0; cf->irq = irq; cf->socket.pci_irq = irq; - - switch (seg) { - /* NOTE: CS0 could be configured too ... */ - case 1: - cf->phys_cf = OMAP_CS1_PHYS; - break; - case 2: - cf->phys_cf = OMAP_CS2_PHYS; - break; - case 3: - cf->phys_cf = omap_cs3_phys(); - break; - default: - goto fail1; - } - cf->iomem.start = cf->phys_cf; - cf->iomem.end = cf->iomem.end + SZ_8K - 1; - cf->iomem.flags = IORESOURCE_MEM; + cf->phys_cf = res->start; /* pcmcia layer only remaps "real" memory */ cf->socket.io_offset = (unsigned long) @@ -273,15 +258,6 @@ static int __init omap_cf_probe(struct platform_device *pdev) pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq); - /* NOTE: better EMIFS setup might support more cards; but the - * TRM only shows how to affect regular flash signals, not their - * CF/PCMCIA variants... - */ - pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name, - seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg))); - omap_writel(0x0004a1b3, EMIFS_CCS(seg)); /* synch mode 4 etc */ - omap_writel(0x00000000, EMIFS_ACS(seg)); /* OE hold/setup */ - /* CF uses armxor_ck, which is "always" available */ pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name, From patchwork Tue Apr 19 13:36:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 563878 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32ECAC3527E for ; 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d=kernel.org; s=k20201202; t=1650375549; bh=vO/bPd1PQ9hX0L2CV68DjG3d21RjoFDCbeNW9JFFn4s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=i/7k/0F4r+E1Ur3z329l1Cj5g6ftB8oHQwHSKR1c5qv5Sg7DTH6Yfai9kN/3xqIG2 6IN+CC95Vy2J9Ecwiqu9jWLiRWHVIRsEYbraSEFksjcs4ejGoj4CLQt1bPvfSrevg1 Yq0O4PA1y1h2ip/jGL8GEaPuT5rLYGT2eKrRRFBMDLn3T+XmQZzgJHZaYZjmp5Ifqh zPEF1FobgULdceNOjlrrAVUkcHB8AklSGR/iVkkqLtnOeADz098ACszzEAEOTLv0jD wNQhDFHsfHDookQXljdeMUAjhviMzHxOZBk30q/fEeERal0vp7CC5caie0j1VqHLTj MLWQvzBYRx05A== From: Arnd Bergmann To: linux-omap@vger.kernel.org, tony@atomide.com, aaro.koskinen@iki.fi, jmkrzyszt@gmail.com Cc: Arnd Bergmann , Russell King , Paul Walmsley , Kevin Hilman , Peter Ujfalusi , Vinod Koul , Dmitry Torokhov , Ulf Hansson , Dominik Brodowski , Mark Brown , Felipe Balbi , Alan Stern , Lee Jones , Daniel Thompson , Jingoo Han , Helge Deller , Linus Walleij , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, dmaengine@vger.kernel.org, linux-input@vger.kernel.org, linux-mmc@vger.kernel.org, linux-serial@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org, alsa-devel@alsa-project.org, Greg Kroah-Hartman , Felipe Balbi Subject: [PATCH 12/41] usb: omap: avoid mach/*.h headers Date: Tue, 19 Apr 2022 15:36:54 +0200 Message-Id: <20220419133723.1394715-13-arnd@kernel.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20220419133723.1394715-1-arnd@kernel.org> References: <20220419133723.1394715-1-arnd@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Arnd Bergmann The omap usb drivers still rely on mach/*.h headers that are explicitly or implicitly included, but all the required definitions are now in include/linux/soc/ti/, so use those instead and allow compile-testing on other architectures. Acked-by: Greg Kroah-Hartman Acked-by: Felipe Balbi Signed-off-by: Arnd Bergmann --- drivers/usb/gadget/udc/Kconfig | 2 +- drivers/usb/gadget/udc/omap_udc.c | 2 ++ drivers/usb/host/Kconfig | 2 +- drivers/usb/host/ohci-omap.c | 7 +++---- drivers/usb/phy/Kconfig | 3 ++- drivers/usb/phy/phy-isp1301-omap.c | 4 ++-- 6 files changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/usb/gadget/udc/Kconfig b/drivers/usb/gadget/udc/Kconfig index 69394dc1cdfb..cee934dce4f0 100644 --- a/drivers/usb/gadget/udc/Kconfig +++ b/drivers/usb/gadget/udc/Kconfig @@ -128,7 +128,7 @@ config USB_GR_UDC config USB_OMAP tristate "OMAP USB Device Controller" - depends on ARCH_OMAP1 + depends on ARCH_OMAP1 || (ARCH_OMAP && COMPILE_TEST) depends on ISP1301_OMAP || !(MACH_OMAP_H2 || MACH_OMAP_H3) help Many Texas Instruments OMAP processors have flexible full diff --git a/drivers/usb/gadget/udc/omap_udc.c b/drivers/usb/gadget/udc/omap_udc.c index b1da584585cf..5096d24915ce 100644 --- a/drivers/usb/gadget/udc/omap_udc.c +++ b/drivers/usb/gadget/udc/omap_udc.c @@ -43,6 +43,8 @@ #include #include +#include +#include #include "omap_udc.h" diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 57ca5f97a3dc..682b3d2da623 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -214,7 +214,7 @@ config USB_EHCI_HCD_NPCM7XX config USB_EHCI_HCD_OMAP tristate "EHCI support for OMAP3 and later chips" - depends on ARCH_OMAP + depends on ARCH_OMAP || COMPILE_TEST depends on NOP_USB_XCEIV default y help diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c index 7be1ffefc40e..750a90c41a0a 100644 --- a/drivers/usb/host/ohci-omap.c +++ b/drivers/usb/host/ohci-omap.c @@ -27,6 +27,9 @@ #include #include #include +#include +#include +#include #include #include #include @@ -36,10 +39,6 @@ #include #include -#include - -#include - #define DRIVER_DESC "OHCI OMAP driver" struct ohci_omap_priv { diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig index 52eebcb88c1f..2acbe41fbf7e 100644 --- a/drivers/usb/phy/Kconfig +++ b/drivers/usb/phy/Kconfig @@ -30,7 +30,8 @@ config FSL_USB2_OTG config ISP1301_OMAP tristate "Philips ISP1301 with OMAP OTG" - depends on I2C && ARCH_OMAP_OTG + depends on I2C + depends on ARCH_OMAP_OTG || (ARM && COMPILE_TEST) depends on USB depends on USB_GADGET || !USB_GADGET # if USB_GADGET=m, this can't be 'y' select USB_PHY diff --git a/drivers/usb/phy/phy-isp1301-omap.c b/drivers/usb/phy/phy-isp1301-omap.c index 88aade82b82b..f8bd93fe69cd 100644 --- a/drivers/usb/phy/phy-isp1301-omap.c +++ b/drivers/usb/phy/phy-isp1301-omap.c @@ -23,9 +23,9 @@ #include #include -#include - +#include #include +#include #undef VERBOSE From patchwork Tue Apr 19 13:36:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 563882 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B673C4332F for ; Tue, 19 Apr 2022 13:41:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352763AbiDSNnx (ORCPT ); Tue, 19 Apr 2022 09:43:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352670AbiDSNmh (ORCPT ); Tue, 19 Apr 2022 09:42:37 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EBAF038BDA; Tue, 19 Apr 2022 06:39:32 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id A6A30B81980; Tue, 19 Apr 2022 13:39:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E6057C385A7; Tue, 19 Apr 2022 13:39:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1650375570; bh=B7GGzQK0KIjiwCxoEg1dXjX6/oLgtetrXN0VV1GNBGs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TOpp36+rC0pDLis7adjFpLtRxKwHifzqT8ATqBoHM3otXvUperBtVcs1FifHc5yyB rqLPC7rYbjq0Cf9Ys1ZbJ2P/GGpYZjaZv29gcfAMIMSQP3xSrwfLAML/qNNhmU/GVd gH/ywtlMj8E5lIgxWXQ0d1WKgZnNBdasQLQRmukrsvNWTS1WfVWbNuYArE2MVzLjOQ 7HngWtMC/2cYvIPEoUHdURPi61wEmycHnijfRFxP36EiMPOyusZ0YufgRWJ+JHp9ci tnu1W78uOh80vxB8EvHIbeFZxxM2wIE9VFANNL583gMp6zk/BtWTAHQhAPI0pKoXd2 RNXWpAmIMsrlg== From: Arnd Bergmann To: linux-omap@vger.kernel.org, tony@atomide.com, aaro.koskinen@iki.fi, jmkrzyszt@gmail.com Cc: Arnd Bergmann , Russell King , Paul Walmsley , Kevin Hilman , Peter Ujfalusi , Vinod Koul , Dmitry Torokhov , Ulf Hansson , Dominik Brodowski , Mark Brown , Felipe Balbi , Alan Stern , Lee Jones , Daniel Thompson , Jingoo Han , Helge Deller , Linus Walleij , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, dmaengine@vger.kernel.org, linux-input@vger.kernel.org, linux-mmc@vger.kernel.org, linux-serial@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org, alsa-devel@alsa-project.org Subject: [PATCH 15/41] input: omap: void using mach/*.h headers Date: Tue, 19 Apr 2022 15:36:57 +0200 Message-Id: <20220419133723.1394715-16-arnd@kernel.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20220419133723.1394715-1-arnd@kernel.org> References: <20220419133723.1394715-1-arnd@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Arnd Bergmann The omap-keypad driver currently relies on including mach/memory.h implicitly, but that won't happen once omap1 is converted to CONFIG_ARCH_MULTIPLATFORM. Include the required header explicitly. Signed-off-by: Arnd Bergmann --- drivers/input/keyboard/omap-keypad.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/input/keyboard/omap-keypad.c b/drivers/input/keyboard/omap-keypad.c index eb3a687796e7..57447d6c9007 100644 --- a/drivers/input/keyboard/omap-keypad.c +++ b/drivers/input/keyboard/omap-keypad.c @@ -24,6 +24,7 @@ #include #include #include +#include #undef NEW_BOARD_LEARNING_MODE From patchwork Tue Apr 19 13:36:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 563879 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A667AC433F5 for ; Tue, 19 Apr 2022 13:41:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352797AbiDSNoD (ORCPT ); Tue, 19 Apr 2022 09:44:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36912 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352696AbiDSNmi (ORCPT ); Tue, 19 Apr 2022 09:42:38 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2D53038DA8; Tue, 19 Apr 2022 06:39:40 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id CDCF6B8197F; Tue, 19 Apr 2022 13:39:38 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E95D2C385B7; Tue, 19 Apr 2022 13:39:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1650375577; bh=/1rRcvDuoUNuJnmYPxOkUtRPrNjTWfgWCQQLuGK0bF0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HzTn7rZS28K28plwPgCJQ1ghRASliQgI+2FNpVIvzNFzUi1UMK5PsDjZfQF3E1zqt mnS9gOUBto2VoRVRCx4Yuj8lbyW2OmCu+xl6Yg/lQSI7z3yCggGhd8SZLzhUTKkV0G 4ogMF4OyTC9vLOk3qkrtZxw01Hx1kngOU7CkWOkrZ7irrMS32QrmiusUzBa73hEit/ zPGdRbq5Q5uW64+CqYtjA3PCCVDipYSV0x3AONDo7ffgU5sraeCgGnABr+zWsns3bI fd00kWQV003loXXb9YePqTFuhXdVkfreFhqu2YPTGCtBIjFiNHdyrGAFpEfaT8V4vz PhMvBlCy/tvnA== From: Arnd Bergmann To: linux-omap@vger.kernel.org, tony@atomide.com, aaro.koskinen@iki.fi, jmkrzyszt@gmail.com Cc: Arnd Bergmann , Russell King , Paul Walmsley , Kevin Hilman , Peter Ujfalusi , Vinod Koul , Dmitry Torokhov , Ulf Hansson , Dominik Brodowski , Mark Brown , Felipe Balbi , Alan Stern , Lee Jones , Daniel Thompson , Jingoo Han , Helge Deller , Linus Walleij , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, dmaengine@vger.kernel.org, linux-input@vger.kernel.org, linux-mmc@vger.kernel.org, linux-serial@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org, alsa-devel@alsa-project.org, Felipe Balbi Subject: [PATCH 16/41] ARM: omap1: innovator: move ohci phy power handling to board file Date: Tue, 19 Apr 2022 15:36:58 +0200 Message-Id: <20220419133723.1394715-17-arnd@kernel.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20220419133723.1394715-1-arnd@kernel.org> References: <20220419133723.1394715-1-arnd@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Arnd Bergmann The innovator board needs a special case for its phy control. Move the corresponding code into the board file and out of the common code by adding another callback. Acked-by: Felipe Balbi Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/board-innovator.c | 19 +++++++++++++++ drivers/usb/host/ohci-omap.c | 31 ++++--------------------- include/linux/platform_data/usb-omap1.h | 2 ++ 3 files changed, 26 insertions(+), 26 deletions(-) diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index e7d6735d4701..f169e172421d 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -290,6 +290,23 @@ static void __init innovator_init_smc91x(void) } #ifdef CONFIG_ARCH_OMAP15XX +/* + * Board specific gang-switched transceiver power on/off. + */ +static int innovator_omap_ohci_transceiver_power(int on) +{ + if (on) + __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) + | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), + INNOVATOR_FPGA_CAM_USB_CONTROL); + else + __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) + & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), + INNOVATOR_FPGA_CAM_USB_CONTROL); + + return 0; +} + static struct omap_usb_config innovator1510_usb_config __initdata = { /* for bundled non-standard host and peripheral cables */ .hmc_mode = 4, @@ -300,6 +317,8 @@ static struct omap_usb_config innovator1510_usb_config __initdata = { .register_dev = 1, .pins[0] = 2, + + .transceiver_power = innovator_omap_ohci_transceiver_power, }; static const struct omap_lcd_config innovator1510_lcd_config __initconst = { diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c index 750a90c41a0a..069791d25abb 100644 --- a/drivers/usb/host/ohci-omap.c +++ b/drivers/usb/host/ohci-omap.c @@ -67,31 +67,6 @@ static void omap_ohci_clock_power(struct ohci_omap_priv *priv, int on) } } -/* - * Board specific gang-switched transceiver power on/off. - * NOTE: OSK supplies power from DC, not battery. - */ -static int omap_ohci_transceiver_power(struct ohci_omap_priv *priv, int on) -{ - if (on) { - if (machine_is_omap_innovator() && cpu_is_omap1510()) - __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) - | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), - INNOVATOR_FPGA_CAM_USB_CONTROL); - else if (priv->power) - gpiod_set_value_cansleep(priv->power, 0); - } else { - if (machine_is_omap_innovator() && cpu_is_omap1510()) - __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) - & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), - INNOVATOR_FPGA_CAM_USB_CONTROL); - else if (priv->power) - gpiod_set_value_cansleep(priv->power, 1); - } - - return 0; -} - #ifdef CONFIG_USB_OTG static void start_hnp(struct ohci_hcd *ohci) @@ -202,7 +177,11 @@ static int ohci_omap_reset(struct usb_hcd *hcd) } /* FIXME hub_wq hub requests should manage power switching */ - omap_ohci_transceiver_power(priv, 1); + if (config->transceiver_power) + return config->transceiver_power(1); + + if (priv->power) + gpiod_set_value_cansleep(priv->power, 0); /* board init will have already handled HMC and mux setup. * any external transceiver should already be initialized diff --git a/include/linux/platform_data/usb-omap1.h b/include/linux/platform_data/usb-omap1.h index 878e572a78bf..e7b8dc92a269 100644 --- a/include/linux/platform_data/usb-omap1.h +++ b/include/linux/platform_data/usb-omap1.h @@ -50,6 +50,8 @@ struct omap_usb_config { int (*ocpi_enable)(void); void (*lb_reset)(void); + + int (*transceiver_power)(int on); }; #endif /* __LINUX_USB_OMAP1_H */ From patchwork Tue Apr 19 13:37:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 563881 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99A45C4321E for ; Tue, 19 Apr 2022 13:41:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352787AbiDSNn4 (ORCPT ); Tue, 19 Apr 2022 09:43:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39934 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234762AbiDSNnI (ORCPT ); Tue, 19 Apr 2022 09:43:08 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C35AE182; Tue, 19 Apr 2022 06:40:25 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 7A754B81983; Tue, 19 Apr 2022 13:40:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B32FFC385A5; Tue, 19 Apr 2022 13:40:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1650375623; bh=R5zRvKa0SoyT3N6cs+9ATf3vspiQLolbMLlEiLA/7fA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=h4qvsRlCqc1+D/Un3T++kg9XOlylFj9tu57mNt8nm00hUNQ6OKBJwfaNIy8CUc5b/ qlJ5Qll9E9CFFYZxtIhDJzmK+qDlqq4+ArAd2BBXudLqHYrCpKgbUoCnwsfLaR2pgk Q7EkW4bPFi3bk0l1eRnod+7F8TcxdVYbp1x3X1kd6GHmuGnsuLz3ITS24UVsnNzXdg x/K6BdB+SIi+C9NttQpeR53oMsrljIEQWrLP8CdiwfvAVwJt/CIv2ZT1IB0hwp9ZMU YhjJTR86Ah4hamcr5wDfPSVrUyclrlzsHDyDQ4lgL5SrWli+rzKao8UrzltowcxyNH vWiGzLOvfg/Eg== From: Arnd Bergmann To: linux-omap@vger.kernel.org, tony@atomide.com, aaro.koskinen@iki.fi, jmkrzyszt@gmail.com Cc: Arnd Bergmann , Russell King , Paul Walmsley , Kevin Hilman , Peter Ujfalusi , Vinod Koul , Dmitry Torokhov , Ulf Hansson , Dominik Brodowski , Mark Brown , Felipe Balbi , Alan Stern , Lee Jones , Daniel Thompson , Jingoo Han , Helge Deller , Linus Walleij , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, dmaengine@vger.kernel.org, linux-input@vger.kernel.org, linux-mmc@vger.kernel.org, linux-serial@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org, alsa-devel@alsa-project.org Subject: [PATCH 22/41] ARM: omap1: move plat/dma.c to mach/omap-dma.c Date: Tue, 19 Apr 2022 15:37:04 +0200 Message-Id: <20220419133723.1394715-23-arnd@kernel.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20220419133723.1394715-1-arnd@kernel.org> References: <20220419133723.1394715-1-arnd@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Arnd Bergmann Most of the interface functions in plat/dma.c are only used from the USB driver, which is practically OMAP1 specific, except for compile testing. The omap_get_plat_info(), omap_request_dma() and omap_free_dma() functions are never called on omap2 because of runtime checks. Signed-off-by: Arnd Bergmann Reviewed-by: Peter Ujfalusi --- arch/arm/mach-omap1/Makefile | 2 +- arch/arm/{plat-omap/dma.c => mach-omap1/omap-dma.c} | 0 arch/arm/plat-omap/Makefile | 2 +- 3 files changed, 2 insertions(+), 2 deletions(-) rename arch/arm/{plat-omap/dma.c => mach-omap1/omap-dma.c} (100%) diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index 450bbf552b57..0615cb0ba580 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile @@ -5,7 +5,7 @@ # Common support obj-y := io.o id.o sram-init.o sram.o time.o irq.o mux.o flash.o \ - serial.o devices.o dma.o fb.o + serial.o devices.o dma.o omap-dma.o fb.o obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o ifneq ($(CONFIG_SND_SOC_OMAP_MCBSP),) diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/mach-omap1/omap-dma.c similarity index 100% rename from arch/arm/plat-omap/dma.c rename to arch/arm/mach-omap1/omap-dma.c diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index 68ccec9de106..5d55295a14ee 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile @@ -6,4 +6,4 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-omap/include # Common support -obj-y := sram.o dma.o +obj-y := sram.o From patchwork Tue Apr 19 13:37:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 563875 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2B9CC433F5 for ; Tue, 19 Apr 2022 13:42:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352598AbiDSNo5 (ORCPT ); Tue, 19 Apr 2022 09:44:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39972 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244173AbiDSNnQ (ORCPT ); Tue, 19 Apr 2022 09:43:16 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1A4DD182; Tue, 19 Apr 2022 06:40:33 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 91168B81981; Tue, 19 Apr 2022 13:40:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9BA25C385AF; Tue, 19 Apr 2022 13:40:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1650375630; bh=Y28p7Ny9YomGZamqZAIMduIfzMd9ilwbgGj96GOTejs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eUHAFjoiHuXtqZ4ZQCCCjrNWBObk3OpvdAoRndhAbYTT/dWpoD2ncZTLJ89QVYpaG E3ATSEWOwtxhMgdoVM3aoUvIYenIeLY8VecZ74Q1zfAO0JlMqhoBixhEDM2LhMCyTM Bg8EvhbdgtMjbcznvJxbbq6hNISkYGTTR4Tv2UoKdlOSU7hMkR/ruvdJ/iC72Zem7f i9ZFFfE2l05LHOqtf8V/dIsD5stadiF0iLdtFAAfv026f+K1DHAgxo/HxMLDoMG0LJ KlL7TLBkRPDFumi0yT4sk8TbBxJfJ8Zsfkwpvwn7UIjjyX9tWqdiDl36pA3xGyphWy 6yb1hp9ibLpEg== From: Arnd Bergmann To: linux-omap@vger.kernel.org, tony@atomide.com, aaro.koskinen@iki.fi, jmkrzyszt@gmail.com Cc: Arnd Bergmann , Russell King , Paul Walmsley , Kevin Hilman , Peter Ujfalusi , Vinod Koul , Dmitry Torokhov , Ulf Hansson , Dominik Brodowski , Mark Brown , Felipe Balbi , Alan Stern , Lee Jones , Daniel Thompson , Jingoo Han , Helge Deller , Linus Walleij , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, dmaengine@vger.kernel.org, linux-input@vger.kernel.org, linux-mmc@vger.kernel.org, linux-serial@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org, alsa-devel@alsa-project.org Subject: [PATCH 23/41] ARM: omap: split up arch/arm/plat-omap/Kconfig Date: Tue, 19 Apr 2022 15:37:05 +0200 Message-Id: <20220419133723.1394715-24-arnd@kernel.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20220419133723.1394715-1-arnd@kernel.org> References: <20220419133723.1394715-1-arnd@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Arnd Bergmann All the remaining features in here are either omap1 or omap2plus specific, so move them into the respective Kconfig files. Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig | 2 - arch/arm/mach-omap1/Kconfig | 37 +++++++++++++++ arch/arm/mach-omap2/Kconfig | 49 ++++++++++++++++++++ arch/arm/plat-omap/Kconfig | 92 ------------------------------------- 4 files changed, 86 insertions(+), 94 deletions(-) delete mode 100644 arch/arm/plat-omap/Kconfig diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2e8091e2d8a8..700655e31b04 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -656,8 +656,6 @@ source "arch/arm/mach-npcm/Kconfig" source "arch/arm/mach-nspire/Kconfig" -source "arch/arm/plat-omap/Kconfig" - source "arch/arm/mach-omap1/Kconfig" source "arch/arm/mach-omap2/Kconfig" diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index 04155b5ce978..93ea86954a84 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig @@ -28,6 +28,11 @@ config ARCH_OMAP16XX select CPU_ARM926T select OMAP_DM_TIMER +config ARCH_OMAP + bool + +comment "OMAP Feature Selections" + config OMAP_MUX bool "OMAP multiplexing support" default y @@ -69,6 +74,38 @@ config OMAP_32K_TIMER The actual timer selection is done in the board file through the (DT_)MACHINE_START structure. +config OMAP_MPU_TIMER + bool "Use mpu timer" + depends on ARCH_OMAP1 + help + Select this option if you want to use the OMAP mpu timer. This + timer provides more intra-tick resolution than the 32KHz timer, + but consumes more power. + +config OMAP_SERIAL_WAKE + bool "Enable wake-up events for serial ports" + depends on ARCH_OMAP1 && OMAP_MUX + default y + help + Select this option if you want to have your system wake up + to data on the serial RX line. This allows you to wake the + system from serial console. + +config OMAP_RESET_CLOCKS + bool "Reset unused clocks during boot" + depends on ARCH_OMAP + help + Say Y if you want to reset unused clocks during boot. + This option saves power, but assumes all drivers are + using the clock framework. Broken drivers that do not + yet use clock framework may not work with this option. + If you are booting from another operating system, you + probably do not want this option enabled until your + device drivers work properly. + +config ARCH_OMAP_OTG + bool + comment "OMAP Board Type" config MACH_OMAP_INNOVATOR diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 02c253de9b6e..a8adbb4d478a 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -123,6 +123,8 @@ config OMAP_INTERCONNECT_BARRIER bool select ARM_HEAVY_MB +config ARCH_OMAP + bool if ARCH_OMAP2PLUS @@ -153,6 +155,53 @@ config SOC_HAS_REALTIME_COUNTER depends on SOC_OMAP5 || SOC_DRA7XX default y +config POWER_AVS_OMAP + bool "AVS(Adaptive Voltage Scaling) support for OMAP IP versions 1&2" + depends on (ARCH_OMAP3 || ARCH_OMAP4) && PM + select POWER_SUPPLY + help + Say Y to enable AVS(Adaptive Voltage Scaling) + support on OMAP containing the version 1 or + version 2 of the SmartReflex IP. + V1 is the 65nm version used in OMAP3430. + V2 is the update for the 45nm version of the IP used in OMAP3630 + and OMAP4430 + + Please note, that by default SmartReflex is only + initialized and not enabled. To enable the automatic voltage + compensation for vdd mpu and vdd core from user space, + user must write 1 to + /debug/smartreflex/sr_/autocomp, + where X is mpu_iva or core for OMAP3. + Optionally autocompensation can be enabled in the kernel + by default during system init via the enable_on_init flag + which an be passed as platform data to the smartreflex driver. + +config POWER_AVS_OMAP_CLASS3 + bool "Class 3 mode of Smartreflex Implementation" + depends on POWER_AVS_OMAP && TWL4030_CORE + help + Say Y to enable Class 3 implementation of Smartreflex + + Class 3 implementation of Smartreflex employs continuous hardware + voltage calibration. + +config OMAP3_L2_AUX_SECURE_SAVE_RESTORE + bool "OMAP3 HS/EMU save and restore for L2 AUX control register" + depends on ARCH_OMAP3 && PM + help + Without this option, L2 Auxiliary control register contents are + lost during off-mode entry on HS/EMU devices. This feature + requires support from PPA / boot-loader in HS/EMU devices, which + currently does not exist by default. + +config OMAP3_L2_AUX_SECURE_SERVICE_SET_ID + int "Service ID for the support routine to set L2 AUX control" + depends on OMAP3_L2_AUX_SECURE_SAVE_RESTORE + default 43 + help + PPA routine service ID for setting L2 auxiliary control register. + comment "OMAP Core Type" depends on ARCH_OMAP2 diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig deleted file mode 100644 index dc53ea8e5bbb..000000000000 --- a/arch/arm/plat-omap/Kconfig +++ /dev/null @@ -1,92 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -config ARCH_OMAP - bool - -if ARCH_OMAP - -menu "TI OMAP Common Features" - -config ARCH_OMAP_OTG - bool - -comment "OMAP Feature Selections" - -config POWER_AVS_OMAP - bool "AVS(Adaptive Voltage Scaling) support for OMAP IP versions 1&2" - depends on (ARCH_OMAP3 || ARCH_OMAP4) && PM - select POWER_SUPPLY - help - Say Y to enable AVS(Adaptive Voltage Scaling) - support on OMAP containing the version 1 or - version 2 of the SmartReflex IP. - V1 is the 65nm version used in OMAP3430. - V2 is the update for the 45nm version of the IP used in OMAP3630 - and OMAP4430 - - Please note, that by default SmartReflex is only - initialized and not enabled. To enable the automatic voltage - compensation for vdd mpu and vdd core from user space, - user must write 1 to - /debug/smartreflex/sr_/autocomp, - where X is mpu_iva or core for OMAP3. - Optionally autocompensation can be enabled in the kernel - by default during system init via the enable_on_init flag - which an be passed as platform data to the smartreflex driver. - -config POWER_AVS_OMAP_CLASS3 - bool "Class 3 mode of Smartreflex Implementation" - depends on POWER_AVS_OMAP && TWL4030_CORE - help - Say Y to enable Class 3 implementation of Smartreflex - - Class 3 implementation of Smartreflex employs continuous hardware - voltage calibration. - -config OMAP_RESET_CLOCKS - bool "Reset unused clocks during boot" - depends on ARCH_OMAP - help - Say Y if you want to reset unused clocks during boot. - This option saves power, but assumes all drivers are - using the clock framework. Broken drivers that do not - yet use clock framework may not work with this option. - If you are booting from another operating system, you - probably do not want this option enabled until your - device drivers work properly. - -config OMAP_MPU_TIMER - bool "Use mpu timer" - depends on ARCH_OMAP1 - help - Select this option if you want to use the OMAP mpu timer. This - timer provides more intra-tick resolution than the 32KHz timer, - but consumes more power. - -config OMAP3_L2_AUX_SECURE_SAVE_RESTORE - bool "OMAP3 HS/EMU save and restore for L2 AUX control register" - depends on ARCH_OMAP3 && PM - help - Without this option, L2 Auxiliary control register contents are - lost during off-mode entry on HS/EMU devices. This feature - requires support from PPA / boot-loader in HS/EMU devices, which - currently does not exist by default. - -config OMAP3_L2_AUX_SECURE_SERVICE_SET_ID - int "Service ID for the support routine to set L2 AUX control" - depends on OMAP3_L2_AUX_SECURE_SAVE_RESTORE - default 43 - help - PPA routine service ID for setting L2 auxiliary control register. - -config OMAP_SERIAL_WAKE - bool "Enable wake-up events for serial ports" - depends on ARCH_OMAP1 && OMAP_MUX - default y - help - Select this option if you want to have your system wake up - to data on the serial RX line. This allows you to wake the - system from serial console. - -endmenu - -endif From patchwork Tue Apr 19 13:37:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 563877 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9304C3527D for ; Tue, 19 Apr 2022 13:42:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245374AbiDSNov (ORCPT ); Tue, 19 Apr 2022 09:44:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40018 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352621AbiDSNnX (ORCPT ); Tue, 19 Apr 2022 09:43:23 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A38D7182; Tue, 19 Apr 2022 06:40:40 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 441C4B8197F; Tue, 19 Apr 2022 13:40:39 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DF713C385A7; Tue, 19 Apr 2022 13:40:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1650375638; bh=oS0YRuMwauHV77a/RWwiH3yEgHRO8x+QFp2K7j65xos=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QunDt7eWVmo28eUVZu9UHc5suCYpMGj+4JLni2IARp821nSt8uFbgl939uUCYSRpA PxsB7GMbCapGsEMRTY921XMHJlFjFiFC5XgxN/yTQcpLOG0T87+wsAMhlPoTxVCTdy qMkSm/O4UHq8I2m2twis5Ar3U2NmjNf8p78YGeW4zCXxTcTHqMO9dUCsp6/B4xUer2 xNwUIzAoowxi9QKFChZTh5g3bQExsAJAL9slz/9O+8JnLrPHq0BKOznGXx9LOrTTt1 nQc43BQvq0/NVCoUERTHShP9hv98faBOm1I2DUm8je01yVkrpUlWYNIDo6Kd2KpLqE kN8JkbmkVLH9g== From: Arnd Bergmann To: linux-omap@vger.kernel.org, tony@atomide.com, aaro.koskinen@iki.fi, jmkrzyszt@gmail.com Cc: Arnd Bergmann , Russell King , Paul Walmsley , Kevin Hilman , Peter Ujfalusi , Vinod Koul , Dmitry Torokhov , Ulf Hansson , Dominik Brodowski , Mark Brown , Felipe Balbi , Alan Stern , Lee Jones , Daniel Thompson , Jingoo Han , Helge Deller , Linus Walleij , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, dmaengine@vger.kernel.org, linux-input@vger.kernel.org, linux-mmc@vger.kernel.org, linux-serial@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org, alsa-devel@alsa-project.org Subject: [PATCH 24/41] ARM: omap: un-merge plat/sram.c Date: Tue, 19 Apr 2022 15:37:06 +0200 Message-Id: <20220419133723.1394715-25-arnd@kernel.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20220419133723.1394715-1-arnd@kernel.org> References: <20220419133723.1394715-1-arnd@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Arnd Bergmann The sram initialization code is the only shared omap1/2 code that is not a standalone driver, but it is very short. Having two copies of this code means some duplication of the sources, but actually saves object code size as it can be inlined better. Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/devices.c | 2 +- arch/arm/mach-omap1/sram-init.c | 91 +++++++++++++++-- arch/arm/mach-omap1/sram.h | 4 +- arch/arm/mach-omap2/sram.c | 91 ++++++++++++++++- arch/arm/mach-omap2/sram.h | 5 +- arch/arm/plat-omap/Makefile | 2 +- arch/arm/plat-omap/include/plat/sram.h | 8 -- arch/arm/plat-omap/sram.c | 129 ------------------------- 8 files changed, 182 insertions(+), 150 deletions(-) delete mode 100644 arch/arm/plat-omap/include/plat/sram.h delete mode 100644 arch/arm/plat-omap/sram.c diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index eb0f09edb3d1..6bc32ebda7a7 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -356,7 +356,7 @@ static int __init omap1_init_devices(void) if (!cpu_class_is_omap1()) return -ENODEV; - omap_sram_init(); + omap1_sram_init(); omap1_clk_late_init(); /* please keep these calls, and their implementations above, diff --git a/arch/arm/mach-omap1/sram-init.c b/arch/arm/mach-omap1/sram-init.c index 3bd60708c345..0e3ec32a008e 100644 --- a/arch/arm/mach-omap1/sram-init.c +++ b/arch/arm/mach-omap1/sram-init.c @@ -14,6 +14,7 @@ #include #include #include +#include #include @@ -22,18 +23,77 @@ #define OMAP1_SRAM_PA 0x20000000 #define SRAM_BOOTLOADER_SZ 0x80 +#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1))) + +static void __iomem *omap_sram_base; +static unsigned long omap_sram_start; +static unsigned long omap_sram_skip; +static unsigned long omap_sram_size; +static void __iomem *omap_sram_ceil; + +/* + * Memory allocator for SRAM: calculates the new ceiling address + * for pushing a function using the fncpy API. + * + * Note that fncpy requires the returned address to be aligned + * to an 8-byte boundary. + */ +static void *omap_sram_push_address(unsigned long size) +{ + unsigned long available, new_ceil = (unsigned long)omap_sram_ceil; + + available = omap_sram_ceil - (omap_sram_base + omap_sram_skip); + + if (size > available) { + pr_err("Not enough space in SRAM\n"); + return NULL; + } + + new_ceil -= size; + new_ceil = ROUND_DOWN(new_ceil, FNCPY_ALIGN); + omap_sram_ceil = IOMEM(new_ceil); + + return (void *)omap_sram_ceil; +} + +void *omap_sram_push(void *funcp, unsigned long size) +{ + void *sram; + unsigned long base; + int pages; + void *dst = NULL; + + sram = omap_sram_push_address(size); + if (!sram) + return NULL; + + base = (unsigned long)sram & PAGE_MASK; + pages = PAGE_ALIGN(size) / PAGE_SIZE; + + set_memory_rw(base, pages); + + dst = fncpy(sram, funcp, size); + + set_memory_ro(base, pages); + set_memory_x(base, pages); + + return dst; +} /* * The amount of SRAM depends on the core type. * Note that we cannot try to test for SRAM here because writes * to secure SRAM will hang the system. Also the SRAM is not * yet mapped at this point. + * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early. */ static void __init omap_detect_and_map_sram(void) { - unsigned long omap_sram_skip = SRAM_BOOTLOADER_SZ; - unsigned long omap_sram_start = OMAP1_SRAM_PA; - unsigned long omap_sram_size; + unsigned long base; + int pages; + + omap_sram_skip = SRAM_BOOTLOADER_SZ; + omap_sram_start = OMAP1_SRAM_PA; if (cpu_is_omap7xx()) omap_sram_size = 0x32000; /* 200K */ @@ -47,8 +107,27 @@ static void __init omap_detect_and_map_sram(void) omap_sram_size = 0x4000; } - omap_map_sram(omap_sram_start, omap_sram_size, - omap_sram_skip, 1); + omap_sram_start = ROUND_DOWN(omap_sram_start, PAGE_SIZE); + omap_sram_base = __arm_ioremap_exec(omap_sram_start, omap_sram_size, 1); + if (!omap_sram_base) { + pr_err("SRAM: Could not map\n"); + return; + } + + omap_sram_ceil = omap_sram_base + omap_sram_size; + + /* + * Looks like we need to preserve some bootloader code at the + * beginning of SRAM for jumping to flash for reboot to work... + */ + memset_io(omap_sram_base + omap_sram_skip, 0, + omap_sram_size - omap_sram_skip); + + base = (unsigned long)omap_sram_base; + pages = PAGE_ALIGN(omap_sram_size) / PAGE_SIZE; + + set_memory_ro(base, pages); + set_memory_x(base, pages); } static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl); @@ -62,7 +141,7 @@ void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl) _omap_sram_reprogram_clock(dpllctl, ckctl); } -int __init omap_sram_init(void) +int __init omap1_sram_init(void) { omap_detect_and_map_sram(); _omap_sram_reprogram_clock = diff --git a/arch/arm/mach-omap1/sram.h b/arch/arm/mach-omap1/sram.h index 73efabd119e8..f45e6dd6d7e5 100644 --- a/arch/arm/mach-omap1/sram.h +++ b/arch/arm/mach-omap1/sram.h @@ -1,8 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0 */ -#include extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl); +int omap1_sram_init(void); +void *omap_sram_push(void *funcp, unsigned long size); + /* Do not use these */ extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); extern unsigned long omap1_sram_reprogram_clock_sz; diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c index c98855f5594b..c685afb8bd03 100644 --- a/arch/arm/mach-omap2/sram.c +++ b/arch/arm/mach-omap2/sram.c @@ -18,6 +18,7 @@ #include #include #include +#include #include @@ -47,8 +48,68 @@ #define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1))) static unsigned long omap_sram_start; -static unsigned long omap_sram_skip; static unsigned long omap_sram_size; +static void __iomem *omap_sram_base; +static unsigned long omap_sram_skip; +static void __iomem *omap_sram_ceil; + +/* + * Memory allocator for SRAM: calculates the new ceiling address + * for pushing a function using the fncpy API. + * + * Note that fncpy requires the returned address to be aligned + * to an 8-byte boundary. + */ +static void *omap_sram_push_address(unsigned long size) +{ + unsigned long available, new_ceil = (unsigned long)omap_sram_ceil; + + available = omap_sram_ceil - (omap_sram_base + omap_sram_skip); + + if (size > available) { + pr_err("Not enough space in SRAM\n"); + return NULL; + } + + new_ceil -= size; + new_ceil = ROUND_DOWN(new_ceil, FNCPY_ALIGN); + omap_sram_ceil = IOMEM(new_ceil); + + return (void *)omap_sram_ceil; +} + +void *omap_sram_push(void *funcp, unsigned long size) +{ + void *sram; + unsigned long base; + int pages; + void *dst = NULL; + + sram = omap_sram_push_address(size); + if (!sram) + return NULL; + + base = (unsigned long)sram & PAGE_MASK; + pages = PAGE_ALIGN(size) / PAGE_SIZE; + + set_memory_rw(base, pages); + + dst = fncpy(sram, funcp, size); + + set_memory_ro(base, pages); + set_memory_x(base, pages); + + return dst; +} + +/* + * The SRAM context is lost during off-idle and stack + * needs to be reset. + */ +static void omap_sram_reset(void) +{ + omap_sram_ceil = omap_sram_base + omap_sram_size; +} /* * Depending on the target RAMFS firewall setup, the public usable amount of @@ -119,6 +180,8 @@ static void __init omap_detect_sram(void) */ static void __init omap2_map_sram(void) { + unsigned long base; + int pages; int cached = 1; if (cpu_is_omap34xx()) { @@ -132,8 +195,30 @@ static void __init omap2_map_sram(void) cached = 0; } - omap_map_sram(omap_sram_start, omap_sram_size, - omap_sram_skip, cached); + if (omap_sram_size == 0) + return; + + omap_sram_start = ROUND_DOWN(omap_sram_start, PAGE_SIZE); + omap_sram_base = __arm_ioremap_exec(omap_sram_start, omap_sram_size, cached); + if (!omap_sram_base) { + pr_err("SRAM: Could not map\n"); + return; + } + + omap_sram_reset(); + + /* + * Looks like we need to preserve some bootloader code at the + * beginning of SRAM for jumping to flash for reboot to work... + */ + memset_io(omap_sram_base + omap_sram_skip, 0, + omap_sram_size - omap_sram_skip); + + base = (unsigned long)omap_sram_base; + pages = PAGE_ALIGN(omap_sram_size) / PAGE_SIZE; + + set_memory_ro(base, pages); + set_memory_x(base, pages); } static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, diff --git a/arch/arm/mach-omap2/sram.h b/arch/arm/mach-omap2/sram.h index 447bd3eed0fd..271062f23482 100644 --- a/arch/arm/mach-omap2/sram.h +++ b/arch/arm/mach-omap2/sram.h @@ -4,7 +4,6 @@ */ #ifndef __ASSEMBLY__ -#include extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, u32 base_cs, u32 force_unlock); @@ -14,6 +13,10 @@ extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); extern void omap3_sram_restore_context(void); +extern int __init omap_sram_init(void); + +extern void *omap_sram_push(void *funcp, unsigned long size); + /* Do not use these */ extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl); extern unsigned long omap24xx_sram_reprogram_clock_sz; diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index 5d55295a14ee..fefce2e1eaf3 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile @@ -6,4 +6,4 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-omap/include # Common support -obj-y := sram.o +obj-y := diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h deleted file mode 100644 index 30a07730807a..000000000000 --- a/arch/arm/plat-omap/include/plat/sram.h +++ /dev/null @@ -1,8 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -int omap_sram_init(void); - -void omap_map_sram(unsigned long start, unsigned long size, - unsigned long skip, int cached); -void omap_sram_reset(void); - -extern void *omap_sram_push(void *funcp, unsigned long size); diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c deleted file mode 100644 index 0f1eacad7fe3..000000000000 --- a/arch/arm/plat-omap/sram.c +++ /dev/null @@ -1,129 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/plat-omap/sram.c - * - * OMAP SRAM detection and management - * - * Copyright (C) 2005 Nokia Corporation - * Written by Tony Lindgren - * - * Copyright (C) 2009-2012 Texas Instruments - * Added OMAP4/5 support - Santosh Shilimkar - */ -#undef DEBUG - -#include -#include -#include -#include - -#include -#include -#include -#include - -#include - -#include - -#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1))) - -static void __iomem *omap_sram_base; -static unsigned long omap_sram_skip; -static unsigned long omap_sram_size; -static void __iomem *omap_sram_ceil; - -/* - * Memory allocator for SRAM: calculates the new ceiling address - * for pushing a function using the fncpy API. - * - * Note that fncpy requires the returned address to be aligned - * to an 8-byte boundary. - */ -static void *omap_sram_push_address(unsigned long size) -{ - unsigned long available, new_ceil = (unsigned long)omap_sram_ceil; - - available = omap_sram_ceil - (omap_sram_base + omap_sram_skip); - - if (size > available) { - pr_err("Not enough space in SRAM\n"); - return NULL; - } - - new_ceil -= size; - new_ceil = ROUND_DOWN(new_ceil, FNCPY_ALIGN); - omap_sram_ceil = IOMEM(new_ceil); - - return (void *)omap_sram_ceil; -} - -void *omap_sram_push(void *funcp, unsigned long size) -{ - void *sram; - unsigned long base; - int pages; - void *dst = NULL; - - sram = omap_sram_push_address(size); - if (!sram) - return NULL; - - base = (unsigned long)sram & PAGE_MASK; - pages = PAGE_ALIGN(size) / PAGE_SIZE; - - set_memory_rw(base, pages); - - dst = fncpy(sram, funcp, size); - - set_memory_ro(base, pages); - set_memory_x(base, pages); - - return dst; -} - -/* - * The SRAM context is lost during off-idle and stack - * needs to be reset. - */ -void omap_sram_reset(void) -{ - omap_sram_ceil = omap_sram_base + omap_sram_size; -} - -/* - * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early. - */ -void __init omap_map_sram(unsigned long start, unsigned long size, - unsigned long skip, int cached) -{ - unsigned long base; - int pages; - - if (size == 0) - return; - - start = ROUND_DOWN(start, PAGE_SIZE); - omap_sram_size = size; - omap_sram_skip = skip; - omap_sram_base = __arm_ioremap_exec(start, size, cached); - if (!omap_sram_base) { - pr_err("SRAM: Could not map\n"); - return; - } - - omap_sram_reset(); - - /* - * Looks like we need to preserve some bootloader code at the - * beginning of SRAM for jumping to flash for reboot to work... - */ - memset_io(omap_sram_base + omap_sram_skip, 0, - omap_sram_size - omap_sram_skip); - - base = (unsigned long)omap_sram_base; - pages = PAGE_ALIGN(omap_sram_size) / PAGE_SIZE; - - set_memory_ro(base, pages); - set_memory_x(base, pages); -} From patchwork Tue Apr 19 13:37:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 563876 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4105CC4167B for ; Tue, 19 Apr 2022 13:42:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352574AbiDSNoy (ORCPT ); Tue, 19 Apr 2022 09:44:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40140 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352699AbiDSNnh (ORCPT ); Tue, 19 Apr 2022 09:43:37 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 102ED24F; Tue, 19 Apr 2022 06:40:55 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id C68D6B8197F; Tue, 19 Apr 2022 13:40:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id CD49CC385AA; Tue, 19 Apr 2022 13:40:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1650375652; bh=++wgzzP18IgZjv9gq3IHjeFk3mw3AxMESGKM1bss8GE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=t77plAsS6dzi52zALntxTrIsGvlZ7TVWnBbbBL6BHh9HDB22Vsg+GSU1TUGr/L7yo 4VED/jnUp/m/iprQbhEzkF/oCLBhn5mjye8/COB4ccOhKBk+sJixyUn/j4z5hhYvAS fOMPXYC1p6lswgiO83CT8qRkpbcih1isQSb5qwxzvrTQT+MaBaR+iH3FJlzRpZeFL+ xLv4MH8XhKivg2WwM9SJ6+BOtF2fIbLSMuGDS0PC2ZNc4r0d6HSPSj40prxX3RgJXN wDqi6ESmFTYAF/uvoZWrHFUtV7uChc7cszyCFCMHFQ8dub8SswJUKqRzrKaa1+D2F9 cs9GhVWEGvR5A== From: Arnd Bergmann To: linux-omap@vger.kernel.org, tony@atomide.com, aaro.koskinen@iki.fi, jmkrzyszt@gmail.com Cc: Arnd Bergmann , Russell King , Paul Walmsley , Kevin Hilman , Peter Ujfalusi , Vinod Koul , Dmitry Torokhov , Ulf Hansson , Dominik Brodowski , Mark Brown , Felipe Balbi , Alan Stern , Lee Jones , Daniel Thompson , Jingoo Han , Helge Deller , Linus Walleij , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, dmaengine@vger.kernel.org, linux-input@vger.kernel.org, linux-mmc@vger.kernel.org, linux-serial@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org, alsa-devel@alsa-project.org Subject: [PATCH 26/41] ARM: omap1: relocate static I/O mapping Date: Tue, 19 Apr 2022 15:37:08 +0200 Message-Id: <20220419133723.1394715-27-arnd@kernel.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20220419133723.1394715-1-arnd@kernel.org> References: <20220419133723.1394715-1-arnd@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Arnd Bergmann The address range 0xfee00000-0xfeffffff is used for PCI and PCMCIA I/O port mappings, but OMAP1 has its static mappings there as well. Move the OMAP1 addresses a little higher to avoid crashing at boot. Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig.debug | 6 +++--- arch/arm/mach-omap1/include/mach/hardware.h | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 0c9497d549e3..f57b449000f7 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -1837,9 +1837,9 @@ config DEBUG_UART_VIRT default 0xfec00000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN default 0xfec00003 if ARCH_IXP4XX && CPU_BIG_ENDIAN default 0xfef36000 if DEBUG_HIGHBANK_UART - default 0xfefb0000 if DEBUG_OMAP1UART1 || DEBUG_OMAP7XXUART1 - default 0xfefb0800 if DEBUG_OMAP1UART2 || DEBUG_OMAP7XXUART2 - default 0xfefb9800 if DEBUG_OMAP1UART3 || DEBUG_OMAP7XXUART3 + default 0xff000000 if DEBUG_OMAP1UART1 || DEBUG_OMAP7XXUART1 + default 0xff000800 if DEBUG_OMAP1UART2 || DEBUG_OMAP7XXUART2 + default 0xff009800 if DEBUG_OMAP1UART3 || DEBUG_OMAP7XXUART3 default 0xffd01000 if DEBUG_HIP01_UART default DEBUG_UART_PHYS if !MMU depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/include/mach/hardware.h index 05c5cd3e95f4..e3522e601ccd 100644 --- a/arch/arm/mach-omap1/include/mach/hardware.h +++ b/arch/arm/mach-omap1/include/mach/hardware.h @@ -63,7 +63,7 @@ static inline u32 omap_cs3_phys(void) #endif /* ifndef __ASSEMBLER__ */ -#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ +#define OMAP1_IO_OFFSET 0x00fb0000 /* Virtual IO = 0xff000000 */ #define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET) #include From patchwork Tue Apr 19 13:37:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 563874 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A446C433EF for ; Tue, 19 Apr 2022 13:42:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351392AbiDSNpB (ORCPT ); Tue, 19 Apr 2022 09:45:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40422 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352812AbiDSNoC (ORCPT ); Tue, 19 Apr 2022 09:44:02 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6752AB876; Tue, 19 Apr 2022 06:41:16 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id EA6E2616BF; Tue, 19 Apr 2022 13:41:15 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9BA99C385AC; Tue, 19 Apr 2022 13:41:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1650375675; bh=Zu+s/Y6CPoLWnIUPjVgATnzi0v1z3Jhkw2fBKn8V10M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=U5cHM84vrLY3O3eyj59RLMY2m4fa/fIXcrDCJ9kjqXW9XoISe3lQxXTO6L1dAaoQk oQoOecRjFl/5jFqnm0E7okbJ6ifMuDNAdWBOnlrkhp25WpgKIJYVTtI7PuyR0j44Wt 7VsEFwWnvRKUEPainDkDn9AuVbG7J1W7AlpltYmSzKoWeF58QXmvv/f82nxuMT/W8N aPUFb2G2ez74e0BV9D2X9qJaN5aJ9wiK14osJsk3UfjTmuRqz6tm7WcpnIOvwfOH1f Xlf8Y8XE35dK5tWzEayPKnnm9LQnhR2Mue+H9vmhX/9J78LZeH0skpwslSkMEsZyAj DLN5B2SpMEUCQ== From: Arnd Bergmann To: linux-omap@vger.kernel.org, tony@atomide.com, aaro.koskinen@iki.fi, jmkrzyszt@gmail.com Cc: Arnd Bergmann , Russell King , Paul Walmsley , Kevin Hilman , Peter Ujfalusi , Vinod Koul , Dmitry Torokhov , Ulf Hansson , Dominik Brodowski , Mark Brown , Felipe Balbi , Alan Stern , Lee Jones , Daniel Thompson , Jingoo Han , Helge Deller , Linus Walleij , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, dmaengine@vger.kernel.org, linux-input@vger.kernel.org, linux-mmc@vger.kernel.org, linux-serial@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org, alsa-devel@alsa-project.org Subject: [PATCH 29/41] ARM: omap1: fix build with no SoC selected Date: Tue, 19 Apr 2022 15:37:11 +0200 Message-Id: <20220419133723.1394715-30-arnd@kernel.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20220419133723.1394715-1-arnd@kernel.org> References: <20220419133723.1394715-1-arnd@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Arnd Bergmann In a multiplatform randconfig kernel, one can have CONFIG_ARCH_OMAP1 enabled, but none of the specific SoCs. This leads to some build issues as the code is not meant to deal with this configuration at the moment: arch/arm/mach-omap1/io.c:86:20: error: unused function 'omap1_map_common_io' [-Werror,-Wunused-function] arch/arm/mach-omap1/pm.h:113:2: error: "Power management for this processor not implemented yet" [-Werror,-W#warnings] Use the same trick as on OMAP2 and guard the actual compilation of platform code with another Makefile ifdef check based on an option that depends on having at least one SoC enabled. The io.c file still needs to get compiled to allow building device drivers with a dependency on CONFIG_ARCH_OMAP1. Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig | 1 - arch/arm/mach-omap1/Kconfig | 4 ++++ arch/arm/mach-omap1/Makefile | 4 ++++ include/linux/soc/ti/omap1-io.h | 4 ++-- 4 files changed, 10 insertions(+), 3 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index fb6afa6bbc8f..a65f2c05f01c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -485,7 +485,6 @@ config ARCH_S3C24XX config ARCH_OMAP1 bool "TI OMAP1" - select ARCH_OMAP select CLKSRC_MMIO select FORCE_PCI if PCCARD select GENERIC_IRQ_CHIP diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index 93ea86954a84..d4b0cd91a4f9 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig @@ -28,6 +28,10 @@ config ARCH_OMAP16XX select CPU_ARM926T select OMAP_DM_TIMER +config ARCH_OMAP1_ANY + select ARCH_OMAP + def_bool ARCH_OMAP730 || ARCH_OMAP850 || ARCH_OMAP15XX || ARCH_OMAP16XX + config ARCH_OMAP bool diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index 0615cb0ba580..506074b86333 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile @@ -3,6 +3,8 @@ # Makefile for the linux kernel. # +ifdef CONFIG_ARCH_OMAP1_ANY + # Common support obj-y := io.o id.o sram-init.o sram.o time.o irq.o mux.o flash.o \ serial.o devices.o dma.o omap-dma.o fb.o @@ -57,3 +59,5 @@ obj-$(CONFIG_ARCH_OMAP730) += gpio7xx.o obj-$(CONFIG_ARCH_OMAP850) += gpio7xx.o obj-$(CONFIG_ARCH_OMAP15XX) += gpio15xx.o obj-$(CONFIG_ARCH_OMAP16XX) += gpio16xx.o + +endif diff --git a/include/linux/soc/ti/omap1-io.h b/include/linux/soc/ti/omap1-io.h index 9332c92690f4..f7f12728d4a6 100644 --- a/include/linux/soc/ti/omap1-io.h +++ b/include/linux/soc/ti/omap1-io.h @@ -5,7 +5,7 @@ #ifndef __ASSEMBLER__ #include -#if defined(CONFIG_ARCH_OMAP) && defined(CONFIG_ARCH_OMAP1) +#ifdef CONFIG_ARCH_OMAP1_ANY /* * NOTE: Please use ioremap + __raw_read/write where possible instead of these */ @@ -15,7 +15,7 @@ extern u32 omap_readl(u32 pa); extern void omap_writeb(u8 v, u32 pa); extern void omap_writew(u16 v, u32 pa); extern void omap_writel(u32 v, u32 pa); -#elif defined(CONFIG_COMPILE_TEST) +#else static inline u8 omap_readb(u32 pa) { return 0; } static inline u16 omap_readw(u32 pa) { return 0; } static inline u32 omap_readl(u32 pa) { return 0; } From patchwork Tue Apr 19 13:37:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 563873 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 715BDC433F5 for ; Tue, 19 Apr 2022 13:44:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349391AbiDSNqs (ORCPT ); Tue, 19 Apr 2022 09:46:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41292 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243252AbiDSNpW (ORCPT ); Tue, 19 Apr 2022 09:45:22 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D4E1938DA8; Tue, 19 Apr 2022 06:41:34 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 57A0AB81987; Tue, 19 Apr 2022 13:41:33 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7BB39C385A8; Tue, 19 Apr 2022 13:41:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1650375692; bh=tnWw7oBH8X/XBSc06dB4T/Xrxth9FWCIgmXAbL0gUiI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=l353b3xn7RP12XuOF9Cs9zO9tge/orX72WpKCH58E7muL7FyXckbWebpZVTgREpYO 94nj83AEJ8G4ma3/hGOjwiDA7u44mm32sOWTOmedTY1j9E754Khi/eBhNw7sZcR/fP sEELa4g6tqqCHlME51Brhwnr6YLWLyI8Af7wRGM8o8xD8amnnB09engI4zVkiclXXu mCNS0Sb+wp3+DZySStUMonTFolm2Ob9v/CLQNN4JWPX7Aweoh7N2XbyQM1ddcyBgBz 1g2qalhGNLlbW40TdlyWoLmDXnGz4w+LLuOQpSk9G4QwyJjZxE6HKbSgWD1lwNbvb3 UwCXSJ2vUo86g== From: Arnd Bergmann To: linux-omap@vger.kernel.org, tony@atomide.com, aaro.koskinen@iki.fi, jmkrzyszt@gmail.com Cc: Arnd Bergmann , Russell King , Paul Walmsley , Kevin Hilman , Peter Ujfalusi , Vinod Koul , Dmitry Torokhov , Ulf Hansson , Dominik Brodowski , Mark Brown , Felipe Balbi , Alan Stern , Lee Jones , Daniel Thompson , Jingoo Han , Helge Deller , Linus Walleij , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, dmaengine@vger.kernel.org, linux-input@vger.kernel.org, linux-mmc@vger.kernel.org, linux-serial@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org, alsa-devel@alsa-project.org Subject: [PATCH 31/41] ARM: OMAP1: clock: Fix early UART rate issues Date: Tue, 19 Apr 2022 15:37:13 +0200 Message-Id: <20220419133723.1394715-32-arnd@kernel.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20220419133723.1394715-1-arnd@kernel.org> References: <20220419133723.1394715-1-arnd@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Janusz Krzysztofik Commit ef772f2ee31e ("ARM: OMAP: Fix CONFIG_DEBUG_LL") was supposed to fix low level debugging, most possibly by early enabling UART clocks. The fix actually introduced early reset of most bits of MOD_CONF_CTRL_0 register, with the exception of UART1 and UART2 clock related bits which were set high. However, UART1 clock bit can play different roles on different OMAP1 variants. On OMAP1610 it enables the clock as intended, but on OMAP1510 it switches the clock rate from 12 to 48 MHz. Even worth, for UART2 the bit changes its clock rate also on OMAP1610. As a result, UART rates set by a bootloader can be unintentionally changed early on kernel boot and low level debugging broken, not fixed. Besides, reset of all other bits was not justified. Don't touch register bits not related to UART clocks. Also, don't touch the bit of UART2 clock. Make sure UART1 and UART3 are enabled early on relevant OMAP1610 machine types while preserving bootloader UART clock rates on others. Signed-off-by: Janusz Krzysztofik Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/clock_data.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index 36f04da4b939..57d3752babf8 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c @@ -766,11 +766,11 @@ int __init omap1_clk_init(void) u32 reg; #ifdef CONFIG_DEBUG_LL - /* - * Resets some clocks that may be left on from bootloader, - * but leaves serial clocks on. - */ - omap_writel(0x3 << 29, MOD_CONF_CTRL_0); + /* Make sure UART clocks are enabled early */ + if (cpu_is_omap16xx()) + omap_writel(omap_readl(MOD_CONF_CTRL_0) | + CONF_MOD_UART1_CLK_MODE_R | + CONF_MOD_UART3_CLK_MODE_R, MOD_CONF_CTRL_0); #endif /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */ From patchwork Tue Apr 19 13:37:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 563871 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1D9DC4332F for ; Tue, 19 Apr 2022 13:46:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353079AbiDSNsm (ORCPT ); Tue, 19 Apr 2022 09:48:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43164 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353004AbiDSNru (ORCPT ); Tue, 19 Apr 2022 09:47:50 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31BD239839; Tue, 19 Apr 2022 06:42:06 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 88111B81986; Tue, 19 Apr 2022 13:42:03 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9D256C385A5; Tue, 19 Apr 2022 13:41:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1650375722; bh=b8M7Htp8PC1M3UqN4COpkh3W696Svq9K1vaNWm/6ehg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WO+hx1jvcO8sNvVYXwtk9yzViyIi/AeD0vyEdyCzAJ0epFG3OGq2Fn7Q2EGQVFZtL lxuUOfpn5uHFQi9GsZUgd6pDtHMGP4raATiMUNW5ZDgt1Mx2Nw3Wma2I/LO2HpIx7E xUcwEuvzj7umr7FkY4CRlMIXjMQvfrB/eUY+gzYzcxeP8V0TSSePzn/s5Bzv+cR+NL E7plBnP5gpO17xOQMhGm9BvxgJ5ifb3qFbpNxGlNnaeWblY970wnie8dXu9AYsKFAH ZR4rCJZff8i/YehkU19EDTDNz/bmaatCQOWZ7ZUnBrKD8BeNNfnxpY761tWUDxDIY6 FSC+791LABy0A== From: Arnd Bergmann To: linux-omap@vger.kernel.org, tony@atomide.com, aaro.koskinen@iki.fi, jmkrzyszt@gmail.com Cc: Arnd Bergmann , Russell King , Paul Walmsley , Kevin Hilman , Peter Ujfalusi , Vinod Koul , Dmitry Torokhov , Ulf Hansson , Dominik Brodowski , Mark Brown , Felipe Balbi , Alan Stern , Lee Jones , Daniel Thompson , Jingoo Han , Helge Deller , Linus Walleij , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, dmaengine@vger.kernel.org, linux-input@vger.kernel.org, linux-mmc@vger.kernel.org, linux-serial@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org, alsa-devel@alsa-project.org Subject: [PATCH 35/41] usb: host: ohci-omap: Make it CCF clk API compatible Date: Tue, 19 Apr 2022 15:37:17 +0200 Message-Id: <20220419133723.1394715-36-arnd@kernel.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20220419133723.1394715-1-arnd@kernel.org> References: <20220419133723.1394715-1-arnd@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Janusz Krzysztofik The driver, OMAP1 specific, now omits clk_prepare/unprepare() steps, not supported by OMAP1 custom implementation of clock API. However, non-CCF stubs of those functions exist for use on such platforms until converted to CCF. Update the driver to be compatible with CCF implementation of clock API. Signed-off-by: Janusz Krzysztofik Acked-by: Alan Stern Signed-off-by: Arnd Bergmann --- drivers/usb/host/ohci-omap.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c index 069791d25abb..f5bc9c8bdc9a 100644 --- a/drivers/usb/host/ohci-omap.c +++ b/drivers/usb/host/ohci-omap.c @@ -259,6 +259,10 @@ static int ohci_hcd_omap_probe(struct platform_device *pdev) goto err_put_hcd; } + retval = clk_prepare(priv->usb_host_ck); + if (retval) + goto err_put_host_ck; + if (!cpu_is_omap15xx()) priv->usb_dc_ck = clk_get(&pdev->dev, "usb_dc_ck"); else @@ -266,13 +270,17 @@ static int ohci_hcd_omap_probe(struct platform_device *pdev) if (IS_ERR(priv->usb_dc_ck)) { retval = PTR_ERR(priv->usb_dc_ck); - goto err_put_host_ck; + goto err_unprepare_host_ck; } + retval = clk_prepare(priv->usb_dc_ck); + if (retval) + goto err_put_dc_ck; + if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { dev_dbg(&pdev->dev, "request_mem_region failed\n"); retval = -EBUSY; - goto err_put_dc_ck; + goto err_unprepare_dc_ck; } hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); @@ -297,8 +305,12 @@ static int ohci_hcd_omap_probe(struct platform_device *pdev) iounmap(hcd->regs); err2: release_mem_region(hcd->rsrc_start, hcd->rsrc_len); +err_unprepare_dc_ck: + clk_unprepare(priv->usb_dc_ck); err_put_dc_ck: clk_put(priv->usb_dc_ck); +err_unprepare_host_ck: + clk_unprepare(priv->usb_host_ck); err_put_host_ck: clk_put(priv->usb_host_ck); err_put_hcd: @@ -333,7 +345,9 @@ static int ohci_hcd_omap_remove(struct platform_device *pdev) } iounmap(hcd->regs); release_mem_region(hcd->rsrc_start, hcd->rsrc_len); + clk_unprepare(priv->usb_dc_ck); clk_put(priv->usb_dc_ck); + clk_unprepare(priv->usb_host_ck); clk_put(priv->usb_host_ck); usb_put_hcd(hcd); return 0; From patchwork Tue Apr 19 13:37:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 563872 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6840C4167D for ; Tue, 19 Apr 2022 13:46:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353058AbiDSNsi (ORCPT ); Tue, 19 Apr 2022 09:48:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42024 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353132AbiDSNr7 (ORCPT ); Tue, 19 Apr 2022 09:47:59 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA2D139829; Tue, 19 Apr 2022 06:42:19 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 452BDB81984; Tue, 19 Apr 2022 13:42:18 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E8E3AC385B2; Tue, 19 Apr 2022 13:42:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1650375736; bh=ICLjpcLGmyRuFirMful6PPWmOkZPtiGZzfFqAVH/t+Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hvhVwA0NzLazBIGSe0oT0p3Um3CHpAVWQS3Ak93wRIZbI7fSuj4m8N5nOBDcUeqPR gg6oecruNrCF+lKyJ22gDsDgeD4f58TkcrVcOJhpEfQKq0l9fXJUZDysrlPaAYrYdy HM2+bS3l9baDro+/uv1y7gBVl8ayYnO98JhJ4qhRzGc7g0eh0bUu4K1jPLqmuVD72I Tta1ve3oS40cpTyjsSDol1Hce510U2JEw+ghqj9X7GZYYmv/pk7FjMOMYyKc88H2iq raBSAsmMH65yZss3CrvJXSegF1I1GYazdtvupzXRVR7szoVBxpQBB73wWmN7W1YYGv JDzzUYpxD+HAw== From: Arnd Bergmann To: linux-omap@vger.kernel.org, tony@atomide.com, aaro.koskinen@iki.fi, jmkrzyszt@gmail.com Cc: Arnd Bergmann , Russell King , Paul Walmsley , Kevin Hilman , Peter Ujfalusi , Vinod Koul , Dmitry Torokhov , Ulf Hansson , Dominik Brodowski , Mark Brown , Felipe Balbi , Alan Stern , Lee Jones , Daniel Thompson , Jingoo Han , Helge Deller , Linus Walleij , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, dmaengine@vger.kernel.org, linux-input@vger.kernel.org, linux-mmc@vger.kernel.org, linux-serial@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org, alsa-devel@alsa-project.org Subject: [PATCH 37/41] [MERGED] video: fbdev: omap: Make it CCF clk API compatible Date: Tue, 19 Apr 2022 15:37:19 +0200 Message-Id: <20220419133723.1394715-38-arnd@kernel.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20220419133723.1394715-1-arnd@kernel.org> References: <20220419133723.1394715-1-arnd@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Janusz Krzysztofik OMAP1 LCDC drivers now omit clk_prepare/unprepare() steps, not supported by OMAP1 custom implementation of clock API. However, non-CCF stubs of those functions exist for use on such platforms until converted to CCF. Update the drivers to be compatible with CCF implementation of clock API. Signed-off-by: Janusz Krzysztofik Signed-off-by: Arnd Bergmann --- drivers/video/fbdev/omap/hwa742.c | 6 +++--- drivers/video/fbdev/omap/lcdc.c | 6 +++--- drivers/video/fbdev/omap/sossi.c | 5 +++-- 3 files changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/video/fbdev/omap/hwa742.c b/drivers/video/fbdev/omap/hwa742.c index b191bef22d98..9d9fe5c3a7a1 100644 --- a/drivers/video/fbdev/omap/hwa742.c +++ b/drivers/video/fbdev/omap/hwa742.c @@ -964,7 +964,7 @@ static int hwa742_init(struct omapfb_device *fbdev, int ext_mode, if ((r = calc_extif_timings(ext_clk, &extif_mem_div)) < 0) goto err3; hwa742.extif->set_timings(&hwa742.reg_timings); - clk_enable(hwa742.sys_ck); + clk_prepare_enable(hwa742.sys_ck); calc_hwa742_clk_rates(ext_clk, &sys_clk, &pix_clk); if ((r = calc_extif_timings(sys_clk, &extif_mem_div)) < 0) @@ -1023,7 +1023,7 @@ static int hwa742_init(struct omapfb_device *fbdev, int ext_mode, return 0; err4: - clk_disable(hwa742.sys_ck); + clk_disable_unprepare(hwa742.sys_ck); err3: hwa742.extif->cleanup(); err2: @@ -1037,7 +1037,7 @@ static void hwa742_cleanup(void) hwa742_set_update_mode(OMAPFB_UPDATE_DISABLED); hwa742.extif->cleanup(); hwa742.int_ctrl->cleanup(); - clk_disable(hwa742.sys_ck); + clk_disable_unprepare(hwa742.sys_ck); } struct lcd_ctrl hwa742_ctrl = { diff --git a/drivers/video/fbdev/omap/lcdc.c b/drivers/video/fbdev/omap/lcdc.c index 4c9091bd936d..e7ce783e5215 100644 --- a/drivers/video/fbdev/omap/lcdc.c +++ b/drivers/video/fbdev/omap/lcdc.c @@ -713,7 +713,7 @@ static int omap_lcdc_init(struct omapfb_device *fbdev, int ext_mode, dev_err(fbdev->dev, "failed to adjust LCD rate\n"); goto fail1; } - clk_enable(lcdc.lcd_ck); + clk_prepare_enable(lcdc.lcd_ck); r = request_irq(fbdev->int_irq, lcdc_irq_handler, 0, MODULE_NAME, fbdev); if (r) { @@ -748,7 +748,7 @@ static int omap_lcdc_init(struct omapfb_device *fbdev, int ext_mode, fail3: free_irq(fbdev->int_irq, lcdc.fbdev); fail2: - clk_disable(lcdc.lcd_ck); + clk_disable_unprepare(lcdc.lcd_ck); fail1: clk_put(lcdc.lcd_ck); fail0: @@ -762,7 +762,7 @@ static void omap_lcdc_cleanup(void) free_fbmem(); omap_free_lcd_dma(); free_irq(lcdc.fbdev->int_irq, lcdc.fbdev); - clk_disable(lcdc.lcd_ck); + clk_disable_unprepare(lcdc.lcd_ck); clk_put(lcdc.lcd_ck); } diff --git a/drivers/video/fbdev/omap/sossi.c b/drivers/video/fbdev/omap/sossi.c index 6b99d89fbe6e..c90eb8ca58af 100644 --- a/drivers/video/fbdev/omap/sossi.c +++ b/drivers/video/fbdev/omap/sossi.c @@ -600,7 +600,7 @@ static int sossi_init(struct omapfb_device *fbdev) l &= ~CONF_SOSSI_RESET_R; omap_writel(l, MOD_CONF_CTRL_1); - clk_enable(sossi.fck); + clk_prepare_enable(sossi.fck); l = omap_readl(ARM_IDLECT2); l &= ~(1 << 8); /* DMACK_REQ */ omap_writel(l, ARM_IDLECT2); @@ -651,7 +651,7 @@ static int sossi_init(struct omapfb_device *fbdev) return 0; err: - clk_disable(sossi.fck); + clk_disable_unprepare(sossi.fck); clk_put(sossi.fck); return r; } @@ -659,6 +659,7 @@ static int sossi_init(struct omapfb_device *fbdev) static void sossi_cleanup(void) { omap_lcdc_free_dma_callback(); + clk_unprepare(sossi.fck); clk_put(sossi.fck); iounmap(sossi.base); } From patchwork Tue Apr 19 13:37:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 563870 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E300C4167B for ; Tue, 19 Apr 2022 13:46:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353093AbiDSNsn (ORCPT ); Tue, 19 Apr 2022 09:48:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40506 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353182AbiDSNsL (ORCPT ); Tue, 19 Apr 2022 09:48:11 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9F816F6A; Tue, 19 Apr 2022 06:42:26 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 390B8B81986; Tue, 19 Apr 2022 13:42:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 58C17C385B1; Tue, 19 Apr 2022 13:42:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1650375744; bh=W3qNGAAX2ECL+9vJh3xisWUOh4fEYqZMZtajKR6sclM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SKr7WyMGRCWl7v/bvtIsgn5/V3JSlMflq4Q/DrYtsnDWWlhOP2f/QZz/mAStrQbfv OSwRVbecQTirW0bkg8ct8ZX3ZvidG0fdpIIrdb2ikG6e1iNCk3oIpODN2KEsBn4jaL iL1TEBzQNkc83ablhzvNcTWLRxSQzhIsMUM2UfvRw82yolwxFIjf4Y+jmK8MZi28dA ifEP8JGP4wd2T+YWPd4y4nvn8O71HicpNzx1mj7AHN8SDPpjQNwTaZ+3S7klD2C0Uk BJ3IJCwHBlprKwQ/njIgRCNqvECW/GFDYnEeMMMA/9HeNtfHcZKV7YKlqEhQpUs3u3 p4wr3YRVJnM7w== From: Arnd Bergmann To: linux-omap@vger.kernel.org, tony@atomide.com, aaro.koskinen@iki.fi, jmkrzyszt@gmail.com Cc: Arnd Bergmann , Russell King , Paul Walmsley , Kevin Hilman , Peter Ujfalusi , Vinod Koul , Dmitry Torokhov , Ulf Hansson , Dominik Brodowski , Mark Brown , Felipe Balbi , Alan Stern , Lee Jones , Daniel Thompson , Jingoo Han , Helge Deller , Linus Walleij , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, dmaengine@vger.kernel.org, linux-input@vger.kernel.org, linux-mmc@vger.kernel.org, linux-serial@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org, alsa-devel@alsa-project.org Subject: [PATCH 38/41] [MERGED] mmc: omap: Make it CCF clk API compatible Date: Tue, 19 Apr 2022 15:37:20 +0200 Message-Id: <20220419133723.1394715-39-arnd@kernel.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20220419133723.1394715-1-arnd@kernel.org> References: <20220419133723.1394715-1-arnd@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Janusz Krzysztofik The driver, OMAP specific, now omits clk_prepare/unprepare() steps, not supported by OMAP custom implementation of clock API. However, non-CCF stubs of those functions exist for use on such platforms until converted to CCF. Update the driver to be compatible with CCF implementation of clock API. Signed-off-by: Janusz Krzysztofik Signed-off-by: Arnd Bergmann --- drivers/mmc/host/omap.c | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c index 5e5af34090f1..57d39283924d 100644 --- a/drivers/mmc/host/omap.c +++ b/drivers/mmc/host/omap.c @@ -1374,7 +1374,7 @@ static int mmc_omap_probe(struct platform_device *pdev) host->iclk = clk_get(&pdev->dev, "ick"); if (IS_ERR(host->iclk)) return PTR_ERR(host->iclk); - clk_enable(host->iclk); + clk_prepare_enable(host->iclk); host->fclk = clk_get(&pdev->dev, "fck"); if (IS_ERR(host->fclk)) { @@ -1382,16 +1382,18 @@ static int mmc_omap_probe(struct platform_device *pdev) goto err_free_iclk; } + ret = clk_prepare(host->fclk); + if (ret) + goto err_put_fclk; + host->dma_tx_burst = -1; host->dma_rx_burst = -1; host->dma_tx = dma_request_chan(&pdev->dev, "tx"); if (IS_ERR(host->dma_tx)) { ret = PTR_ERR(host->dma_tx); - if (ret == -EPROBE_DEFER) { - clk_put(host->fclk); - goto err_free_iclk; - } + if (ret == -EPROBE_DEFER) + goto err_free_fclk; host->dma_tx = NULL; dev_warn(host->dev, "TX DMA channel request failed\n"); @@ -1403,8 +1405,7 @@ static int mmc_omap_probe(struct platform_device *pdev) if (ret == -EPROBE_DEFER) { if (host->dma_tx) dma_release_channel(host->dma_tx); - clk_put(host->fclk); - goto err_free_iclk; + goto err_free_fclk; } host->dma_rx = NULL; @@ -1454,9 +1455,12 @@ static int mmc_omap_probe(struct platform_device *pdev) dma_release_channel(host->dma_tx); if (host->dma_rx) dma_release_channel(host->dma_rx); +err_free_fclk: + clk_unprepare(host->fclk); +err_put_fclk: clk_put(host->fclk); err_free_iclk: - clk_disable(host->iclk); + clk_disable_unprepare(host->iclk); clk_put(host->iclk); return ret; } @@ -1476,8 +1480,9 @@ static int mmc_omap_remove(struct platform_device *pdev) mmc_omap_fclk_enable(host, 0); free_irq(host->irq, host); + clk_unprepare(host->fclk); clk_put(host->fclk); - clk_disable(host->iclk); + clk_disable_unprepare(host->iclk); clk_put(host->iclk); if (host->dma_tx) From patchwork Tue Apr 19 13:37:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 563869 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88B0FC4332F for ; Tue, 19 Apr 2022 13:46:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353128AbiDSNsq (ORCPT ); Tue, 19 Apr 2022 09:48:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43856 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352761AbiDSNsW (ORCPT ); Tue, 19 Apr 2022 09:48:22 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB72F3A73B; Tue, 19 Apr 2022 06:42:39 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 14EF9615A3; Tue, 19 Apr 2022 13:42:39 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8AF8AC385AA; Tue, 19 Apr 2022 13:42:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1650375758; bh=3Qw/EDM2sQ0Z1WeJM+6k1TL/isGw0AUM08FQLkOT4KM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OmE/rLwny7klxOcrJmOIj7VrwmjTbGl9g7PkSxLoOrh3F1HBJFlaF8P8v64JA+vzN qudcdTqtbIvdmkyytHbpm/Pk2du0PqVlfv9b9jz9jOYOfmb2CzqPkGxM8u1MPsjg1g fZZfondchaHFAp4lbi5V3l+hIeni6/kiEIPBXKI51lviNgtI3nkoNPr9Dgr1jiECuT dZhsUWm1BmckYFkp5SH4MPsroC6ARie6yn0u1xTxHvUvAXJvNhFpdQ3rtLkec+dpV0 Yuf3CxAe/vOBsJtvsbmsGe1eMRX5okKfbcaorKs/jIq5wsDl9sEi0Q3xgApe9P4N7D qoJPd3G+JtgOg== From: Arnd Bergmann To: linux-omap@vger.kernel.org, tony@atomide.com, aaro.koskinen@iki.fi, jmkrzyszt@gmail.com Cc: Arnd Bergmann , Russell King , Paul Walmsley , Kevin Hilman , Peter Ujfalusi , Vinod Koul , Dmitry Torokhov , Ulf Hansson , Dominik Brodowski , Mark Brown , Felipe Balbi , Alan Stern , Lee Jones , Daniel Thompson , Jingoo Han , Helge Deller , Linus Walleij , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, dmaengine@vger.kernel.org, linux-input@vger.kernel.org, linux-mmc@vger.kernel.org, linux-serial@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org, alsa-devel@alsa-project.org Subject: [PATCH 40/41] [TO BE REBASED] ARM: OMAP1: clock: Convert to CCF Date: Tue, 19 Apr 2022 15:37:22 +0200 Message-Id: <20220419133723.1394715-41-arnd@kernel.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20220419133723.1394715-1-arnd@kernel.org> References: <20220419133723.1394715-1-arnd@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Janusz Krzysztofik OMAP1 still uses its own implementation of standard clock API defined in include/linux/clk.h. Internals of that implementation are not visible outside OMAP1 directory. As a consequence, device drivers are not able to register clocks potentially provided by peripheral devices. Drop OMAP1 implementation of the clock API and enable common clock framework. Modify the remaining low level code to be compatible with clock provider API and register the clocks with CCF. Move initialisation of clocks to omap1_timer_init() to avoid memory allocation issues at early setup phase from where omap1_init_early() is called. Register the clocks after initialization of clock I/O registers, local clock pointers used by OMAP1 clock ops, and local .rate fields of clocks with no local implementation of .recalc ops, so CCF structures are populated with correct data during clock registration. Instead of enabling some of the registered clocks, flag them for CCF as critical. Introduce .is_enabled op using code that verifies hardware status of clock enablement, split out from implementation of .disable_unused op, so the latter is actually called by CCF for not requested but hardware enabled clocks. Add .round_rate ops where missing so .set_rate ops are called by CCF as expected. Since CCF allows parallel execution of .enable/.disable and .set_rate ops, protect registers shared among those groups of ops from concurrent access with spinlocks. Drop local debugfs support in favor of that provided by CCF. v2: flag tc2_ck as CLK_IS_CRITICAL (Aaro) v3: rebase on top of soc/omap1-multiplatform-5.18, - drop no longer needed includes from arch/arm/mach-omap1/io.c Signed-off-by: Janusz Krzysztofik Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/clock.c | 693 +++++++++++++------------------ arch/arm/mach-omap1/clock.h | 139 +++---- arch/arm/mach-omap1/clock_data.c | 483 ++++++++++----------- arch/arm/mach-omap1/io.c | 7 - arch/arm/mach-omap1/time.c | 5 + 5 files changed, 563 insertions(+), 764 deletions(-) diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index e5bd4d3b742d..83381e23fab9 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -16,7 +16,9 @@ #include #include #include +#include #include +#include #include @@ -28,33 +30,37 @@ #include "sram.h" __u32 arm_idlect1_mask; -struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; +/* provide direct internal access (not via clk API) to some clocks */ +struct omap1_clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; -static LIST_HEAD(clocks); -static DEFINE_MUTEX(clocks_mutex); -static DEFINE_SPINLOCK(clockfw_lock); +/* protect registeres shared among clk_enable/disable() and clk_set_rate() operations */ +static DEFINE_SPINLOCK(arm_ckctl_lock); +static DEFINE_SPINLOCK(arm_idlect2_lock); +static DEFINE_SPINLOCK(mod_conf_ctrl_0_lock); +static DEFINE_SPINLOCK(mod_conf_ctrl_1_lock); +static DEFINE_SPINLOCK(swd_clk_div_ctrl_sel_lock); /* * Omap1 specific clock functions */ -unsigned long omap1_uart_recalc(struct clk *clk) +unsigned long omap1_uart_recalc(struct omap1_clk *clk, unsigned long p_rate) { unsigned int val = __raw_readl(clk->enable_reg); return val & 1 << clk->enable_bit ? 48000000 : 12000000; } -unsigned long omap1_sossi_recalc(struct clk *clk) +unsigned long omap1_sossi_recalc(struct omap1_clk *clk, unsigned long p_rate) { u32 div = omap_readl(MOD_CONF_CTRL_1); div = (div >> 17) & 0x7; div++; - return clk->parent->rate / div; + return p_rate / div; } -static void omap1_clk_allow_idle(struct clk *clk) +static void omap1_clk_allow_idle(struct omap1_clk *clk) { struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk; @@ -65,7 +71,7 @@ static void omap1_clk_allow_idle(struct clk *clk) arm_idlect1_mask |= 1 << iclk->idlect_shift; } -static void omap1_clk_deny_idle(struct clk *clk) +static void omap1_clk_deny_idle(struct omap1_clk *clk) { struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk; @@ -129,7 +135,7 @@ static __u16 verify_ckctl_value(__u16 newval) return newval; } -static int calc_dsor_exp(struct clk *clk, unsigned long rate) +static int calc_dsor_exp(unsigned long rate, unsigned long realrate) { /* Note: If target frequency is too low, this function will return 4, * which is invalid value. Caller must check for this value and act @@ -142,15 +148,11 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) * DSP_CK >= TC_CK * DSPMMU_CK >= TC_CK */ - unsigned long realrate; - struct clk * parent; unsigned dsor_exp; - parent = clk->parent; - if (unlikely(parent == NULL)) + if (unlikely(realrate == 0)) return -EIO; - realrate = parent->rate; for (dsor_exp=0; dsor_exp<4; dsor_exp++) { if (realrate <= rate) break; @@ -161,16 +163,50 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) return dsor_exp; } -unsigned long omap1_ckctl_recalc(struct clk *clk) +unsigned long omap1_ckctl_recalc(struct omap1_clk *clk, unsigned long p_rate) { /* Calculate divisor encoded as 2-bit exponent */ int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset)); - return clk->parent->rate / dsor; + /* update locally maintained rate, required by arm_ck for omap1_show_rates() */ + clk->rate = p_rate / dsor; + return clk->rate; } -unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk) +static int omap1_clk_is_enabled(struct clk_hw *hw) { + struct omap1_clk *clk = to_omap1_clk(hw); + bool api_ck_was_enabled = true; + __u32 regval32; + int ret; + + if (!clk->ops) /* no gate -- always enabled */ + return 1; + + if (clk->ops == &clkops_dspck) { + api_ck_was_enabled = omap1_clk_is_enabled(&api_ck_p->hw); + if (!api_ck_was_enabled) + if (api_ck_p->ops->enable(api_ck_p) < 0) + return 0; + } + + if (clk->flags & ENABLE_REG_32BIT) + regval32 = __raw_readl(clk->enable_reg); + else + regval32 = __raw_readw(clk->enable_reg); + + ret = regval32 & (1 << clk->enable_bit); + + if (!api_ck_was_enabled) + api_ck_p->ops->disable(api_ck_p); + + return ret; +} + + +unsigned long omap1_ckctl_recalc_dsp_domain(struct omap1_clk *clk, unsigned long p_rate) +{ + bool api_ck_was_enabled; int dsor; /* Calculate divisor encoded as 2-bit exponent @@ -180,15 +216,18 @@ unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk) * Note that DSP_CKCTL virt addr = phys addr, so * we must use __raw_readw() instead of omap_readw(). */ - omap1_clk_enable(api_ck_p); + api_ck_was_enabled = omap1_clk_is_enabled(&api_ck_p->hw); + if (!api_ck_was_enabled) + api_ck_p->ops->enable(api_ck_p); dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); - omap1_clk_disable(api_ck_p); + if (!api_ck_was_enabled) + api_ck_p->ops->disable(api_ck_p); - return clk->parent->rate / dsor; + return p_rate / dsor; } /* MPU virtual clock functions */ -int omap1_select_table_rate(struct clk *clk, unsigned long rate) +int omap1_select_table_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate) { /* Find the highest supported frequency <= rate and switch to it */ struct mpu_rate * ptr; @@ -223,12 +262,12 @@ int omap1_select_table_rate(struct clk *clk, unsigned long rate) return 0; } -int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate) +int omap1_clk_set_rate_dsp_domain(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate) { int dsor_exp; u16 regval; - dsor_exp = calc_dsor_exp(clk, rate); + dsor_exp = calc_dsor_exp(rate, p_rate); if (dsor_exp > 3) dsor_exp = -EINVAL; if (dsor_exp < 0) @@ -238,42 +277,51 @@ int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate) regval &= ~(3 << clk->rate_offset); regval |= dsor_exp << clk->rate_offset; __raw_writew(regval, DSP_CKCTL); - clk->rate = clk->parent->rate / (1 << dsor_exp); + clk->rate = p_rate / (1 << dsor_exp); return 0; } -long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate) +long omap1_clk_round_rate_ckctl_arm(struct omap1_clk *clk, unsigned long rate, + unsigned long *p_rate) { - int dsor_exp = calc_dsor_exp(clk, rate); + int dsor_exp = calc_dsor_exp(rate, *p_rate); + if (dsor_exp < 0) return dsor_exp; if (dsor_exp > 3) dsor_exp = 3; - return clk->parent->rate / (1 << dsor_exp); + return *p_rate / (1 << dsor_exp); } -int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate) +int omap1_clk_set_rate_ckctl_arm(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate) { + unsigned long flags; int dsor_exp; u16 regval; - dsor_exp = calc_dsor_exp(clk, rate); + dsor_exp = calc_dsor_exp(rate, p_rate); if (dsor_exp > 3) dsor_exp = -EINVAL; if (dsor_exp < 0) return dsor_exp; + /* protect ARM_CKCTL register from concurrent access via clk_enable/disable() */ + spin_lock_irqsave(&arm_ckctl_lock, flags); + regval = omap_readw(ARM_CKCTL); regval &= ~(3 << clk->rate_offset); regval |= dsor_exp << clk->rate_offset; regval = verify_ckctl_value(regval); omap_writew(regval, ARM_CKCTL); - clk->rate = clk->parent->rate / (1 << dsor_exp); + clk->rate = p_rate / (1 << dsor_exp); + + spin_unlock_irqrestore(&arm_ckctl_lock, flags); + return 0; } -long omap1_round_to_table_rate(struct clk *clk, unsigned long rate) +long omap1_round_to_table_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate) { /* Find the highest supported frequency <= rate */ struct mpu_rate * ptr; @@ -324,26 +372,40 @@ static unsigned calc_ext_dsor(unsigned long rate) } /* XXX Only needed on 1510 */ -int omap1_set_uart_rate(struct clk *clk, unsigned long rate) +long omap1_round_uart_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate) { + return rate > 24000000 ? 48000000 : 12000000; +} + +int omap1_set_uart_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate) +{ + unsigned long flags; unsigned int val; - val = __raw_readl(clk->enable_reg); if (rate == 12000000) - val &= ~(1 << clk->enable_bit); + val = 0; else if (rate == 48000000) - val |= (1 << clk->enable_bit); + val = 1 << clk->enable_bit; else return -EINVAL; + + /* protect MOD_CONF_CTRL_0 register from concurrent access via clk_enable/disable() */ + spin_lock_irqsave(&mod_conf_ctrl_0_lock, flags); + + val |= __raw_readl(clk->enable_reg) & ~(1 << clk->enable_bit); __raw_writel(val, clk->enable_reg); + + spin_unlock_irqrestore(&mod_conf_ctrl_0_lock, flags); + clk->rate = rate; return 0; } /* External clock (MCLK & BCLK) functions */ -int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate) +int omap1_set_ext_clk_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate) { + unsigned long flags; unsigned dsor; __u16 ratio_bits; @@ -354,25 +416,53 @@ int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate) else ratio_bits = (dsor - 2) << 2; + /* protect SWD_CLK_DIV_CTRL_SEL register from concurrent access via clk_enable/disable() */ + spin_lock_irqsave(&swd_clk_div_ctrl_sel_lock, flags); + ratio_bits |= __raw_readw(clk->enable_reg) & ~0xfd; __raw_writew(ratio_bits, clk->enable_reg); + spin_unlock_irqrestore(&swd_clk_div_ctrl_sel_lock, flags); + return 0; } -int omap1_set_sossi_rate(struct clk *clk, unsigned long rate) +static int calc_div_sossi(unsigned long rate, unsigned long p_rate) { - u32 l; int div; - unsigned long p_rate; - p_rate = clk->parent->rate; /* Round towards slower frequency */ div = (p_rate + rate - 1) / rate; - div--; + + return --div; +} + +long omap1_round_sossi_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate) +{ + int div; + + div = calc_div_sossi(rate, *p_rate); + if (div < 0) + div = 0; + else if (div > 7) + div = 7; + + return *p_rate / (div + 1); +} + +int omap1_set_sossi_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate) +{ + unsigned long flags; + u32 l; + int div; + + div = calc_div_sossi(rate, p_rate); if (div < 0 || div > 7) return -EINVAL; + /* protect MOD_CONF_CTRL_1 register from concurrent access via clk_enable/disable() */ + spin_lock_irqsave(&mod_conf_ctrl_1_lock, flags); + l = omap_readl(MOD_CONF_CTRL_1); l &= ~(7 << 17); l |= div << 17; @@ -380,15 +470,17 @@ int omap1_set_sossi_rate(struct clk *clk, unsigned long rate) clk->rate = p_rate / (div + 1); + spin_unlock_irqrestore(&mod_conf_ctrl_1_lock, flags); + return 0; } -long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate) +long omap1_round_ext_clk_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate) { return 96000000 / calc_ext_dsor(rate); } -void omap1_init_ext_clk(struct clk *clk) +int omap1_init_ext_clk(struct omap1_clk *clk) { unsigned dsor; __u16 ratio_bits; @@ -404,59 +496,59 @@ void omap1_init_ext_clk(struct clk *clk) dsor = ratio_bits + 2; clk-> rate = 96000000 / dsor; + + return 0; } -int omap1_clk_enable(struct clk *clk) +static int omap1_clk_enable(struct clk_hw *hw) { + struct omap1_clk *clk = to_omap1_clk(hw), *parent = to_omap1_clk(clk_hw_get_parent(hw)); int ret = 0; - if (clk->usecount++ == 0) { - if (clk->parent) { - ret = omap1_clk_enable(clk->parent); - if (ret) - goto err; - - if (clk->flags & CLOCK_NO_IDLE_PARENT) - omap1_clk_deny_idle(clk->parent); - } + if (parent && clk->flags & CLOCK_NO_IDLE_PARENT) + omap1_clk_deny_idle(parent); + if (clk->ops && !(WARN_ON(!clk->ops->enable))) ret = clk->ops->enable(clk); - if (ret) { - if (clk->parent) - omap1_clk_disable(clk->parent); - goto err; - } - } - return ret; -err: - clk->usecount--; return ret; } -void omap1_clk_disable(struct clk *clk) +static void omap1_clk_disable(struct clk_hw *hw) { - if (clk->usecount > 0 && !(--clk->usecount)) { + struct omap1_clk *clk = to_omap1_clk(hw), *parent = to_omap1_clk(clk_hw_get_parent(hw)); + + if (clk->ops && !(WARN_ON(!clk->ops->disable))) clk->ops->disable(clk); - if (likely(clk->parent)) { - omap1_clk_disable(clk->parent); - if (clk->flags & CLOCK_NO_IDLE_PARENT) - omap1_clk_allow_idle(clk->parent); - } - } + + if (likely(parent) && clk->flags & CLOCK_NO_IDLE_PARENT) + omap1_clk_allow_idle(parent); } -static int omap1_clk_enable_generic(struct clk *clk) +static int omap1_clk_enable_generic(struct omap1_clk *clk) { + unsigned long flags; __u16 regval16; __u32 regval32; if (unlikely(clk->enable_reg == NULL)) { printk(KERN_ERR "clock.c: Enable for %s without enable code\n", - clk->name); + clk_hw_get_name(&clk->hw)); return -EINVAL; } + /* protect clk->enable_reg from concurrent access via clk_set_rate() */ + if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL)) + spin_lock_irqsave(&arm_ckctl_lock, flags); + else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2)) + spin_lock_irqsave(&arm_idlect2_lock, flags); + else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0)) + spin_lock_irqsave(&mod_conf_ctrl_0_lock, flags); + else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1)) + spin_lock_irqsave(&mod_conf_ctrl_1_lock, flags); + else if (clk->enable_reg == OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL)) + spin_lock_irqsave(&swd_clk_div_ctrl_sel_lock, flags); + if (clk->flags & ENABLE_REG_32BIT) { regval32 = __raw_readl(clk->enable_reg); regval32 |= (1 << clk->enable_bit); @@ -467,17 +559,41 @@ static int omap1_clk_enable_generic(struct clk *clk) __raw_writew(regval16, clk->enable_reg); } + if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL)) + spin_unlock_irqrestore(&arm_ckctl_lock, flags); + else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2)) + spin_unlock_irqrestore(&arm_idlect2_lock, flags); + else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0)) + spin_unlock_irqrestore(&mod_conf_ctrl_0_lock, flags); + else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1)) + spin_unlock_irqrestore(&mod_conf_ctrl_1_lock, flags); + else if (clk->enable_reg == OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL)) + spin_unlock_irqrestore(&swd_clk_div_ctrl_sel_lock, flags); + return 0; } -static void omap1_clk_disable_generic(struct clk *clk) +static void omap1_clk_disable_generic(struct omap1_clk *clk) { + unsigned long flags; __u16 regval16; __u32 regval32; if (clk->enable_reg == NULL) return; + /* protect clk->enable_reg from concurrent access via clk_set_rate() */ + if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL)) + spin_lock_irqsave(&arm_ckctl_lock, flags); + else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2)) + spin_lock_irqsave(&arm_idlect2_lock, flags); + else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0)) + spin_lock_irqsave(&mod_conf_ctrl_0_lock, flags); + else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1)) + spin_lock_irqsave(&mod_conf_ctrl_1_lock, flags); + else if (clk->enable_reg == OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL)) + spin_lock_irqsave(&swd_clk_div_ctrl_sel_lock, flags); + if (clk->flags & ENABLE_REG_32BIT) { regval32 = __raw_readl(clk->enable_reg); regval32 &= ~(1 << clk->enable_bit); @@ -487,6 +603,17 @@ static void omap1_clk_disable_generic(struct clk *clk) regval16 &= ~(1 << clk->enable_bit); __raw_writew(regval16, clk->enable_reg); } + + if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL)) + spin_unlock_irqrestore(&arm_ckctl_lock, flags); + else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2)) + spin_unlock_irqrestore(&arm_idlect2_lock, flags); + else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0)) + spin_unlock_irqrestore(&mod_conf_ctrl_0_lock, flags); + else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1)) + spin_unlock_irqrestore(&mod_conf_ctrl_1_lock, flags); + else if (clk->enable_reg == OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL)) + spin_unlock_irqrestore(&swd_clk_div_ctrl_sel_lock, flags); } const struct clkops clkops_generic = { @@ -494,25 +621,38 @@ const struct clkops clkops_generic = { .disable = omap1_clk_disable_generic, }; -static int omap1_clk_enable_dsp_domain(struct clk *clk) +static int omap1_clk_enable_dsp_domain(struct omap1_clk *clk) { - int retval; + bool api_ck_was_enabled; + int retval = 0; + + api_ck_was_enabled = omap1_clk_is_enabled(&api_ck_p->hw); + if (!api_ck_was_enabled) + retval = api_ck_p->ops->enable(api_ck_p); - retval = omap1_clk_enable(api_ck_p); if (!retval) { retval = omap1_clk_enable_generic(clk); - omap1_clk_disable(api_ck_p); + + if (!api_ck_was_enabled) + api_ck_p->ops->disable(api_ck_p); } return retval; } -static void omap1_clk_disable_dsp_domain(struct clk *clk) +static void omap1_clk_disable_dsp_domain(struct omap1_clk *clk) { - if (omap1_clk_enable(api_ck_p) == 0) { - omap1_clk_disable_generic(clk); - omap1_clk_disable(api_ck_p); - } + bool api_ck_was_enabled; + + api_ck_was_enabled = omap1_clk_is_enabled(&api_ck_p->hw); + if (!api_ck_was_enabled) + if (api_ck_p->ops->enable(api_ck_p) < 0) + return; + + omap1_clk_disable_generic(clk); + + if (!api_ck_was_enabled) + api_ck_p->ops->disable(api_ck_p); } const struct clkops clkops_dspck = { @@ -521,7 +661,7 @@ const struct clkops clkops_dspck = { }; /* XXX SYSC register handling does not belong in the clock framework */ -static int omap1_clk_enable_uart_functional_16xx(struct clk *clk) +static int omap1_clk_enable_uart_functional_16xx(struct omap1_clk *clk) { int ret; struct uart_clk *uclk; @@ -538,7 +678,7 @@ static int omap1_clk_enable_uart_functional_16xx(struct clk *clk) } /* XXX SYSC register handling does not belong in the clock framework */ -static void omap1_clk_disable_uart_functional_16xx(struct clk *clk) +static void omap1_clk_disable_uart_functional_16xx(struct omap1_clk *clk) { struct uart_clk *uclk; @@ -555,20 +695,33 @@ const struct clkops clkops_uart_16xx = { .disable = omap1_clk_disable_uart_functional_16xx, }; -long omap1_clk_round_rate(struct clk *clk, unsigned long rate) +static unsigned long omap1_clk_recalc_rate(struct clk_hw *hw, unsigned long p_rate) { - if (clk->round_rate != NULL) - return clk->round_rate(clk, rate); + struct omap1_clk *clk = to_omap1_clk(hw); + + if (clk->recalc) + return clk->recalc(clk, p_rate); return clk->rate; } -int omap1_clk_set_rate(struct clk *clk, unsigned long rate) +static long omap1_clk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *p_rate) +{ + struct omap1_clk *clk = to_omap1_clk(hw); + + if (clk->round_rate != NULL) + return clk->round_rate(clk, rate, p_rate); + + return omap1_clk_recalc_rate(hw, *p_rate); +} + +static int omap1_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long p_rate) { + struct omap1_clk *clk = to_omap1_clk(hw); int ret = -EINVAL; if (clk->set_rate) - ret = clk->set_rate(clk, rate); + ret = clk->set_rate(clk, rate, p_rate); return ret; } @@ -576,243 +729,105 @@ int omap1_clk_set_rate(struct clk *clk, unsigned long rate) * Omap1 clock reset and init functions */ +static int omap1_clk_init_op(struct clk_hw *hw) +{ + struct omap1_clk *clk = to_omap1_clk(hw); + + if (clk->init) + return clk->init(clk); + + return 0; +} + #ifdef CONFIG_OMAP_RESET_CLOCKS -void omap1_clk_disable_unused(struct clk *clk) +static void omap1_clk_disable_unused(struct clk_hw *hw) { - __u32 regval32; + struct omap1_clk *clk = to_omap1_clk(hw); + const char *name = clk_hw_get_name(hw); /* Clocks in the DSP domain need api_ck. Just assume bootloader * has not enabled any DSP clocks */ if (clk->enable_reg == DSP_IDLECT2) { - pr_info("Skipping reset check for DSP domain clock \"%s\"\n", - clk->name); + pr_info("Skipping reset check for DSP domain clock \"%s\"\n", name); return; } - /* Is the clock already disabled? */ - if (clk->flags & ENABLE_REG_32BIT) - regval32 = __raw_readl(clk->enable_reg); - else - regval32 = __raw_readw(clk->enable_reg); - - if ((regval32 & (1 << clk->enable_bit)) == 0) - return; - - printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name); - clk->ops->disable(clk); + pr_info("Disabling unused clock \"%s\"... ", name); + omap1_clk_disable(hw); printk(" done\n"); } #endif +const struct clk_ops omap1_clk_gate_ops = { + .enable = omap1_clk_enable, + .disable = omap1_clk_disable, + .is_enabled = omap1_clk_is_enabled, +#ifdef CONFIG_OMAP_RESET_CLOCKS + .disable_unused = omap1_clk_disable_unused, +#endif +}; -int clk_enable(struct clk *clk) -{ - unsigned long flags; - int ret; - - if (IS_ERR_OR_NULL(clk)) - return -EINVAL; - - spin_lock_irqsave(&clockfw_lock, flags); - ret = omap1_clk_enable(clk); - spin_unlock_irqrestore(&clockfw_lock, flags); - - return ret; -} -EXPORT_SYMBOL(clk_enable); - -void clk_disable(struct clk *clk) -{ - unsigned long flags; - - if (IS_ERR_OR_NULL(clk)) - return; - - spin_lock_irqsave(&clockfw_lock, flags); - if (clk->usecount == 0) { - pr_err("Trying disable clock %s with 0 usecount\n", - clk->name); - WARN_ON(1); - goto out; - } - - omap1_clk_disable(clk); - -out: - spin_unlock_irqrestore(&clockfw_lock, flags); -} -EXPORT_SYMBOL(clk_disable); - -unsigned long clk_get_rate(struct clk *clk) -{ - unsigned long flags; - unsigned long ret; - - if (IS_ERR_OR_NULL(clk)) - return 0; - - spin_lock_irqsave(&clockfw_lock, flags); - ret = clk->rate; - spin_unlock_irqrestore(&clockfw_lock, flags); - - return ret; -} -EXPORT_SYMBOL(clk_get_rate); - -/* - * Optional clock functions defined in include/linux/clk.h - */ - -long clk_round_rate(struct clk *clk, unsigned long rate) -{ - unsigned long flags; - long ret; - - if (IS_ERR_OR_NULL(clk)) - return 0; - - spin_lock_irqsave(&clockfw_lock, flags); - ret = omap1_clk_round_rate(clk, rate); - spin_unlock_irqrestore(&clockfw_lock, flags); - - return ret; -} -EXPORT_SYMBOL(clk_round_rate); - -int clk_set_rate(struct clk *clk, unsigned long rate) -{ - unsigned long flags; - int ret = -EINVAL; - - if (IS_ERR_OR_NULL(clk)) - return ret; - - spin_lock_irqsave(&clockfw_lock, flags); - ret = omap1_clk_set_rate(clk, rate); - if (ret == 0) - propagate_rate(clk); - spin_unlock_irqrestore(&clockfw_lock, flags); - - return ret; -} -EXPORT_SYMBOL(clk_set_rate); - -int clk_set_parent(struct clk *clk, struct clk *parent) -{ - WARN_ONCE(1, "clk_set_parent() not implemented for OMAP1\n"); - - return -EINVAL; -} -EXPORT_SYMBOL(clk_set_parent); +const struct clk_ops omap1_clk_rate_ops = { + .recalc_rate = omap1_clk_recalc_rate, + .round_rate = omap1_clk_round_rate, + .set_rate = omap1_clk_set_rate, + .init = omap1_clk_init_op, +}; -struct clk *clk_get_parent(struct clk *clk) -{ - return clk->parent; -} -EXPORT_SYMBOL(clk_get_parent); +const struct clk_ops omap1_clk_full_ops = { + .enable = omap1_clk_enable, + .disable = omap1_clk_disable, + .is_enabled = omap1_clk_is_enabled, +#ifdef CONFIG_OMAP_RESET_CLOCKS + .disable_unused = omap1_clk_disable_unused, +#endif + .recalc_rate = omap1_clk_recalc_rate, + .round_rate = omap1_clk_round_rate, + .set_rate = omap1_clk_set_rate, + .init = omap1_clk_init_op, +}; /* * OMAP specific clock functions shared between omap1 and omap2 */ /* Used for clocks that always have same value as the parent clock */ -unsigned long followparent_recalc(struct clk *clk) +unsigned long followparent_recalc(struct omap1_clk *clk, unsigned long p_rate) { - return clk->parent->rate; + return p_rate; } /* * Used for clocks that have the same value as the parent clock, * divided by some factor */ -unsigned long omap_fixed_divisor_recalc(struct clk *clk) +unsigned long omap_fixed_divisor_recalc(struct omap1_clk *clk, unsigned long p_rate) { WARN_ON(!clk->fixed_div); - return clk->parent->rate / clk->fixed_div; + return p_rate / clk->fixed_div; } /* Propagate rate to children */ -void propagate_rate(struct clk *tclk) +void propagate_rate(struct omap1_clk *tclk) { struct clk *clkp; - list_for_each_entry(clkp, &tclk->children, sibling) { - if (clkp->recalc) - clkp->rate = clkp->recalc(clkp); - propagate_rate(clkp); - } -} - -static LIST_HEAD(root_clks); - -/** - * clk_preinit - initialize any fields in the struct clk before clk init - * @clk: struct clk * to initialize - * - * Initialize any struct clk fields needed before normal clk initialization - * can run. No return value. - */ -void clk_preinit(struct clk *clk) -{ - INIT_LIST_HEAD(&clk->children); -} - -int clk_register(struct clk *clk) -{ - if (IS_ERR_OR_NULL(clk)) - return -EINVAL; - - /* - * trap out already registered clocks - */ - if (clk->node.next || clk->node.prev) - return 0; - - mutex_lock(&clocks_mutex); - if (clk->parent) - list_add(&clk->sibling, &clk->parent->children); - else - list_add(&clk->sibling, &root_clks); - - list_add(&clk->node, &clocks); - if (clk->init) - clk->init(clk); - mutex_unlock(&clocks_mutex); - - return 0; -} -EXPORT_SYMBOL(clk_register); - -void clk_unregister(struct clk *clk) -{ - if (IS_ERR_OR_NULL(clk)) + /* depend on CCF ability to recalculate new rates across whole clock subtree */ + if (WARN_ON(!(clk_hw_get_flags(&tclk->hw) & CLK_GET_RATE_NOCACHE))) return; - mutex_lock(&clocks_mutex); - list_del(&clk->sibling); - list_del(&clk->node); - mutex_unlock(&clocks_mutex); -} -EXPORT_SYMBOL(clk_unregister); - -/* - * Low level helpers - */ -static int clkll_enable_null(struct clk *clk) -{ - return 0; -} + clkp = clk_get_sys(NULL, clk_hw_get_name(&tclk->hw)); + if (WARN_ON(!clkp)) + return; -static void clkll_disable_null(struct clk *clk) -{ + clk_get_rate(clkp); + clk_put(clkp); } -const struct clkops clkops_null = { - .enable = clkll_enable_null, - .disable = clkll_disable_null, +const struct clk_ops omap1_clk_null_ops = { }; /* @@ -820,114 +835,6 @@ const struct clkops clkops_null = { * * Used for clock aliases that are needed on some OMAPs, but not others */ -struct clk dummy_ck = { - .name = "dummy", - .ops = &clkops_null, +struct omap1_clk dummy_ck __refdata = { + .hw.init = CLK_HW_INIT_NO_PARENT("dummy", &omap1_clk_null_ops, 0), }; - -/* - * - */ - -#ifdef CONFIG_OMAP_RESET_CLOCKS -/* - * Disable any unused clocks left on by the bootloader - */ -static int __init clk_disable_unused(void) -{ - struct clk *ck; - unsigned long flags; - - pr_info("clock: disabling unused clocks to save power\n"); - - spin_lock_irqsave(&clockfw_lock, flags); - list_for_each_entry(ck, &clocks, node) { - if (ck->ops == &clkops_null) - continue; - - if (ck->usecount > 0 || !ck->enable_reg) - continue; - - omap1_clk_disable_unused(ck); - } - spin_unlock_irqrestore(&clockfw_lock, flags); - - return 0; -} -late_initcall(clk_disable_unused); -#endif - -#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) -/* - * debugfs support to trace clock tree hierarchy and attributes - */ - -#include -#include - -static struct dentry *clk_debugfs_root; - -static int debug_clock_show(struct seq_file *s, void *unused) -{ - struct clk *c; - struct clk *pa; - - mutex_lock(&clocks_mutex); - seq_printf(s, "%-30s %-30s %-10s %s\n", - "clock-name", "parent-name", "rate", "use-count"); - - list_for_each_entry(c, &clocks, node) { - pa = c->parent; - seq_printf(s, "%-30s %-30s %-10lu %d\n", - c->name, pa ? pa->name : "none", c->rate, - c->usecount); - } - mutex_unlock(&clocks_mutex); - - return 0; -} - -DEFINE_SHOW_ATTRIBUTE(debug_clock); - -static void clk_debugfs_register_one(struct clk *c) -{ - struct dentry *d; - struct clk *pa = c->parent; - - d = debugfs_create_dir(c->name, pa ? pa->dent : clk_debugfs_root); - c->dent = d; - - debugfs_create_u8("usecount", S_IRUGO, c->dent, &c->usecount); - debugfs_create_ulong("rate", S_IRUGO, c->dent, &c->rate); - debugfs_create_x8("flags", S_IRUGO, c->dent, &c->flags); -} - -static void clk_debugfs_register(struct clk *c) -{ - struct clk *pa = c->parent; - - if (pa && !pa->dent) - clk_debugfs_register(pa); - - if (!c->dent) - clk_debugfs_register_one(c); -} - -static int __init clk_debugfs_init(void) -{ - struct clk *c; - struct dentry *d; - - d = debugfs_create_dir("clock", NULL); - clk_debugfs_root = d; - - list_for_each_entry(c, &clocks, node) - clk_debugfs_register(c); - - debugfs_create_file("summary", S_IRUGO, d, NULL, &debug_clock_fops); - - return 0; -} -late_initcall(clk_debugfs_init); - -#endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */ diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h index 8025e4a22469..16cfb2e86ee4 100644 --- a/arch/arm/mach-omap1/clock.h +++ b/arch/arm/mach-omap1/clock.h @@ -11,12 +11,11 @@ #define __ARCH_ARM_MACH_OMAP1_CLOCK_H #include -#include - #include +#include struct module; -struct clk; +struct omap1_clk; struct omap_clk { u16 cpu; @@ -29,7 +28,7 @@ struct omap_clk { .lk = { \ .dev_id = dev, \ .con_id = con, \ - .clk = ck, \ + .clk_hw = ck, \ }, \ } @@ -40,10 +39,6 @@ struct omap_clk { #define CK_16XX (1 << 3) /* 16xx, 17xx, 5912 */ #define CK_1710 (1 << 4) /* 1710 extra for rate selection */ - -/* Temporary, needed during the common clock framework conversion */ -#define __clk_get_name(clk) (clk->name) - /** * struct clkops - some clock function pointers * @enable: fn ptr that enables the current clock in hardware @@ -51,8 +46,8 @@ struct omap_clk { * @allow_idle: fn ptr that enables autoidle for the current clock in hardware */ struct clkops { - int (*enable)(struct clk *); - void (*disable)(struct clk *); + int (*enable)(struct omap1_clk *clk); + void (*disable)(struct omap1_clk *clk); }; /* @@ -65,13 +60,9 @@ struct clkops { #define CLOCK_NO_IDLE_PARENT (1 << 2) /** - * struct clk - OMAP struct clk - * @node: list_head connecting this clock into the full clock list + * struct omap1_clk - OMAP1 struct clk + * @hw: struct clk_hw for common clock framework integration * @ops: struct clkops * for this clock - * @name: the name of the clock in the hardware (used in hwmod data and debug) - * @parent: pointer to this clock's parent struct clk - * @children: list_head connecting to the child clks' @sibling list_heads - * @sibling: list_head connecting this clk to its parent clk's @children * @rate: current clock rate * @enable_reg: register to write to enable the clock (see @enable_bit) * @recalc: fn ptr that returns the clock's current rate @@ -79,102 +70,65 @@ struct clkops { * @round_rate: fn ptr that can round the clock's current rate * @init: fn ptr to do clock-specific initialization * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg) - * @usecount: number of users that have requested this clock to be enabled * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div * @flags: see "struct clk.flags possibilities" above * @rate_offset: bitshift for rate selection bitfield (OMAP1 only) - * - * XXX @rate_offset should probably be removed and OMAP1 - * clock code converted to use clksel. - * - * XXX @usecount is poorly named. It should be "enable_count" or - * something similar. "users" in the description refers to kernel - * code (core code or drivers) that have called clk_enable() and not - * yet called clk_disable(); the usecount of parent clocks is also - * incremented by the clock code when clk_enable() is called on child - * clocks and decremented by the clock code when clk_disable() is - * called on child clocks. - * - * XXX @usecount, @children, @sibling should be marked for - * internal use only. - * - * @children and @sibling are used to optimize parent-to-child clock - * tree traversals. (child-to-parent traversals use @parent.) - * - * XXX The notion of the clock's current rate probably needs to be - * separated from the clock's target rate. */ -struct clk { - struct list_head node; +struct omap1_clk { + struct clk_hw hw; const struct clkops *ops; - const char *name; - struct clk *parent; - struct list_head children; - struct list_head sibling; /* node for children */ unsigned long rate; void __iomem *enable_reg; - unsigned long (*recalc)(struct clk *); - int (*set_rate)(struct clk *, unsigned long); - long (*round_rate)(struct clk *, unsigned long); - void (*init)(struct clk *); + unsigned long (*recalc)(struct omap1_clk *clk, unsigned long rate); + int (*set_rate)(struct omap1_clk *clk, unsigned long rate, + unsigned long p_rate); + long (*round_rate)(struct omap1_clk *clk, unsigned long rate, + unsigned long *p_rate); + int (*init)(struct omap1_clk *clk); u8 enable_bit; - s8 usecount; u8 fixed_div; u8 flags; u8 rate_offset; -#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) - struct dentry *dent; /* For visible tree hierarchy */ -#endif }; +#define to_omap1_clk(_hw) container_of(_hw, struct omap1_clk, hw) -extern void clk_preinit(struct clk *clk); -extern int clk_register(struct clk *clk); -extern void clk_unregister(struct clk *clk); -extern void propagate_rate(struct clk *clk); -extern unsigned long followparent_recalc(struct clk *clk); -unsigned long omap_fixed_divisor_recalc(struct clk *clk); +void propagate_rate(struct omap1_clk *clk); +unsigned long followparent_recalc(struct omap1_clk *clk, unsigned long p_rate); +unsigned long omap_fixed_divisor_recalc(struct omap1_clk *clk, unsigned long p_rate); -extern const struct clkops clkops_null; - -extern struct clk dummy_ck; +extern struct omap1_clk dummy_ck; int omap1_clk_init(void); void omap1_clk_late_init(void); -extern int omap1_clk_enable(struct clk *clk); -extern void omap1_clk_disable(struct clk *clk); -extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate); -extern int omap1_clk_set_rate(struct clk *clk, unsigned long rate); -extern unsigned long omap1_ckctl_recalc(struct clk *clk); -extern int omap1_set_sossi_rate(struct clk *clk, unsigned long rate); -extern unsigned long omap1_sossi_recalc(struct clk *clk); -extern unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk); -extern int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate); -extern int omap1_set_uart_rate(struct clk *clk, unsigned long rate); -extern unsigned long omap1_uart_recalc(struct clk *clk); -extern int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate); -extern long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate); -extern void omap1_init_ext_clk(struct clk *clk); -extern int omap1_select_table_rate(struct clk *clk, unsigned long rate); -extern long omap1_round_to_table_rate(struct clk *clk, unsigned long rate); -extern int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate); -extern long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate); - -#ifdef CONFIG_OMAP_RESET_CLOCKS -extern void omap1_clk_disable_unused(struct clk *clk); -#else -#define omap1_clk_disable_unused NULL -#endif +unsigned long omap1_ckctl_recalc(struct omap1_clk *clk, unsigned long p_rate); +long omap1_round_sossi_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate); +int omap1_set_sossi_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate); +unsigned long omap1_sossi_recalc(struct omap1_clk *clk, unsigned long p_rate); +unsigned long omap1_ckctl_recalc_dsp_domain(struct omap1_clk *clk, unsigned long p_rate); +int omap1_clk_set_rate_dsp_domain(struct omap1_clk *clk, unsigned long rate, + unsigned long p_rate); +long omap1_round_uart_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate); +int omap1_set_uart_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate); +unsigned long omap1_uart_recalc(struct omap1_clk *clk, unsigned long p_rate); +int omap1_set_ext_clk_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate); +long omap1_round_ext_clk_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate); +int omap1_init_ext_clk(struct omap1_clk *clk); +int omap1_select_table_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate); +long omap1_round_to_table_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate); +int omap1_clk_set_rate_ckctl_arm(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate); +long omap1_clk_round_rate_ckctl_arm(struct omap1_clk *clk, unsigned long rate, + unsigned long *p_rate); struct uart_clk { - struct clk clk; - unsigned long sysc_addr; + struct omap1_clk clk; + unsigned long sysc_addr; }; /* Provide a method for preventing idling some ARM IDLECT clocks */ struct arm_idlect1_clk { - struct clk clk; - unsigned long no_idle_count; - __u8 idlect_shift; + struct omap1_clk clk; + unsigned long no_idle_count; + __u8 idlect_shift; }; /* ARM_CKCTL bit shifts */ @@ -224,7 +178,7 @@ struct arm_idlect1_clk { #define SOFT_REQ_REG2 0xfffe0880 extern __u32 arm_idlect1_mask; -extern struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; +extern struct omap1_clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; extern const struct clkops clkops_dspck; extern const struct clkops clkops_uart_16xx; @@ -233,4 +187,9 @@ extern const struct clkops clkops_generic; /* used for passing SoC type to omap1_{select,round_to}_table_rate() */ extern u32 cpu_mask; +extern const struct clk_ops omap1_clk_null_ops; +extern const struct clk_ops omap1_clk_gate_ops; +extern const struct clk_ops omap1_clk_rate_ops; +extern const struct clk_ops omap1_clk_full_ops; + #endif diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index 9b9c9fcc61c2..0b42a6e3f8ea 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c @@ -14,6 +14,8 @@ #include #include #include +#include +#include #include #include #include @@ -71,16 +73,18 @@ * Omap1 clocks */ -static struct clk ck_ref = { - .name = "ck_ref", - .ops = &clkops_null, +static struct omap1_clk ck_ref = { + .hw.init = CLK_HW_INIT_NO_PARENT("ck_ref", &omap1_clk_rate_ops, 0), .rate = 12000000, }; -static struct clk ck_dpll1 = { - .name = "ck_dpll1", - .ops = &clkops_null, - .parent = &ck_ref, +static struct omap1_clk ck_dpll1 = { + .hw.init = CLK_HW_INIT("ck_dpll1", "ck_ref", &omap1_clk_rate_ops, + /* + * force recursive refresh of rates of the clock + * and its children when clk_get_rate() is called + */ + CLK_GET_RATE_NOCACHE), }; /* @@ -89,32 +93,28 @@ static struct clk ck_dpll1 = { */ static struct arm_idlect1_clk ck_dpll1out = { .clk = { - .name = "ck_dpll1out", + .hw.init = CLK_HW_INIT("ck_dpll1out", "ck_dpll1", &omap1_clk_gate_ops, 0), .ops = &clkops_generic, - .parent = &ck_dpll1, .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_CKOUT_ARM, - .recalc = &followparent_recalc, }, .idlect_shift = IDL_CLKOUT_ARM_SHIFT, }; -static struct clk sossi_ck = { - .name = "ck_sossi", +static struct omap1_clk sossi_ck = { + .hw.init = CLK_HW_INIT("ck_sossi", "ck_dpll1out", &omap1_clk_full_ops, 0), .ops = &clkops_generic, - .parent = &ck_dpll1out.clk, .flags = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1), .enable_bit = CONF_MOD_SOSSI_CLK_EN_R, .recalc = &omap1_sossi_recalc, + .round_rate = &omap1_round_sossi_rate, .set_rate = &omap1_set_sossi_rate, }; -static struct clk arm_ck = { - .name = "arm_ck", - .ops = &clkops_null, - .parent = &ck_dpll1, +static struct omap1_clk arm_ck = { + .hw.init = CLK_HW_INIT("arm_ck", "ck_dpll1", &omap1_clk_rate_ops, 0), .rate_offset = CKCTL_ARMDIV_OFFSET, .recalc = &omap1_ckctl_recalc, .round_rate = omap1_clk_round_rate_ckctl_arm, @@ -123,9 +123,9 @@ static struct clk arm_ck = { static struct arm_idlect1_clk armper_ck = { .clk = { - .name = "armper_ck", + .hw.init = CLK_HW_INIT("armper_ck", "ck_dpll1", &omap1_clk_full_ops, + CLK_IS_CRITICAL), .ops = &clkops_generic, - .parent = &ck_dpll1, .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_PERCK, @@ -141,46 +141,41 @@ static struct arm_idlect1_clk armper_ck = { * FIXME: This clock seems to be necessary but no-one has asked for its * activation. [ GPIO code for 1510 ] */ -static struct clk arm_gpio_ck = { - .name = "ick", +static struct omap1_clk arm_gpio_ck = { + .hw.init = CLK_HW_INIT("ick", "ck_dpll1", &omap1_clk_gate_ops, CLK_IS_CRITICAL), .ops = &clkops_generic, - .parent = &ck_dpll1, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_GPIOCK, - .recalc = &followparent_recalc, }; static struct arm_idlect1_clk armxor_ck = { .clk = { - .name = "armxor_ck", + .hw.init = CLK_HW_INIT("armxor_ck", "ck_ref", &omap1_clk_gate_ops, + CLK_IS_CRITICAL), .ops = &clkops_generic, - .parent = &ck_ref, .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_XORPCK, - .recalc = &followparent_recalc, }, .idlect_shift = IDLXORP_ARM_SHIFT, }; static struct arm_idlect1_clk armtim_ck = { .clk = { - .name = "armtim_ck", + .hw.init = CLK_HW_INIT("armtim_ck", "ck_ref", &omap1_clk_gate_ops, + CLK_IS_CRITICAL), .ops = &clkops_generic, - .parent = &ck_ref, .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_TIMCK, - .recalc = &followparent_recalc, }, .idlect_shift = IDLTIM_ARM_SHIFT, }; static struct arm_idlect1_clk armwdt_ck = { .clk = { - .name = "armwdt_ck", + .hw.init = CLK_HW_INIT("armwdt_ck", "ck_ref", &omap1_clk_full_ops, 0), .ops = &clkops_generic, - .parent = &ck_ref, .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_WDTCK, @@ -190,11 +185,8 @@ static struct arm_idlect1_clk armwdt_ck = { .idlect_shift = IDLWDT_ARM_SHIFT, }; -static struct clk arminth_ck16xx = { - .name = "arminth_ck", - .ops = &clkops_null, - .parent = &arm_ck, - .recalc = &followparent_recalc, +static struct omap1_clk arminth_ck16xx = { + .hw.init = CLK_HW_INIT("arminth_ck", "arm_ck", &omap1_clk_null_ops, 0), /* Note: On 16xx the frequency can be divided by 2 by programming * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1 * @@ -202,10 +194,9 @@ static struct clk arminth_ck16xx = { */ }; -static struct clk dsp_ck = { - .name = "dsp_ck", +static struct omap1_clk dsp_ck = { + .hw.init = CLK_HW_INIT("dsp_ck", "ck_dpll1", &omap1_clk_full_ops, 0), .ops = &clkops_generic, - .parent = &ck_dpll1, .enable_reg = OMAP1_IO_ADDRESS(ARM_CKCTL), .enable_bit = EN_DSPCK, .rate_offset = CKCTL_DSPDIV_OFFSET, @@ -214,20 +205,17 @@ static struct clk dsp_ck = { .set_rate = omap1_clk_set_rate_ckctl_arm, }; -static struct clk dspmmu_ck = { - .name = "dspmmu_ck", - .ops = &clkops_null, - .parent = &ck_dpll1, +static struct omap1_clk dspmmu_ck = { + .hw.init = CLK_HW_INIT("dspmmu_ck", "ck_dpll1", &omap1_clk_rate_ops, 0), .rate_offset = CKCTL_DSPMMUDIV_OFFSET, .recalc = &omap1_ckctl_recalc, .round_rate = omap1_clk_round_rate_ckctl_arm, .set_rate = omap1_clk_set_rate_ckctl_arm, }; -static struct clk dspper_ck = { - .name = "dspper_ck", +static struct omap1_clk dspper_ck = { + .hw.init = CLK_HW_INIT("dspper_ck", "ck_dpll1", &omap1_clk_full_ops, 0), .ops = &clkops_dspck, - .parent = &ck_dpll1, .enable_reg = DSP_IDLECT2, .enable_bit = EN_PERCK, .rate_offset = CKCTL_PERDIV_OFFSET, @@ -236,29 +224,23 @@ static struct clk dspper_ck = { .set_rate = &omap1_clk_set_rate_dsp_domain, }; -static struct clk dspxor_ck = { - .name = "dspxor_ck", +static struct omap1_clk dspxor_ck = { + .hw.init = CLK_HW_INIT("dspxor_ck", "ck_ref", &omap1_clk_gate_ops, 0), .ops = &clkops_dspck, - .parent = &ck_ref, .enable_reg = DSP_IDLECT2, .enable_bit = EN_XORPCK, - .recalc = &followparent_recalc, }; -static struct clk dsptim_ck = { - .name = "dsptim_ck", +static struct omap1_clk dsptim_ck = { + .hw.init = CLK_HW_INIT("dsptim_ck", "ck_ref", &omap1_clk_gate_ops, 0), .ops = &clkops_dspck, - .parent = &ck_ref, .enable_reg = DSP_IDLECT2, .enable_bit = EN_DSPTIMCK, - .recalc = &followparent_recalc, }; static struct arm_idlect1_clk tc_ck = { .clk = { - .name = "tc_ck", - .ops = &clkops_null, - .parent = &ck_dpll1, + .hw.init = CLK_HW_INIT("tc_ck", "ck_dpll1", &omap1_clk_rate_ops, 0), .flags = CLOCK_IDLE_CONTROL, .rate_offset = CKCTL_TCDIV_OFFSET, .recalc = &omap1_ckctl_recalc, @@ -268,116 +250,88 @@ static struct arm_idlect1_clk tc_ck = { .idlect_shift = IDLIF_ARM_SHIFT, }; -static struct clk arminth_ck1510 = { - .name = "arminth_ck", - .ops = &clkops_null, - .parent = &tc_ck.clk, - .recalc = &followparent_recalc, +static struct omap1_clk arminth_ck1510 = { + .hw.init = CLK_HW_INIT("arminth_ck", "tc_ck", &omap1_clk_null_ops, 0), /* Note: On 1510 the frequency follows TC_CK * * 16xx version is in MPU clocks. */ }; -static struct clk tipb_ck = { +static struct omap1_clk tipb_ck = { /* No-idle controlled by "tc_ck" */ - .name = "tipb_ck", - .ops = &clkops_null, - .parent = &tc_ck.clk, - .recalc = &followparent_recalc, + .hw.init = CLK_HW_INIT("tipb_ck", "tc_ck", &omap1_clk_null_ops, 0), }; -static struct clk l3_ocpi_ck = { +static struct omap1_clk l3_ocpi_ck = { /* No-idle controlled by "tc_ck" */ - .name = "l3_ocpi_ck", + .hw.init = CLK_HW_INIT("l3_ocpi_ck", "tc_ck", &omap1_clk_gate_ops, 0), .ops = &clkops_generic, - .parent = &tc_ck.clk, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), .enable_bit = EN_OCPI_CK, - .recalc = &followparent_recalc, }; -static struct clk tc1_ck = { - .name = "tc1_ck", +static struct omap1_clk tc1_ck = { + .hw.init = CLK_HW_INIT("tc1_ck", "tc_ck", &omap1_clk_gate_ops, 0), .ops = &clkops_generic, - .parent = &tc_ck.clk, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), .enable_bit = EN_TC1_CK, - .recalc = &followparent_recalc, }; /* * FIXME: This clock seems to be necessary but no-one has asked for its * activation. [ pm.c (SRAM), CCP, Camera ] */ -static struct clk tc2_ck = { - .name = "tc2_ck", + +static struct omap1_clk tc2_ck = { + .hw.init = CLK_HW_INIT("tc2_ck", "tc_ck", &omap1_clk_gate_ops, CLK_IS_CRITICAL), .ops = &clkops_generic, - .parent = &tc_ck.clk, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), .enable_bit = EN_TC2_CK, - .recalc = &followparent_recalc, }; -static struct clk dma_ck = { +static struct omap1_clk dma_ck = { /* No-idle controlled by "tc_ck" */ - .name = "dma_ck", - .ops = &clkops_null, - .parent = &tc_ck.clk, - .recalc = &followparent_recalc, + .hw.init = CLK_HW_INIT("dma_ck", "tc_ck", &omap1_clk_null_ops, 0), }; -static struct clk dma_lcdfree_ck = { - .name = "dma_lcdfree_ck", - .ops = &clkops_null, - .parent = &tc_ck.clk, - .recalc = &followparent_recalc, +static struct omap1_clk dma_lcdfree_ck = { + .hw.init = CLK_HW_INIT("dma_lcdfree_ck", "tc_ck", &omap1_clk_null_ops, 0), }; static struct arm_idlect1_clk api_ck = { .clk = { - .name = "api_ck", + .hw.init = CLK_HW_INIT("api_ck", "tc_ck", &omap1_clk_gate_ops, 0), .ops = &clkops_generic, - .parent = &tc_ck.clk, .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_APICK, - .recalc = &followparent_recalc, }, .idlect_shift = IDLAPI_ARM_SHIFT, }; static struct arm_idlect1_clk lb_ck = { .clk = { - .name = "lb_ck", + .hw.init = CLK_HW_INIT("lb_ck", "tc_ck", &omap1_clk_gate_ops, 0), .ops = &clkops_generic, - .parent = &tc_ck.clk, .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_LBCK, - .recalc = &followparent_recalc, }, .idlect_shift = IDLLB_ARM_SHIFT, }; -static struct clk rhea1_ck = { - .name = "rhea1_ck", - .ops = &clkops_null, - .parent = &tc_ck.clk, - .recalc = &followparent_recalc, +static struct omap1_clk rhea1_ck = { + .hw.init = CLK_HW_INIT("rhea1_ck", "tc_ck", &omap1_clk_null_ops, 0), }; -static struct clk rhea2_ck = { - .name = "rhea2_ck", - .ops = &clkops_null, - .parent = &tc_ck.clk, - .recalc = &followparent_recalc, +static struct omap1_clk rhea2_ck = { + .hw.init = CLK_HW_INIT("rhea2_ck", "tc_ck", &omap1_clk_null_ops, 0), }; -static struct clk lcd_ck_16xx = { - .name = "lcd_ck", +static struct omap1_clk lcd_ck_16xx = { + .hw.init = CLK_HW_INIT("lcd_ck", "ck_dpll1", &omap1_clk_full_ops, 0), .ops = &clkops_generic, - .parent = &ck_dpll1, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_LCDCK, .rate_offset = CKCTL_LCDDIV_OFFSET, @@ -388,9 +342,8 @@ static struct clk lcd_ck_16xx = { static struct arm_idlect1_clk lcd_ck_1510 = { .clk = { - .name = "lcd_ck", + .hw.init = CLK_HW_INIT("lcd_ck", "ck_dpll1", &omap1_clk_full_ops, 0), .ops = &clkops_generic, - .parent = &ck_dpll1, .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_LCDCK, @@ -402,37 +355,35 @@ static struct arm_idlect1_clk lcd_ck_1510 = { .idlect_shift = OMAP1510_IDLLCD_ARM_SHIFT, }; + /* * XXX The enable_bit here is misused - it simply switches between 12MHz - * and 48MHz. Reimplement with clksel. + * and 48MHz. Reimplement with clk_mux. * * XXX does this need SYSC register handling? */ -static struct clk uart1_1510 = { - .name = "uart1_ck", - .ops = &clkops_null, +static struct omap1_clk uart1_1510 = { /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, - .rate = 12000000, + .hw.init = CLK_HW_INIT("uart1_ck", "armper_ck", &omap1_clk_full_ops, 0), .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_bit = CONF_MOD_UART1_CLK_MODE_R, + .round_rate = &omap1_round_uart_rate, .set_rate = &omap1_set_uart_rate, .recalc = &omap1_uart_recalc, }; /* * XXX The enable_bit here is misused - it simply switches between 12MHz - * and 48MHz. Reimplement with clksel. + * and 48MHz. Reimplement with clk_mux. * * XXX SYSC register handling does not belong in the clock framework */ static struct uart_clk uart1_16xx = { .clk = { - .name = "uart1_ck", .ops = &clkops_uart_16xx, /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, + .hw.init = CLK_HW_INIT("uart1_ck", "armper_ck", &omap1_clk_full_ops, 0), .rate = 48000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), @@ -443,54 +394,49 @@ static struct uart_clk uart1_16xx = { /* * XXX The enable_bit here is misused - it simply switches between 12MHz - * and 48MHz. Reimplement with clksel. + * and 48MHz. Reimplement with clk_mux. * * XXX does this need SYSC register handling? */ -static struct clk uart2_ck = { - .name = "uart2_ck", - .ops = &clkops_null, +static struct omap1_clk uart2_ck = { /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, - .rate = 12000000, + .hw.init = CLK_HW_INIT("uart2_ck", "armper_ck", &omap1_clk_full_ops, 0), .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_bit = CONF_MOD_UART2_CLK_MODE_R, + .round_rate = &omap1_round_uart_rate, .set_rate = &omap1_set_uart_rate, .recalc = &omap1_uart_recalc, }; /* * XXX The enable_bit here is misused - it simply switches between 12MHz - * and 48MHz. Reimplement with clksel. + * and 48MHz. Reimplement with clk_mux. * * XXX does this need SYSC register handling? */ -static struct clk uart3_1510 = { - .name = "uart3_ck", - .ops = &clkops_null, +static struct omap1_clk uart3_1510 = { /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, - .rate = 12000000, + .hw.init = CLK_HW_INIT("uart3_ck", "armper_ck", &omap1_clk_full_ops, 0), .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_bit = CONF_MOD_UART3_CLK_MODE_R, + .round_rate = &omap1_round_uart_rate, .set_rate = &omap1_set_uart_rate, .recalc = &omap1_uart_recalc, }; /* * XXX The enable_bit here is misused - it simply switches between 12MHz - * and 48MHz. Reimplement with clksel. + * and 48MHz. Reimplement with clk_mux. * * XXX SYSC register handling does not belong in the clock framework */ static struct uart_clk uart3_16xx = { .clk = { - .name = "uart3_ck", .ops = &clkops_uart_16xx, /* Direct from ULPD, no real parent */ - .parent = &armper_ck.clk, + .hw.init = CLK_HW_INIT("uart3_ck", "armper_ck", &omap1_clk_full_ops, 0), .rate = 48000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), @@ -499,30 +445,30 @@ static struct uart_clk uart3_16xx = { .sysc_addr = 0xfffb9854, }; -static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ - .name = "usb_clko", +static struct omap1_clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ .ops = &clkops_generic, /* Direct from ULPD, no parent */ + .hw.init = CLK_HW_INIT_NO_PARENT("usb_clko", &omap1_clk_full_ops, 0), .rate = 6000000, .flags = ENABLE_REG_32BIT, .enable_reg = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL), .enable_bit = USB_MCLK_EN_BIT, }; -static struct clk usb_hhc_ck1510 = { - .name = "usb_hhc_ck", +static struct omap1_clk usb_hhc_ck1510 = { .ops = &clkops_generic, /* Direct from ULPD, no parent */ + .hw.init = CLK_HW_INIT_NO_PARENT("usb_hhc_ck", &omap1_clk_full_ops, 0), .rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */ .flags = ENABLE_REG_32BIT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_bit = USB_HOST_HHC_UHOST_EN, }; -static struct clk usb_hhc_ck16xx = { - .name = "usb_hhc_ck", +static struct omap1_clk usb_hhc_ck16xx = { .ops = &clkops_generic, /* Direct from ULPD, no parent */ + .hw.init = CLK_HW_INIT_NO_PARENT("usb_hhc_ck", &omap1_clk_full_ops, 0), .rate = 48000000, /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */ .flags = ENABLE_REG_32BIT, @@ -530,46 +476,46 @@ static struct clk usb_hhc_ck16xx = { .enable_bit = OTG_SYSCON_2_UHOST_EN_SHIFT }; -static struct clk usb_dc_ck = { - .name = "usb_dc_ck", +static struct omap1_clk usb_dc_ck = { .ops = &clkops_generic, /* Direct from ULPD, no parent */ + .hw.init = CLK_HW_INIT_NO_PARENT("usb_dc_ck", &omap1_clk_full_ops, 0), .rate = 48000000, .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), .enable_bit = SOFT_USB_OTG_DPLL_REQ_SHIFT, }; -static struct clk uart1_7xx = { - .name = "uart1_ck", +static struct omap1_clk uart1_7xx = { .ops = &clkops_generic, /* Direct from ULPD, no parent */ + .hw.init = CLK_HW_INIT_NO_PARENT("uart1_ck", &omap1_clk_full_ops, 0), .rate = 12000000, .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), .enable_bit = 9, }; -static struct clk uart2_7xx = { - .name = "uart2_ck", +static struct omap1_clk uart2_7xx = { .ops = &clkops_generic, /* Direct from ULPD, no parent */ + .hw.init = CLK_HW_INIT_NO_PARENT("uart2_ck", &omap1_clk_full_ops, 0), .rate = 12000000, .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), .enable_bit = 11, }; -static struct clk mclk_1510 = { - .name = "mclk", +static struct omap1_clk mclk_1510 = { .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ + .hw.init = CLK_HW_INIT_NO_PARENT("mclk", &omap1_clk_full_ops, 0), .rate = 12000000, .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), .enable_bit = SOFT_COM_MCKO_REQ_SHIFT, }; -static struct clk mclk_16xx = { - .name = "mclk", +static struct omap1_clk mclk_16xx = { .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ + .hw.init = CLK_HW_INIT_NO_PARENT("mclk", &omap1_clk_full_ops, 0), .enable_reg = OMAP1_IO_ADDRESS(COM_CLK_DIV_CTRL_SEL), .enable_bit = COM_ULPD_PLL_CLK_REQ, .set_rate = &omap1_set_ext_clk_rate, @@ -577,17 +523,16 @@ static struct clk mclk_16xx = { .init = &omap1_init_ext_clk, }; -static struct clk bclk_1510 = { - .name = "bclk", - .ops = &clkops_generic, +static struct omap1_clk bclk_1510 = { /* Direct from ULPD, no parent. May be enabled by ext hardware. */ + .hw.init = CLK_HW_INIT_NO_PARENT("bclk", &omap1_clk_rate_ops, 0), .rate = 12000000, }; -static struct clk bclk_16xx = { - .name = "bclk", +static struct omap1_clk bclk_16xx = { .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ + .hw.init = CLK_HW_INIT_NO_PARENT("bclk", &omap1_clk_full_ops, 0), .enable_reg = OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL), .enable_bit = SWD_ULPD_PLL_CLK_REQ, .set_rate = &omap1_set_ext_clk_rate, @@ -595,11 +540,10 @@ static struct clk bclk_16xx = { .init = &omap1_init_ext_clk, }; -static struct clk mmc1_ck = { - .name = "mmc1_ck", +static struct omap1_clk mmc1_ck = { .ops = &clkops_generic, /* Functional clock is direct from ULPD, interface clock is ARMPER */ - .parent = &armper_ck.clk, + .hw.init = CLK_HW_INIT("mmc1_ck", "armper_ck", &omap1_clk_full_ops, 0), .rate = 48000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), @@ -610,32 +554,29 @@ static struct clk mmc1_ck = { * XXX MOD_CONF_CTRL_0 bit 20 is defined in the 1510 TRM as * CONF_MOD_MCBSP3_AUXON ?? */ -static struct clk mmc2_ck = { - .name = "mmc2_ck", +static struct omap1_clk mmc2_ck = { .ops = &clkops_generic, /* Functional clock is direct from ULPD, interface clock is ARMPER */ - .parent = &armper_ck.clk, + .hw.init = CLK_HW_INIT("mmc2_ck", "armper_ck", &omap1_clk_full_ops, 0), .rate = 48000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_bit = 20, }; -static struct clk mmc3_ck = { - .name = "mmc3_ck", +static struct omap1_clk mmc3_ck = { .ops = &clkops_generic, /* Functional clock is direct from ULPD, interface clock is ARMPER */ - .parent = &armper_ck.clk, + .hw.init = CLK_HW_INIT("mmc3_ck", "armper_ck", &omap1_clk_full_ops, 0), .rate = 48000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), .enable_bit = SOFT_MMC_DPLL_REQ_SHIFT, }; -static struct clk virtual_ck_mpu = { - .name = "mpu", - .ops = &clkops_null, - .parent = &arm_ck, /* Is smarter alias for */ +static struct omap1_clk virtual_ck_mpu = { + /* Is smarter alias for arm_ck */ + .hw.init = CLK_HW_INIT("mpu", "arm_ck", &omap1_clk_rate_ops, 0), .recalc = &followparent_recalc, .set_rate = &omap1_select_table_rate, .round_rate = &omap1_round_to_table_rate, @@ -643,20 +584,14 @@ static struct clk virtual_ck_mpu = { /* virtual functional clock domain for I2C. Just for making sure that ARMXOR_CK remains active during MPU idle whenever this is enabled */ -static struct clk i2c_fck = { - .name = "i2c_fck", - .ops = &clkops_null, +static struct omap1_clk i2c_fck = { + .hw.init = CLK_HW_INIT("i2c_fck", "armxor_ck", &omap1_clk_gate_ops, 0), .flags = CLOCK_NO_IDLE_PARENT, - .parent = &armxor_ck.clk, - .recalc = &followparent_recalc, }; -static struct clk i2c_ick = { - .name = "i2c_ick", - .ops = &clkops_null, +static struct omap1_clk i2c_ick = { + .hw.init = CLK_HW_INIT("i2c_ick", "armper_ck", &omap1_clk_gate_ops, 0), .flags = CLOCK_NO_IDLE_PARENT, - .parent = &armper_ck.clk, - .recalc = &followparent_recalc, }; /* @@ -665,81 +600,81 @@ static struct clk i2c_ick = { static struct omap_clk omap_clks[] = { /* non-ULPD clocks */ - CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310 | CK_7XX), - CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK(NULL, "ck_ref", &ck_ref.hw, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK(NULL, "ck_dpll1", &ck_dpll1.hw, CK_16XX | CK_1510 | CK_310 | CK_7XX), /* CK_GEN1 clocks */ - CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX), - CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX), - CLK(NULL, "arm_ck", &arm_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "armper_ck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("omap_gpio.0", "ick", &arm_gpio_ck, CK_1510 | CK_310), - CLK(NULL, "armxor_ck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), - CLK(NULL, "armtim_ck", &armtim_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("omap_wdt", "fck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("omap_wdt", "ick", &armper_ck.clk, CK_16XX), - CLK("omap_wdt", "ick", &dummy_ck, CK_1510 | CK_310), - CLK(NULL, "arminth_ck", &arminth_ck1510, CK_1510 | CK_310), - CLK(NULL, "arminth_ck", &arminth_ck16xx, CK_16XX), + CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk.hw, CK_16XX), + CLK(NULL, "ck_sossi", &sossi_ck.hw, CK_16XX), + CLK(NULL, "arm_ck", &arm_ck.hw, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "armper_ck", &armper_ck.clk.hw, CK_16XX | CK_1510 | CK_310), + CLK("omap_gpio.0", "ick", &arm_gpio_ck.hw, CK_1510 | CK_310), + CLK(NULL, "armxor_ck", &armxor_ck.clk.hw, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK(NULL, "armtim_ck", &armtim_ck.clk.hw, CK_16XX | CK_1510 | CK_310), + CLK("omap_wdt", "fck", &armwdt_ck.clk.hw, CK_16XX | CK_1510 | CK_310), + CLK("omap_wdt", "ick", &armper_ck.clk.hw, CK_16XX), + CLK("omap_wdt", "ick", &dummy_ck.hw, CK_1510 | CK_310), + CLK(NULL, "arminth_ck", &arminth_ck1510.hw, CK_1510 | CK_310), + CLK(NULL, "arminth_ck", &arminth_ck16xx.hw, CK_16XX), /* CK_GEN2 clocks */ - CLK(NULL, "dsp_ck", &dsp_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dspmmu_ck", &dspmmu_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dspper_ck", &dspper_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dspxor_ck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dsptim_ck", &dsptim_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dsp_ck", &dsp_ck.hw, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dspmmu_ck", &dspmmu_ck.hw, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dspper_ck", &dspper_ck.hw, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dspxor_ck", &dspxor_ck.hw, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dsptim_ck", &dsptim_ck.hw, CK_16XX | CK_1510 | CK_310), /* CK_GEN3 clocks */ - CLK(NULL, "tc_ck", &tc_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), - CLK(NULL, "tipb_ck", &tipb_ck, CK_1510 | CK_310), - CLK(NULL, "l3_ocpi_ck", &l3_ocpi_ck, CK_16XX | CK_7XX), - CLK(NULL, "tc1_ck", &tc1_ck, CK_16XX), - CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX), - CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX), - CLK(NULL, "api_ck", &api_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), - CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310), - CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX), - CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX), - CLK(NULL, "lcd_ck", &lcd_ck_16xx, CK_16XX | CK_7XX), - CLK(NULL, "lcd_ck", &lcd_ck_1510.clk, CK_1510 | CK_310), + CLK(NULL, "tc_ck", &tc_ck.clk.hw, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK(NULL, "tipb_ck", &tipb_ck.hw, CK_1510 | CK_310), + CLK(NULL, "l3_ocpi_ck", &l3_ocpi_ck.hw, CK_16XX | CK_7XX), + CLK(NULL, "tc1_ck", &tc1_ck.hw, CK_16XX), + CLK(NULL, "tc2_ck", &tc2_ck.hw, CK_16XX), + CLK(NULL, "dma_ck", &dma_ck.hw, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck.hw, CK_16XX), + CLK(NULL, "api_ck", &api_ck.clk.hw, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK(NULL, "lb_ck", &lb_ck.clk.hw, CK_1510 | CK_310), + CLK(NULL, "rhea1_ck", &rhea1_ck.hw, CK_16XX), + CLK(NULL, "rhea2_ck", &rhea2_ck.hw, CK_16XX), + CLK(NULL, "lcd_ck", &lcd_ck_16xx.hw, CK_16XX | CK_7XX), + CLK(NULL, "lcd_ck", &lcd_ck_1510.clk.hw, CK_1510 | CK_310), /* ULPD clocks */ - CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310), - CLK(NULL, "uart1_ck", &uart1_16xx.clk, CK_16XX), - CLK(NULL, "uart1_ck", &uart1_7xx, CK_7XX), - CLK(NULL, "uart2_ck", &uart2_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "uart2_ck", &uart2_7xx, CK_7XX), - CLK(NULL, "uart3_ck", &uart3_1510, CK_1510 | CK_310), - CLK(NULL, "uart3_ck", &uart3_16xx.clk, CK_16XX), - CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310), - CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX), - CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX | CK_7XX), - CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310), - CLK(NULL, "mclk", &mclk_16xx, CK_16XX), - CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310), - CLK(NULL, "bclk", &bclk_16xx, CK_16XX), - CLK("mmci-omap.0", "fck", &mmc1_ck, CK_16XX | CK_1510 | CK_310), - CLK("mmci-omap.0", "fck", &mmc3_ck, CK_7XX), - CLK("mmci-omap.0", "ick", &armper_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), - CLK("mmci-omap.1", "fck", &mmc2_ck, CK_16XX), - CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX), + CLK(NULL, "uart1_ck", &uart1_1510.hw, CK_1510 | CK_310), + CLK(NULL, "uart1_ck", &uart1_16xx.clk.hw, CK_16XX), + CLK(NULL, "uart1_ck", &uart1_7xx.hw, CK_7XX), + CLK(NULL, "uart2_ck", &uart2_ck.hw, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "uart2_ck", &uart2_7xx.hw, CK_7XX), + CLK(NULL, "uart3_ck", &uart3_1510.hw, CK_1510 | CK_310), + CLK(NULL, "uart3_ck", &uart3_16xx.clk.hw, CK_16XX), + CLK(NULL, "usb_clko", &usb_clko.hw, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510.hw, CK_1510 | CK_310), + CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx.hw, CK_16XX), + CLK(NULL, "usb_dc_ck", &usb_dc_ck.hw, CK_16XX | CK_7XX), + CLK(NULL, "mclk", &mclk_1510.hw, CK_1510 | CK_310), + CLK(NULL, "mclk", &mclk_16xx.hw, CK_16XX), + CLK(NULL, "bclk", &bclk_1510.hw, CK_1510 | CK_310), + CLK(NULL, "bclk", &bclk_16xx.hw, CK_16XX), + CLK("mmci-omap.0", "fck", &mmc1_ck.hw, CK_16XX | CK_1510 | CK_310), + CLK("mmci-omap.0", "fck", &mmc3_ck.hw, CK_7XX), + CLK("mmci-omap.0", "ick", &armper_ck.clk.hw, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK("mmci-omap.1", "fck", &mmc2_ck.hw, CK_16XX), + CLK("mmci-omap.1", "ick", &armper_ck.clk.hw, CK_16XX), /* Virtual clocks */ - CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310), - CLK("omap_i2c.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310 | CK_7XX), - CLK("omap_i2c.1", "ick", &i2c_ick, CK_16XX), - CLK("omap_i2c.1", "ick", &dummy_ck, CK_1510 | CK_310 | CK_7XX), - CLK("omap1_spi100k.1", "fck", &dummy_ck, CK_7XX), - CLK("omap1_spi100k.1", "ick", &dummy_ck, CK_7XX), - CLK("omap1_spi100k.2", "fck", &dummy_ck, CK_7XX), - CLK("omap1_spi100k.2", "ick", &dummy_ck, CK_7XX), - CLK("omap_uwire", "fck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX), - CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310), - CLK("omap-mcbsp.2", "ick", &armper_ck.clk, CK_16XX), - CLK("omap-mcbsp.2", "ick", &dummy_ck, CK_1510 | CK_310), - CLK("omap-mcbsp.3", "ick", &dspper_ck, CK_16XX), - CLK("omap-mcbsp.3", "ick", &dummy_ck, CK_1510 | CK_310), - CLK("omap-mcbsp.1", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), - CLK("omap-mcbsp.2", "fck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("omap-mcbsp.3", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "mpu", &virtual_ck_mpu.hw, CK_16XX | CK_1510 | CK_310), + CLK("omap_i2c.1", "fck", &i2c_fck.hw, CK_16XX | CK_1510 | CK_310 | CK_7XX), + CLK("omap_i2c.1", "ick", &i2c_ick.hw, CK_16XX), + CLK("omap_i2c.1", "ick", &dummy_ck.hw, CK_1510 | CK_310 | CK_7XX), + CLK("omap1_spi100k.1", "fck", &dummy_ck.hw, CK_7XX), + CLK("omap1_spi100k.1", "ick", &dummy_ck.hw, CK_7XX), + CLK("omap1_spi100k.2", "fck", &dummy_ck.hw, CK_7XX), + CLK("omap1_spi100k.2", "ick", &dummy_ck.hw, CK_7XX), + CLK("omap_uwire", "fck", &armxor_ck.clk.hw, CK_16XX | CK_1510 | CK_310), + CLK("omap-mcbsp.1", "ick", &dspper_ck.hw, CK_16XX), + CLK("omap-mcbsp.1", "ick", &dummy_ck.hw, CK_1510 | CK_310), + CLK("omap-mcbsp.2", "ick", &armper_ck.clk.hw, CK_16XX), + CLK("omap-mcbsp.2", "ick", &dummy_ck.hw, CK_1510 | CK_310), + CLK("omap-mcbsp.3", "ick", &dspper_ck.hw, CK_16XX), + CLK("omap-mcbsp.3", "ick", &dummy_ck.hw, CK_1510 | CK_310), + CLK("omap-mcbsp.1", "fck", &dspxor_ck.hw, CK_16XX | CK_1510 | CK_310), + CLK("omap-mcbsp.2", "fck", &armper_ck.clk.hw, CK_16XX | CK_1510 | CK_310), + CLK("omap-mcbsp.3", "fck", &dspxor_ck.hw, CK_16XX | CK_1510 | CK_310), }; /* @@ -778,9 +713,6 @@ int __init omap1_clk_init(void) /* By default all idlect1 clocks are allowed to idle */ arm_idlect1_mask = ~0; - for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) - clk_preinit(c->lk.clk); - cpu_mask = 0; if (cpu_is_omap1710()) cpu_mask |= CK_1710; @@ -793,16 +725,10 @@ int __init omap1_clk_init(void) if (cpu_is_omap310()) cpu_mask |= CK_310; - for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) - if (c->cpu & cpu_mask) { - clkdev_add(&c->lk); - clk_register(c->lk.clk); - } - /* Pointers to these clocks are needed by code in clock.c */ - api_ck_p = clk_get(NULL, "api_ck"); - ck_dpll1_p = clk_get(NULL, "ck_dpll1"); - ck_ref_p = clk_get(NULL, "ck_ref"); + api_ck_p = &api_ck.clk; + ck_dpll1_p = &ck_dpll1; + ck_ref_p = &ck_ref; if (cpu_is_omap7xx()) ck_ref.rate = 13000000; @@ -844,10 +770,7 @@ int __init omap1_clk_init(void) } } } - propagate_rate(&ck_dpll1); - /* Cache rates for clocks connected to ck_ref (not dpll1) */ - propagate_rate(&ck_ref); - omap1_show_rates(); + if (machine_is_omap_perseus2() || machine_is_omap_fsample()) { /* Select slicer output as OMAP input clock */ omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1, @@ -879,16 +802,28 @@ int __init omap1_clk_init(void) */ omap_writew(0x0000, ARM_IDLECT2); /* Turn LCD clock off also */ - /* - * Only enable those clocks we will need, let the drivers - * enable other clocks as necessary - */ - clk_enable(&armper_ck.clk); - clk_enable(&armxor_ck.clk); - clk_enable(&armtim_ck.clk); /* This should be done by timer code */ + for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) { + if (!(c->cpu & cpu_mask)) + continue; + + if (c->lk.clk_hw->init) { /* NULL if provider already registered */ + const struct clk_init_data *init = c->lk.clk_hw->init; + const char *name = c->lk.clk_hw->init->name; + int err; + + err = clk_hw_register(NULL, c->lk.clk_hw); + if (err < 0) { + pr_err("failed to register clock \"%s\"! (%d)\n", name, err); + /* may be tried again, restore init data */ + c->lk.clk_hw->init = init; + continue; + } + } + + clk_hw_register_clkdev(c->lk.clk_hw, c->lk.con_id, c->lk.dev_id); + } - if (cpu_is_omap15xx()) - clk_enable(&arm_gpio_ck); + omap1_show_rates(); return 0; } @@ -900,7 +835,7 @@ void __init omap1_clk_late_init(void) unsigned long rate = ck_dpll1.rate; /* Find the highest supported frequency and enable it */ - if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) { + if (omap1_select_table_rate(&virtual_ck_mpu, ~0, arm_ck.rate)) { pr_err("System frequencies not set, using default. Check your config.\n"); /* * Reprogramming the DPLL is tricky, it must be done from SRAM. diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index 05ee260918fa..d2db9b8aed3f 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c @@ -15,10 +15,8 @@ #include #include "tc.h" -#include "mux.h" #include "iomap.h" #include "common.h" -#include "clock.h" /* * The machine specific code may provide the extra mapping besides the @@ -125,11 +123,6 @@ void __init omap1_init_early(void) */ omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL); omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL); - - /* Must init clocks early to assure that timer interrupt works - */ - omap1_clk_init(); - omap1_mux_init(); } void __init omap1_init_late(void) diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c index c34b9af00566..d5e127851dc7 100644 --- a/arch/arm/mach-omap1/time.c +++ b/arch/arm/mach-omap1/time.c @@ -51,8 +51,10 @@ #include #include "hardware.h" +#include "mux.h" #include "iomap.h" #include "common.h" +#include "clock.h" #ifdef CONFIG_OMAP_MPU_TIMER @@ -224,6 +226,9 @@ static inline void omap_mpu_timer_init(void) */ void __init omap1_timer_init(void) { + omap1_clk_init(); + omap1_mux_init(); + if (omap_32k_timer_init() != 0) omap_mpu_timer_init(); } From patchwork Tue Apr 19 13:37:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 563868 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4C0FC43217 for ; Tue, 19 Apr 2022 13:47:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352956AbiDSNtv (ORCPT ); Tue, 19 Apr 2022 09:49:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43508 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353012AbiDSNsg (ORCPT ); Tue, 19 Apr 2022 09:48:36 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 540B63A70D; Tue, 19 Apr 2022 06:42:47 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 5D5DD61701; Tue, 19 Apr 2022 13:42:46 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EFC2AC385A8; Tue, 19 Apr 2022 13:42:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1650375765; bh=8SjzAPUXuyYdBuZeXZuWD8MKomlpKInJxereWCjPZ2I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Bj8mAfqJbG9f8Tobba/toXaBDXDawlf39Zvj89ZdO7BT9DK41wGfqz76jTefdrSEI 5fvlfnruKntbjDgqHcKXFufc4Snzc7dab3DhYtrv1nLsbCXUbZu8wF7NzSJWMV5g9z AxX8EDmfEpWS0NSFAcK/h1N2dYbjZouOPvfBrRp8Yku0+eXnmTkJ0HgkOMpCkCFQVp RtpYkkA3hWaBy4EpijHEnvBQJhZIibL9D6mWCbs59B0bEmpOItzdFj3W5Xp78MvQ4S iDAJ8RELJYOIwSYN+G2TH4AZ+tiI+GOUOR2OqcabCyrQ6runsc7yurMih4Uk4KdqJr uD0LTru/eQVkw== From: Arnd Bergmann To: linux-omap@vger.kernel.org, tony@atomide.com, aaro.koskinen@iki.fi, jmkrzyszt@gmail.com Cc: Arnd Bergmann , Russell King , Paul Walmsley , Kevin Hilman , Peter Ujfalusi , Vinod Koul , Dmitry Torokhov , Ulf Hansson , Dominik Brodowski , Mark Brown , Felipe Balbi , Alan Stern , Lee Jones , Daniel Thompson , Jingoo Han , Helge Deller , Linus Walleij , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, dmaengine@vger.kernel.org, linux-input@vger.kernel.org, linux-mmc@vger.kernel.org, linux-serial@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org, alsa-devel@alsa-project.org Subject: [PATCH 41/41] [TO BE REBASED] ARM: omap1: enable multiplatform Date: Tue, 19 Apr 2022 15:37:23 +0200 Message-Id: <20220419133723.1394715-42-arnd@kernel.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20220419133723.1394715-1-arnd@kernel.org> References: <20220419133723.1394715-1-arnd@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Arnd Bergmann With all the header files out of the way, and the clock driver converted to the common framework, nothing stops us from building OMAP together with the other platforms. As usual, the decompressor support is a victim here, and is only available when CONFIG_DEBUG_LL is configured for the particular board. Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig | 12 -- arch/arm/configs/omap1_defconfig | 3 + arch/arm/mach-omap1/Kconfig | 15 +++ arch/arm/mach-omap1/hardware.h | 2 +- arch/arm/mach-omap1/include/mach/uncompress.h | 117 ------------------ arch/arm/mach-omap1/serial.c | 3 +- .../mach-omap1/{include/mach => }/serial.h | 0 7 files changed, 20 insertions(+), 132 deletions(-) delete mode 100644 arch/arm/mach-omap1/include/mach/uncompress.h rename arch/arm/mach-omap1/{include/mach => }/serial.h (100%) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a65f2c05f01c..8794c6bee29b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -483,18 +483,6 @@ config ARCH_S3C24XX (), the IPAQ 1940 or the Samsung SMDK2410 development board (and derivatives). -config ARCH_OMAP1 - bool "TI OMAP1" - select CLKSRC_MMIO - select FORCE_PCI if PCCARD - select GENERIC_IRQ_CHIP - select GPIOLIB - select HAVE_LEGACY_CLK - select IRQ_DOMAIN - select SPARSE_IRQ - help - Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx) - endchoice menu "Multiple platform selection" diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig index 3148567b66b6..14c17a218ec5 100644 --- a/arch/arm/configs/omap1_defconfig +++ b/arch/arm/configs/omap1_defconfig @@ -17,6 +17,9 @@ CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set +CONFIG_ARCH_MULTI_V4T=y +CONFIG_ARCH_MULTI_V5=y +# CONFIG_ARCH_MULTI_V7 is not set CONFIG_ARCH_OMAP=y CONFIG_ARCH_OMAP1=y CONFIG_OMAP_RESET_CLOCKS=y diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index d4b0cd91a4f9..9a7e5460b36a 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig @@ -1,4 +1,15 @@ # SPDX-License-Identifier: GPL-2.0-only +menuconfig ARCH_OMAP1 + bool "TI OMAP1" + depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 + select ARCH_HAS_HOLES_MEMORYMODEL + select ARCH_OMAP + select CLKSRC_MMIO + select FORCE_PCI if PCCARD + select GPIOLIB + help + Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx) + if ARCH_OMAP1 menu "TI OMAP1 specific features" @@ -6,23 +17,27 @@ menu "TI OMAP1 specific features" comment "OMAP Core Type" config ARCH_OMAP730 + depends on ARCH_MULTI_V5 bool "OMAP730 Based System" select ARCH_OMAP_OTG select CPU_ARM926T select OMAP_MPU_TIMER config ARCH_OMAP850 + depends on ARCH_MULTI_V5 bool "OMAP850 Based System" select ARCH_OMAP_OTG select CPU_ARM926T config ARCH_OMAP15XX + depends on ARCH_MULTI_V4T default y bool "OMAP15xx Based System" select CPU_ARM925T select OMAP_MPU_TIMER config ARCH_OMAP16XX + depends on ARCH_MULTI_V5 bool "OMAP16xx Based System" select ARCH_OMAP_OTG select CPU_ARM926T diff --git a/arch/arm/mach-omap1/hardware.h b/arch/arm/mach-omap1/hardware.h index 1af0238f8c05..4c3920ba83e3 100644 --- a/arch/arm/mach-omap1/hardware.h +++ b/arch/arm/mach-omap1/hardware.h @@ -64,7 +64,7 @@ static inline u32 omap_cs3_phys(void) #define OMAP1_IO_OFFSET 0x00fb0000 /* Virtual IO = 0xff000000 */ #define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET) -#include +#include "serial.h" /* * --------------------------------------------------------------------------- diff --git a/arch/arm/mach-omap1/include/mach/uncompress.h b/arch/arm/mach-omap1/include/mach/uncompress.h deleted file mode 100644 index 9cca6a56788f..000000000000 --- a/arch/arm/mach-omap1/include/mach/uncompress.h +++ /dev/null @@ -1,117 +0,0 @@ -/* - * arch/arm/plat-omap/include/mach/uncompress.h - * - * Serial port stubs for kernel decompress status messages - * - * Initially based on: - * linux-2.4.15-rmk1-dsplinux1.6/arch/arm/plat-omap/include/mach1510/uncompress.h - * Copyright (C) 2000 RidgeRun, Inc. - * Author: Greg Lonnon - * - * Rewritten by: - * Author: - * 2004 (c) MontaVista Software, Inc. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#include -#include - -#include -#include - -#include "serial.h" - -#define MDR1_MODE_MASK 0x07 - -volatile u8 *uart_base; -int uart_shift; - -/* - * Store the DEBUG_LL uart number into memory. - * See also debug-macro.S, and serial.c for related code. - */ -static void set_omap_uart_info(unsigned char port) -{ - /* - * Get address of some.bss variable and round it down - * a la CONFIG_AUTO_ZRELADDR. - */ - u32 ram_start = (u32)&uart_shift & 0xf8000000; - u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS); - *uart_info = port; -} - -static inline void putc(int c) -{ - if (!uart_base) - return; - - /* Check for UART 16x mode */ - if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0) - return; - - while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE)) - barrier(); - uart_base[UART_TX << uart_shift] = c; -} - -static inline void flush(void) -{ -} - -/* - * Macros to configure UART1 and debug UART - */ -#define _DEBUG_LL_ENTRY(mach, dbg_uart, dbg_shft, dbg_id) \ - if (machine_is_##mach()) { \ - uart_base = (volatile u8 *)(dbg_uart); \ - uart_shift = (dbg_shft); \ - port = (dbg_id); \ - set_omap_uart_info(port); \ - break; \ - } - -#define DEBUG_LL_OMAP7XX(p, mach) \ - _DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP7XX_PORT_SHIFT, \ - OMAP1UART##p) - -#define DEBUG_LL_OMAP1(p, mach) \ - _DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP_PORT_SHIFT, \ - OMAP1UART##p) - -static inline void arch_decomp_setup(void) -{ - int port = 0; - - /* - * Initialize the port based on the machine ID from the bootloader. - * Note that we're using macros here instead of switch statement - * as machine_is functions are optimized out for the boards that - * are not selected. - */ - do { - /* omap7xx/8xx based boards using UART1 with shift 0 */ - DEBUG_LL_OMAP7XX(1, herald); - DEBUG_LL_OMAP7XX(1, omap_perseus2); - - /* omap15xx/16xx based boards using UART1 */ - DEBUG_LL_OMAP1(1, ams_delta); - DEBUG_LL_OMAP1(1, nokia770); - DEBUG_LL_OMAP1(1, omap_h2); - DEBUG_LL_OMAP1(1, omap_h3); - DEBUG_LL_OMAP1(1, omap_innovator); - DEBUG_LL_OMAP1(1, omap_osk); - DEBUG_LL_OMAP1(1, omap_palmte); - DEBUG_LL_OMAP1(1, omap_palmz71); - - /* omap15xx/16xx based boards using UART2 */ - DEBUG_LL_OMAP1(2, omap_palmtt); - - /* omap15xx/16xx based boards using UART3 */ - DEBUG_LL_OMAP1(3, sx1); - } while (0); -} diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index 299ae1106187..88928fc33b2e 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -19,8 +19,7 @@ #include -#include - +#include "serial.h" #include "mux.h" #include "pm.h" #include "soc.h" diff --git a/arch/arm/mach-omap1/include/mach/serial.h b/arch/arm/mach-omap1/serial.h similarity index 100% rename from arch/arm/mach-omap1/include/mach/serial.h rename to arch/arm/mach-omap1/serial.h