From patchwork Tue Dec 18 08:05:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 154119 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3411516ljp; Tue, 18 Dec 2018 00:05:52 -0800 (PST) X-Google-Smtp-Source: AFSGD/V5uyQYQWL0MVo3T7papuHTQBVJzY6QH+sk0azEZK+BBml0hw9aNgjSYMhV2w85iuXl7JE0 X-Received: by 2002:a62:fc8a:: with SMTP id e132mr1191631pfh.176.1545120352436; Tue, 18 Dec 2018 00:05:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545120352; cv=none; d=google.com; s=arc-20160816; b=M/WuE6W7EzWqtbG7O9wFWQ7Yy0R1mTxaDEutB0mB+m2xDxuU6yQopPyjcxZvWS2lOL yfu1vsaI9z6W8o7ZAzIMsNRycwBt69Lcxi8i/5bKIxX8huRlUvNoiz087WIUPkFX4nfJ 7E64s+0S0pOBTQCgcR5qnV4IYPxzt027qLDBiSEuFu07o6Pvu5xhwCyMTb3v0vkOUj6a r3M87POBXQ2vAnEYrBWbrnAcDmkxccED9MrWClkteZQBhgw/DCe6/hfp7a+tBzTPXbwA 0wh+G281qHp2vA9gkX2D5Xg6hMUcxl/FQw6mpD1O3wgOiKRJDR88tKJlW70Ihcchk78G ckmw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=OZbNRq4vPh2tMrFA0qvMX9547LZd+ov7go0ZcVd3YcY=; b=JY7dn5HUD+QCNmLVeBAaGm2/qpVd+tmllw+gFTFS+fGsfyRQxRPWI2fxORJEIzwB9x E0MsVfVjzGe6it9hTZaJrAVN4PDZzdo3JOlBbgwY0QdLX/BakGDBy1TtV03EWMtYaQiA 4YvFbHFyWbKZ4UNFX7iRCJjT3BJAqFeR02VCF4qugSKng2mHZWmy6N/OC9qkYIeDovFN ks4x71YgsHuaQQA+L4hRBJbVXkeyMZwRpdHIwSSJ9JbiCyLYRXhd578xvewP/dvK62BP 9i+mi9cwbwDpdYo57hGmW7bnIY2SSxNF1HmN0JL1Jru9NMmtN2kFr63C5Ngthrby6fsf 7Sjw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TUA8CghS; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u11si12194060plq.287.2018.12.18.00.05.52; Tue, 18 Dec 2018 00:05:52 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TUA8CghS; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726504AbeLRIFv (ORCPT + 2 others); Tue, 18 Dec 2018 03:05:51 -0500 Received: from mail-pg1-f196.google.com ([209.85.215.196]:34855 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726324AbeLRIFv (ORCPT ); Tue, 18 Dec 2018 03:05:51 -0500 Received: by mail-pg1-f196.google.com with SMTP id s198so7454407pgs.2 for ; Tue, 18 Dec 2018 00:05:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=OZbNRq4vPh2tMrFA0qvMX9547LZd+ov7go0ZcVd3YcY=; b=TUA8CghSP+7HrGdLnbar8fZ477bOwyppf+zSVdT/+D8IlxEaCfCoRdSota1f+qYDlm L+RCg4ozkswYFCh184d2BWOW8zFn38ZMD3yN3yq0Rsk5FJcP2S3xllk3ixUZQdojZZvV ky9vRpnL1oTApb+yDYAyca0VgWUjhPoaWMMiQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OZbNRq4vPh2tMrFA0qvMX9547LZd+ov7go0ZcVd3YcY=; b=ZQ5nOCiFu5uPHcgt9q8nysybnzwMv+NvGYCnGtoHHDC7BlExM8641s3hoaV8RSK1iR /MTWtWQvNjRreqS6SHMsjDDl/PXR8QhkipUVbrcVxwOtfOLbQpEePWdAnT0awnKUIJf9 z5/Nv81Pa6GswrL7lh23BtTS/SfnBcIBw6oR/DbT+RWyJ00xx1sS5iDS5dEsyqovD1zV owPnh50z6ZW6lkz1q9K4fjC9N78QhlZ6UG6UJTOxxSmqUIj4ywM4oQDHP60QhfhZSsot CFwmZ0DHSgVYcAamyafxYitNgK6bQrk6izh9aiK3OQhkKvwdtpqPtaCFkV8vLxTeTmjl pPZQ== X-Gm-Message-State: AA+aEWaQWjPKkFvwpFd8QGurOLTsT2T/1lULzbV/6+rj9cdL6wIS/WnU ialT3WyuCKzIGGQ/WThCX2oV X-Received: by 2002:a62:8096:: with SMTP id j144mr16046934pfd.140.1545120350918; Tue, 18 Dec 2018 00:05:50 -0800 (PST) Received: from localhost.localdomain ([2409:4072:702:382e:8c68:d268:ed20:5f25]) by smtp.gmail.com with ESMTPSA id 7sm45596888pfm.8.2018.12.18.00.05.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Dec 2018 00:05:50 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v6 01/11] dt-bindings: Add RDA Micro vendor prefix Date: Tue, 18 Dec 2018 13:35:17 +0530 Message-Id: <20181218080527.10801-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181218080527.10801-1-manivannan.sadhasivam@linaro.org> References: <20181218080527.10801-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Andreas Färber Add vendor prefix for RDA Micro which now merged into Unisoc Communications Inc. Signed-off-by: Andreas Färber Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 4b1a2a8fcc16..37826fac7684 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -320,6 +320,7 @@ ralink Mediatek/Ralink Technology Corp. ramtron Ramtron International raspberrypi Raspberry Pi Foundation raydium Raydium Semiconductor Corp. +rda Unisoc Communications, Inc. realtek Realtek Semiconductor Corp. renesas Renesas Electronics Corporation richtek Richtek Technology Corporation From patchwork Tue Dec 18 08:05:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 154121 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3411773ljp; Tue, 18 Dec 2018 00:06:07 -0800 (PST) X-Google-Smtp-Source: AFSGD/X0LDe615r6RPLWgtroSPoMnuEXXaYczmYaTEUuadmdBLIvzAlfEXQS/+hlHJy2emItlLhZ X-Received: by 2002:aa7:8608:: with SMTP id p8mr16036335pfn.125.1545120367857; Tue, 18 Dec 2018 00:06:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545120367; cv=none; d=google.com; s=arc-20160816; b=iU1Fwxov3lJVDVQLElZh1jum9OQX9gCGbAylC2WmggWh0WEz61jygPXgE2D1nuP0EF hy6hyajWnS8W6IWxSU1qs+64GTm/SqACwpOmVyeva/FI95jSwOgilt39jXWUlrb1NmY5 1JV5nDFcLg3u4fLwEumDM4gKBdHIWXu6ZrdHXqUUSMqmi9xLlAyS5Jt8yXSCtum/ylMc wqcfCGy/s0To1vMBy6oMrdzXcWOyJfWP3gX10SwHl1DWV/SGceSf5eCjXB4CVXkDIhjt SGSBZxEQA+tuzZW0ly3bWHFz+UrNM66HZXr6g7JArOiU8RCActDypuQ4DYocqbMT17F2 n8Dw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=UfYvMyUASU0SktOneqY893l+ivwuHLJC4IjYGuuzrdU=; b=JHeYFAci+YQd2Ue1yAuEPfx0jAH9rsYa+mgtibw1CTlK6j0ZxM124XzkUepiI9yinE 83+kw5jHVrWO63IQNQgPYGvP+vlZmC6kctAo8BB0W4u+c38293Yd5X6HANqGXqG1KIhx y4JaD4fP/W8XqKBCTO4NdjCpk7TkQ0XLBP+MHVGpvfRAwigK9ss89t8dvcA1avg5Igmt 95Y0VF320yjsIbfWcgHqNzqYiHKa6PTNPJjKUf9WvaIlA2hgnAcp+4vG6qGiw5aPgzEk zoewVi+kxq30mo5jsDbc1f4Ww0dxIVIDncECqNa663oh3b0UC3giKji3Bm7Mh2hZPTfT iiIw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WPg+M1fH; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 7si15007066pfb.226.2018.12.18.00.06.07; Tue, 18 Dec 2018 00:06:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WPg+M1fH; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726495AbeLRIGH (ORCPT + 2 others); Tue, 18 Dec 2018 03:06:07 -0500 Received: from mail-pl1-f196.google.com ([209.85.214.196]:34374 "EHLO mail-pl1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726484AbeLRIGH (ORCPT ); Tue, 18 Dec 2018 03:06:07 -0500 Received: by mail-pl1-f196.google.com with SMTP id w4so7467876plz.1 for ; Tue, 18 Dec 2018 00:06:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UfYvMyUASU0SktOneqY893l+ivwuHLJC4IjYGuuzrdU=; b=WPg+M1fHlkW3flIMrdiDhlhfZpjvGLb7X/Ub63au01MaDQdufdVMWB9oZvSdP9+hML 3OL2FzqCGJQq4KTMOiS/hGusBjqVxBDfuaTdJ0pX6VyrD8jdFd3VNiCk/VMjcUqUv9F8 EZXRcoNkFCF9QUysdAcDh6AHXV4pvod/3JqpI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UfYvMyUASU0SktOneqY893l+ivwuHLJC4IjYGuuzrdU=; b=JYbuGeLd+vaVN2J9iLbVexOIDuHP00wdyO6IpcMs5lqpfDtG5nkJWLpsUAyaMPiyes M1DCd7GVoxW4H7lV0LpZRZ8UnmZ5Z244X2cy1t45ElblKAoOi2+NOkP61d+TGQz84jo+ 46coD95saMQvrydtQ+xloYVJXc1V1FYVoEPoGvfJeCdTLLMjMxqwL48Dw5GhTOF04DpS +/hTWMscNkrv4F9abEn/wm1tHmqf8hiEFpFzd3SMqIOvuI1cBzVimPOS/YjDmRhfYp5l sn88iPs+kVcjJh5VxMb/u/rBb5oD28Xn3LuzPjTmS0JnGVGPtoBXHF3vTFa8embOogS8 3z+Q== X-Gm-Message-State: AA+aEWYqpd5Uz1eUD1vs1UWCW1CgW/WXZvvLhYpwwaqE4PYJ9nKxjc6e ugDHq7uHJvngkX4vreQtSsvY X-Received: by 2002:a17:902:bd0a:: with SMTP id p10mr15074983pls.322.1545120366410; Tue, 18 Dec 2018 00:06:06 -0800 (PST) Received: from localhost.localdomain ([2409:4072:702:382e:8c68:d268:ed20:5f25]) by smtp.gmail.com with ESMTPSA id 7sm45596888pfm.8.2018.12.18.00.05.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Dec 2018 00:06:05 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v6 03/11] ARM: Prepare RDA8810PL SoC Date: Tue, 18 Dec 2018 13:35:19 +0530 Message-Id: <20181218080527.10801-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181218080527.10801-1-manivannan.sadhasivam@linaro.org> References: <20181218080527.10801-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Andreas Färber Introduce ARCH_RDA and mach-rda for RDA Micro SoCs. Signed-off-by: Andreas Färber Signed-off-by: Manivannan Sadhasivam --- arch/arm/Kconfig | 2 ++ arch/arm/Makefile | 1 + arch/arm/mach-rda/Kconfig | 9 +++++++++ arch/arm/mach-rda/Makefile | 1 + 4 files changed, 13 insertions(+) create mode 100644 arch/arm/mach-rda/Kconfig create mode 100644 arch/arm/mach-rda/Makefile -- 2.17.1 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 91be74d8df65..084f0983e6b2 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -804,6 +804,8 @@ source "arch/arm/plat-pxa/Kconfig" source "arch/arm/mach-qcom/Kconfig" +source "arch/arm/mach-rda/Kconfig" + source "arch/arm/mach-realview/Kconfig" source "arch/arm/mach-rockchip/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 05a91d8b89f3..10056ccdb8be 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -202,6 +202,7 @@ machine-$(CONFIG_ARCH_ORION5X) += orion5x machine-$(CONFIG_ARCH_PICOXCELL) += picoxcell machine-$(CONFIG_ARCH_PXA) += pxa machine-$(CONFIG_ARCH_QCOM) += qcom +machine-$(CONFIG_ARCH_RDA) += rda machine-$(CONFIG_ARCH_REALVIEW) += realview machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip machine-$(CONFIG_ARCH_RPC) += rpc diff --git a/arch/arm/mach-rda/Kconfig b/arch/arm/mach-rda/Kconfig new file mode 100644 index 000000000000..1ea753f57b2d --- /dev/null +++ b/arch/arm/mach-rda/Kconfig @@ -0,0 +1,9 @@ +menuconfig ARCH_RDA + bool "RDA Micro SoCs" + depends on ARCH_MULTI_V7 + select COMMON_CLK + select GENERIC_IRQ_CHIP + select RDA_INTC + select RDA_TIMER + help + This enables support for the RDA Micro 8810PL SoC family. diff --git a/arch/arm/mach-rda/Makefile b/arch/arm/mach-rda/Makefile new file mode 100644 index 000000000000..6bea3d3a2dd7 --- /dev/null +++ b/arch/arm/mach-rda/Makefile @@ -0,0 +1 @@ +obj- += dummy.o From patchwork Tue Dec 18 08:05:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 154122 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3411914ljp; Tue, 18 Dec 2018 00:06:16 -0800 (PST) X-Google-Smtp-Source: AFSGD/WKx7b/H0W6ciUE8WMj+RZARZpzinb5ma0n6vaF7B67s9MFG5LwLqSOqR8Y2M+sOa/Yehvn X-Received: by 2002:a17:902:b20e:: with SMTP id t14mr15658932plr.128.1545120376156; Tue, 18 Dec 2018 00:06:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545120376; cv=none; d=google.com; s=arc-20160816; b=zY3KscZ+Au9ZNuXxszuK0Mvc2vQRi9vv8KLdmtFbHmNmBzQL8FWXCqw+Lr60cS6Blc 4t12WcJGDSBcW7gCHbyXq7Kq7WEiQPCKvgped2g8AR5nfQHisYX1G/s8ihlyLE+dL28O ps5zjr5ucmNIRqKOwcwrFT1eQOnhGdPabMMP5r6NQI0VaiZFarFAmbVqWVt+rVQZeZRq eWE4+AsSjyQ1cX8wt4wKx0cRdAVd65wElFYWlnu6VQPKphLMiVCNtyyM/OzioEows8K4 VCvjJ9dQmewlzXJoG/MVte0vDz5dYrWIHtkO0Zm0//9Y8nImeXv7uUKaOz2/ioDyx2AJ PIYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Wp3BZDgoaFaJmF6UrFqd9p3SyvZQREQyZwNsYyp7Sws=; b=sYbHXHDXtAfl/n79t1doNpSfCSZlzt4bfRFFSnwxe0AIqyvm489us+ZHLJwbKnB3q+ 6s/iOWU4FDSH1x/SXKQVqLeHjvp/bDRfDeAy+OYMIe4cAnFt2HbK0F7lgOHT7TvHktzd ow5udePRZO6VZC+ngC0RE6vnCxfA+PB25/UcuLgsdJ1HUNDevDkWyrgIN014mSe/rP8W Dmnkt64aYmcbn/52Ww8b+nfC1T9qbVORjIdt9tmNOtCrbGNgkRwj2sMz+p5OlieAemDg 2aoVvFIa+zKVPz0N4iUi0+x0NFLARhiBO898wexRqJEJuAlVkNVNE9zov1iPzPRWfZCh /MfA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=e7JRSrAf; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t3si10472192ply.126.2018.12.18.00.06.15; Tue, 18 Dec 2018 00:06:16 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=e7JRSrAf; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726706AbeLRIGP (ORCPT + 2 others); Tue, 18 Dec 2018 03:06:15 -0500 Received: from mail-pf1-f193.google.com ([209.85.210.193]:39339 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726558AbeLRIGP (ORCPT ); Tue, 18 Dec 2018 03:06:15 -0500 Received: by mail-pf1-f193.google.com with SMTP id r136so699746pfc.6 for ; Tue, 18 Dec 2018 00:06:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Wp3BZDgoaFaJmF6UrFqd9p3SyvZQREQyZwNsYyp7Sws=; b=e7JRSrAf8tYftofR6Nt0Jup6rjHQzM9AyxzsMscFwCvLYirD1lf1YYNM3yt6OXWUYP 2L8Mmx6wclRDrJqB/L6e6+abWX5i7G4zk/uLByVujvH3pP0lO14bxPbOTtZETGtPL1c6 3TnmYjFWwD4TBHDOrkQReoeWrgIxjRAzagXiI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Wp3BZDgoaFaJmF6UrFqd9p3SyvZQREQyZwNsYyp7Sws=; b=nrS5xqXbzqN4gJb8wapxhmkX/d3zPquwtxvkhxsR2BmX02a3u/8mJ9LrD8wEpAN/gF Nx7sGFWRlxLx1l4Nd37SlSjTC2WIyG+nnbonw/QptRdolzycbK5k5AXvosKHyG301z9C VlvCQ5v0Je5dHonWSsA/MCkGhoUkbJ6g2K2/M5vPwi7c3/FLHsOqaGewuXMBKI8H3rid ne2ZJJae4C5jlCV64cwzTg8PP6Hbt6jF+puP9Eb6gDvRk3ryPq0rRRBuaHMCoBTGsy7P mvRfmXJhgjJNzZr4Cd7eKcqjgocnzJLVDhwlCNTtAB0/ClJrD6u4alx8j1IYujfctr6c /jsQ== X-Gm-Message-State: AA+aEWYHMA+5Sr1RRYCmynVvvOO2VP+OlKFskQYo5u2HcIVqZp6tMlz3 JFgeXuFRnZgZwuBK6YSn9sah X-Received: by 2002:a63:1a4b:: with SMTP id a11mr14959790pgm.254.1545120374584; Tue, 18 Dec 2018 00:06:14 -0800 (PST) Received: from localhost.localdomain ([2409:4072:702:382e:8c68:d268:ed20:5f25]) by smtp.gmail.com with ESMTPSA id 7sm45596888pfm.8.2018.12.18.00.06.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Dec 2018 00:06:13 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v6 04/11] ARM: dts: Add devicetree for RDA8810PL SoC Date: Tue, 18 Dec 2018 13:35:20 +0530 Message-Id: <20181218080527.10801-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181218080527.10801-1-manivannan.sadhasivam@linaro.org> References: <20181218080527.10801-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Add initial device tree for RDA8810PL SoC from RDA Microelectronics. Signed-off-by: Andreas Färber Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/rda8810pl.dtsi | 86 ++++++++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 arch/arm/boot/dts/rda8810pl.dtsi -- 2.17.1 diff --git a/arch/arm/boot/dts/rda8810pl.dtsi b/arch/arm/boot/dts/rda8810pl.dtsi new file mode 100644 index 000000000000..15547b138977 --- /dev/null +++ b/arch/arm/boot/dts/rda8810pl.dtsi @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * RDA8810PL SoC + * + * Copyright (c) 2017 Andreas Färber + * Copyright (c) 2018 Manivannan Sadhasivam + */ + +/ { + compatible = "rda,8810pl"; + interrupt-parent = <&intc>; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a5"; + reg = <0x0>; + }; + }; + + sram@100000 { + compatible = "mmio-sram"; + reg = <0x100000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + }; + + apb@20800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x20800000 0x100000>; + + intc: interrupt-controller@0 { + compatible = "rda,8810pl-intc"; + reg = <0x0 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + apb@20900000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x20900000 0x100000>; + }; + + apb@20a00000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x20a00000 0x100000>; + + uart1: serial@0 { + compatible = "rda,8810pl-uart"; + reg = <0x0 0x1000>; + status = "disabled"; + }; + + uart2: serial@10000 { + compatible = "rda,8810pl-uart"; + reg = <0x10000 0x1000>; + status = "disabled"; + }; + + uart3: serial@90000 { + compatible = "rda,8810pl-uart"; + reg = <0x90000 0x1000>; + status = "disabled"; + }; + }; + + l2: cache-controller@21100000 { + compatible = "arm,pl310-cache"; + reg = <0x21100000 0x1000>; + cache-unified; + cache-level = <2>; + }; +}; From patchwork Tue Dec 18 08:05:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 154123 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3412064ljp; Tue, 18 Dec 2018 00:06:24 -0800 (PST) X-Google-Smtp-Source: AFSGD/WqdLsoh9+Xl8oJO4z6udo7VsfTfMApol9s5Q1AzXjQyffyH04syovzaP/zLgQ4CZeC7zGN X-Received: by 2002:a17:902:66e6:: with SMTP id e93mr15173022plk.92.1545120384439; Tue, 18 Dec 2018 00:06:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545120384; cv=none; d=google.com; s=arc-20160816; b=YNFzcHAqkclvHTn6syH7yLMxLXFHsgrpeaS679xJ6A8NILeSM2YMy2Ce8zMBbOUBGU ZTPbwQ6LKvIA2c5Pk9RmD/Gh5We393pPbUrpgD+xsnlDG574a5GeqT6PS55Y6ZFSGYoh 1+m2kOZuCd6UsLpWlHwtA97UMBtoT4IVccj9uQcr/MX/ImjOMfs7rFYSeZG71XiCg1em tTScR5zKi/WDgPEBlJJbS9cj4Zkv3T4vyyIs6DUYty6ozuxWohe+/RtzYtTnTg3Z5Kox PQmVfMSTGfXZ8rZkE9ZRTi/gAeBW9EdCSCvH52JiBUCrqoFcxJXYnFNsIZm1VPQdMQhj 7KTQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=jBeXaJXIkgLTVAea7CD+4QY6FweZRNu6qTHTVAB8x/Y=; b=fooe/xshthi7YtlvKZdASWHcMmKR2pRmIivJ54zy9QjCXl4Qd/I6W5ywC/2D6RpxDr NT7ipyx+o9IVUBKPsu3kfW6ZGd9/oAG3obFh6LcRKwH5HQUwjGlkde1hpZaD5Ws/bCR6 aPCbUnCVvq2wlna4Nrp414vYkdxEvTvVvTcDSgSQPkVODAR30frQhAyzzqsjat2vAN4k zjSTIA1NlzhhybL7x9iyaUpGh4cHn5eclETA6YKQnfbKM+ADNS+5Ke7+Z+Xer/cifGE8 5I9/2POoSid8hdyDvJt6ZWka0mpeKzk+hn/JcsrryDvYiPfgAvHwIRodiduZrQMf7nIm aB0A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="O3h/8Wro"; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l66si11915982pga.151.2018.12.18.00.06.24; Tue, 18 Dec 2018 00:06:24 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="O3h/8Wro"; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726580AbeLRIGX (ORCPT + 2 others); Tue, 18 Dec 2018 03:06:23 -0500 Received: from mail-pf1-f193.google.com ([209.85.210.193]:39351 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726546AbeLRIGX (ORCPT ); Tue, 18 Dec 2018 03:06:23 -0500 Received: by mail-pf1-f193.google.com with SMTP id r136so699942pfc.6 for ; Tue, 18 Dec 2018 00:06:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jBeXaJXIkgLTVAea7CD+4QY6FweZRNu6qTHTVAB8x/Y=; b=O3h/8WrootvgLo6iq19RENYMSgRZXgcAimJmVbJ1apvTl0v088S7GX4+j8W4I1AWTU d6QGZUDdXG8lODI4a2XlfM9kWxlSZ1mfYCxShhmwuUDpJ8n+lIfjad/tMyTDmHaZoPqt oCcK89JeiKGxtLVa8rx5HzDxbciCXatzC81ac= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jBeXaJXIkgLTVAea7CD+4QY6FweZRNu6qTHTVAB8x/Y=; b=U/i6ROlElBCFyN1wtB+7GWCiSobcrxQgai7QSBXWqEa06ZPuKcdDQdRSZhBgCBNLkA FzxF4XsirdCehWIWyDaoYJVNgeIWsw9FYgGGNbx+2mztVq65U76ArFxRU59SBYY68uXO ugeQ1cXXSjnuXPfliyks9erRkw/0XTzeFiE94spV4U3IRodyqzHY7Mg2mbu1MUAiLJ0q s77VITFr8053V6YYgK4mN89XlQSL0fHjTtANxMDNsXXZ0XZpM2TC7CalvFFVhBjC+3om w87OMGAX0JXB+srVDA9ZeXFCmqpCerWa8fKSIkxN7WSMudXODgbvp4gBAMSpfJVRPdPN oCNg== X-Gm-Message-State: AA+aEWZHaRpvbR4+9hGhD5+eMO2Ws2UNGzB3isOnGaaaIi+WbIX65H9E jKD1Yxm5B2Lsz7NJr8stQie0 X-Received: by 2002:a65:55ca:: with SMTP id k10mr14788239pgs.448.1545120382887; Tue, 18 Dec 2018 00:06:22 -0800 (PST) Received: from localhost.localdomain ([2409:4072:702:382e:8c68:d268:ed20:5f25]) by smtp.gmail.com with ESMTPSA id 7sm45596888pfm.8.2018.12.18.00.06.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Dec 2018 00:06:21 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v6 05/11] ARM: dts: Add devicetree for OrangePi 2G IoT board Date: Tue, 18 Dec 2018 13:35:21 +0530 Message-Id: <20181218080527.10801-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181218080527.10801-1-manivannan.sadhasivam@linaro.org> References: <20181218080527.10801-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Add initial devicetree support for OrangePi 2G IoT board from Xunlong. Signed-off-by: Andreas Färber Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/Makefile | 2 + .../boot/dts/rda8810pl-orangepi-2g-iot.dts | 50 +++++++++++++++++++ 2 files changed, 52 insertions(+) create mode 100644 arch/arm/boot/dts/rda8810pl-orangepi-2g-iot.dts -- 2.17.1 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index b0e966d625b9..a0fdad8f10dd 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -806,6 +806,8 @@ dtb-$(CONFIG_ARCH_QCOM) += \ qcom-msm8974-sony-xperia-castor.dtb \ qcom-msm8974-sony-xperia-honami.dtb \ qcom-mdm9615-wp8548-mangoh-green.dtb +dtb-$(CONFIG_ARCH_RDA) += \ + rda8810pl-orangepi-2g-iot.dtb dtb-$(CONFIG_ARCH_REALVIEW) += \ arm-realview-pb1176.dtb \ arm-realview-pb11mp.dtb \ diff --git a/arch/arm/boot/dts/rda8810pl-orangepi-2g-iot.dts b/arch/arm/boot/dts/rda8810pl-orangepi-2g-iot.dts new file mode 100644 index 000000000000..98e34248ae80 --- /dev/null +++ b/arch/arm/boot/dts/rda8810pl-orangepi-2g-iot.dts @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2017 Andreas Färber + * Copyright (c) 2018 Manivannan Sadhasivam + */ + +/dts-v1/; + +#include "rda8810pl.dtsi" + +/ { + compatible = "xunlong,orangepi-2g-iot", "rda,8810pl"; + model = "Orange Pi 2G-IoT"; + + aliases { + serial0 = &uart1; + serial1 = &uart2; + serial2 = &uart3; + }; + + chosen { + stdout-path = "serial2:921600n8"; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + uart_clk: uart-clk { + compatible = "fixed-clock"; + clock-frequency = <921600>; + #clock-cells = <0>; + }; +}; + +&uart1 { + status = "okay"; + clocks = <&uart_clk>; +}; + +&uart2 { + status = "okay"; + clocks = <&uart_clk>; +}; + +&uart3 { + status = "okay"; + clocks = <&uart_clk>; +}; From patchwork Tue Dec 18 08:05:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 154124 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3412173ljp; Tue, 18 Dec 2018 00:06:30 -0800 (PST) X-Google-Smtp-Source: AFSGD/VkDqstInajbgjrI7KdT/m8X8/nJgzCa1LVnKOxldVCgu3GcAJq2AyYhVmDPHnAwJI+QO1w X-Received: by 2002:a62:2044:: with SMTP id g65mr15667336pfg.127.1545120390567; Tue, 18 Dec 2018 00:06:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545120390; cv=none; d=google.com; s=arc-20160816; b=FT6KUMW5I5UlZiX2BZ+vANm8Tw4adcvGtjwdwW6Tf8badln6D158+vkpfoxQm0hYm+ cIVXf40RLdlYdzPMlYjTGCMeBO0LugmEYMgXBQNzu7ZQoSbCnXNro5GW+/PUdHchVaQr /v9/kTp3ZJFQ5admOYAm/OLuHyL09A+rcG18DNwTu2FJavv3zvxaQDcmXJgMy4PYPRx0 dfmO18dxB3rKS8/HVVqHzCbQ6dRp5+RNpdlk7ureEKAk7m9uSaumzwSF6JmMjq8bnXS3 ITJzcbP1yxwzy6jtH5u6l50FTjWQJpHB/wBL3y4gJQ2LzaN60d2+WTJhUtezOVcFfOPP xDJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=KIbCrv6kxd+jKuB+Z655EDqVYRNgXku8ohIbZgJ20mM=; b=wmN6xMf0aPf8UVCc2wf4EK67ePbKjndsd3KoPQ2+HvnF/p8EQEcsLIKSbe5JZfiRj3 O9Hug+rQXhsn4ZFEIvPFJs7sUgCQ+OBsdl249SLUMdCzg8j3Au5B6VedUCOThA3DBxuU 9hAz4HBo1Jq7l79QpFox+nDWJIpB2fEHLYld5DYQsNc6sLL5y5B75vzuoOy1SgG033rp Z6RYcBKOVy6qSyOP7amYwSOuQ3Tgzj8yt8R0zcj3b7LJtHx8iM87ndLHOLX73UKIayL3 xvxqovgDw/RRYfzCQVsDvDSq0WviOWdcBnEQVKyUUvuVbg+D4NXiyuvR4J72zOgMSyJe 6bBQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Dr0EVT+O; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s11si12375348pgk.344.2018.12.18.00.06.30; Tue, 18 Dec 2018 00:06:30 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Dr0EVT+O; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726556AbeLRIG3 (ORCPT + 2 others); Tue, 18 Dec 2018 03:06:29 -0500 Received: from mail-pl1-f194.google.com ([209.85.214.194]:41205 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726739AbeLRIG3 (ORCPT ); Tue, 18 Dec 2018 03:06:29 -0500 Received: by mail-pl1-f194.google.com with SMTP id u6so7452088plm.8 for ; Tue, 18 Dec 2018 00:06:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=KIbCrv6kxd+jKuB+Z655EDqVYRNgXku8ohIbZgJ20mM=; b=Dr0EVT+OfdgOd3vo+FXI4YpTZNroQuSRFkxLLwUs0bNV53QET8UOOVxhnHCEELmJLi FS9dh43kX898kswHwjWnvkJsM63YNgspkEYXi4bAly143zlm69aCuqnyPXQ/VotWZSBg UcJbCfxQyh2y9EVoCOpVgrZFbChPvIDmxBbMs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KIbCrv6kxd+jKuB+Z655EDqVYRNgXku8ohIbZgJ20mM=; b=sPjEFxnER4Uk+Fa8ZGXU69q7dvquIoPZVOAB9PypaR/hMlf+OhTsKvV9Zf2zBduTLP XJ3RRyprTX/Nvo+o7IPESZIesMMg89OnrZS4SfYPsyUkgo7B5WIFHr/d32tPgn0UPreV ts+RluJ4LtQd6SBcel6rUn9i00HYLyWULkqnjDKE4YR5V4KDqJixaSyFQ3LcxIOl1BnL 22QJVWheCjARgP45xsOUgyzrTgd+JFLoOdeWmrphlTmMQl5oaoHviZn1m0gDSVAWprSG YgDv8VjqHB980tGXhhiwD/kOOlNSDSEfLbHu1boM+Qs+dZO3YXo06ze8RiTK5xpPlSXF AGzg== X-Gm-Message-State: AA+aEWZ+iOmnhuxX3q3qiZPzHoNJ9N4Fdq5b8OvVZ1j80CvGl7xXq98G rHzHLaCh5Vd/QngniWutQqol X-Received: by 2002:a17:902:5a86:: with SMTP id r6mr14914715pli.301.1545120388928; Tue, 18 Dec 2018 00:06:28 -0800 (PST) Received: from localhost.localdomain ([2409:4072:702:382e:8c68:d268:ed20:5f25]) by smtp.gmail.com with ESMTPSA id 7sm45596888pfm.8.2018.12.18.00.06.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Dec 2018 00:06:28 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v6 06/11] ARM: dts: Add devicetree for OrangePi i96 board Date: Tue, 18 Dec 2018 13:35:22 +0530 Message-Id: <20181218080527.10801-7-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181218080527.10801-1-manivannan.sadhasivam@linaro.org> References: <20181218080527.10801-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Add initial devicetree for Orange Pi i96 board from Xunlong. It is one of the 96Boards IoT Edition board. Signed-off-by: Andreas Färber Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/rda8810pl-orangepi-i96.dts | 50 ++++++++++++++++++++ 2 files changed, 52 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/rda8810pl-orangepi-i96.dts -- 2.17.1 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index a0fdad8f10dd..cfb08ea33872 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -807,7 +807,8 @@ dtb-$(CONFIG_ARCH_QCOM) += \ qcom-msm8974-sony-xperia-honami.dtb \ qcom-mdm9615-wp8548-mangoh-green.dtb dtb-$(CONFIG_ARCH_RDA) += \ - rda8810pl-orangepi-2g-iot.dtb + rda8810pl-orangepi-2g-iot.dtb \ + rda8810pl-orangepi-i96.dtb dtb-$(CONFIG_ARCH_REALVIEW) += \ arm-realview-pb1176.dtb \ arm-realview-pb11mp.dtb \ diff --git a/arch/arm/boot/dts/rda8810pl-orangepi-i96.dts b/arch/arm/boot/dts/rda8810pl-orangepi-i96.dts new file mode 100644 index 000000000000..728f76931b99 --- /dev/null +++ b/arch/arm/boot/dts/rda8810pl-orangepi-i96.dts @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2017 Andreas Färber + * Copyright (c) 2018 Manivannan Sadhasivam + */ + +/dts-v1/; + +#include "rda8810pl.dtsi" + +/ { + compatible = "xunlong,orangepi-i96", "rda,8810pl"; + model = "Orange Pi i96"; + + aliases { + serial0 = &uart2; + serial1 = &uart1; + serial2 = &uart3; + }; + + chosen { + stdout-path = "serial2:921600n8"; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + uart_clk: uart-clk { + compatible = "fixed-clock"; + clock-frequency = <921600>; + #clock-cells = <0>; + }; +}; + +&uart1 { + status = "okay"; + clocks = <&uart_clk>; +}; + +&uart2 { + status = "okay"; + clocks = <&uart_clk>; +}; + +&uart3 { + status = "okay"; + clocks = <&uart_clk>; +}; From patchwork Tue Dec 18 08:05:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 154126 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3412510ljp; Tue, 18 Dec 2018 00:06:46 -0800 (PST) X-Google-Smtp-Source: AFSGD/XImVfpWOu19DVTqZR6Tp7/LXonULDNJ1P1pRMvd/3B4ruj5Zm8su9TtoMestD+MFgwQqZh X-Received: by 2002:a63:6b05:: with SMTP id g5mr14475437pgc.15.1545120406667; Tue, 18 Dec 2018 00:06:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545120406; cv=none; d=google.com; s=arc-20160816; b=lEzBWYIE8pwugCL1UK80rtuAD/iY+l3Y9Iu0vjvrUUZdB2hgAaXL4WL79IQxncAuhV cQaVLQ554WBnO3qMBGN6KEwzfEpjx0Kffj7hdZfwmhRcPPTLXmrhOaGHdWpKk77oftT7 JMlgNYwK/nVfWSpk0b/X5ZVOKCSOnTxQC9U9bnnpvt4A5z1wFvQ9b8bEEiIGGiXvrW4F YCiAyLpnr6Pbca9AhJBLWbuEmnzrOhvvM5S5UmBLyskkMJ3gbWFEPyvQa4Ob3hNqeYAN U3ZTOmShMGAFPOjXVdWQX+D2zhCTn6XtSSuglNVpGjUjhk/uHhU/10H5F3vsOqa24dLo HVsw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=p8+PRll/69hpVBI8tPhWaAoQEyS3IrjnhvvEZdMVHBc=; b=CvBZcV5bTFIRYHmKQVdRUSgiP04AtkvAyQDsASbHEP1sMRyjx6dVXW9/bjMBzXW0Bs QJBv9TlBiAgGFHhMsgbCxu5Mg0ot9B6WkfAuIVxn0nEZySg5MENBqus9YOeS0jludmX9 mgNyuI4lz3q41XqGh9sWXFIfY+bI38dBB71IDpjD0ztA36rbGbuJ+/EvX/bWowA43g8k 75rUyjfhHBsBy8pu2VUNzIa8ipaQrGY3124QKR9Ix2lwVE97XSLVDGO3CMtyc0nRCv9E L15gdTkUfM9dIyoqFdmHzxQZVZi0zN//1gnUeYbcCo0nVfQVx/aVaRs7xFV0y24qRsTW +dmQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bqRxus8C; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x6si12491212pgh.363.2018.12.18.00.06.46; Tue, 18 Dec 2018 00:06:46 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bqRxus8C; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726667AbeLRIGp (ORCPT + 2 others); Tue, 18 Dec 2018 03:06:45 -0500 Received: from mail-pf1-f195.google.com ([209.85.210.195]:46492 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726341AbeLRIGo (ORCPT ); Tue, 18 Dec 2018 03:06:44 -0500 Received: by mail-pf1-f195.google.com with SMTP id c73so7743104pfe.13 for ; Tue, 18 Dec 2018 00:06:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=p8+PRll/69hpVBI8tPhWaAoQEyS3IrjnhvvEZdMVHBc=; b=bqRxus8CEVj8x00GEJ6tPZFvSOeSdrZWpqKoGrOd+0VFFM7vST0FdEJg8tUILQR7sy xEw5UQsPhlbeZQPwBN6sYCJXLHrvPQ3Q9FhomxCBftgHOuunY/McWy3g1M59/W5ypScq tZzBeHz+n8n9mPud0gb81yWTanNJ3hO8J2tY4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=p8+PRll/69hpVBI8tPhWaAoQEyS3IrjnhvvEZdMVHBc=; b=dB6iagw+ZiIJ6hDBUxMEPsXEsWluiE2fDWepB543I31NdDbiOR8apzI9EQ6+R7otq+ UiVvU5uI/PrKDMAIH69pYkIUHOJFgQUE9OTpOx3fSoc2C2Wk3EsEb0DE1cErg8zqWTpx E6p4EYk9Dz7M70Ent/QClbKuc5WzdpSeDpqKN6ncKSk5iBKjlsiUHBoJ+RRmrmJ63TrX w/SRrSRXZq0TzxLwMjwwA/86SyZfCfrtVe90vhcuRR8/OCFBvfV/t/5g5uc0KPpXTAmQ J/M14piEGgylVGXDT9y/QXx2OjoQY30TEwKGZuhBCCyypzKqMjpJxa4TICUJbcAA2sUb FDZQ== X-Gm-Message-State: AA+aEWZffRitROZTVJ54jcuUwjB6qZama+aJrbKDDl9LNM6W07v1rumS anyd94kJfjFWS0e/Ixslbqxv X-Received: by 2002:a63:d547:: with SMTP id v7mr14713880pgi.339.1545120403546; Tue, 18 Dec 2018 00:06:43 -0800 (PST) Received: from localhost.localdomain ([2409:4072:702:382e:8c68:d268:ed20:5f25]) by smtp.gmail.com with ESMTPSA id 7sm45596888pfm.8.2018.12.18.00.06.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Dec 2018 00:06:43 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v6 08/11] dt-bindings: serial: Document RDA Micro UART Date: Tue, 18 Dec 2018 13:35:24 +0530 Message-Id: <20181218080527.10801-9-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181218080527.10801-1-manivannan.sadhasivam@linaro.org> References: <20181218080527.10801-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Andreas Färber Add an initial binding for the UART in RDA Micro RDA8810PL SoC. Signed-off-by: Andreas Färber Signed-off-by: Manivannan Sadhasivam --- .../bindings/serial/rda,8810pl-uart.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/rda,8810pl-uart.txt -- 2.17.1 diff --git a/Documentation/devicetree/bindings/serial/rda,8810pl-uart.txt b/Documentation/devicetree/bindings/serial/rda,8810pl-uart.txt new file mode 100644 index 000000000000..a08df97a69e6 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/rda,8810pl-uart.txt @@ -0,0 +1,17 @@ +RDA Micro UART + +Required properties: +- compatible : "rda,8810pl-uart" for RDA8810PL SoCs. +- reg : Offset and length of the register set for the device. +- interrupts : Should contain UART interrupt. +- clocks : Phandle to the input clock. + + +Example: + + uart2: serial@20a90000 { + compatible = "rda,8810pl-uart"; + reg = <0x20a90000 0x1000>; + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&uart_clk>; + }; From patchwork Tue Dec 18 08:05:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 154127 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3412646ljp; Tue, 18 Dec 2018 00:06:55 -0800 (PST) X-Google-Smtp-Source: AFSGD/UvcHePk+k2Ah1J3Ym9i2nPIgD/giq+bHuvwbevcVSDtoVVVzHbhX7P0giv52LhQfeP4syW X-Received: by 2002:a63:4246:: with SMTP id p67mr14751124pga.335.1545120415126; Tue, 18 Dec 2018 00:06:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545120415; cv=none; d=google.com; s=arc-20160816; b=jSzDIl8HtZqkEVcNwj3BtkocXnyC858VfKv3JqwPcwhstvYvPRbqVcDxHE857BfGS2 0W+o/G/8UdBh0EAYnmKpjTIPTf6UFnDsY7h0Ez5fGWyu7XPkbYgZ9jEip+DtMnH7mRkT AZSTHLcMF6B0MFJHlrFi6WsG49ICeWSslEX//cRTrDNN870FQJvRIobn3+4Pa/SuQST6 bJeB2LXQbEhNZxUX6/MVGp6gUF+pXLG8PVDTV9aZ1KqSh6B2AkUdb8/u4BuLaVlI3YDt pPOIFDlKb3mcw6JMJYiUEBMHfB8ly4zkrCv1voxvLLX866p4j3VXf/Z+UNQ6FmZKd+XX 3jSQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=D3bKyeo3jAVxlIMumLLKO1Nw9oQMRPP9y6vXm+NkQhc=; b=QJ31+QCQ9kArmpSAdIxYLGdpVHMNwR0U48mLTOkerW4a9nLtzK8j83rQ5F7d3Qa+8t 8C1laDDQgja17ubErEZkT5zxwh7nOHTkswqoXeOquIOjIiprIfRU0AErlqmajIZBLzLv UFQkuNWp9YHZxJHaT6gBtH77rnmQ7qjXgmjiQyAGP4avc+UStLVZGbKjA35725tFpI9L Swg2ELxJ3y0CVTO0MeJGkU3evfyoPnRTU1k+fd/QLY5NBGK4NFJEbTWwc1iW/DlvjZh1 k0Twh9HoZ1wkWgNsWQ/PCJFBvRF/Cc2fEU+D+zNKTgBSKmmfwvzBa7BM9C6V0w3/+9Z7 SCNw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BXJ3IW7u; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c5si12596792pgq.434.2018.12.18.00.06.54; Tue, 18 Dec 2018 00:06:55 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BXJ3IW7u; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726835AbeLRIGy (ORCPT + 2 others); Tue, 18 Dec 2018 03:06:54 -0500 Received: from mail-pf1-f193.google.com ([209.85.210.193]:35077 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726834AbeLRIGx (ORCPT ); Tue, 18 Dec 2018 03:06:53 -0500 Received: by mail-pf1-f193.google.com with SMTP id z9so7765657pfi.2 for ; Tue, 18 Dec 2018 00:06:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=D3bKyeo3jAVxlIMumLLKO1Nw9oQMRPP9y6vXm+NkQhc=; b=BXJ3IW7uYVqUSFHGn6zRnfhKmpfkZyk9RGGSU8gVMDkt6L1SUxV3i93NxB8DlWLJd+ 3Qs54lcPoImM9UuJ12mb252f4vEDdyhENsHSCl2sbEqRDEYAERrl4fTqVTqoqhn0q06z 44BbHOaIDGhq1lyAePS4yjP0I5A4WG3EmzMDU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=D3bKyeo3jAVxlIMumLLKO1Nw9oQMRPP9y6vXm+NkQhc=; b=kAk9pcvc07bnDnBQ72uBmOplilS5QJ6KMEAmVDZu/Ew5WDsv3hnYcS+uC5ohmtB9js vrwpCZFjO2dYkMZfjHbXGAkdW0YsF5CNtvOukGkv3dG4miJ2TVSS+Bj7I617oOLm5N1D znhrK22AASv/F9yH2eVzWIibhL4mKezMJ6R+Nd16HosMDRedOjAVM8bkrvXhNYojyLmW +RuK4Sg79h/+C/ZMdLr+cq1VBZ6JaFFm6aRt84T/aQIKDRN97hVnHUW+o7esYagGaVS9 Bv2BFWrpKlxu2xNjJtkeFbSH6nwp3/EfQ+9lMOsOLthUmWVl81EAgZcf337hz63KiHU9 IjKA== X-Gm-Message-State: AA+aEWbhXEaWsx/XxTBGGC7hvWz2YpiIervqVM+j0vRElPdzszf7Eq+3 Wx1zdK2vywN9DdXT/lPRZZrc X-Received: by 2002:a63:4d66:: with SMTP id n38mr2049614pgl.270.1545120412681; Tue, 18 Dec 2018 00:06:52 -0800 (PST) Received: from localhost.localdomain ([2409:4072:702:382e:8c68:d268:ed20:5f25]) by smtp.gmail.com with ESMTPSA id 7sm45596888pfm.8.2018.12.18.00.06.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Dec 2018 00:06:52 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v6 09/11] ARM: dts: rda8810pl: Add interrupt support for UART Date: Tue, 18 Dec 2018 13:35:25 +0530 Message-Id: <20181218080527.10801-10-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181218080527.10801-1-manivannan.sadhasivam@linaro.org> References: <20181218080527.10801-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Add interrupt support for UART in RDA Micro RDA8810PL SoC. Signed-off-by: Andreas Färber Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/rda8810pl.dtsi | 3 +++ 1 file changed, 3 insertions(+) -- 2.17.1 diff --git a/arch/arm/boot/dts/rda8810pl.dtsi b/arch/arm/boot/dts/rda8810pl.dtsi index 84baa4c0a14c..19cde895bf65 100644 --- a/arch/arm/boot/dts/rda8810pl.dtsi +++ b/arch/arm/boot/dts/rda8810pl.dtsi @@ -71,18 +71,21 @@ uart1: serial@0 { compatible = "rda,8810pl-uart"; reg = <0x0 0x1000>; + interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; uart2: serial@10000 { compatible = "rda,8810pl-uart"; reg = <0x10000 0x1000>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; uart3: serial@90000 { compatible = "rda,8810pl-uart"; reg = <0x90000 0x1000>; + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; }; From patchwork Tue Dec 18 08:05:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 154128 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3412887ljp; Tue, 18 Dec 2018 00:07:08 -0800 (PST) X-Google-Smtp-Source: AFSGD/XmUHflJNvbYnQRb0ba2NS1IeTvS+Nnpr8B7gYCYNpmBkT6+bBJ7YWErByD1ikOabmnHj9O X-Received: by 2002:a63:5c41:: with SMTP id n1mr14255152pgm.1.1545120428101; Tue, 18 Dec 2018 00:07:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545120428; cv=none; d=google.com; s=arc-20160816; b=NJrOx7CzO/LUBo9q61nMCzAeGL7bQLmkj5bISQFwhvuHZ+WTviX5YO7bTboxIJ1Tyj MgIJ0k+OOIAGqwlGG7wJY9LUebLssc/Z3hNP/eRIPOpl4uabAvYrjXJ/z3uJnRkJjoNA m1+jiiKXw1wfs7fMvv1RsxrN1Cv551DOZvITjY2ng/f766P+mfMeiOQxbJK0ugajY8Cn pXPHcCCzPNqhqZ4KPkvA70CEKipcpkignyXD2wP8xNbyvEKbvTONC2gYhgRxDvJ3RqbN IagyKXMzpXQXbFXQoQnQgExIqoVdQn9LsWv8Gs9+BMcbCb9l4rMoZu/HniPdswGdPvxD u6Lg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=bpa0I/YhnzBcdzs3JkVMyNimUM8qKGedLIepD8045n0=; b=SGxDJWVAMcUkGZcs+DhJu+6o+KI3lF+wcqqwF84wDugEKvpT9G++rvFN6YM2ERWE28 JxuWl7iVfAY7XTvO/Fg5h5pkqbzBKCXgCjDGWCpC+4bKB9IQKlMBLwyItbE2plgT2+nQ T3XZuv17zG+vXp8u2bfZ5vLCXoeBWdVKwZQfHUnK967M+cIdkMgW+zh5nummMrb0VHRf Zmud0nOHMYXJ7TWT+YQPIFFtIY6WYFCLc2jgiq348RpSDwVrF+Tbl9ihXfLZzCrqP8to CAdzTBV4/Gh1FK1AGuAIn7GFmfPS2ASKDLQ9BUDf7YLJ/h53+JWdScjY7t/LMi3/ABZl jOyQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DmDld7BI; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 33si10422617pls.408.2018.12.18.00.07.07; Tue, 18 Dec 2018 00:07:08 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DmDld7BI; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726557AbeLRIHH (ORCPT + 2 others); Tue, 18 Dec 2018 03:07:07 -0500 Received: from mail-pf1-f195.google.com ([209.85.210.195]:36313 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726852AbeLRIHD (ORCPT ); Tue, 18 Dec 2018 03:07:03 -0500 Received: by mail-pf1-f195.google.com with SMTP id b85so7763188pfc.3 for ; Tue, 18 Dec 2018 00:07:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bpa0I/YhnzBcdzs3JkVMyNimUM8qKGedLIepD8045n0=; b=DmDld7BILC2mBTrbEZPsyBlUgT3K3sgmVwrdtxin3vo+qq9eiGqhki46ojg7Zy9qvu WK/jhEnI+9WmHwLL8t/bROqAYNXY2RUfiO+KYF27f6GjaLLaOidZ/2m/TE+MsQ7ogssa ONyI74TJqJJb+dpI/kmkBK+uvH6yqtFgfsayM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bpa0I/YhnzBcdzs3JkVMyNimUM8qKGedLIepD8045n0=; b=YWyo9pHnZSxVpxN/PAE+fFC66enKigbsyDuRZ9kkRNdcaHttNCPHi/8yA77mKVx7AB N2XpzDCF6PTDjutr/c6fRlkzFkXheTYFFJ/c/g9C+PzthjObh10cuZYubU+aCulm+NWO zYTz2G9a8dVfFSINW2g9otWpvQ+ATzXmYIWJ2Kq7LksQnthVfJHFKqwSbHFMES3r42FO 3nVq3SbYiREJnQ3FM4F1a7xoXx0d9ghvV9bl7wXBmMt36MFgdhllrHaFZuSOVLgusF7c HY1jPtk8T/IHLb8ATzVYCrg2OTo9+Sh373wqjx6pSxHBVDFqybB2HQuy5Zjex8d8PLaX nVMg== X-Gm-Message-State: AA+aEWb/WUyVvbRFy2jYBgBtnnZ4wJVSZAJl1OLQEITg4pYestEa4y2f qruDKE2RC0VQJMK2ZVspDt9S X-Received: by 2002:a62:6a88:: with SMTP id f130mr15939721pfc.201.1545120421275; Tue, 18 Dec 2018 00:07:01 -0800 (PST) Received: from localhost.localdomain ([2409:4072:702:382e:8c68:d268:ed20:5f25]) by smtp.gmail.com with ESMTPSA id 7sm45596888pfm.8.2018.12.18.00.06.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Dec 2018 00:07:00 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v6 10/11] tty: serial: Add RDA8810PL UART driver Date: Tue, 18 Dec 2018 13:35:26 +0530 Message-Id: <20181218080527.10801-11-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181218080527.10801-1-manivannan.sadhasivam@linaro.org> References: <20181218080527.10801-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Add UART driver for RDA Micro RDA8810PL SoC. Signed-off-by: Andreas Färber Signed-off-by: Manivannan Sadhasivam Reviewed-by: Greg Kroah-Hartman --- .../admin-guide/kernel-parameters.txt | 6 + drivers/tty/serial/Kconfig | 19 + drivers/tty/serial/Makefile | 1 + drivers/tty/serial/rda-uart.c | 831 ++++++++++++++++++ include/uapi/linux/serial_core.h | 3 + 5 files changed, 860 insertions(+) create mode 100644 drivers/tty/serial/rda-uart.c -- 2.17.1 diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 81d1d5a74728..07078880f7fd 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -1020,6 +1020,12 @@ specified address. The serial port must already be setup and configured. Options are not yet supported. + rda, + Start an early, polled-mode console on a serial port + of an RDA Micro SoC, such as RDA8810PL, at the + specified address. The serial port must already be + setup and configured. Options are not yet supported. + smh Use ARM semihosting calls for early console. s3c2410, diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index 32886c304641..67b9bf3b500e 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -1529,6 +1529,25 @@ config SERIAL_OWL_CONSOLE Say 'Y' here if you wish to use Actions Semiconductor S500/S900 UART as the system console. +config SERIAL_RDA + bool "RDA Micro serial port support" + depends on ARCH_RDA || COMPILE_TEST + select SERIAL_CORE + help + This driver is for RDA8810PL SoC's UART. + Say 'Y' here if you wish to use the on-board serial port. + Otherwise, say 'N'. + +config SERIAL_RDA_CONSOLE + bool "Console on RDA Micro serial port" + depends on SERIAL_RDA=y + select SERIAL_CORE_CONSOLE + select SERIAL_EARLYCON + default y + help + Say 'Y' here if you wish to use the RDA8810PL UART as the system + console. Only earlycon is implemented currently. + endmenu config SERIAL_MCTRL_GPIO diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile index daac675612df..8c303736b7e8 100644 --- a/drivers/tty/serial/Makefile +++ b/drivers/tty/serial/Makefile @@ -89,6 +89,7 @@ obj-$(CONFIG_SERIAL_MVEBU_UART) += mvebu-uart.o obj-$(CONFIG_SERIAL_PIC32) += pic32_uart.o obj-$(CONFIG_SERIAL_MPS2_UART) += mps2-uart.o obj-$(CONFIG_SERIAL_OWL) += owl-uart.o +obj-$(CONFIG_SERIAL_RDA) += rda-uart.o # GPIOLIB helpers for modem control lines obj-$(CONFIG_SERIAL_MCTRL_GPIO) += serial_mctrl_gpio.o diff --git a/drivers/tty/serial/rda-uart.c b/drivers/tty/serial/rda-uart.c new file mode 100644 index 000000000000..284623eefaeb --- /dev/null +++ b/drivers/tty/serial/rda-uart.c @@ -0,0 +1,831 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * RDA8810PL serial device driver + * + * Copyright RDA Microelectronics Company Limited + * Copyright (c) 2017 Andreas Färber + * Copyright (c) 2018 Manivannan Sadhasivam + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RDA_UART_PORT_NUM 3 +#define RDA_UART_DEV_NAME "ttyRDA" + +#define RDA_UART_CTRL 0x00 +#define RDA_UART_STATUS 0x04 +#define RDA_UART_RXTX_BUFFER 0x08 +#define RDA_UART_IRQ_MASK 0x0c +#define RDA_UART_IRQ_CAUSE 0x10 +#define RDA_UART_IRQ_TRIGGERS 0x14 +#define RDA_UART_CMD_SET 0x18 +#define RDA_UART_CMD_CLR 0x1c + +/* UART_CTRL Bits */ +#define RDA_UART_ENABLE BIT(0) +#define RDA_UART_DBITS_8 BIT(1) +#define RDA_UART_TX_SBITS_2 BIT(2) +#define RDA_UART_PARITY_EN BIT(3) +#define RDA_UART_PARITY(x) (((x) & 0x3) << 4) +#define RDA_UART_PARITY_ODD RDA_UART_PARITY(0) +#define RDA_UART_PARITY_EVEN RDA_UART_PARITY(1) +#define RDA_UART_PARITY_SPACE RDA_UART_PARITY(2) +#define RDA_UART_PARITY_MARK RDA_UART_PARITY(3) +#define RDA_UART_DIV_MODE BIT(20) +#define RDA_UART_IRDA_EN BIT(21) +#define RDA_UART_DMA_EN BIT(22) +#define RDA_UART_FLOW_CNT_EN BIT(23) +#define RDA_UART_LOOP_BACK_EN BIT(24) +#define RDA_UART_RX_LOCK_ERR BIT(25) +#define RDA_UART_RX_BREAK_LEN(x) (((x) & 0xf) << 28) + +/* UART_STATUS Bits */ +#define RDA_UART_RX_FIFO(x) (((x) & 0x7f) << 0) +#define RDA_UART_RX_FIFO_MASK (0x7f << 0) +#define RDA_UART_TX_FIFO(x) (((x) & 0x1f) << 8) +#define RDA_UART_TX_FIFO_MASK (0x1f << 8) +#define RDA_UART_TX_ACTIVE BIT(14) +#define RDA_UART_RX_ACTIVE BIT(15) +#define RDA_UART_RX_OVERFLOW_ERR BIT(16) +#define RDA_UART_TX_OVERFLOW_ERR BIT(17) +#define RDA_UART_RX_PARITY_ERR BIT(18) +#define RDA_UART_RX_FRAMING_ERR BIT(19) +#define RDA_UART_RX_BREAK_INT BIT(20) +#define RDA_UART_DCTS BIT(24) +#define RDA_UART_CTS BIT(25) +#define RDA_UART_DTR BIT(28) +#define RDA_UART_CLK_ENABLED BIT(31) + +/* UART_RXTX_BUFFER Bits */ +#define RDA_UART_RX_DATA(x) (((x) & 0xff) << 0) +#define RDA_UART_TX_DATA(x) (((x) & 0xff) << 0) + +/* UART_IRQ_MASK Bits */ +#define RDA_UART_TX_MODEM_STATUS BIT(0) +#define RDA_UART_RX_DATA_AVAILABLE BIT(1) +#define RDA_UART_TX_DATA_NEEDED BIT(2) +#define RDA_UART_RX_TIMEOUT BIT(3) +#define RDA_UART_RX_LINE_ERR BIT(4) +#define RDA_UART_TX_DMA_DONE BIT(5) +#define RDA_UART_RX_DMA_DONE BIT(6) +#define RDA_UART_RX_DMA_TIMEOUT BIT(7) +#define RDA_UART_DTR_RISE BIT(8) +#define RDA_UART_DTR_FALL BIT(9) + +/* UART_IRQ_CAUSE Bits */ +#define RDA_UART_TX_MODEM_STATUS_U BIT(16) +#define RDA_UART_RX_DATA_AVAILABLE_U BIT(17) +#define RDA_UART_TX_DATA_NEEDED_U BIT(18) +#define RDA_UART_RX_TIMEOUT_U BIT(19) +#define RDA_UART_RX_LINE_ERR_U BIT(20) +#define RDA_UART_TX_DMA_DONE_U BIT(21) +#define RDA_UART_RX_DMA_DONE_U BIT(22) +#define RDA_UART_RX_DMA_TIMEOUT_U BIT(23) +#define RDA_UART_DTR_RISE_U BIT(24) +#define RDA_UART_DTR_FALL_U BIT(25) + +/* UART_TRIGGERS Bits */ +#define RDA_UART_RX_TRIGGER(x) (((x) & 0x1f) << 0) +#define RDA_UART_TX_TRIGGER(x) (((x) & 0xf) << 8) +#define RDA_UART_AFC_LEVEL(x) (((x) & 0x1f) << 16) + +/* UART_CMD_SET Bits */ +#define RDA_UART_RI BIT(0) +#define RDA_UART_DCD BIT(1) +#define RDA_UART_DSR BIT(2) +#define RDA_UART_TX_BREAK_CONTROL BIT(3) +#define RDA_UART_TX_FINISH_N_WAIT BIT(4) +#define RDA_UART_RTS BIT(5) +#define RDA_UART_RX_FIFO_RESET BIT(6) +#define RDA_UART_TX_FIFO_RESET BIT(7) + +#define RDA_UART_TX_FIFO_SIZE 16 + +static struct uart_driver rda_uart_driver; + +struct rda_uart_port { + struct uart_port port; + struct clk *clk; +}; + +#define to_rda_uart_port(port) container_of(port, struct rda_uart_port, port) + +static struct rda_uart_port *rda_uart_ports[RDA_UART_PORT_NUM]; + +static inline void rda_uart_write(struct uart_port *port, u32 val, + unsigned int off) +{ + writel(val, port->membase + off); +} + +static inline u32 rda_uart_read(struct uart_port *port, unsigned int off) +{ + return readl(port->membase + off); +} + +static unsigned int rda_uart_tx_empty(struct uart_port *port) +{ + unsigned long flags; + unsigned int ret; + u32 val; + + spin_lock_irqsave(&port->lock, flags); + + val = rda_uart_read(port, RDA_UART_STATUS); + ret = (val & RDA_UART_TX_FIFO_MASK) ? TIOCSER_TEMT : 0; + + spin_unlock_irqrestore(&port->lock, flags); + + return ret; +} + +static unsigned int rda_uart_get_mctrl(struct uart_port *port) +{ + unsigned int mctrl = 0; + u32 cmd_set, status; + + cmd_set = rda_uart_read(port, RDA_UART_CMD_SET); + status = rda_uart_read(port, RDA_UART_STATUS); + if (cmd_set & RDA_UART_RTS) + mctrl |= TIOCM_RTS; + if (!(status & RDA_UART_CTS)) + mctrl |= TIOCM_CTS; + + return mctrl; +} + +static void rda_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) +{ + u32 val; + + if (mctrl & TIOCM_RTS) { + val = rda_uart_read(port, RDA_UART_CMD_SET); + rda_uart_write(port, (val | RDA_UART_RTS), RDA_UART_CMD_SET); + } else { + /* Clear RTS to stop to receive. */ + val = rda_uart_read(port, RDA_UART_CMD_CLR); + rda_uart_write(port, (val | RDA_UART_RTS), RDA_UART_CMD_CLR); + } + + val = rda_uart_read(port, RDA_UART_CTRL); + + if (mctrl & TIOCM_LOOP) + val |= RDA_UART_LOOP_BACK_EN; + else + val &= ~RDA_UART_LOOP_BACK_EN; + + rda_uart_write(port, val, RDA_UART_CTRL); +} + +static void rda_uart_stop_tx(struct uart_port *port) +{ + u32 val; + + val = rda_uart_read(port, RDA_UART_IRQ_MASK); + val &= ~RDA_UART_TX_DATA_NEEDED; + rda_uart_write(port, val, RDA_UART_IRQ_MASK); + + val = rda_uart_read(port, RDA_UART_CMD_SET); + val |= RDA_UART_TX_FIFO_RESET; + rda_uart_write(port, val, RDA_UART_CMD_SET); +} + +static void rda_uart_stop_rx(struct uart_port *port) +{ + u32 val; + + val = rda_uart_read(port, RDA_UART_IRQ_MASK); + val &= ~(RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT); + rda_uart_write(port, val, RDA_UART_IRQ_MASK); + + /* Read Rx buffer before reset to avoid Rx timeout interrupt */ + val = rda_uart_read(port, RDA_UART_RXTX_BUFFER); + + val = rda_uart_read(port, RDA_UART_CMD_SET); + val |= RDA_UART_RX_FIFO_RESET; + rda_uart_write(port, val, RDA_UART_CMD_SET); +} + +static void rda_uart_start_tx(struct uart_port *port) +{ + u32 val; + + if (uart_tx_stopped(port)) { + rda_uart_stop_tx(port); + return; + } + + val = rda_uart_read(port, RDA_UART_IRQ_MASK); + val |= RDA_UART_TX_DATA_NEEDED; + rda_uart_write(port, val, RDA_UART_IRQ_MASK); +} + +static void rda_uart_change_baudrate(struct rda_uart_port *rda_port, + unsigned long baud) +{ + clk_set_rate(rda_port->clk, baud * 8); +} + +static void rda_uart_set_termios(struct uart_port *port, + struct ktermios *termios, + struct ktermios *old) +{ + struct rda_uart_port *rda_port = to_rda_uart_port(port); + unsigned long flags; + unsigned int ctrl, cmd_set, cmd_clr, triggers; + unsigned int baud; + u32 irq_mask; + + spin_lock_irqsave(&port->lock, flags); + + baud = uart_get_baud_rate(port, termios, old, 9600, port->uartclk / 4); + rda_uart_change_baudrate(rda_port, baud); + + ctrl = rda_uart_read(port, RDA_UART_CTRL); + cmd_set = rda_uart_read(port, RDA_UART_CMD_SET); + cmd_clr = rda_uart_read(port, RDA_UART_CMD_CLR); + + switch (termios->c_cflag & CSIZE) { + case CS5: + case CS6: + dev_warn(port->dev, "bit size not supported, using 7 bits\n"); + /* Fall through */ + case CS7: + ctrl &= ~RDA_UART_DBITS_8; + break; + default: + ctrl |= RDA_UART_DBITS_8; + break; + } + + /* stop bits */ + if (termios->c_cflag & CSTOPB) + ctrl |= RDA_UART_TX_SBITS_2; + else + ctrl &= ~RDA_UART_TX_SBITS_2; + + /* parity check */ + if (termios->c_cflag & PARENB) { + ctrl |= RDA_UART_PARITY_EN; + + /* Mark or Space parity */ + if (termios->c_cflag & CMSPAR) { + if (termios->c_cflag & PARODD) + ctrl |= RDA_UART_PARITY_MARK; + else + ctrl |= RDA_UART_PARITY_SPACE; + } else if (termios->c_cflag & PARODD) { + ctrl |= RDA_UART_PARITY_ODD; + } else { + ctrl |= RDA_UART_PARITY_EVEN; + } + } else { + ctrl &= ~RDA_UART_PARITY_EN; + } + + /* Hardware handshake (RTS/CTS) */ + if (termios->c_cflag & CRTSCTS) { + ctrl |= RDA_UART_FLOW_CNT_EN; + cmd_set |= RDA_UART_RTS; + } else { + ctrl &= ~RDA_UART_FLOW_CNT_EN; + cmd_clr |= RDA_UART_RTS; + } + + ctrl |= RDA_UART_ENABLE; + ctrl &= ~RDA_UART_DMA_EN; + + triggers = (RDA_UART_AFC_LEVEL(20) | RDA_UART_RX_TRIGGER(16)); + irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK); + rda_uart_write(port, 0, RDA_UART_IRQ_MASK); + + rda_uart_write(port, triggers, RDA_UART_IRQ_TRIGGERS); + rda_uart_write(port, ctrl, RDA_UART_CTRL); + rda_uart_write(port, cmd_set, RDA_UART_CMD_SET); + rda_uart_write(port, cmd_clr, RDA_UART_CMD_CLR); + + rda_uart_write(port, irq_mask, RDA_UART_IRQ_MASK); + + /* Don't rewrite B0 */ + if (tty_termios_baud_rate(termios)) + tty_termios_encode_baud_rate(termios, baud, baud); + + /* update the per-port timeout */ + uart_update_timeout(port, termios->c_cflag, baud); + + spin_unlock_irqrestore(&port->lock, flags); +} + +static void rda_uart_send_chars(struct uart_port *port) +{ + struct circ_buf *xmit = &port->state->xmit; + unsigned int ch; + u32 val; + + if (uart_tx_stopped(port)) + return; + + if (port->x_char) { + while (!(rda_uart_read(port, RDA_UART_STATUS) & + RDA_UART_TX_FIFO_MASK)) + cpu_relax(); + + rda_uart_write(port, port->x_char, RDA_UART_RXTX_BUFFER); + port->icount.tx++; + port->x_char = 0; + } + + while (rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK) { + if (uart_circ_empty(xmit)) + break; + + ch = xmit->buf[xmit->tail]; + rda_uart_write(port, ch, RDA_UART_RXTX_BUFFER); + xmit->tail = (xmit->tail + 1) & (SERIAL_XMIT_SIZE - 1); + port->icount.tx++; + } + + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) + uart_write_wakeup(port); + + if (!uart_circ_empty(xmit)) { + /* Re-enable Tx FIFO interrupt */ + val = rda_uart_read(port, RDA_UART_IRQ_MASK); + val |= RDA_UART_TX_DATA_NEEDED; + rda_uart_write(port, val, RDA_UART_IRQ_MASK); + } +} + +static void rda_uart_receive_chars(struct uart_port *port) +{ + u32 status, val; + + status = rda_uart_read(port, RDA_UART_STATUS); + while ((status & RDA_UART_RX_FIFO_MASK)) { + char flag = TTY_NORMAL; + + if (status & RDA_UART_RX_PARITY_ERR) { + port->icount.parity++; + flag = TTY_PARITY; + } + + if (status & RDA_UART_RX_FRAMING_ERR) { + port->icount.frame++; + flag = TTY_FRAME; + } + + if (status & RDA_UART_RX_OVERFLOW_ERR) { + port->icount.overrun++; + flag = TTY_OVERRUN; + } + + val = rda_uart_read(port, RDA_UART_RXTX_BUFFER); + val &= 0xff; + + port->icount.rx++; + tty_insert_flip_char(&port->state->port, val, flag); + + status = rda_uart_read(port, RDA_UART_STATUS); + } + + spin_unlock(&port->lock); + tty_flip_buffer_push(&port->state->port); + spin_lock(&port->lock); +} + +static irqreturn_t rda_interrupt(int irq, void *dev_id) +{ + struct uart_port *port = dev_id; + unsigned long flags; + u32 val, irq_mask; + + spin_lock_irqsave(&port->lock, flags); + + /* Clear IRQ cause */ + val = rda_uart_read(port, RDA_UART_IRQ_CAUSE); + rda_uart_write(port, val, RDA_UART_IRQ_CAUSE); + + if (val & (RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT)) + rda_uart_receive_chars(port); + + if (val & (RDA_UART_TX_DATA_NEEDED)) { + irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK); + irq_mask &= ~RDA_UART_TX_DATA_NEEDED; + rda_uart_write(port, irq_mask, RDA_UART_IRQ_MASK); + + rda_uart_send_chars(port); + } + + spin_unlock_irqrestore(&port->lock, flags); + + return IRQ_HANDLED; +} + +static int rda_uart_startup(struct uart_port *port) +{ + unsigned long flags; + int ret; + u32 val; + + spin_lock_irqsave(&port->lock, flags); + rda_uart_write(port, 0, RDA_UART_IRQ_MASK); + spin_unlock_irqrestore(&port->lock, flags); + + ret = request_irq(port->irq, rda_interrupt, IRQF_NO_SUSPEND, + "rda-uart", port); + if (ret) + return ret; + + spin_lock_irqsave(&port->lock, flags); + + val = rda_uart_read(port, RDA_UART_CTRL); + val |= RDA_UART_ENABLE; + rda_uart_write(port, val, RDA_UART_CTRL); + + /* enable rx interrupt */ + val = rda_uart_read(port, RDA_UART_IRQ_MASK); + val |= (RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT); + rda_uart_write(port, val, RDA_UART_IRQ_MASK); + + spin_unlock_irqrestore(&port->lock, flags); + + return 0; +} + +static void rda_uart_shutdown(struct uart_port *port) +{ + unsigned long flags; + u32 val; + + spin_lock_irqsave(&port->lock, flags); + + rda_uart_stop_tx(port); + rda_uart_stop_rx(port); + + val = rda_uart_read(port, RDA_UART_CTRL); + val &= ~RDA_UART_ENABLE; + rda_uart_write(port, val, RDA_UART_CTRL); + + spin_unlock_irqrestore(&port->lock, flags); +} + +static const char *rda_uart_type(struct uart_port *port) +{ + return (port->type == PORT_RDA) ? "rda-uart" : NULL; +} + +static int rda_uart_request_port(struct uart_port *port) +{ + struct platform_device *pdev = to_platform_device(port->dev); + struct resource *res; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENXIO; + + if (!devm_request_mem_region(port->dev, port->mapbase, + resource_size(res), dev_name(port->dev))) + return -EBUSY; + + if (port->flags & UPF_IOREMAP) { + port->membase = devm_ioremap_nocache(port->dev, port->mapbase, + resource_size(res)); + if (!port->membase) + return -EBUSY; + } + + return 0; +} + +static void rda_uart_config_port(struct uart_port *port, int flags) +{ + unsigned long irq_flags; + + if (flags & UART_CONFIG_TYPE) { + port->type = PORT_RDA; + rda_uart_request_port(port); + } + + spin_lock_irqsave(&port->lock, irq_flags); + + /* Clear mask, so no surprise interrupts. */ + rda_uart_write(port, 0, RDA_UART_IRQ_MASK); + + /* Clear status register */ + rda_uart_write(port, 0, RDA_UART_STATUS); + + spin_unlock_irqrestore(&port->lock, irq_flags); +} + +static void rda_uart_release_port(struct uart_port *port) +{ + struct platform_device *pdev = to_platform_device(port->dev); + struct resource *res; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return; + + if (port->flags & UPF_IOREMAP) { + devm_release_mem_region(port->dev, port->mapbase, + resource_size(res)); + devm_iounmap(port->dev, port->membase); + port->membase = NULL; + } +} + +static int rda_uart_verify_port(struct uart_port *port, + struct serial_struct *ser) +{ + if (port->type != PORT_RDA) + return -EINVAL; + + if (port->irq != ser->irq) + return -EINVAL; + + return 0; +} + +static const struct uart_ops rda_uart_ops = { + .tx_empty = rda_uart_tx_empty, + .get_mctrl = rda_uart_get_mctrl, + .set_mctrl = rda_uart_set_mctrl, + .start_tx = rda_uart_start_tx, + .stop_tx = rda_uart_stop_tx, + .stop_rx = rda_uart_stop_rx, + .startup = rda_uart_startup, + .shutdown = rda_uart_shutdown, + .set_termios = rda_uart_set_termios, + .type = rda_uart_type, + .request_port = rda_uart_request_port, + .release_port = rda_uart_release_port, + .config_port = rda_uart_config_port, + .verify_port = rda_uart_verify_port, +}; + +#ifdef CONFIG_SERIAL_RDA_CONSOLE + +static void rda_console_putchar(struct uart_port *port, int ch) +{ + if (!port->membase) + return; + + while (!(rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK)) + cpu_relax(); + + rda_uart_write(port, ch, RDA_UART_RXTX_BUFFER); +} + +static void rda_uart_port_write(struct uart_port *port, const char *s, + u_int count) +{ + u32 old_irq_mask; + unsigned long flags; + int locked; + + local_irq_save(flags); + + if (port->sysrq) { + locked = 0; + } else if (oops_in_progress) { + locked = spin_trylock(&port->lock); + } else { + spin_lock(&port->lock); + locked = 1; + } + + old_irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK); + rda_uart_write(port, 0, RDA_UART_IRQ_MASK); + + uart_console_write(port, s, count, rda_console_putchar); + + /* wait until all contents have been sent out */ + while (!(rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK)) + cpu_relax(); + + rda_uart_write(port, old_irq_mask, RDA_UART_IRQ_MASK); + + if (locked) + spin_unlock(&port->lock); + + local_irq_restore(flags); +} + +static void rda_uart_console_write(struct console *co, const char *s, + u_int count) +{ + struct rda_uart_port *rda_port; + + rda_port = rda_uart_ports[co->index]; + if (!rda_port) + return; + + rda_uart_port_write(&rda_port->port, s, count); +} + +static int rda_uart_console_setup(struct console *co, char *options) +{ + struct rda_uart_port *rda_port; + int baud = 921600; + int bits = 8; + int parity = 'n'; + int flow = 'n'; + + if (co->index < 0 || co->index >= RDA_UART_PORT_NUM) + return -EINVAL; + + rda_port = rda_uart_ports[co->index]; + if (!rda_port || !rda_port->port.membase) + return -ENODEV; + + if (options) + uart_parse_options(options, &baud, &parity, &bits, &flow); + + return uart_set_options(&rda_port->port, co, baud, parity, bits, flow); +} + +static struct console rda_uart_console = { + .name = RDA_UART_DEV_NAME, + .write = rda_uart_console_write, + .device = uart_console_device, + .setup = rda_uart_console_setup, + .flags = CON_PRINTBUFFER, + .index = -1, + .data = &rda_uart_driver, +}; + +static int __init rda_uart_console_init(void) +{ + register_console(&rda_uart_console); + + return 0; +} +console_initcall(rda_uart_console_init); + +static void rda_uart_early_console_write(struct console *co, + const char *s, + u_int count) +{ + struct earlycon_device *dev = co->data; + + rda_uart_port_write(&dev->port, s, count); +} + +static int __init +rda_uart_early_console_setup(struct earlycon_device *device, const char *opt) +{ + if (!device->port.membase) + return -ENODEV; + + device->con->write = rda_uart_early_console_write; + + return 0; +} + +OF_EARLYCON_DECLARE(rda, "rda,8810pl-uart", + rda_uart_early_console_setup); + +#define RDA_UART_CONSOLE (&rda_uart_console) +#else +#define RDA_UART_CONSOLE NULL +#endif /* CONFIG_SERIAL_RDA_CONSOLE */ + +static struct uart_driver rda_uart_driver = { + .owner = THIS_MODULE, + .driver_name = "rda-uart", + .dev_name = RDA_UART_DEV_NAME, + .nr = RDA_UART_PORT_NUM, + .cons = RDA_UART_CONSOLE, +}; + +static const struct of_device_id rda_uart_dt_matches[] = { + { .compatible = "rda,8810pl-uart" }, + { } +}; +MODULE_DEVICE_TABLE(of, rda_uart_dt_matches); + +static int rda_uart_probe(struct platform_device *pdev) +{ + struct resource *res_mem; + struct rda_uart_port *rda_port; + int ret, irq; + + if (pdev->dev.of_node) + pdev->id = of_alias_get_id(pdev->dev.of_node, "serial"); + + if (pdev->id < 0 || pdev->id >= RDA_UART_PORT_NUM) { + dev_err(&pdev->dev, "id %d out of range\n", pdev->id); + return -EINVAL; + } + + res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res_mem) { + dev_err(&pdev->dev, "could not get mem\n"); + return -ENODEV; + } + + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + dev_err(&pdev->dev, "could not get irq\n"); + return irq; + } + + if (rda_uart_ports[pdev->id]) { + dev_err(&pdev->dev, "port %d already allocated\n", pdev->id); + return -EBUSY; + } + + rda_port = devm_kzalloc(&pdev->dev, sizeof(*rda_port), GFP_KERNEL); + if (!rda_port) + return -ENOMEM; + + rda_port->clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(rda_port->clk)) { + dev_err(&pdev->dev, "could not get clk\n"); + return PTR_ERR(rda_port->clk); + } + + rda_port->port.dev = &pdev->dev; + rda_port->port.regshift = 0; + rda_port->port.line = pdev->id; + rda_port->port.type = PORT_RDA; + rda_port->port.iotype = UPIO_MEM; + rda_port->port.mapbase = res_mem->start; + rda_port->port.irq = irq; + rda_port->port.uartclk = clk_get_rate(rda_port->clk); + if (rda_port->port.uartclk == 0) { + dev_err(&pdev->dev, "clock rate is zero\n"); + return -EINVAL; + } + rda_port->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | + UPF_LOW_LATENCY; + rda_port->port.x_char = 0; + rda_port->port.fifosize = RDA_UART_TX_FIFO_SIZE; + rda_port->port.ops = &rda_uart_ops; + + rda_uart_ports[pdev->id] = rda_port; + platform_set_drvdata(pdev, rda_port); + + ret = uart_add_one_port(&rda_uart_driver, &rda_port->port); + if (ret) + rda_uart_ports[pdev->id] = NULL; + + return ret; +} + +static int rda_uart_remove(struct platform_device *pdev) +{ + struct rda_uart_port *rda_port = platform_get_drvdata(pdev); + + uart_remove_one_port(&rda_uart_driver, &rda_port->port); + rda_uart_ports[pdev->id] = NULL; + + return 0; +} + +static struct platform_driver rda_uart_platform_driver = { + .probe = rda_uart_probe, + .remove = rda_uart_remove, + .driver = { + .name = "rda-uart", + .of_match_table = rda_uart_dt_matches, + }, +}; + +static int __init rda_uart_init(void) +{ + int ret; + + ret = uart_register_driver(&rda_uart_driver); + if (ret) + return ret; + + ret = platform_driver_register(&rda_uart_platform_driver); + if (ret) + uart_unregister_driver(&rda_uart_driver); + + return ret; +} + +static void __init rda_uart_exit(void) +{ + platform_driver_unregister(&rda_uart_platform_driver); + uart_unregister_driver(&rda_uart_driver); +} + +module_init(rda_uart_init); +module_exit(rda_uart_exit); + +MODULE_AUTHOR("Manivannan Sadhasivam "); +MODULE_DESCRIPTION("RDA8810PL serial device driver"); +MODULE_LICENSE("GPL"); diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h index dce5f9dae121..df4a7534e239 100644 --- a/include/uapi/linux/serial_core.h +++ b/include/uapi/linux/serial_core.h @@ -281,4 +281,7 @@ /* MediaTek BTIF */ #define PORT_MTK_BTIF 117 +/* RDA UART */ +#define PORT_RDA 118 + #endif /* _UAPILINUX_SERIAL_CORE_H */