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[94.253.165.71]) by smtp.googlemail.com with ESMTPSA id y17-20020a17090614d100b006f3ef214dd4sm2120383ejc.58.2022.05.19.06.30.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 May 2022 06:30:18 -0700 (PDT) From: Robert Marko To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, konrad.dybcio@somainline.org Cc: Robert Marko , Krzysztof Kozlowski Subject: [PATCH v5 1/7] dt-bindings: regulator: qcom,spmi-regulator: Convert to dtschema Date: Thu, 19 May 2022 15:30:09 +0200 Message-Id: <20220519133015.484639-1-robimarko@gmail.com> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Convert the bindings of Qualcomm SPMI regulators to DT schema. Signed-off-by: Robert Marko Reviewed-by: Krzysztof Kozlowski --- Changes in v4: * Remove blank interrupts and interrupt-names as generic properties to only allow them per compatible Changes in v3: * Remove quotes around refs * Use much stricter regex for regulator node matching * Add supply matching per compatible * Add blank interrupts and interrupt-names as generic properties Changes in v2: * Remove the forgotten text bindings * Move allOf after patternProperties * Use my private email as the maintainer email I am aware that syscon alone is not really acceptable, its converted directly from the old text bindings. Any advice on how to solve this is appreciated. --- .../regulator/qcom,spmi-regulator.txt | 347 ------------------ .../regulator/qcom,spmi-regulator.yaml | 337 +++++++++++++++++ 2 files changed, 337 insertions(+), 347 deletions(-) delete mode 100644 Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt create mode 100644 Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml diff --git a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt deleted file mode 100644 index c2a39b121b1b..000000000000 --- a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt +++ /dev/null @@ -1,347 +0,0 @@ -Qualcomm SPMI Regulators - -- compatible: - Usage: required - Value type: - Definition: must be one of: - "qcom,pm8004-regulators" - "qcom,pm8005-regulators" - "qcom,pm8226-regulators" - "qcom,pm8841-regulators" - "qcom,pm8916-regulators" - "qcom,pm8941-regulators" - "qcom,pm8950-regulators" - "qcom,pm8994-regulators" - "qcom,pmi8994-regulators" - "qcom,pm660-regulators" - "qcom,pm660l-regulators" - "qcom,pms405-regulators" - -- interrupts: - Usage: optional - Value type: - Definition: List of OCP interrupts. - -- interrupt-names: - Usage: required if 'interrupts' property present - Value type: - Definition: List of strings defining the names of the - interrupts in the 'interrupts' property 1-to-1. - Supported values are "ocp-", where - corresponds to a voltage switch - type regulator. - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_s5-supply: -- vdd_s6-supply: -- vdd_s7-supply: -- vdd_s8-supply: - Usage: optional (pm8841 only) - Value type: - Definition: Reference to regulator supplying the input pin, as - described in the data sheet. - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_l1_l3-supply: -- vdd_l2-supply: -- vdd_l4_l5_l6-supply: -- vdd_l7-supply: -- vdd_l8_l11_l14_l15_l16-supply: -- vdd_l9_l10_l12_l13_l17_l18-supply: - Usage: optional (pm8916 only) - Value type: - Definition: Reference to regulator supplying the input pin, as - described in the data sheet. - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_l1_l3-supply: -- vdd_l2_lvs_1_2_3-supply: -- vdd_l4_l11-supply: -- vdd_l5_l7-supply: -- vdd_l6_l12_l14_l15-supply: -- vdd_l8_l16_l18_19-supply: -- vdd_l9_l10_l17_l22-supply: -- vdd_l13_l20_l23_l24-supply: -- vdd_l21-supply: -- vin_5vs-supply: - Usage: optional (pm8941 only) - Value type: - Definition: Reference to regulator supplying the input pin, as - described in the data sheet. - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_s4-supply: -- vdd_s5-supply: -- vdd_s6-supply: -- vdd_l1_l19-supply: -- vdd_l2_l23-supply: -- vdd_l3-supply: -- vdd_l4_l5_l6_l7_l16-supply: -- vdd_l8_l11_l12_l17_l22-supply: -- vdd_l9_l10_l13_l14_l15_l18-supply: -- vdd_l20-supply: -- vdd_l21-supply: - Usage: optional (pm8950 only) - Value type: - Definition: reference to regulator supplying the input pin, as - described in the data sheet - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_s5-supply: -- vdd_s6-supply: -- vdd_s7-supply: -- vdd_s8-supply: -- vdd_s9-supply: -- vdd_s10-supply: -- vdd_s11-supply: -- vdd_s12-supply: -- vdd_l1-supply: -- vdd_l2_l26_l28-supply: -- vdd_l3_l11-supply: -- vdd_l4_l27_l31-supply: -- vdd_l5_l7-supply: -- vdd_l6_l12_l32-supply: -- vdd_l8_l16_l30-supply: -- vdd_l9_l10_l18_l22-supply: -- vdd_l13_l19_l23_l24-supply: -- vdd_l14_l15-supply: -- vdd_l17_l29-supply: -- vdd_l20_l21-supply: -- vdd_l25-supply: -- vdd_lvs_1_2-supply: - Usage: optional (pm8994 only) - Value type: - Definition: Reference to regulator supplying the input pin, as - described in the data sheet. - -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_l1-supply: - Usage: optional (pmi8994 only) - Value type: - Definition: Reference to regulator supplying the input pin, as - described in the data sheet. - -- vdd_l1_l6_l7-supply: -- vdd_l2_l3-supply: -- vdd_l5-supply: -- vdd_l8_l9_l10_l11_l12_l13_l14-supply: -- vdd_l15_l16_l17_l18_l19-supply: -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s5-supply: -- vdd_s6-supply: - Usage: optional (pm660 only) - Value type: - Definition: Reference to regulator supplying the input pin, as - described in the data sheet. - -- vdd_l1_l9_l10-supply: -- vdd_l2-supply: -- vdd_l3_l5_l7_l8-supply: -- vdd_l4_l6-supply: -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_s5-supply: - Usage: optional (pm660l only) - Value type: - Definition: Reference to regulator supplying the input pin, as - described in the data sheet. - -- vdd_l1_l2-supply: -- vdd_l3_l8-supply: -- vdd_l4-supply: -- vdd_l5_l6-supply: -- vdd_l10_l11_l12_l13-supply: -- vdd_l7-supply: -- vdd_l9-supply: -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: -- vdd_s5-supply - Usage: optional (pms405 only) - Value type: - Definition: Reference to regulator supplying the input pin, as - described in the data sheet. - -- qcom,saw-reg: - Usage: optional - Value type: - Description: Reference to syscon node defining the SAW registers. - - -The regulator node houses sub-nodes for each regulator within the device. Each -sub-node is identified using the node's name, with valid values listed for each -of the PMICs below. - -pm8004: - s2, s5 - -pm8005: - s1, s2, s3, s4 - -pm8841: - s1, s2, s3, s4, s5, s6, s7, s8 - -pm8916: - s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, - l14, l15, l16, l17, l18 - -pm8941: - s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, - l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, lvs1, lvs2, lvs3, - 5vs1, 5vs2 - -pm8994: - s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, l1, l2, l3, l4, l5, - l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, - l21, l22, l23, l24, l25, l26, l27, l28, l29, l30, l31, l32, lvs1, lvs2 - -pmi8994: - s1, s2, s3, l1 - -The content of each sub-node is defined by the standard binding for regulators - -see regulator.txt - with additional custom properties described below: - -- regulator-initial-mode: - Usage: optional - Value type: - Description: 2 = Set initial mode to auto mode (automatically select - between HPM and LPM); not available on boost type - regulators. - - 1 = Set initial mode to high power mode (HPM), also referred - to as NPM. HPM consumes more ground current than LPM, but - it can source significantly higher load current. HPM is not - available on boost type regulators. For voltage switch type - regulators, HPM implies that over current protection and - soft start are active all the time. - - 0 = Set initial mode to low power mode (LPM). - -- qcom,ocp-max-retries: - Usage: optional - Value type: - Description: Maximum number of times to try toggling a voltage switch - off and back on as a result of consecutive over current - events. - -- qcom,ocp-retry-delay: - Usage: optional - Value type: - Description: Time to delay in milliseconds between each voltage switch - toggle after an over current event takes place. - -- qcom,pin-ctrl-enable: - Usage: optional - Value type: - Description: Bit mask specifying which hardware pins should be used to - enable the regulator, if any; supported bits are: - 0 = ignore all hardware enable signals - BIT(0) = follow HW0_EN signal - BIT(1) = follow HW1_EN signal - BIT(2) = follow HW2_EN signal - BIT(3) = follow HW3_EN signal - -- qcom,pin-ctrl-hpm: - Usage: optional - Value type: - Description: Bit mask specifying which hardware pins should be used to - force the regulator into high power mode, if any; - supported bits are: - 0 = ignore all hardware enable signals - BIT(0) = follow HW0_EN signal - BIT(1) = follow HW1_EN signal - BIT(2) = follow HW2_EN signal - BIT(3) = follow HW3_EN signal - BIT(4) = follow PMIC awake state - -- qcom,vs-soft-start-strength: - Usage: optional - Value type: - Description: This property sets the soft start strength for voltage - switch type regulators; supported values are: - 0 = 0.05 uA - 1 = 0.25 uA - 2 = 0.55 uA - 3 = 0.75 uA - -- qcom,saw-slave: - Usage: optional - Value type: - Description: SAW controlled gang slave. Will not be configured. - -- qcom,saw-leader: - Usage: optional - Value type: - Description: SAW controlled gang leader. Will be configured as - SAW regulator. - -Example: - - regulators { - compatible = "qcom,pm8941-regulators"; - vdd_l1_l3-supply = <&s1>; - - s1: s1 { - regulator-min-microvolt = <1300000>; - regulator-max-microvolt = <1400000>; - }; - - ... - - l1: l1 { - regulator-min-microvolt = <1225000>; - regulator-max-microvolt = <1300000>; - }; - - .... - }; - -Example 2: - - saw3: syscon@9A10000 { - compatible = "syscon"; - reg = <0x9A10000 0x1000>; - }; - - ... - - spm-regulators { - compatible = "qcom,pm8994-regulators"; - qcom,saw-reg = <&saw3>; - s8 { - qcom,saw-slave; - }; - s9 { - qcom,saw-slave; - }; - s10 { - qcom,saw-slave; - }; - pm8994_s11_saw: s11 { - qcom,saw-leader; - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1140000>; - }; - }; diff --git a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml new file mode 100644 index 000000000000..2ca690e70eb2 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml @@ -0,0 +1,337 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/qcom,spmi-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SPMI Regulators + +maintainers: + - Robert Marko + +properties: + compatible: + enum: + - qcom,pm660-regulators + - qcom,pm660l-regulators + - qcom,pm8004-regulators + - qcom,pm8005-regulators + - qcom,pm8226-regulators + - qcom,pm8841-regulators + - qcom,pm8916-regulators + - qcom,pm8941-regulators + - qcom,pm8950-regulators + - qcom,pm8994-regulators + - qcom,pmi8994-regulators + - qcom,pms405-regulators + + qcom,saw-reg: + description: Reference to syscon node defining the SAW registers + $ref: /schemas/types.yaml#/definitions/phandle + +patternProperties: + "^(5vs[1-2]|(l|s)[1-9][0-9]?|lvs[1-3])$": + description: List of regulators and its properties + type: object + $ref: regulator.yaml# + + properties: + qcom,ocp-max-retries: + description: + Maximum number of times to try toggling a voltage switch off and + back on as a result of consecutive over current events + $ref: /schemas/types.yaml#/definitions/uint32 + + qcom,ocp-retry-delay: + description: + Time to delay in milliseconds between each voltage switch toggle + after an over current event takes place + $ref: /schemas/types.yaml#/definitions/uint32 + + qcom,pin-ctrl-enable: + description: + Bit mask specifying which hardware pins should be used to enable the + regulator, if any. + Supported bits are + 0 = ignore all hardware enable signals + BIT(0) = follow HW0_EN signal + BIT(1) = follow HW1_EN signal + BIT(2) = follow HW2_EN signal + BIT(3) = follow HW3_EN signal + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 15 + + qcom,pin-ctrl-hpm: + description: + Bit mask specifying which hardware pins should be used to force the + regulator into high power mode, if any. + Supported bits are + 0 = ignore all hardware enable signals + BIT(0) = follow HW0_EN signal + BIT(1) = follow HW1_EN signal + BIT(2) = follow HW2_EN signal + BIT(3) = follow HW3_EN signal + BIT(4) = follow PMIC awake state + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 31 + + qcom,vs-soft-start-strength: + description: + This property sets the soft start strength for voltage switch type + regulators. + Supported values are + 0 = 0.05 uA + 1 = 0.25 uA + 2 = 0.55 uA + 3 = 0.75 uA + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 3 + + qcom,saw-slave: + description: SAW controlled gang slave. Will not be configured. + type: boolean + + qcom,saw-leader: + description: + SAW controlled gang leader. Will be configured as SAW regulator. + type: boolean + + unevaluatedProperties: false + +required: + - compatible + +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,pm660-regulators + then: + properties: + vdd_l15_l16_l17_l18_l19-supply: true + vdd_l1_l6_l7-supply: true + vdd_l2_l3-supply: true + vdd_l5-supply: true + vdd_l8_l9_l10_l11_l12_l13_l14-supply: true + patternProperties: + "^vdd_s[1-6]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pm660l-regulators + then: + properties: + vdd_l1_l9_l10-supply: true + vdd_l2-supply: true + vdd_l3_l5_l7_l8-supply: true + vdd_l4_l6-supply: true + patternProperties: + "^vdd_s[1-5]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pm8004-regulators + then: + patternProperties: + "^vdd_s[25]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pm8005-regulators + then: + patternProperties: + "^vdd_s[1-4]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pm8226-regulators + then: + properties: + vdd_l10_l11_l13-supply: true + vdd_l12_l14-supply: true + vdd_l15_l16_l17_l18-supply: true + vdd_l19_l20_l21_l22_l23_l28-supply: true + vdd_l1_l2_l4_l5-supply: true + vdd_l25-supply: true + vdd_l3_l24_l26-supply: true + vdd_l6_l7_l8_l9_l27-supply: true + vdd_lvs1-supply: true + patternProperties: + "^vdd_s[1-5]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pm8841-regulators + then: + patternProperties: + "^vdd_s[1-8]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pm8916-regulators + then: + properties: + vdd_l1_l3-supply: true + vdd_l4_l5_l6-supply: true + vdd_l8_l11_l14_l15_l16-supply: true + vdd_l9_l10_l12_l13_l17_l18-supply: true + patternProperties: + "^vdd_l[27]-supply$": true + "^vdd_s[1-4]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pm8941-regulators + then: + properties: + interrupts: + items: + - description: Over-current protection interrupt for 5V S1 + - description: Over-current protection interrupt for 5V S2 + interrupt-names: + items: + - const: ocp-5vs1 + - const: ocp-5vs2 + vdd_l13_l20_l23_l24-supply: true + vdd_l1_l3-supply: true + vdd_l21-supply: true + vdd_l2_lvs_1_2_3-supply: true + vdd_l4_l11-supply: true + vdd_l5_l7-supply: true + vdd_l6_l12_l14_l15-supply: true + vdd_l8_l16_l18_19-supply: true + vdd_l9_l10_l17_l22-supply: true + vin_5vs-supply: true + patternProperties: + "^vdd_s[1-3]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pm8950-regulators + then: + properties: + vdd_l1_l19-supply: true + vdd_l20-supply: true + vdd_l21-supply: true + vdd_l2_l23-supply: true + vdd_l3-supply: true + vdd_l4_l5_l6_l7_l16-supply: true + vdd_l8_l11_l12_l17_l22-supply: true + vdd_l9_l10_l13_l14_l15_l18-supply: true + patternProperties: + "^vdd_s[1-6]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pm8994-regulators + then: + properties: + vdd_l1-supply: true + vdd_l13_l19_l23_l24-supply: true + vdd_l14_l15-supply: true + vdd_l17_l29-supply: true + vdd_l20_l21-supply: true + vdd_l25-supply: true + vdd_l2_l26_l28-supply: true + vdd_l3_l11-supply: true + vdd_l4_l27_l31-supply: true + vdd_l5_l7-supply: true + vdd_l6_l12_l32-supply: true + vdd_l8_l16_l30-supply: true + vdd_l9_l10_l18_l22-supply: true + vdd_lvs_1_2-supply: true + patternProperties: + "^vdd_s[1-9][0-2]?-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pmi8994-regulators + then: + properties: + vdd_l1-supply: true + patternProperties: + "^vdd_s[1-3]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pms405-regulators + then: + properties: + vdd_s3-supply: true + +unevaluatedProperties: false + +examples: + - | + regulators { + compatible = "qcom,pm8941-regulators"; + vdd_l1_l3-supply = <&s1>; + + s1: s1 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1400000>; + }; + + l1: l1 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1300000>; + }; + }; + + - | + saw3: syscon@9a10000 { + compatible = "syscon"; + reg = <0x9a10000 0x1000>; + }; + + regulators { + compatible = "qcom,pm8994-regulators"; + qcom,saw-reg = <&saw3>; + + s8 { + qcom,saw-slave; + }; + + s9 { + qcom,saw-slave; + }; + + s10 { + qcom,saw-slave; + }; + + pm8994_s11_saw: s11 { + qcom,saw-leader; + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1140000>; + }; + }; +... From patchwork Thu May 19 13:30:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 575078 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4F50FC4321E for ; Thu, 19 May 2022 13:30:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238802AbiESNa2 (ORCPT ); Thu, 19 May 2022 09:30:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48898 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238804AbiESNa0 (ORCPT ); Thu, 19 May 2022 09:30:26 -0400 Received: from mail-ed1-x532.google.com (mail-ed1-x532.google.com [IPv6:2a00:1450:4864:20::532]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 04040CC15A; Thu, 19 May 2022 06:30:22 -0700 (PDT) Received: by mail-ed1-x532.google.com with SMTP id g12so7002563edq.4; Thu, 19 May 2022 06:30:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=oIDUTK5KnimKV7JPutWUmQpjQBhC0JH0W89/0KDYnjU=; b=m8yheAljXGiSAp7sTPLVn41jM1DI7C22S/YSgdPtAZsrFfwp5W60wjaH6T8uKfZ29x f9PXETDthGEDSE+UHlxIeFv5wmnFoE0oVdgQ8Ua7l0P59/lKyMC3NZjIMhr25GJ2e2hb Zc9VrHmJFNlBJOd85ajBr7jRPy7CAdr1I5p2vIcB/P7ZPjLVZhj5EroI5+A413Li9tQw 5xCooyoqMpYcscAyAd0c6IRTkF8jAGCRIwWN1laA4sXtwfa0gAyQTtSa3U1zpUHW0JI2 HhhK2ooy15oQH9sq1UA+T86CutFLBIyxcCwkZcgXhtWbVAUO5lJIdsZxF6xVG7xLS9OK F/tA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=oIDUTK5KnimKV7JPutWUmQpjQBhC0JH0W89/0KDYnjU=; b=G95fBi+vrlRuI82VUvTpnb8BRivcuET+LbeYK+YPl9t7CYnxejEb302QM4BNgqHrO8 0sP7eBxFqnSS2We1k0bEo7vFWSCMTBkr7LmMWKt0OzxFKq005ncS9ocxvUsTlyGOJcvi y3Y23/iB5yAGqYcN40jTHTj4a8FusWPYM1pGy9amfVNl61J2pwKuDBElQ5MBzHbDiCI6 /Jou2f6UYLXghpFsoKHan3VcXB4EZz7M/5U6Jz3G37e7Kh4Sh0skXxrbUtXk9/HpQB+W 5oAhJct7S/a8krqEAffrOIEhOcDJ5zvbGMIdESbMJH4OLFCiFXOcKATUQXeRbLQwVeXF 4THg== X-Gm-Message-State: AOAM533yBzI8XvH6IL57BuB8oyWNa8spC44TeHqSFE0KG+AEt5NB+UHG JwL4pwrNJg70GoP6myiraGc= X-Google-Smtp-Source: ABdhPJxD/2CT/MGULbnCUrsZ1tb3g+UHs+Pb3kiiCQsEmpZ/ClE/+navdTOKiRkrNOfL7dKcy8qNqQ== X-Received: by 2002:a05:6402:3301:b0:42a:ee56:310b with SMTP id e1-20020a056402330100b0042aee56310bmr5309547eda.69.1652967020604; Thu, 19 May 2022 06:30:20 -0700 (PDT) Received: from fedora.robimarko.hr (cpe-94-253-165-71.zg.cable.xnet.hr. [94.253.165.71]) by smtp.googlemail.com with ESMTPSA id y17-20020a17090614d100b006f3ef214dd4sm2120383ejc.58.2022.05.19.06.30.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 May 2022 06:30:20 -0700 (PDT) From: Robert Marko To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, konrad.dybcio@somainline.org Cc: Robert Marko Subject: [PATCH v5 2/7] regulator: qcom_spmi: add support for HT_P150 Date: Thu, 19 May 2022 15:30:10 +0200 Message-Id: <20220519133015.484639-2-robimarko@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220519133015.484639-1-robimarko@gmail.com> References: <20220519133015.484639-1-robimarko@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org HT_P150 is a LDO PMOS regulator based on LV P150 using HFS430 layout found in PMP8074 and PMS405 PMIC-s. Both PMP8074 and PMS405 define the programmable range as 1.616V to 3.304V but the actual MAX output voltage depends on the exact LDO in each of the PMIC-s. It has a max current of 150mA, voltage step of 8mV. Signed-off-by: Robert Marko --- drivers/regulator/qcom_spmi-regulator.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c index 02bfce981150..38bbc70241ae 100644 --- a/drivers/regulator/qcom_spmi-regulator.c +++ b/drivers/regulator/qcom_spmi-regulator.c @@ -164,6 +164,7 @@ enum spmi_regulator_subtype { SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL3 = 0x0f, SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4 = 0x10, SPMI_REGULATOR_SUBTYPE_HFS430 = 0x0a, + SPMI_REGULATOR_SUBTYPE_HT_P150 = 0x35, }; enum spmi_common_regulator_registers { @@ -544,6 +545,10 @@ static struct spmi_voltage_range hfs430_ranges[] = { SPMI_VOLTAGE_RANGE(0, 320000, 320000, 2040000, 2040000, 8000), }; +static struct spmi_voltage_range ht_p150_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 1616000, 1616000, 3304000, 3304000, 8000), +}; + static DEFINE_SPMI_SET_POINTS(pldo); static DEFINE_SPMI_SET_POINTS(nldo1); static DEFINE_SPMI_SET_POINTS(nldo2); @@ -564,6 +569,7 @@ static DEFINE_SPMI_SET_POINTS(nldo660); static DEFINE_SPMI_SET_POINTS(ht_lvpldo); static DEFINE_SPMI_SET_POINTS(ht_nldo); static DEFINE_SPMI_SET_POINTS(hfs430); +static DEFINE_SPMI_SET_POINTS(ht_p150); static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf, int len) @@ -1458,6 +1464,7 @@ static const struct regulator_ops spmi_hfs430_ops = { static const struct spmi_regulator_mapping supported_regulators[] = { /* type subtype dig_min dig_max ltype ops setpoints hpm_min */ + SPMI_VREG(LDO, HT_P150, 0, INF, HFS430, hfs430, ht_p150, 10000), SPMI_VREG(BUCK, GP_CTL, 0, INF, SMPS, smps, smps, 100000), SPMI_VREG(BUCK, HFS430, 0, INF, HFS430, hfs430, hfs430, 10000), SPMI_VREG(LDO, N300, 0, INF, LDO, ldo, nldo1, 10000), From patchwork Thu May 19 13:30:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 574314 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DDD26C4167D for ; Thu, 19 May 2022 13:30:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238826AbiESNa2 (ORCPT ); Thu, 19 May 2022 09:30:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48900 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238805AbiESNa0 (ORCPT ); Thu, 19 May 2022 09:30:26 -0400 Received: from mail-ed1-x536.google.com (mail-ed1-x536.google.com [IPv6:2a00:1450:4864:20::536]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1B012CEB84; Thu, 19 May 2022 06:30:23 -0700 (PDT) Received: by mail-ed1-x536.google.com with SMTP id c10so7031588edr.2; Thu, 19 May 2022 06:30:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=hKTBlcPzeTtNqnyrU1hJ/yZCoy1XKsotOx9CBAENNAA=; b=QCi6YON6kzfb3U3uFpAY8u8lhl24QKwzJZB/r53yn0ficXSR4n+xwJnhPIo/4MEMd7 T3rkObYkXwuC53cq0v+G+ZbdezpnIRVGYhy2brp+8WLTHkCWkKyL6YDYz452Pv047nM6 AU/LAhBZBOsRt0LWWwSwPx7syUco01YaczcaF3+wsZZayRf4u+CH19F7cvKelYEW0Ds+ R7clIRQPRXl6AuTdVMX5o1kL0dow4A2TeDjhfWEIjzJjNdWfhyY9Jrhkh1bdwul9DEPX la6YjFvxDKQCnC2V3a86imqltxrXseqJTgOUzELFths07jy6M3wOvTsPofiZOQ8Pr+w1 +qog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=hKTBlcPzeTtNqnyrU1hJ/yZCoy1XKsotOx9CBAENNAA=; b=Auc8bvaK6k10OKVsmewScLc7Y6BGcR8kDtT+J7s40pEdZFKSiA84WlZX6Cs6lh6ksi jtdiMWhZdoFXYKmZ/2P5ETB5O8yOCKvfs6Oh9MRPYVOhs4eCjVk2vLs/V4ePIz8nosEZ 6TbRwVMC5P27VprY8gponNjLRaiErYROiVt5k1B68+ORoBIsJAOK0XuD6nGRvq7k2Ikj 1Tn1YHR4gNpBks7Q3Fr24EceEH1/ZQw/7y/9qSXrOMhP1uGlA/IJG3C/lf8yy4QB/X5q ozu0PsNKPZxFcGeNWFbJ+czzvgg79W/TuQ+PEawn207XcBcJZRpz5+5XPY1gbidx4dRO rq1g== X-Gm-Message-State: AOAM53304Zr5XxDaaRis33rdO8rbDhf5Z20AlR4Fv1nl5MlUAFD88HvR bnDROcASdDali09vt7SkH/c= X-Google-Smtp-Source: ABdhPJxHjNP/S/MOxe5q4RtJB6YJ8H3gwUuHiOWKT0YyD88HGluJqGkl4sgll/cnl4ntqmdN3iPLeQ== X-Received: by 2002:a05:6402:5244:b0:427:b24c:a799 with SMTP id t4-20020a056402524400b00427b24ca799mr5275051edd.291.1652967021699; Thu, 19 May 2022 06:30:21 -0700 (PDT) Received: from fedora.robimarko.hr (cpe-94-253-165-71.zg.cable.xnet.hr. [94.253.165.71]) by smtp.googlemail.com with ESMTPSA id y17-20020a17090614d100b006f3ef214dd4sm2120383ejc.58.2022.05.19.06.30.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 May 2022 06:30:21 -0700 (PDT) From: Robert Marko To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, konrad.dybcio@somainline.org Cc: Robert Marko Subject: [PATCH v5 3/7] regulator: qcom_spmi: add support for HT_P600 Date: Thu, 19 May 2022 15:30:11 +0200 Message-Id: <20220519133015.484639-3-robimarko@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220519133015.484639-1-robimarko@gmail.com> References: <20220519133015.484639-1-robimarko@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org HT_P600 is a LDO PMOS regulator based on LV P600 using HFS430 layout found in PMP8074 and PMS405 PMIC-s. Both PMP8074 and PMS405 define the programmable range as 1.704 to 1.896V but the actual MAX output voltage depends on the exact LDO in each of the PMIC-s. Their usual voltage that they are used is 1.8V. It has a max current of 600mA, voltage step of 8mV. Signed-off-by: Robert Marko --- drivers/regulator/qcom_spmi-regulator.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c index 38bbc70241ae..ad9ad9f4be8e 100644 --- a/drivers/regulator/qcom_spmi-regulator.c +++ b/drivers/regulator/qcom_spmi-regulator.c @@ -165,6 +165,7 @@ enum spmi_regulator_subtype { SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4 = 0x10, SPMI_REGULATOR_SUBTYPE_HFS430 = 0x0a, SPMI_REGULATOR_SUBTYPE_HT_P150 = 0x35, + SPMI_REGULATOR_SUBTYPE_HT_P600 = 0x3d, }; enum spmi_common_regulator_registers { @@ -549,6 +550,10 @@ static struct spmi_voltage_range ht_p150_ranges[] = { SPMI_VOLTAGE_RANGE(0, 1616000, 1616000, 3304000, 3304000, 8000), }; +static struct spmi_voltage_range ht_p600_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 1704000, 1704000, 1896000, 1896000, 8000), +}; + static DEFINE_SPMI_SET_POINTS(pldo); static DEFINE_SPMI_SET_POINTS(nldo1); static DEFINE_SPMI_SET_POINTS(nldo2); @@ -570,6 +575,7 @@ static DEFINE_SPMI_SET_POINTS(ht_lvpldo); static DEFINE_SPMI_SET_POINTS(ht_nldo); static DEFINE_SPMI_SET_POINTS(hfs430); static DEFINE_SPMI_SET_POINTS(ht_p150); +static DEFINE_SPMI_SET_POINTS(ht_p600); static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf, int len) @@ -1464,6 +1470,7 @@ static const struct regulator_ops spmi_hfs430_ops = { static const struct spmi_regulator_mapping supported_regulators[] = { /* type subtype dig_min dig_max ltype ops setpoints hpm_min */ + SPMI_VREG(LDO, HT_P600, 0, INF, HFS430, hfs430, ht_p600, 10000), SPMI_VREG(LDO, HT_P150, 0, INF, HFS430, hfs430, ht_p150, 10000), SPMI_VREG(BUCK, GP_CTL, 0, INF, SMPS, smps, smps, 100000), SPMI_VREG(BUCK, HFS430, 0, INF, HFS430, hfs430, hfs430, 10000), From patchwork Thu May 19 13:30:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 575076 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F2A17C43219 for ; Thu, 19 May 2022 13:30:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238856AbiESNac (ORCPT ); Thu, 19 May 2022 09:30:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48922 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238806AbiESNa0 (ORCPT ); Thu, 19 May 2022 09:30:26 -0400 Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [IPv6:2a00:1450:4864:20::52e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5174CCEB8E; Thu, 19 May 2022 06:30:24 -0700 (PDT) Received: by mail-ed1-x52e.google.com with SMTP id eg11so6962673edb.11; Thu, 19 May 2022 06:30:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/bRk6yZ7TTKW63rgTpD/DaAjQq9kemu00moaldOmuwc=; b=XA6xTI5UWS5vhdJucLz3PGDo0x45WMIRi34jEDkUUoP0YrA4NchIbPf8EOZvSOO7fv PY+XOj+bT+wnFJULrBZ3UWCGpP3pBf/4wgRIXHFtR3xIPUZYQL5k1BpKd6a2doNTqNPh acSnonwQiL6utF6ZyOQUL8q7YZljps3gPpIMKvXAAlr6j2WmbxoUwynu3H6l00W1LefX Iw+w9bMoqjU7JbBCDPDgC87AKQzpyMBnJsuCkUB+FMpLrdbES+sFpCspaQ0NsXZAu8/p +XqpYDHYnCDud4ZO9fvp4nl/crQBkFZ/RmWp90BGmpNVjGFGRDjCCszPKyWcXAkL7eLr QWBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/bRk6yZ7TTKW63rgTpD/DaAjQq9kemu00moaldOmuwc=; b=Fu2jl2Zei0G39GPu7DvtI78JFdVARSrvwSsqwmu7ZHdp6IpclSTQG2z1I64lipCPee 4y5ERMV6YQRLOxJg/zZyNbd0sfGYpdcrv8ElgaF17096Of15pC+khGIqeABJRwwmwgMZ od/mQhwmqRmTfsCWI+dNrncYnlVTfouFXZJD2M1ZCJM9xALR4eeqDtp76MZ2GpnDKEq+ mwgVPxs+7rbFvEij6i/SloYTm0uSg+lrYwIIX4MNOn6jA3B01DcLkuWmbIaj+yqWOTDS YHresXZma57WG6huH5Fdigo5UsMK/iR5ThGjThldPogQIfnVMox5VmwRFU8HLBLwfJjS qFng== X-Gm-Message-State: AOAM531uWteVRTY3/AOMvyFJcLINhbvpFA4v2yzfkQS/FPY2i14mugqi 8RdaLv5l4NcmY05YHGYdcvg= X-Google-Smtp-Source: ABdhPJytXn5jJz5AQCCCEZHkuqml5Wgst+DGSC6vNFOMIaIf5EALlJ1bJEywQoHcag67szesg58YLA== X-Received: by 2002:a05:6402:174c:b0:42a:b4df:3aa7 with SMTP id v12-20020a056402174c00b0042ab4df3aa7mr5291386edx.263.1652967022809; Thu, 19 May 2022 06:30:22 -0700 (PDT) Received: from fedora.robimarko.hr (cpe-94-253-165-71.zg.cable.xnet.hr. [94.253.165.71]) by smtp.googlemail.com with ESMTPSA id y17-20020a17090614d100b006f3ef214dd4sm2120383ejc.58.2022.05.19.06.30.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 May 2022 06:30:22 -0700 (PDT) From: Robert Marko To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, konrad.dybcio@somainline.org Cc: Robert Marko , Krzysztof Kozlowski Subject: [PATCH v5 4/7] dt-bindings: regulator: qcom,spmi-regulator: add PMP8074 PMIC Date: Thu, 19 May 2022 15:30:12 +0200 Message-Id: <20220519133015.484639-4-robimarko@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220519133015.484639-1-robimarko@gmail.com> References: <20220519133015.484639-1-robimarko@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the PMP8074 PMIC compatible. Signed-off-by: Robert Marko Reviewed-by: Krzysztof Kozlowski --- Changes in v4: * Add remaining supplies Changes in v3: * Add supply matching --- .../bindings/regulator/qcom,spmi-regulator.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml index 2ca690e70eb2..81fcaba84fed 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml @@ -23,6 +23,7 @@ properties: - qcom,pm8950-regulators - qcom,pm8994-regulators - qcom,pmi8994-regulators + - qcom,pmp8074-regulators - qcom,pms405-regulators qcom,saw-reg: @@ -276,6 +277,21 @@ allOf: vdd_l1-supply: true patternProperties: "^vdd_s[1-3]-supply$": true + - if: + properties: + compatible: + contains: + enum: + - qcom,pmp8074-regulators + then: + properties: + vdd_l10_l11_l12_l13-supply: true + vdd_l1_l2-supply: true + vdd_l3_l8-supply: true + vdd_l5_l6_l15-supply: true + patternProperties: + "^vdd_l[479]-supply$": true + "^vdd_s[1-5]-supply$": true - if: properties: compatible: From patchwork Thu May 19 13:30:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 574313 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2994C43217 for ; Thu, 19 May 2022 13:30:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238832AbiESNaa (ORCPT ); Thu, 19 May 2022 09:30:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48908 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238809AbiESNa1 (ORCPT ); Thu, 19 May 2022 09:30:27 -0400 Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [IPv6:2a00:1450:4864:20::52e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5CF5CCEB99; Thu, 19 May 2022 06:30:25 -0700 (PDT) Received: by mail-ed1-x52e.google.com with SMTP id c12so6966808eds.10; Thu, 19 May 2022 06:30:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NpQYDqqTMKvAHgyQOKIaDAZVZin4gTd/M2O8Q7thQ0s=; b=KQAOvZ8mR+QYcwZPfx2ifx2cf3gdrDghVsHNnNA4rF6Xxl7UGpNCi0ura6e47DnVjJ sAEWBgPJMunZziZosiW0A/c/jMeFrzeNd/yu1OUG6y3n+g11Pzq+8lk7f2wPEpRhY8DR W0s9Ag3uDIK7N2bbY5MPT+oMC5Jq8uGsRR5OaJap8XVoBhr6Rya0dvC2FMHFgW8JCxcC W+RDhMBoPaa1P41+ZlgetegSYBhbqJiSlEBHcvNhHhXgMJDqlh/zsvrbS8a7p/nRx/pP sY5rEkXMvnHY2PJXj9y5CNg5lZO88ziC1fFwGk6X75OY1jzGWmBtEjnUHjDn4LoFeP2s PZNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NpQYDqqTMKvAHgyQOKIaDAZVZin4gTd/M2O8Q7thQ0s=; b=cvTYM+86gpe2k0RkTVy3WepkD3qn2Daj5cXWNpuzJD1maXSDJWfJwXCJwEwl9RsFcq 2PLO7usSvSR7c16tJ5E7071D2Ho/pCnneSUGj9+vMVZSvRewTAvDtyuL4QiRkrICzKFp cGnu/doVLpY33JjJp7FrqyX1FHqyAGUvVuyAgIYjQe0BMtZE+fDl298yoSS4KWH8EtWU 5GWkN4q9KxYB5mPy2TrN3+qJvU5G4no/y4nRTXpHytvGm3gTUgwcJ+nS8sb9EzhhJbly QnvMBIBJGafcQfgobfaNZEZbJTaGlpWV2CjSu1PADqOPznbDGhx1oibmxIWmTEZCr64p KDuw== X-Gm-Message-State: AOAM533tOsza8Cl5Bie8izrXj0riuo/s/LmwXvldw/nxHZTvEKbUkZuG +R6opTaIpCfpi9qNLR1Ruvs= X-Google-Smtp-Source: ABdhPJzQGVvEHrjDwozA9/bS9X1RUoku0kFYDCzF8VQfQ/nnkyDaM7G+d3t8lcF1iJcXM/rfPwEOpQ== X-Received: by 2002:a05:6402:51c8:b0:427:b374:6af4 with SMTP id r8-20020a05640251c800b00427b3746af4mr5258073edd.349.1652967023981; Thu, 19 May 2022 06:30:23 -0700 (PDT) Received: from fedora.robimarko.hr (cpe-94-253-165-71.zg.cable.xnet.hr. [94.253.165.71]) by smtp.googlemail.com with ESMTPSA id y17-20020a17090614d100b006f3ef214dd4sm2120383ejc.58.2022.05.19.06.30.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 May 2022 06:30:23 -0700 (PDT) From: Robert Marko To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, konrad.dybcio@somainline.org Cc: Robert Marko Subject: [PATCH v5 5/7] regulator: qcom_spmi: add support for PMP8074 regulators Date: Thu, 19 May 2022 15:30:13 +0200 Message-Id: <20220519133015.484639-5-robimarko@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220519133015.484639-1-robimarko@gmail.com> References: <20220519133015.484639-1-robimarko@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org PMP8074 is a companion PMIC for the Qualcomm IPQ8074 WiSoC-s. It features 5 HF-SMPS and 13 LDO regulators. HF-SMPS regulators are Buck HFS430 regulators. L1, L2 and L3 are HT_N1200_ST subtype LDO regulators. L4 is HT_N300_ST subtype LDO regulator. L5 and L6 are HT_P600 subtype LDO regulators. L7, L11, L12 and L13 are HT_P150 subtype LDO regulators. L10 is HT_P50 subtype LDO regulator. This commit adds support for all of the buck regulators and LDO-s except for L10 as I dont have documentation on its output voltage range. S3 is the CPU cluster voltage supply, S4 supplies the UBI32 NPU cores and L11 is the SDIO/eMMC I/O voltage regulator required for high speeds. Signed-off-by: Robert Marko --- Changes in v4: * Add remaining regulators, minus L11 * Sort structure and compatible --- drivers/regulator/qcom_spmi-regulator.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c index ad9ad9f4be8e..a2d0292a92fd 100644 --- a/drivers/regulator/qcom_spmi-regulator.c +++ b/drivers/regulator/qcom_spmi-regulator.c @@ -2139,6 +2139,28 @@ static const struct spmi_regulator_data pm8005_regulators[] = { { } }; +static const struct spmi_regulator_data pmp8074_regulators[] = { + { "s1", 0x1400, "vdd_s1"}, + { "s2", 0x1700, "vdd_s2"}, + { "s3", 0x1a00, "vdd_s3"}, + { "s4", 0x1d00, "vdd_s4"}, + { "s5", 0x2000, "vdd_s5"}, + { "l1", 0x4000, "vdd_l1_l2"}, + { "l2", 0x4100, "vdd_l1_l2"}, + { "l3", 0x4200, "vdd_l3_l8"}, + { "l4", 0x4300, "vdd_l4"}, + { "l5", 0x4400, "vdd_l5_l6_l15"}, + { "l6", 0x4500, "vdd_l5_l6_l15"}, + { "l7", 0x4600, "vdd_l7"}, + { "l8", 0x4700, "vdd_l3_l8"}, + { "l9", 0x4800, "vdd_l9"}, + /* l10 is currently unsupported HT_P50 */ + { "l11", 0x4a00, "vdd_l10_l11_l12_l13"}, + { "l12", 0x4b00, "vdd_l10_l11_l12_l13"}, + { "l13", 0x4c00, "vdd_l10_l11_l12_l13"}, + { } +}; + static const struct spmi_regulator_data pms405_regulators[] = { { "s3", 0x1a00, "vdd_s3"}, { } @@ -2156,6 +2178,7 @@ static const struct of_device_id qcom_spmi_regulator_match[] = { { .compatible = "qcom,pmi8994-regulators", .data = &pmi8994_regulators }, { .compatible = "qcom,pm660-regulators", .data = &pm660_regulators }, { .compatible = "qcom,pm660l-regulators", .data = &pm660l_regulators }, + { .compatible = "qcom,pmp8074-regulators", .data = &pmp8074_regulators }, { .compatible = "qcom,pms405-regulators", .data = &pms405_regulators }, { } }; From patchwork Thu May 19 13:30:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 575077 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8EE69C4167B for ; Thu, 19 May 2022 13:30:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238798AbiESNa3 (ORCPT ); Thu, 19 May 2022 09:30:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48926 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238811AbiESNa1 (ORCPT ); Thu, 19 May 2022 09:30:27 -0400 Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [IPv6:2a00:1450:4864:20::629]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6B611B0419; Thu, 19 May 2022 06:30:26 -0700 (PDT) Received: by mail-ej1-x629.google.com with SMTP id tk15so9972807ejc.6; Thu, 19 May 2022 06:30:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nnXQ24MHN2s21yoIiJmbq+R4rIpFZ2OhNfmhoVvOlIo=; b=AIgqK3hPbm+oeEIPn9Pqo7jedMzkYkjM9nxtKSHkdLbqp3CIfUZYWmDfWcgwBnfIS4 SP5D/aE9q5n8XQ9EUdTQ+bXZw1087BEvl9XMN6tH10PWkT4CRu2szi5MrS03RLzjQqgy HohMB1iQKIJgQ93FCQQOIwfMeXpRFvTMaSIEgRw/Z6gkQIKl9DV2aPJy0gNHJKo5CVQX Q9U0rc3O18uTepcfBXSd0PrDJjCYagErZO424gkoE9iF2JZ+e54d5phLRl0aOCA5SEPW ndzXhxtLQj3Hnrz9OFnntK1FfxPPpJuDgYVeQ5+amSQ17jB7ikwE6Fh5SD7HLJ4mwELZ Hd2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nnXQ24MHN2s21yoIiJmbq+R4rIpFZ2OhNfmhoVvOlIo=; b=iZE1UcOC1HRQ4brN5l92/iGN/TrxwFSbYaYaRyKqJKHlU4fE9h/f/CCvgWcWDlXZcZ 1SQa+77O6Nx3/9+FWxsfdMCaWg+hwDaE8qgqpCzNnYksCK8jeGjUgwA7yXjie0NmrHDU tYpHatB+eRXvrR+MzqeWmGvehozTwNsn9utLsiAbcgWWa/HDcTgzPwSQUpdCYW6X2hKK xvaVHkwE+GmDcfhL8QgKnvzMLlNprX2dDf0NQCC87/EB3Ur2O/ygT+9Cfi55iY/VYamK AgWj5MutkLl1wMUESUxndUq6ayX/5rZUOvVeS4d637+Vc76a9x8ERWLGgH9e2gSD56Ap g1hQ== X-Gm-Message-State: AOAM533X6UI6f953z9ldvhtkU/xZfjtn0Lf42vOyXSy3ldxrdisDcnn/ KQw4WgE59USeporfaqN9pkBQLmalaf9UNg== X-Google-Smtp-Source: ABdhPJwyIlx8ju4DfUtd8SquiZ70oz/dJ3z1Z31qIExGBEe+IyidvnoezAvjlCsPj83zrEKQC9O7fA== X-Received: by 2002:a17:906:6a22:b0:6f4:a226:40d6 with SMTP id qw34-20020a1709066a2200b006f4a22640d6mr4230784ejc.657.1652967025010; Thu, 19 May 2022 06:30:25 -0700 (PDT) Received: from fedora.robimarko.hr (cpe-94-253-165-71.zg.cable.xnet.hr. [94.253.165.71]) by smtp.googlemail.com with ESMTPSA id y17-20020a17090614d100b006f3ef214dd4sm2120383ejc.58.2022.05.19.06.30.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 May 2022 06:30:24 -0700 (PDT) From: Robert Marko To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, konrad.dybcio@somainline.org Cc: Robert Marko Subject: [PATCH v5 6/7] arm64: dts: qcom: add PMP8074 DTSI Date: Thu, 19 May 2022 15:30:14 +0200 Message-Id: <20220519133015.484639-6-robimarko@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220519133015.484639-1-robimarko@gmail.com> References: <20220519133015.484639-1-robimarko@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org PMP8074 is a companion PMIC to the Qualcomm IPQ8074 series that is controlled via SPMI. Since we now have support for the regulators inside of it add DTSI for it. Signed-off-by: Robert Marko --- Changes in v5: * Remove #address-cells and #size-cells as they are not required for regulator subnodes * Add mising whitespace to compatible after = --- arch/arm64/boot/dts/qcom/pmp8074.dtsi | 36 +++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pmp8074.dtsi diff --git a/arch/arm64/boot/dts/qcom/pmp8074.dtsi b/arch/arm64/boot/dts/qcom/pmp8074.dtsi new file mode 100644 index 000000000000..7b3c9fe705aa --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmp8074.dtsi @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include + +&spmi_bus { + pmic@1 { + compatible = "qcom,spmi-pmic"; + reg = <0x1 SPMI_USID>; + + regulators { + compatible = "qcom,pmp8074-regulators"; + + s3: s3 { + regulator-name = "vdd_s3"; + regulator-min-microvolt = <592000>; + regulator-max-microvolt = <1064000>; + regulator-always-on; + regulator-boot-on; + }; + + s4: s4 { + regulator-name = "vdd_s4"; + regulator-min-microvolt = <712000>; + regulator-max-microvolt = <992000>; + regulator-always-on; + regulator-boot-on; + }; + + l11: l11 { + regulator-name = "l11"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + }; + }; +}; From patchwork Thu May 19 13:30:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 575075 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 429FCC43217 for ; Thu, 19 May 2022 13:30:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238863AbiESNad (ORCPT ); Thu, 19 May 2022 09:30:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48938 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235342AbiESNa2 (ORCPT ); Thu, 19 May 2022 09:30:28 -0400 Received: from mail-ej1-x62d.google.com (mail-ej1-x62d.google.com [IPv6:2a00:1450:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F5B6C6E5F; Thu, 19 May 2022 06:30:27 -0700 (PDT) Received: by mail-ej1-x62d.google.com with SMTP id wh22so9830200ejb.7; Thu, 19 May 2022 06:30:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FxJnKg+A99wVrQlkanyVEuJTvEg3la3FckWvtOvAtg8=; b=eGV9t4Pe+aYujMGFP8V0IDDWdxCejL3cCO8g5G473ddA0oijPcfBAQ1rMwL5+k1vE0 l7Q8CVUjXYzvQluSlvMZRZPVK/m7TWbafsDriPYjPfg+thoOtRD7P6m07umtB/D6PtQx SpNjlHonsvm9P6cbHKBJo3T93swFgBKlzAIc2giQ2wHjuy0qgJb4icVppOTN2YVFgM8z tbjShMY9PU/Xg6Ry7Qdf9i4GcKcJ+E6qj6fPHl1NjUBiLg+On2KS3EWS04jgDp5tvf06 Z9aBx18PZMUO1xwDKabPYtrVc/ReCESlrCMwWAF7kM+pwkjPhnloYJR3Tcg4IhZDDOaC SqYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FxJnKg+A99wVrQlkanyVEuJTvEg3la3FckWvtOvAtg8=; b=N5JQ7Y5GVeO02reGjHmejwM0EyGgaTeCwOI0Ewk6OEc5YD9dBDBmNSxhnH3zl3ErVT plqhWSXrdEJkHy7R6SEq/VG0WgFXDXH7b0duxIOhbc59zohR2Ho8KJW4uZm3f7uRxHKw Blo0vpijjfm1pfdv1z4nPVnqDlVGqPNk2SMLR4Uh23C26DicXXmHjEr0XR/l2KUWZElh LfV/cMLFW43H2EUcl+rQhskQCpNhXB0+6hp4LQzdrqnA9p5TD9xco+lYcdYISY07Txgd 9HhENvDmio4GU9EnfcNmfFtNeRO+4xf5Ak6CJqQGB+mFpxc8zwOuAnLsTzv2yGZMSDtz nrSw== X-Gm-Message-State: AOAM532mvlUJ44WqAykFPiyzP/EbSscCOjRF8hFuHvCxr+dNFv3hvJ0t RP9RZQYZ39GsmQueOXRZBg4= X-Google-Smtp-Source: ABdhPJzWqxZpySS2+4NGbY2xj3uJDooRqXB7VLD/8lVf/avrXrbROe4czKYqU614TfSlbKTOVl2rQA== X-Received: by 2002:a17:907:9602:b0:6df:e82c:f84 with SMTP id gb2-20020a170907960200b006dfe82c0f84mr4334422ejc.590.1652967026068; Thu, 19 May 2022 06:30:26 -0700 (PDT) Received: from fedora.robimarko.hr (cpe-94-253-165-71.zg.cable.xnet.hr. [94.253.165.71]) by smtp.googlemail.com with ESMTPSA id y17-20020a17090614d100b006f3ef214dd4sm2120383ejc.58.2022.05.19.06.30.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 May 2022 06:30:25 -0700 (PDT) From: Robert Marko To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, konrad.dybcio@somainline.org Cc: Robert Marko Subject: [PATCH v5 7/7] arm64: dts: qcom: ipq8074-hk01: add VQMMC supply Date: Thu, 19 May 2022 15:30:15 +0200 Message-Id: <20220519133015.484639-7-robimarko@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220519133015.484639-1-robimarko@gmail.com> References: <20220519133015.484639-1-robimarko@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Since now we have control over the PMP8074 PMIC providing various system voltages including L11 which provides the SDIO/eMMC I/O voltage set it as the SDHCI VQMMC supply. This allows SDHCI controller to switch to 1.8V I/O mode and support high speed modes like HS200 and HS400. Signed-off-by: Robert Marko --- arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts index b5e1eaa367bf..457cf83a1ed5 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts +++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts @@ -3,6 +3,7 @@ /* Copyright (c) 2017, The Linux Foundation. All rights reserved. */ #include "ipq8074.dtsi" +#include "pmp8074.dtsi" / { #address-cells = <0x2>; @@ -87,6 +88,7 @@ nand@0 { &sdhc_1 { status = "okay"; + vqmmc-supply = <&l11>; }; &qusb_phy_0 {