From patchwork Mon Jul 11 15:20:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 589503 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC63DC433EF for ; Mon, 11 Jul 2022 15:20:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229952AbiGKPU1 (ORCPT ); Mon, 11 Jul 2022 11:20:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229470AbiGKPU1 (ORCPT ); Mon, 11 Jul 2022 11:20:27 -0400 Received: from mail-ed1-x530.google.com (mail-ed1-x530.google.com [IPv6:2a00:1450:4864:20::530]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 41BE7CE00; Mon, 11 Jul 2022 08:20:26 -0700 (PDT) Received: by mail-ed1-x530.google.com with SMTP id eq6so6687960edb.6; Mon, 11 Jul 2022 08:20:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=wTu+cUyVm67/XnEYVu1jCf3AbukYLlOvv0/JzbYxvHI=; b=KC6EbrSpDy73y3WlSzo8MwvTpGUK1Git/9SSp2QIYbQhRPY9niOBB359xQLyKWE+I1 m/ygzgk93Z5hsiEVeaJZSQick6AFccfFVJDE2OgdTLZQd/Re31TLS14mvxq/ZbYRX+gI 7LpJayOonnqIbR89NhbmWQpYoiQwGVUKhzYN/p3A9WfpRPNlNXheppzpdD23TEJ2DE6K tYRcVRaWLEi7TN2bAbtzBKmz11IbFMO8z6XqUKcFkbWJ6CtqeXjACjEMr4sB/sf2hde9 YXlp6SE+z8LJDEbx8/CL3yT8zQFyNXXOk68RB6TVpcsKgTsQ0rpcdFxzMRcsLjuRDBu3 2MJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=wTu+cUyVm67/XnEYVu1jCf3AbukYLlOvv0/JzbYxvHI=; b=XwhR8xIQzHbWKCcPSgcxEH9ugCoRRdfnmvGezuqJ7FGnZahNFYmwJ4nhZDtVRACeQx TKs0bS8Ga7hZ+I+x9yCVMU10FMc3hrIeXS/bz/IXvQjENvPdG6f6OrTvS0+7jALDfSI+ QCG2O2uocO4TYTwTL3fGSsJGqCqNtFxAMMHml+Y3u5WIVsNI5P1yuLz9TBI07U1cWeph F+RWn/SHR5kVTVuxkstkvHur+R+hz9yhwbZISd924rI+4T4pFCPXM3lXV5+KWTFaOTBI M0bKR3BPPRUMwpshGcalOb59N0rBWrY3dnswYsj2/qARxkRgvVX62fHoTaa0xzFaUR09 +xpA== X-Gm-Message-State: AJIora8spXGOqZyX/8oBBY1CZcfQ6fnjM5wBpiR1KaurgJDzc3B4y4y9 7kGSKXranr1T747WqglZPUI= X-Google-Smtp-Source: AGRyM1tnjQQ/SbI6vQBKXIrGHkZgnghzoNqWod2XuAp81gRZjqdSL5DOdZ1gLVkcq8B6fWUK/Z6qAw== X-Received: by 2002:a05:6402:1e8c:b0:43a:c57f:2cbb with SMTP id f12-20020a0564021e8c00b0043ac57f2cbbmr15202685edf.97.1657552824569; Mon, 11 Jul 2022 08:20:24 -0700 (PDT) Received: from localhost (p200300e41f12c800f22f74fffe1f3a53.dip0.t-ipconnect.de. [2003:e4:1f12:c800:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id h8-20020aa7cdc8000000b004355998ec1asm4459274edw.14.2022.07.11.08.20.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jul 2022 08:20:23 -0700 (PDT) From: Thierry Reding To: Rob Herring , Krzysztof Kozlowski Cc: Jon Hunter , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 1/5] dt-bindings: arm: tegra: flowctrl: Convert to json-schema Date: Mon, 11 Jul 2022 17:20:16 +0200 Message-Id: <20220711152020.688461-1-thierry.reding@gmail.com> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Thierry Reding Convert the Tegra flow controller bindings from the free-form text format to json-schema. Signed-off-by: Thierry Reding --- .../arm/tegra/nvidia,tegra20-flowctrl.txt | 18 -------- .../arm/tegra/nvidia,tegra20-flowctrl.yaml | 41 +++++++++++++++++++ 2 files changed, 41 insertions(+), 18 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.yaml diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt deleted file mode 100644 index a855c1bffc0f..000000000000 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt +++ /dev/null @@ -1,18 +0,0 @@ -NVIDIA Tegra Flow Controller - -Required properties: -- compatible: Should contain one of the following: - - "nvidia,tegra20-flowctrl": for Tegra20 - - "nvidia,tegra30-flowctrl": for Tegra30 - - "nvidia,tegra114-flowctrl": for Tegra114 - - "nvidia,tegra124-flowctrl": for Tegra124 - - "nvidia,tegra132-flowctrl", "nvidia,tegra124-flowctrl": for Tegra132 - - "nvidia,tegra210-flowctrl": for Tegra210 -- reg: Should contain one register range (address and length) - -Example: - - flow-controller@60007000 { - compatible = "nvidia,tegra20-flowctrl"; - reg = <0x60007000 0x1000>; - }; diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.yaml new file mode 100644 index 000000000000..416739ad8c1e --- /dev/null +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-flowctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra Flow Controller + +maintainers: + - Thierry Reding + - Jon Hunter + +properties: + compatible: + oneOf: + - enum: + - nvidia,tegra20-flowctrl + - nvidia,tegra30-flowctrl + - nvidia,tegra114-flowctrl + - nvidia,tegra124-flowctrl + - nvidia,tegra210-flowctrl + + - items: + - const: nvidia,tegra132-flowctrl + - const: nvidia,tegra124-flowctrl + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + flow-controller@60007000 { + compatible = "nvidia,tegra20-flowctrl"; + reg = <0x60007000 0x1000>; + }; From patchwork Mon Jul 11 15:20:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 589502 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06FDEC43334 for ; Mon, 11 Jul 2022 15:20:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232222AbiGKPUb (ORCPT ); Mon, 11 Jul 2022 11:20:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46922 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229470AbiGKPUa (ORCPT ); Mon, 11 Jul 2022 11:20:30 -0400 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 78905CE00; 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[2003:e4:1f12:c800:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id 14-20020a170906318e00b00715705dd23asm2767265ejy.89.2022.07.11.08.20.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jul 2022 08:20:27 -0700 (PDT) From: Thierry Reding To: Rob Herring , Krzysztof Kozlowski , Marc Dietrich Cc: Jon Hunter , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 3/5] dt-bindings: arm: tegra: nvec: Convert to json-schema Date: Mon, 11 Jul 2022 17:20:18 +0200 Message-Id: <20220711152020.688461-3-thierry.reding@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220711152020.688461-1-thierry.reding@gmail.com> References: <20220711152020.688461-1-thierry.reding@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Thierry Reding Convert the NVIDIA embedded controller bindings from the free-form text format to json-schema. Signed-off-by: Thierry Reding Acked-by: Marc Dietrich --- Marc, you authored this binding a long time ago, which makes the default license for this GPL-2.0. However, the preference is for DT bindings to be dual-licensed under the more permissive GPL-2.0-only OR BSD-2-Clause as done in this patch. Do you have any objections to relicensing? Thierry .../bindings/arm/tegra/nvidia,nvec.txt | 21 ----- .../bindings/arm/tegra/nvidia,nvec.yaml | 94 +++++++++++++++++++ 2 files changed, 94 insertions(+), 21 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,nvec.txt create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,nvec.yaml diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,nvec.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,nvec.txt deleted file mode 100644 index 5ae601e7f51f..000000000000 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,nvec.txt +++ /dev/null @@ -1,21 +0,0 @@ -NVIDIA compliant embedded controller - -Required properties: -- compatible : should be "nvidia,nvec". -- reg : the iomem of the i2c slave controller -- interrupts : the interrupt line of the i2c slave controller -- clock-frequency : the frequency of the i2c bus -- gpios : the gpio used for ec request -- slave-addr: the i2c address of the slave controller -- clocks : Must contain an entry for each entry in clock-names. - See ../clocks/clock-bindings.txt for details. -- clock-names : Must include the following entries: - Tegra20/Tegra30: - - div-clk - - fast-clk - Tegra114: - - div-clk -- resets : Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names : Must include the following entries: - - i2c diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,nvec.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,nvec.yaml new file mode 100644 index 000000000000..c997faa42c31 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,nvec.yaml @@ -0,0 +1,94 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/tegra/nvidia,nvec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA compliant embedded controller + +maintainers: + - Thierry Reding + - Jon Hunter + +properties: + compatible: + const: nvidia,nvec + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 1 + items: + - description: divider clock + - description: fast clock + + clock-names: + minItems: 1 + items: + - const: div-clk + - const: fast-clk + + resets: + items: + - description: module reset + + reset-names: + items: + - const: i2c + + clock-frequency: + $ref: /schemas/types.yaml#/definitions/uint32 + description: frequency of the I2C bus + + request-gpios: + description: phandle to the GPIO used for EC request + + slave-addr: + $ref: /schemas/types.yaml#/definitions/uint32 + description: I2C address of the slave controller + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + - reset-names + - clock-frequency + - request-gpios + - slave-addr + +examples: + - | + #include + #include + #include + + nvec@7000c500 { + compatible = "nvidia,nvec"; + reg = <0x7000c500 0x100>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <80000>; + request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; + slave-addr = <138>; + clocks = <&tegra_car TEGRA20_CLK_I2C3>, + <&tegra_car TEGRA20_CLK_PLL_P_OUT3>; + clock-names = "div-clk", "fast-clk"; + resets = <&tegra_car 67>; + reset-names = "i2c"; + }; From patchwork Mon Jul 11 15:20:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 589501 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 059ECC433EF for ; Mon, 11 Jul 2022 15:20:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232240AbiGKPUe (ORCPT ); Mon, 11 Jul 2022 11:20:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46984 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232239AbiGKPUe (ORCPT ); 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[2003:e4:1f12:c800:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id fd15-20020a056402388f00b0043adc6552d6sm1060373edb.20.2022.07.11.08.20.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jul 2022 08:20:30 -0700 (PDT) From: Thierry Reding To: Rob Herring , Krzysztof Kozlowski Cc: Jon Hunter , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 5/5] dt-bindings: arm: tegra: Add missing compatible strings Date: Mon, 11 Jul 2022 17:20:20 +0200 Message-Id: <20220711152020.688461-5-thierry.reding@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220711152020.688461-1-thierry.reding@gmail.com> References: <20220711152020.688461-1-thierry.reding@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Thierry Reding The Nyan Blaze and Nyan Big, as well as Jetson Nano (P3450-0000), Darcy (P2894-0050-A08) and Pixel C (Smaug) were never mentioned. Add them. While at it, also fix a typo in the compatible string for Apalis Tegra30 v1.1 evaluation board. Signed-off-by: Thierry Reding --- .../devicetree/bindings/arm/tegra.yaml | 50 ++++++++++++++++++- 1 file changed, 48 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentation/devicetree/bindings/arm/tegra.yaml index 49841ca272ee..187d832a14ac 100644 --- a/Documentation/devicetree/bindings/arm/tegra.yaml +++ b/Documentation/devicetree/bindings/arm/tegra.yaml @@ -114,6 +114,33 @@ properties: - const: toradex,apalis-tk1-v1.2 - const: toradex,apalis-tk1 - const: nvidia,tegra124 + - items: + - const: google,nyan-big-rev7 + - const: google,nyan-big-rev6 + - const: google,nyan-big-rev5 + - const: google,nyan-big-rev4 + - const: google,nyan-big-rev3 + - const: google,nyan-big-rev2 + - const: google,nyan-big-rev1 + - const: google,nyan-big-rev0 + - const: google,nyan-big + - const: google,nyan + - const: nvidia,tegra124 + - items: + - const: google,nyan-blaze-rev10 + - const: google,nyan-blaze-rev9 + - const: google,nyan-blaze-rev8 + - const: google,nyan-blaze-rev7 + - const: google,nyan-blaze-rev6 + - const: google,nyan-blaze-rev5 + - const: google,nyan-blaze-rev4 + - const: google,nyan-blaze-rev3 + - const: google,nyan-blaze-rev2 + - const: google,nyan-blaze-rev1 + - const: google,nyan-blaze-rev0 + - const: google,nyan-blaze + - const: google,nyan + - const: nvidia,tegra124 - items: - enum: - nvidia,norrin @@ -121,11 +148,30 @@ properties: - const: nvidia,tegra124 - items: - enum: - - nvidia,darcy - nvidia,p2371-0000 - nvidia,p2371-2180 - nvidia,p2571 - - nvidia,p2894-0050-a08 + - const: nvidia,tegra210 + - description: NVIDIA Jetson Nano + items: + - const: nvidia,p3450-0000 + - const: nvidia,tegra210 + - description: NVIDIA Shield TV + items: + - const: nvidia,p2894-0050-a08 + - const: nvidia,darcy + - const: nvidia,tegra210 + - description: Google Pixel C + items: + - const: google,smaug-rev8 + - const: google,smaug-rev7 + - const: google,smaug-rev6 + - const: google,smaug-rev5 + - const: google,smaug-rev4 + - const: google,smaug-rev3 + - const: google,smaug-rev2 + - const: google,smaug-rev1 + - const: google,smaug - const: nvidia,tegra210 - description: Jetson TX2 Developer Kit items: