From patchwork Thu Jul 21 08:35:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 592304 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F1C3C433EF for ; Thu, 21 Jul 2022 08:35:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230506AbiGUIfs (ORCPT ); Thu, 21 Jul 2022 04:35:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34746 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229780AbiGUIfr (ORCPT ); Thu, 21 Jul 2022 04:35:47 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D2B8112AA2 for ; Thu, 21 Jul 2022 01:35:46 -0700 (PDT) Received: from pendragon.ideasonboard.com (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 2DC498D0; Thu, 21 Jul 2022 10:35:45 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1658392545; bh=pr740Y17j8oM0gpGqXnfkdAMKrUsEH2IaEQO02DeynA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nxasu7jZGfcGh5FNkJ+vpv+r/gOPyi1fNpPNbM8GzlmCXQRbswQ9+Rd1lzfcfEWOg yWRZ32NkJsksI+6nl0HoUrXcFDrjIJemKrBDYcbPAj58M4U1DoLazRyUvf/eItnzGQ nOS4dqmscIwAnN/HMiM5Gui801k192uoQ2/8o57g= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Manivannan Sadhasivam , Sakari Ailus Subject: [PATCH 02/19] media: i2c: imx290: Print error code when I2C transfer fails Date: Thu, 21 Jul 2022 11:35:23 +0300 Message-Id: <20220721083540.1525-3-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220721083540.1525-1-laurent.pinchart@ideasonboard.com> References: <20220721083540.1525-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Knowing why I2C transfers fail is useful for debugging. Extend the error message to print the error code. Signed-off-by: Laurent Pinchart --- drivers/media/i2c/imx290.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/imx290.c b/drivers/media/i2c/imx290.c index d97a5fb1d501..64bd43813dbf 100644 --- a/drivers/media/i2c/imx290.c +++ b/drivers/media/i2c/imx290.c @@ -370,7 +370,8 @@ static inline int __always_unused imx290_read_reg(struct imx290 *imx290, u16 add ret = regmap_read(imx290->regmap, addr, ®val); if (ret) { - dev_err(imx290->dev, "I2C read failed for addr: %x\n", addr); + dev_err(imx290->dev, "Failed to read register 0x%04x: %d\n", + addr, ret); return ret; } @@ -385,7 +386,8 @@ static int imx290_write_reg(struct imx290 *imx290, u16 addr, u8 value) ret = regmap_write(imx290->regmap, addr, value); if (ret) { - dev_err(imx290->dev, "I2C write failed for addr: %x\n", addr); + dev_err(imx290->dev, "Failed to write register 0x%04x: %d\n", + addr, ret); return ret; } From patchwork Thu Jul 21 08:35:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 592303 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9078FC433EF for ; Thu, 21 Jul 2022 08:35:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231612AbiGUIfv (ORCPT ); Thu, 21 Jul 2022 04:35:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229780AbiGUIfu (ORCPT ); Thu, 21 Jul 2022 04:35:50 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 79C0B1180F for ; Thu, 21 Jul 2022 01:35:49 -0700 (PDT) Received: from pendragon.ideasonboard.com (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 024E2825; Thu, 21 Jul 2022 10:35:47 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1658392548; bh=gM1ztLPMvFlQU+2XPl4hD5NaeJG2KTI/qFMcJVgcajY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uxTtBHRlRxLytZ7+i2oeiCYYoMjbscLGaK33ioYOYINVPuuZJR3MZm9blmLI4xuFm aYwf1o0Sd1DTHec7EanXR7gASDR4zdNWI+zO/6dfYGH2jEiJaCerkelrjYe58RomUo BMfFzPDMXvWHqX+1odHkztyPvxSPGEfgWLCol7qg= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Manivannan Sadhasivam , Sakari Ailus Subject: [PATCH 04/19] media: i2c: imx290: Replace macro with explicit ARRAY_SIZE() Date: Thu, 21 Jul 2022 11:35:25 +0300 Message-Id: <20220721083540.1525-5-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220721083540.1525-1-laurent.pinchart@ideasonboard.com> References: <20220721083540.1525-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Use ARRAY_SIZE(imx290->supplies) for code that needs the size of the array, instead of relying on the IMX290_NUM_SUPPLIES. The result is less error-prone as it ties the size to the array. Signed-off-by: Laurent Pinchart --- drivers/media/i2c/imx290.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/media/i2c/imx290.c b/drivers/media/i2c/imx290.c index f60a4135dc9c..9a0c458a3af0 100644 --- a/drivers/media/i2c/imx290.c +++ b/drivers/media/i2c/imx290.c @@ -790,10 +790,10 @@ static int imx290_get_regulators(struct device *dev, struct imx290 *imx290) { unsigned int i; - for (i = 0; i < IMX290_NUM_SUPPLIES; i++) + for (i = 0; i < ARRAY_SIZE(imx290->supplies); i++) imx290->supplies[i].supply = imx290_supply_name[i]; - return devm_regulator_bulk_get(dev, IMX290_NUM_SUPPLIES, + return devm_regulator_bulk_get(dev, ARRAY_SIZE(imx290->supplies), imx290->supplies); } @@ -852,7 +852,8 @@ static int imx290_power_on(struct device *dev) return ret; } - ret = regulator_bulk_enable(IMX290_NUM_SUPPLIES, imx290->supplies); + ret = regulator_bulk_enable(ARRAY_SIZE(imx290->supplies), + imx290->supplies); if (ret) { dev_err(dev, "Failed to enable regulators\n"); clk_disable_unprepare(imx290->xclk); @@ -876,7 +877,7 @@ static int imx290_power_off(struct device *dev) clk_disable_unprepare(imx290->xclk); gpiod_set_value_cansleep(imx290->rst_gpio, 1); - regulator_bulk_disable(IMX290_NUM_SUPPLIES, imx290->supplies); + regulator_bulk_disable(ARRAY_SIZE(imx290->supplies), imx290->supplies); return 0; } From patchwork Thu Jul 21 08:35:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 592302 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64D5AC433EF for ; Thu, 21 Jul 2022 08:35:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231593AbiGUIfy (ORCPT ); Thu, 21 Jul 2022 04:35:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34818 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230198AbiGUIfx (ORCPT ); Thu, 21 Jul 2022 04:35:53 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5FB4012AA2 for ; Thu, 21 Jul 2022 01:35:52 -0700 (PDT) Received: from pendragon.ideasonboard.com (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id DA16B13B9; Thu, 21 Jul 2022 10:35:50 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1658392551; bh=P++K1SGk+NHOnNVxrp8rGib6GBb6I3b2vyI6W91OFqA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Y6g9eRloP9UM3pUIh8xwuUn+KbyS+PjnqOPzaV0WGzI+xehUZ7Dtzm2aNDJPRBDZf i3ezdMXqYrNLYt+USZWg60o/0XQx7idNM/BqpInfHC6yq+UVs/gq6w7QMb/o9QF6BB kwgXLRP+qA6M1qbTJfrAefU87II2Pc/mtJ9p1W+U= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Manivannan Sadhasivam , Sakari Ailus Subject: [PATCH 06/19] media: i2c: imx290: Drop regmap cache Date: Thu, 21 Jul 2022 11:35:27 +0300 Message-Id: <20220721083540.1525-7-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220721083540.1525-1-laurent.pinchart@ideasonboard.com> References: <20220721083540.1525-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Only two registers are ever read, and once only. There's no need to cache values. Signed-off-by: Laurent Pinchart --- drivers/media/i2c/imx290.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/media/i2c/imx290.c b/drivers/media/i2c/imx290.c index f280ded2dac3..711282126c34 100644 --- a/drivers/media/i2c/imx290.c +++ b/drivers/media/i2c/imx290.c @@ -97,7 +97,6 @@ static const struct imx290_pixfmt imx290_formats[] = { static const struct regmap_config imx290_regmap_config = { .reg_bits = 16, .val_bits = 8, - .cache_type = REGCACHE_RBTREE, }; static const char * const imx290_test_pattern_menu[] = { From patchwork Thu Jul 21 08:35:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 592301 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2DE40CCA479 for ; Thu, 21 Jul 2022 08:35:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230460AbiGUIf5 (ORCPT ); Thu, 21 Jul 2022 04:35:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34858 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229663AbiGUIfz (ORCPT ); Thu, 21 Jul 2022 04:35:55 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB5C613FB1 for ; Thu, 21 Jul 2022 01:35:53 -0700 (PDT) Received: from pendragon.ideasonboard.com (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 4CD8B18EE; Thu, 21 Jul 2022 10:35:52 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1658392552; bh=4f49gqvUA2NkdGp5VnbAp8M8/62YZRcrLVf/RH4RXc4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qRYSxEjUr2sOXm2tSAiSk83UAIfaZft3E5XwrqyktKTFVXSRj+iEDbZkW9g2Sgy0q qp6Yxfe9vmmcY/L2TDq8lt1Y03LsXFAviAvZ9Wr0aR7SWLe4PxGn2D8NVtzjx3aXm4 1vv3mw+6e3fBaioifY3fGPG7BJBCFkobGtw6QGWs= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Manivannan Sadhasivam , Sakari Ailus Subject: [PATCH 07/19] media: i2c: imx290: Support variable-sized registers Date: Thu, 21 Jul 2022 11:35:28 +0300 Message-Id: <20220721083540.1525-8-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220721083540.1525-1-laurent.pinchart@ideasonboard.com> References: <20220721083540.1525-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The IMX290 has registers of different sizes. To simplify the code, handle this in the read/write functions instead of in the callers by encoding the register size in the symbolic name macros. All registers are defined as 8-bit for now, a subsequent change will move to larger registers where applicable. Signed-off-by: Laurent Pinchart --- drivers/media/i2c/imx290.c | 352 +++++++++++++++++++------------------ 1 file changed, 180 insertions(+), 172 deletions(-) diff --git a/drivers/media/i2c/imx290.c b/drivers/media/i2c/imx290.c index 711282126c34..ac58bfe6db7f 100644 --- a/drivers/media/i2c/imx290.c +++ b/drivers/media/i2c/imx290.c @@ -22,22 +22,28 @@ #include #include -#define IMX290_STANDBY 0x3000 -#define IMX290_REGHOLD 0x3001 -#define IMX290_XMSTA 0x3002 -#define IMX290_FR_FDG_SEL 0x3009 -#define IMX290_BLKLEVEL_LOW 0x300a -#define IMX290_BLKLEVEL_HIGH 0x300b -#define IMX290_GAIN 0x3014 -#define IMX290_HMAX_LOW 0x301c -#define IMX290_HMAX_HIGH 0x301d -#define IMX290_PGCTRL 0x308c -#define IMX290_PHY_LANE_NUM 0x3407 -#define IMX290_CSI_LANE_MODE 0x3443 +#define IMX290_REG_8BIT(n) ((1 << 16) | (n)) +#define IMX290_REG_16BIT(n) ((2 << 16) | (n)) +#define IMX290_REG_24BIT(n) ((3 << 16) | (n)) +#define IMX290_REG_SIZE_SHIFT 16 +#define IMX290_REG_ADDR_MASK 0xffff -#define IMX290_PGCTRL_REGEN BIT(0) -#define IMX290_PGCTRL_THRU BIT(1) -#define IMX290_PGCTRL_MODE(n) ((n) << 4) +#define IMX290_STANDBY IMX290_REG_8BIT(0x3000) +#define IMX290_REGHOLD IMX290_REG_8BIT(0x3001) +#define IMX290_XMSTA IMX290_REG_8BIT(0x3002) +#define IMX290_FR_FDG_SEL IMX290_REG_8BIT(0x3009) +#define IMX290_BLKLEVEL_LOW IMX290_REG_8BIT(0x300a) +#define IMX290_BLKLEVEL_HIGH IMX290_REG_8BIT(0x300b) +#define IMX290_GAIN IMX290_REG_8BIT(0x3014) +#define IMX290_HMAX_LOW IMX290_REG_8BIT(0x301c) +#define IMX290_HMAX_HIGH IMX290_REG_8BIT(0x301d) +#define IMX290_PGCTRL IMX290_REG_8BIT(0x308c) +#define IMX290_PHY_LANE_NUM IMX290_REG_8BIT(0x3407) +#define IMX290_CSI_LANE_MODE IMX290_REG_8BIT(0x3443) + +#define IMX290_PGCTRL_REGEN BIT(0) +#define IMX290_PGCTRL_THRU BIT(1) +#define IMX290_PGCTRL_MODE(n) ((n) << 4) static const char * const imx290_supply_name[] = { "vdda", @@ -48,7 +54,7 @@ static const char * const imx290_supply_name[] = { #define IMX290_NUM_SUPPLIES ARRAY_SIZE(imx290_supply_name) struct imx290_regval { - u16 reg; + u32 reg; u8 val; }; @@ -111,163 +117,163 @@ static const char * const imx290_test_pattern_menu[] = { }; static const struct imx290_regval imx290_global_init_settings[] = { - { 0x3007, 0x00 }, - { 0x3018, 0x65 }, - { 0x3019, 0x04 }, - { 0x301a, 0x00 }, - { 0x3444, 0x20 }, - { 0x3445, 0x25 }, - { 0x303a, 0x0c }, - { 0x3040, 0x00 }, - { 0x3041, 0x00 }, - { 0x303c, 0x00 }, - { 0x303d, 0x00 }, - { 0x3042, 0x9c }, - { 0x3043, 0x07 }, - { 0x303e, 0x49 }, - { 0x303f, 0x04 }, - { 0x304b, 0x0a }, - { 0x300f, 0x00 }, - { 0x3010, 0x21 }, - { 0x3012, 0x64 }, - { 0x3016, 0x09 }, - { 0x3070, 0x02 }, - { 0x3071, 0x11 }, - { 0x309b, 0x10 }, - { 0x309c, 0x22 }, - { 0x30a2, 0x02 }, - { 0x30a6, 0x20 }, - { 0x30a8, 0x20 }, - { 0x30aa, 0x20 }, - { 0x30ac, 0x20 }, - { 0x30b0, 0x43 }, - { 0x3119, 0x9e }, - { 0x311c, 0x1e }, - { 0x311e, 0x08 }, - { 0x3128, 0x05 }, - { 0x313d, 0x83 }, - { 0x3150, 0x03 }, - { 0x317e, 0x00 }, - { 0x32b8, 0x50 }, - { 0x32b9, 0x10 }, - { 0x32ba, 0x00 }, - { 0x32bb, 0x04 }, - { 0x32c8, 0x50 }, - { 0x32c9, 0x10 }, - { 0x32ca, 0x00 }, - { 0x32cb, 0x04 }, - { 0x332c, 0xd3 }, - { 0x332d, 0x10 }, - { 0x332e, 0x0d }, - { 0x3358, 0x06 }, - { 0x3359, 0xe1 }, - { 0x335a, 0x11 }, - { 0x3360, 0x1e }, - { 0x3361, 0x61 }, - { 0x3362, 0x10 }, - { 0x33b0, 0x50 }, - { 0x33b2, 0x1a }, - { 0x33b3, 0x04 }, + { IMX290_REG_8BIT(0x3007), 0x00 }, + { IMX290_REG_8BIT(0x3018), 0x65 }, + { IMX290_REG_8BIT(0x3019), 0x04 }, + { IMX290_REG_8BIT(0x301a), 0x00 }, + { IMX290_REG_8BIT(0x3444), 0x20 }, + { IMX290_REG_8BIT(0x3445), 0x25 }, + { IMX290_REG_8BIT(0x303a), 0x0c }, + { IMX290_REG_8BIT(0x3040), 0x00 }, + { IMX290_REG_8BIT(0x3041), 0x00 }, + { IMX290_REG_8BIT(0x303c), 0x00 }, + { IMX290_REG_8BIT(0x303d), 0x00 }, + { IMX290_REG_8BIT(0x3042), 0x9c }, + { IMX290_REG_8BIT(0x3043), 0x07 }, + { IMX290_REG_8BIT(0x303e), 0x49 }, + { IMX290_REG_8BIT(0x303f), 0x04 }, + { IMX290_REG_8BIT(0x304b), 0x0a }, + { IMX290_REG_8BIT(0x300f), 0x00 }, + { IMX290_REG_8BIT(0x3010), 0x21 }, + { IMX290_REG_8BIT(0x3012), 0x64 }, + { IMX290_REG_8BIT(0x3016), 0x09 }, + { IMX290_REG_8BIT(0x3070), 0x02 }, + { IMX290_REG_8BIT(0x3071), 0x11 }, + { IMX290_REG_8BIT(0x309b), 0x10 }, + { IMX290_REG_8BIT(0x309c), 0x22 }, + { IMX290_REG_8BIT(0x30a2), 0x02 }, + { IMX290_REG_8BIT(0x30a6), 0x20 }, + { IMX290_REG_8BIT(0x30a8), 0x20 }, + { IMX290_REG_8BIT(0x30aa), 0x20 }, + { IMX290_REG_8BIT(0x30ac), 0x20 }, + { IMX290_REG_8BIT(0x30b0), 0x43 }, + { IMX290_REG_8BIT(0x3119), 0x9e }, + { IMX290_REG_8BIT(0x311c), 0x1e }, + { IMX290_REG_8BIT(0x311e), 0x08 }, + { IMX290_REG_8BIT(0x3128), 0x05 }, + { IMX290_REG_8BIT(0x313d), 0x83 }, + { IMX290_REG_8BIT(0x3150), 0x03 }, + { IMX290_REG_8BIT(0x317e), 0x00 }, + { IMX290_REG_8BIT(0x32b8), 0x50 }, + { IMX290_REG_8BIT(0x32b9), 0x10 }, + { IMX290_REG_8BIT(0x32ba), 0x00 }, + { IMX290_REG_8BIT(0x32bb), 0x04 }, + { IMX290_REG_8BIT(0x32c8), 0x50 }, + { IMX290_REG_8BIT(0x32c9), 0x10 }, + { IMX290_REG_8BIT(0x32ca), 0x00 }, + { IMX290_REG_8BIT(0x32cb), 0x04 }, + { IMX290_REG_8BIT(0x332c), 0xd3 }, + { IMX290_REG_8BIT(0x332d), 0x10 }, + { IMX290_REG_8BIT(0x332e), 0x0d }, + { IMX290_REG_8BIT(0x3358), 0x06 }, + { IMX290_REG_8BIT(0x3359), 0xe1 }, + { IMX290_REG_8BIT(0x335a), 0x11 }, + { IMX290_REG_8BIT(0x3360), 0x1e }, + { IMX290_REG_8BIT(0x3361), 0x61 }, + { IMX290_REG_8BIT(0x3362), 0x10 }, + { IMX290_REG_8BIT(0x33b0), 0x50 }, + { IMX290_REG_8BIT(0x33b2), 0x1a }, + { IMX290_REG_8BIT(0x33b3), 0x04 }, }; static const struct imx290_regval imx290_1080p_settings[] = { /* mode settings */ - { 0x3007, 0x00 }, - { 0x303a, 0x0c }, - { 0x3414, 0x0a }, - { 0x3472, 0x80 }, - { 0x3473, 0x07 }, - { 0x3418, 0x38 }, - { 0x3419, 0x04 }, - { 0x3012, 0x64 }, - { 0x3013, 0x00 }, - { 0x305c, 0x18 }, - { 0x305d, 0x03 }, - { 0x305e, 0x20 }, - { 0x305f, 0x01 }, - { 0x315e, 0x1a }, - { 0x3164, 0x1a }, - { 0x3480, 0x49 }, + { IMX290_REG_8BIT(0x3007), 0x00 }, + { IMX290_REG_8BIT(0x303a), 0x0c }, + { IMX290_REG_8BIT(0x3414), 0x0a }, + { IMX290_REG_8BIT(0x3472), 0x80 }, + { IMX290_REG_8BIT(0x3473), 0x07 }, + { IMX290_REG_8BIT(0x3418), 0x38 }, + { IMX290_REG_8BIT(0x3419), 0x04 }, + { IMX290_REG_8BIT(0x3012), 0x64 }, + { IMX290_REG_8BIT(0x3013), 0x00 }, + { IMX290_REG_8BIT(0x305c), 0x18 }, + { IMX290_REG_8BIT(0x305d), 0x03 }, + { IMX290_REG_8BIT(0x305e), 0x20 }, + { IMX290_REG_8BIT(0x305f), 0x01 }, + { IMX290_REG_8BIT(0x315e), 0x1a }, + { IMX290_REG_8BIT(0x3164), 0x1a }, + { IMX290_REG_8BIT(0x3480), 0x49 }, /* data rate settings */ - { 0x3405, 0x10 }, - { 0x3446, 0x57 }, - { 0x3447, 0x00 }, - { 0x3448, 0x37 }, - { 0x3449, 0x00 }, - { 0x344a, 0x1f }, - { 0x344b, 0x00 }, - { 0x344c, 0x1f }, - { 0x344d, 0x00 }, - { 0x344e, 0x1f }, - { 0x344f, 0x00 }, - { 0x3450, 0x77 }, - { 0x3451, 0x00 }, - { 0x3452, 0x1f }, - { 0x3453, 0x00 }, - { 0x3454, 0x17 }, - { 0x3455, 0x00 }, + { IMX290_REG_8BIT(0x3405), 0x10 }, + { IMX290_REG_8BIT(0x3446), 0x57 }, + { IMX290_REG_8BIT(0x3447), 0x00 }, + { IMX290_REG_8BIT(0x3448), 0x37 }, + { IMX290_REG_8BIT(0x3449), 0x00 }, + { IMX290_REG_8BIT(0x344a), 0x1f }, + { IMX290_REG_8BIT(0x344b), 0x00 }, + { IMX290_REG_8BIT(0x344c), 0x1f }, + { IMX290_REG_8BIT(0x344d), 0x00 }, + { IMX290_REG_8BIT(0x344e), 0x1f }, + { IMX290_REG_8BIT(0x344f), 0x00 }, + { IMX290_REG_8BIT(0x3450), 0x77 }, + { IMX290_REG_8BIT(0x3451), 0x00 }, + { IMX290_REG_8BIT(0x3452), 0x1f }, + { IMX290_REG_8BIT(0x3453), 0x00 }, + { IMX290_REG_8BIT(0x3454), 0x17 }, + { IMX290_REG_8BIT(0x3455), 0x00 }, }; static const struct imx290_regval imx290_720p_settings[] = { /* mode settings */ - { 0x3007, 0x10 }, - { 0x303a, 0x06 }, - { 0x3414, 0x04 }, - { 0x3472, 0x00 }, - { 0x3473, 0x05 }, - { 0x3418, 0xd0 }, - { 0x3419, 0x02 }, - { 0x3012, 0x64 }, - { 0x3013, 0x00 }, - { 0x305c, 0x20 }, - { 0x305d, 0x00 }, - { 0x305e, 0x20 }, - { 0x305f, 0x01 }, - { 0x315e, 0x1a }, - { 0x3164, 0x1a }, - { 0x3480, 0x49 }, + { IMX290_REG_8BIT(0x3007), 0x10 }, + { IMX290_REG_8BIT(0x303a), 0x06 }, + { IMX290_REG_8BIT(0x3414), 0x04 }, + { IMX290_REG_8BIT(0x3472), 0x00 }, + { IMX290_REG_8BIT(0x3473), 0x05 }, + { IMX290_REG_8BIT(0x3418), 0xd0 }, + { IMX290_REG_8BIT(0x3419), 0x02 }, + { IMX290_REG_8BIT(0x3012), 0x64 }, + { IMX290_REG_8BIT(0x3013), 0x00 }, + { IMX290_REG_8BIT(0x305c), 0x20 }, + { IMX290_REG_8BIT(0x305d), 0x00 }, + { IMX290_REG_8BIT(0x305e), 0x20 }, + { IMX290_REG_8BIT(0x305f), 0x01 }, + { IMX290_REG_8BIT(0x315e), 0x1a }, + { IMX290_REG_8BIT(0x3164), 0x1a }, + { IMX290_REG_8BIT(0x3480), 0x49 }, /* data rate settings */ - { 0x3405, 0x10 }, - { 0x3446, 0x4f }, - { 0x3447, 0x00 }, - { 0x3448, 0x2f }, - { 0x3449, 0x00 }, - { 0x344a, 0x17 }, - { 0x344b, 0x00 }, - { 0x344c, 0x17 }, - { 0x344d, 0x00 }, - { 0x344e, 0x17 }, - { 0x344f, 0x00 }, - { 0x3450, 0x57 }, - { 0x3451, 0x00 }, - { 0x3452, 0x17 }, - { 0x3453, 0x00 }, - { 0x3454, 0x17 }, - { 0x3455, 0x00 }, + { IMX290_REG_8BIT(0x3405), 0x10 }, + { IMX290_REG_8BIT(0x3446), 0x4f }, + { IMX290_REG_8BIT(0x3447), 0x00 }, + { IMX290_REG_8BIT(0x3448), 0x2f }, + { IMX290_REG_8BIT(0x3449), 0x00 }, + { IMX290_REG_8BIT(0x344a), 0x17 }, + { IMX290_REG_8BIT(0x344b), 0x00 }, + { IMX290_REG_8BIT(0x344c), 0x17 }, + { IMX290_REG_8BIT(0x344d), 0x00 }, + { IMX290_REG_8BIT(0x344e), 0x17 }, + { IMX290_REG_8BIT(0x344f), 0x00 }, + { IMX290_REG_8BIT(0x3450), 0x57 }, + { IMX290_REG_8BIT(0x3451), 0x00 }, + { IMX290_REG_8BIT(0x3452), 0x17 }, + { IMX290_REG_8BIT(0x3453), 0x00 }, + { IMX290_REG_8BIT(0x3454), 0x17 }, + { IMX290_REG_8BIT(0x3455), 0x00 }, }; static const struct imx290_regval imx290_10bit_settings[] = { - { 0x3005, 0x00}, - { 0x3046, 0x00}, - { 0x3129, 0x1d}, - { 0x317c, 0x12}, - { 0x31ec, 0x37}, - { 0x3441, 0x0a}, - { 0x3442, 0x0a}, - { 0x300a, 0x3c}, - { 0x300b, 0x00}, + { IMX290_REG_8BIT(0x3005), 0x00}, + { IMX290_REG_8BIT(0x3046), 0x00}, + { IMX290_REG_8BIT(0x3129), 0x1d}, + { IMX290_REG_8BIT(0x317c), 0x12}, + { IMX290_REG_8BIT(0x31ec), 0x37}, + { IMX290_REG_8BIT(0x3441), 0x0a}, + { IMX290_REG_8BIT(0x3442), 0x0a}, + { IMX290_REG_8BIT(0x300a), 0x3c}, + { IMX290_REG_8BIT(0x300b), 0x00}, }; static const struct imx290_regval imx290_12bit_settings[] = { - { 0x3005, 0x01 }, - { 0x3046, 0x01 }, - { 0x3129, 0x00 }, - { 0x317c, 0x00 }, - { 0x31ec, 0x0e }, - { 0x3441, 0x0c }, - { 0x3442, 0x0c }, - { 0x300a, 0xf0 }, - { 0x300b, 0x00 }, + { IMX290_REG_8BIT(0x3005), 0x01 }, + { IMX290_REG_8BIT(0x3046), 0x01 }, + { IMX290_REG_8BIT(0x3129), 0x00 }, + { IMX290_REG_8BIT(0x317c), 0x00 }, + { IMX290_REG_8BIT(0x31ec), 0x0e }, + { IMX290_REG_8BIT(0x3441), 0x0c }, + { IMX290_REG_8BIT(0x3442), 0x0c }, + { IMX290_REG_8BIT(0x300a), 0xf0 }, + { IMX290_REG_8BIT(0x300b), 0x00 }, }; /* supported link frequencies */ @@ -362,33 +368,35 @@ static inline struct imx290 *to_imx290(struct v4l2_subdev *_sd) return container_of(_sd, struct imx290, sd); } -static inline int __always_unused imx290_read_reg(struct imx290 *imx290, u16 addr, u8 *value) +static int __always_unused imx290_read_reg(struct imx290 *imx290, u32 addr, u32 *value) { - unsigned int regval; + u8 data[3] = { 0, 0, 0 }; int ret; - ret = regmap_read(imx290->regmap, addr, ®val); - if (ret) { - dev_err(imx290->dev, "Failed to read register 0x%04x: %d\n", - addr, ret); + ret = regmap_raw_read(imx290->regmap, addr & IMX290_REG_ADDR_MASK, + data, (addr >> IMX290_REG_SIZE_SHIFT) & 3); + if (ret < 0) { + dev_err(imx290->dev, "%u-bit read from 0x%04x failed: %d\n", + ((addr >> IMX290_REG_SIZE_SHIFT) & 3) * 8, + addr & IMX290_REG_ADDR_MASK, ret); return ret; } - *value = regval & 0xff; - + *value = (data[2] << 16) | (data[1] << 8) | data[0]; return 0; } -static int imx290_write_reg(struct imx290 *imx290, u16 addr, u8 value) +static int imx290_write_reg(struct imx290 *imx290, u32 addr, u32 value) { + u8 data[3] = { value & 0xff, (value >> 8) & 0xff, value >> 16 }; int ret; - ret = regmap_write(imx290->regmap, addr, value); - if (ret) { - dev_err(imx290->dev, "Failed to write register 0x%04x: %d\n", - addr, ret); - return ret; - } + ret = regmap_raw_write(imx290->regmap, addr & IMX290_REG_ADDR_MASK, + data, (addr >> IMX290_REG_SIZE_SHIFT) & 3); + if (ret < 0) + dev_err(imx290->dev, "%u-bit write to 0x%04x failed: %d\n", + ((addr >> IMX290_REG_SIZE_SHIFT) & 3) * 8, + addr & IMX290_REG_ADDR_MASK, ret); return ret; } From patchwork Thu Jul 21 08:35:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 592300 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5BAA2C433EF for ; Thu, 21 Jul 2022 08:36:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231675AbiGUIf7 (ORCPT ); Thu, 21 Jul 2022 04:35:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34912 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229663AbiGUIf7 (ORCPT ); Thu, 21 Jul 2022 04:35:59 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C018913D62 for ; Thu, 21 Jul 2022 01:35:57 -0700 (PDT) Received: from pendragon.ideasonboard.com (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 56D1C9B1; Thu, 21 Jul 2022 10:35:56 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1658392556; bh=/I+Y7Uais+iL6yR9zVqEb8ABoCCFyhGMYFtWQsJNffk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QC9jcCvYvM6J7+tEZj8APoc/s0J59levZyJquGASL+qre/x/f82skcQG7Tg84+j9E RlDVYFLEDu1App+sIsYXRThRCYn19CHy/Y7AYo1iS9xgqDeX8XCzkINBJw93RC6diM KdiNFMXdu4Z0YFsEvtYtvFdhIJCsph/AhdE5Oo5Q= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Manivannan Sadhasivam , Sakari Ailus Subject: [PATCH 10/19] media: i2c: imx290: Define more register macros Date: Thu, 21 Jul 2022 11:35:31 +0300 Message-Id: <20220721083540.1525-11-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220721083540.1525-1-laurent.pinchart@ideasonboard.com> References: <20220721083540.1525-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Define macros for all registers programmed by the driver for which documentation is available to increase readability. This starts making use of 16-bit registers in the register arrays, so the value field has to be increased to 32 bits. Signed-off-by: Laurent Pinchart --- drivers/media/i2c/imx290.c | 219 +++++++++++++++++++++---------------- 1 file changed, 124 insertions(+), 95 deletions(-) diff --git a/drivers/media/i2c/imx290.c b/drivers/media/i2c/imx290.c index 5b7f9027b50f..bec326a83952 100644 --- a/drivers/media/i2c/imx290.c +++ b/drivers/media/i2c/imx290.c @@ -31,14 +31,73 @@ #define IMX290_STANDBY IMX290_REG_8BIT(0x3000) #define IMX290_REGHOLD IMX290_REG_8BIT(0x3001) #define IMX290_XMSTA IMX290_REG_8BIT(0x3002) +#define IMX290_ADBIT IMX290_REG_8BIT(0x3005) +#define IMX290_ADBIT_10BIT (0 << 0) +#define IMX290_ADBIT_12BIT (1 << 0) +#define IMX290_CTRL_07 IMX290_REG_8BIT(0x3007) +#define IMX290_VREVERSE BIT(0) +#define IMX290_HREVERSE BIT(1) +#define IMX290_WINMODE_1080P (0 << 4) +#define IMX290_WINMODE_720P (1 << 4) +#define IMX290_WINMODE_CROP (4 << 4) #define IMX290_FR_FDG_SEL IMX290_REG_8BIT(0x3009) #define IMX290_BLKLEVEL IMX290_REG_16BIT(0x300a) #define IMX290_GAIN IMX290_REG_8BIT(0x3014) +#define IMX290_VMAX IMX290_REG_24BIT(0x3018) #define IMX290_HMAX IMX290_REG_16BIT(0x301c) +#define IMX290_SHS1 IMX290_REG_24BIT(0x3020) +#define IMX290_WINWV_OB IMX290_REG_8BIT(0x303a) +#define IMX290_WINPV IMX290_REG_16BIT(0x303c) +#define IMX290_WINWV IMX290_REG_16BIT(0x303e) +#define IMX290_WINPH IMX290_REG_16BIT(0x3040) +#define IMX290_WINWH IMX290_REG_16BIT(0x3042) +#define IMX290_OUT_CTRL IMX290_REG_8BIT(0x3046) +#define IMX290_ODBIT_10BIT (0 << 0) +#define IMX290_ODBIT_12BIT (1 << 0) +#define IMX290_OPORTSEL_PARALLEL (0x0 << 4) +#define IMX290_OPORTSEL_LVDS_2CH (0xd << 4) +#define IMX290_OPORTSEL_LVDS_4CH (0xe << 4) +#define IMX290_OPORTSEL_LVDS_8CH (0xf << 4) +#define IMX290_XSOUTSEL IMX290_REG_8BIT(0x304b) +#define IMX290_XSOUTSEL_XVSOUTSEL_HIGH (0 << 0) +#define IMX290_XSOUTSEL_XVSOUTSEL_VSYNC (2 << 0) +#define IMX290_XSOUTSEL_XHSOUTSEL_HIGH (0 << 2) +#define IMX290_XSOUTSEL_XHSOUTSEL_HSYNC (2 << 2) +#define IMX290_INCKSEL1 IMX290_REG_8BIT(0x305c) +#define IMX290_INCKSEL2 IMX290_REG_8BIT(0x305d) +#define IMX290_INCKSEL3 IMX290_REG_8BIT(0x305e) +#define IMX290_INCKSEL4 IMX290_REG_8BIT(0x305f) #define IMX290_PGCTRL IMX290_REG_8BIT(0x308c) +#define IMX290_ADBIT1 IMX290_REG_8BIT(0x3129) +#define IMX290_ADBIT1_10BIT 0x1d +#define IMX290_ADBIT1_12BIT 0x00 +#define IMX290_INCKSEL5 IMX290_REG_8BIT(0x315e) +#define IMX290_INCKSEL6 IMX290_REG_8BIT(0x3164) +#define IMX290_ADBIT2 IMX290_REG_8BIT(0x317c) +#define IMX290_ADBIT2_10BIT 0x12 +#define IMX290_ADBIT2_12BIT 0x00 #define IMX290_CHIP_ID IMX290_REG_16BIT(0x319a) +#define IMX290_ADBIT3 IMX290_REG_16BIT(0x31ec) +#define IMX290_ADBIT3_10BIT 0x37 +#define IMX290_ADBIT3_12BIT 0x0e +#define IMX290_REPETITION IMX290_REG_8BIT(0x3405) #define IMX290_PHY_LANE_NUM IMX290_REG_8BIT(0x3407) +#define IMX290_OPB_SIZE_V IMX290_REG_8BIT(0x3414) +#define IMX290_Y_OUT_SIZE IMX290_REG_16BIT(0x3418) +#define IMX290_CSI_DT_FMT IMX290_REG_16BIT(0x3441) +#define IMX290_CSI_DT_FMT_RAW10 0x0a0a +#define IMX290_CSI_DT_FMT_RAW12 0x0c0c #define IMX290_CSI_LANE_MODE IMX290_REG_8BIT(0x3443) +#define IMX290_EXTCK_FREQ IMX290_REG_16BIT(0x3444) +#define IMX290_TCLKPOST IMX290_REG_16BIT(0x3446) +#define IMX290_THSZERO IMX290_REG_16BIT(0x3448) +#define IMX290_THSPREPARE IMX290_REG_16BIT(0x344a) +#define IMX290_TCLKTRAIL IMX290_REG_16BIT(0x344c) +#define IMX290_THSTRAIL IMX290_REG_16BIT(0x344e) +#define IMX290_TCLKZERO IMX290_REG_16BIT(0x3450) +#define IMX290_TCLKPREPARE IMX290_REG_16BIT(0x3452) +#define IMX290_TLPX IMX290_REG_16BIT(0x3454) +#define IMX290_X_OUT_SIZE IMX290_REG_16BIT(0x3472) #define IMX290_PGCTRL_REGEN BIT(0) #define IMX290_PGCTRL_THRU BIT(1) @@ -54,7 +113,7 @@ static const char * const imx290_supply_name[] = { struct imx290_regval { u32 reg; - u8 val; + u32 val; }; struct imx290_mode { @@ -116,22 +175,16 @@ static const char * const imx290_test_pattern_menu[] = { }; static const struct imx290_regval imx290_global_init_settings[] = { - { IMX290_REG_8BIT(0x3007), 0x00 }, - { IMX290_REG_8BIT(0x3018), 0x65 }, - { IMX290_REG_8BIT(0x3019), 0x04 }, - { IMX290_REG_8BIT(0x301a), 0x00 }, - { IMX290_REG_8BIT(0x3444), 0x20 }, - { IMX290_REG_8BIT(0x3445), 0x25 }, - { IMX290_REG_8BIT(0x303a), 0x0c }, - { IMX290_REG_8BIT(0x3040), 0x00 }, - { IMX290_REG_8BIT(0x3041), 0x00 }, - { IMX290_REG_8BIT(0x303c), 0x00 }, - { IMX290_REG_8BIT(0x303d), 0x00 }, - { IMX290_REG_8BIT(0x3042), 0x9c }, - { IMX290_REG_8BIT(0x3043), 0x07 }, - { IMX290_REG_8BIT(0x303e), 0x49 }, - { IMX290_REG_8BIT(0x303f), 0x04 }, - { IMX290_REG_8BIT(0x304b), 0x0a }, + { IMX290_CTRL_07, IMX290_WINMODE_1080P }, + { IMX290_VMAX, 1125 }, + { IMX290_EXTCK_FREQ, 0x2520 }, + { IMX290_WINWV_OB, 12 }, + { IMX290_WINPH, 0 }, + { IMX290_WINPV, 0 }, + { IMX290_WINWH, 1948 }, + { IMX290_WINWV, 1097 }, + { IMX290_XSOUTSEL, IMX290_XSOUTSEL_XVSOUTSEL_VSYNC | + IMX290_XSOUTSEL_XHSOUTSEL_HSYNC }, { IMX290_REG_8BIT(0x300f), 0x00 }, { IMX290_REG_8BIT(0x3010), 0x21 }, { IMX290_REG_8BIT(0x3012), 0x64 }, @@ -177,102 +230,78 @@ static const struct imx290_regval imx290_global_init_settings[] = { static const struct imx290_regval imx290_1080p_settings[] = { /* mode settings */ - { IMX290_REG_8BIT(0x3007), 0x00 }, - { IMX290_REG_8BIT(0x303a), 0x0c }, - { IMX290_REG_8BIT(0x3414), 0x0a }, - { IMX290_REG_8BIT(0x3472), 0x80 }, - { IMX290_REG_8BIT(0x3473), 0x07 }, - { IMX290_REG_8BIT(0x3418), 0x38 }, - { IMX290_REG_8BIT(0x3419), 0x04 }, + { IMX290_CTRL_07, IMX290_WINMODE_1080P }, + { IMX290_WINWV_OB, 12 }, + { IMX290_OPB_SIZE_V, 10 }, + { IMX290_X_OUT_SIZE, 1920 }, + { IMX290_Y_OUT_SIZE, 1080 }, { IMX290_REG_8BIT(0x3012), 0x64 }, { IMX290_REG_8BIT(0x3013), 0x00 }, - { IMX290_REG_8BIT(0x305c), 0x18 }, - { IMX290_REG_8BIT(0x305d), 0x03 }, - { IMX290_REG_8BIT(0x305e), 0x20 }, - { IMX290_REG_8BIT(0x305f), 0x01 }, - { IMX290_REG_8BIT(0x315e), 0x1a }, - { IMX290_REG_8BIT(0x3164), 0x1a }, + { IMX290_INCKSEL1, 0x18 }, + { IMX290_INCKSEL2, 0x03 }, + { IMX290_INCKSEL3, 0x20 }, + { IMX290_INCKSEL4, 0x01 }, + { IMX290_INCKSEL5, 0x1a }, + { IMX290_INCKSEL6, 0x1a }, { IMX290_REG_8BIT(0x3480), 0x49 }, /* data rate settings */ - { IMX290_REG_8BIT(0x3405), 0x10 }, - { IMX290_REG_8BIT(0x3446), 0x57 }, - { IMX290_REG_8BIT(0x3447), 0x00 }, - { IMX290_REG_8BIT(0x3448), 0x37 }, - { IMX290_REG_8BIT(0x3449), 0x00 }, - { IMX290_REG_8BIT(0x344a), 0x1f }, - { IMX290_REG_8BIT(0x344b), 0x00 }, - { IMX290_REG_8BIT(0x344c), 0x1f }, - { IMX290_REG_8BIT(0x344d), 0x00 }, - { IMX290_REG_8BIT(0x344e), 0x1f }, - { IMX290_REG_8BIT(0x344f), 0x00 }, - { IMX290_REG_8BIT(0x3450), 0x77 }, - { IMX290_REG_8BIT(0x3451), 0x00 }, - { IMX290_REG_8BIT(0x3452), 0x1f }, - { IMX290_REG_8BIT(0x3453), 0x00 }, - { IMX290_REG_8BIT(0x3454), 0x17 }, - { IMX290_REG_8BIT(0x3455), 0x00 }, + { IMX290_REPETITION, 0x10 }, + { IMX290_TCLKPOST, 87 }, + { IMX290_THSZERO, 55 }, + { IMX290_THSPREPARE, 31 }, + { IMX290_TCLKTRAIL, 31 }, + { IMX290_THSTRAIL, 31 }, + { IMX290_TCLKZERO, 119 }, + { IMX290_TCLKPREPARE, 31 }, + { IMX290_TLPX, 23 }, }; static const struct imx290_regval imx290_720p_settings[] = { /* mode settings */ - { IMX290_REG_8BIT(0x3007), 0x10 }, - { IMX290_REG_8BIT(0x303a), 0x06 }, - { IMX290_REG_8BIT(0x3414), 0x04 }, - { IMX290_REG_8BIT(0x3472), 0x00 }, - { IMX290_REG_8BIT(0x3473), 0x05 }, - { IMX290_REG_8BIT(0x3418), 0xd0 }, - { IMX290_REG_8BIT(0x3419), 0x02 }, + { IMX290_CTRL_07, IMX290_WINMODE_720P }, + { IMX290_WINWV_OB, 6 }, + { IMX290_OPB_SIZE_V, 4 }, + { IMX290_X_OUT_SIZE, 1280 }, + { IMX290_Y_OUT_SIZE, 720 }, { IMX290_REG_8BIT(0x3012), 0x64 }, { IMX290_REG_8BIT(0x3013), 0x00 }, - { IMX290_REG_8BIT(0x305c), 0x20 }, - { IMX290_REG_8BIT(0x305d), 0x00 }, - { IMX290_REG_8BIT(0x305e), 0x20 }, - { IMX290_REG_8BIT(0x305f), 0x01 }, - { IMX290_REG_8BIT(0x315e), 0x1a }, - { IMX290_REG_8BIT(0x3164), 0x1a }, + { IMX290_INCKSEL1, 0x20 }, + { IMX290_INCKSEL2, 0x00 }, + { IMX290_INCKSEL3, 0x20 }, + { IMX290_INCKSEL4, 0x01 }, + { IMX290_INCKSEL5, 0x1a }, + { IMX290_INCKSEL6, 0x1a }, { IMX290_REG_8BIT(0x3480), 0x49 }, /* data rate settings */ - { IMX290_REG_8BIT(0x3405), 0x10 }, - { IMX290_REG_8BIT(0x3446), 0x4f }, - { IMX290_REG_8BIT(0x3447), 0x00 }, - { IMX290_REG_8BIT(0x3448), 0x2f }, - { IMX290_REG_8BIT(0x3449), 0x00 }, - { IMX290_REG_8BIT(0x344a), 0x17 }, - { IMX290_REG_8BIT(0x344b), 0x00 }, - { IMX290_REG_8BIT(0x344c), 0x17 }, - { IMX290_REG_8BIT(0x344d), 0x00 }, - { IMX290_REG_8BIT(0x344e), 0x17 }, - { IMX290_REG_8BIT(0x344f), 0x00 }, - { IMX290_REG_8BIT(0x3450), 0x57 }, - { IMX290_REG_8BIT(0x3451), 0x00 }, - { IMX290_REG_8BIT(0x3452), 0x17 }, - { IMX290_REG_8BIT(0x3453), 0x00 }, - { IMX290_REG_8BIT(0x3454), 0x17 }, - { IMX290_REG_8BIT(0x3455), 0x00 }, + { IMX290_REPETITION, 0x10 }, + { IMX290_TCLKPOST, 79 }, + { IMX290_THSZERO, 47 }, + { IMX290_THSPREPARE, 23 }, + { IMX290_TCLKTRAIL, 23 }, + { IMX290_THSTRAIL, 23 }, + { IMX290_TCLKZERO, 87 }, + { IMX290_TCLKPREPARE, 23 }, + { IMX290_TLPX, 23 }, }; static const struct imx290_regval imx290_10bit_settings[] = { - { IMX290_REG_8BIT(0x3005), 0x00}, - { IMX290_REG_8BIT(0x3046), 0x00}, - { IMX290_REG_8BIT(0x3129), 0x1d}, - { IMX290_REG_8BIT(0x317c), 0x12}, - { IMX290_REG_8BIT(0x31ec), 0x37}, - { IMX290_REG_8BIT(0x3441), 0x0a}, - { IMX290_REG_8BIT(0x3442), 0x0a}, - { IMX290_REG_8BIT(0x300a), 0x3c}, - { IMX290_REG_8BIT(0x300b), 0x00}, + { IMX290_ADBIT, IMX290_ADBIT_10BIT }, + { IMX290_OUT_CTRL, IMX290_ODBIT_10BIT }, + { IMX290_ADBIT1, IMX290_ADBIT1_10BIT }, + { IMX290_ADBIT2, IMX290_ADBIT2_10BIT }, + { IMX290_ADBIT3, IMX290_ADBIT3_10BIT }, + { IMX290_CSI_DT_FMT, IMX290_CSI_DT_FMT_RAW10 }, + { IMX290_BLKLEVEL, 60 }, }; static const struct imx290_regval imx290_12bit_settings[] = { - { IMX290_REG_8BIT(0x3005), 0x01 }, - { IMX290_REG_8BIT(0x3046), 0x01 }, - { IMX290_REG_8BIT(0x3129), 0x00 }, - { IMX290_REG_8BIT(0x317c), 0x00 }, - { IMX290_REG_8BIT(0x31ec), 0x0e }, - { IMX290_REG_8BIT(0x3441), 0x0c }, - { IMX290_REG_8BIT(0x3442), 0x0c }, - { IMX290_REG_8BIT(0x300a), 0xf0 }, - { IMX290_REG_8BIT(0x300b), 0x00 }, + { IMX290_ADBIT, IMX290_ADBIT_12BIT }, + { IMX290_OUT_CTRL, IMX290_ODBIT_12BIT }, + { IMX290_ADBIT1, IMX290_ADBIT1_12BIT }, + { IMX290_ADBIT2, IMX290_ADBIT2_12BIT }, + { IMX290_ADBIT3, IMX290_ADBIT3_12BIT }, + { IMX290_CSI_DT_FMT, IMX290_CSI_DT_FMT_RAW12 }, + { IMX290_BLKLEVEL, 240 }, }; /* supported link frequencies */ From patchwork Thu Jul 21 08:35:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 592299 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2FBEECCA479 for ; Thu, 21 Jul 2022 08:36:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231911AbiGUIgD (ORCPT ); Thu, 21 Jul 2022 04:36:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34954 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231859AbiGUIgB (ORCPT ); Thu, 21 Jul 2022 04:36:01 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 43C0713F6A for ; Thu, 21 Jul 2022 01:36:01 -0700 (PDT) Received: from pendragon.ideasonboard.com (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id C8BDD825; Thu, 21 Jul 2022 10:35:59 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1658392560; bh=VfjfsXAw0fxAUEVRsj1Ez4AGWnOR24fziFFBMkZ/vGU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BzuxBHr3s8jnLjjIv5AR0ejuHtlo0lCctTDO+np/+Y7srf29GiST5/7G9tqqDmhgI M3YLAXzzbMRTKY3LrVmFeezOuHUeqM7dN5V8LAa329ZRC+AHoKahTZR/7p7NCfGht1 PLfBa5A5JFSUAexFvB8eI/JzkThZer8R88EpcyKI= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Manivannan Sadhasivam , Sakari Ailus Subject: [PATCH 12/19] media: i2c: imx290: Fix max gain value Date: Thu, 21 Jul 2022 11:35:33 +0300 Message-Id: <20220721083540.1525-13-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220721083540.1525-1-laurent.pinchart@ideasonboard.com> References: <20220721083540.1525-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The gain is expressed in multiple of 0.3dB, as a value between 0.0dB and 72.0dB. The maximum value is thus 240, not 72. Signed-off-by: Laurent Pinchart --- drivers/media/i2c/imx290.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/i2c/imx290.c b/drivers/media/i2c/imx290.c index 3cb024b73ee7..1bd464932432 100644 --- a/drivers/media/i2c/imx290.c +++ b/drivers/media/i2c/imx290.c @@ -1020,7 +1020,7 @@ static int imx290_probe(struct i2c_client *client) imx290->ctrls.lock = &imx290->lock; v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops, - V4L2_CID_GAIN, 0, 72, 1, 0); + V4L2_CID_GAIN, 0, 240, 1, 0); v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops, V4L2_CID_EXPOSURE, 1, IMX290_VMAX_DEFAULT - 2, 1, From patchwork Thu Jul 21 08:35:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 592298 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F11DDC433EF for ; Thu, 21 Jul 2022 08:36:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231859AbiGUIgF (ORCPT ); Thu, 21 Jul 2022 04:36:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35006 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231966AbiGUIgE (ORCPT ); Thu, 21 Jul 2022 04:36:04 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D586F14011 for ; Thu, 21 Jul 2022 01:36:03 -0700 (PDT) Received: from pendragon.ideasonboard.com (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 51D0AA38; Thu, 21 Jul 2022 10:36:02 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1658392562; bh=Ki8f+TS/S0VGL6RhpHqNoWW0COHldTvbQBBvkwl4sh4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=wKnbAnpbAhE9NiXRx7TAaRMIxru4mJRSBGxixvNOuZonCw0HqqBYmGh24CV3cLCr4 70HNFwsvI59K6OFVK5adIMCjq0hYxKHMcM94BieJKP3K6OEJHhIdWkiF2WnX1bJebI ryrGI5yvRTSlqgwNZ+EXhZhfjELyfAiEaUVNsnu4= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Manivannan Sadhasivam , Sakari Ailus Subject: [PATCH 14/19] media: i2c: imx290: Implement HBLANK and VBLANK controls Date: Thu, 21 Jul 2022 11:35:35 +0300 Message-Id: <20220721083540.1525-15-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220721083540.1525-1-laurent.pinchart@ideasonboard.com> References: <20220721083540.1525-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Add support for the V4L2_CID_HBLANK and V4L2_CID_VBLANK controls to the imx290 driver. Make the controls read-only to start with, to report the values to userspace for timing calculation. Signed-off-by: Laurent Pinchart --- drivers/media/i2c/imx290.c | 39 +++++++++++++++++++++++++++++++++++++- 1 file changed, 38 insertions(+), 1 deletion(-) diff --git a/drivers/media/i2c/imx290.c b/drivers/media/i2c/imx290.c index 4408dd3e191f..7190399f4111 100644 --- a/drivers/media/i2c/imx290.c +++ b/drivers/media/i2c/imx290.c @@ -146,6 +146,8 @@ struct imx290 { struct v4l2_ctrl_handler ctrls; struct v4l2_ctrl *link_freq; struct v4l2_ctrl *pixel_rate; + struct v4l2_ctrl *hblank; + struct v4l2_ctrl *vblank; struct mutex lock; }; @@ -642,6 +644,20 @@ static int imx290_set_fmt(struct v4l2_subdev *sd, if (imx290->pixel_rate) __v4l2_ctrl_s_ctrl_int64(imx290->pixel_rate, imx290_calc_pixel_rate(imx290)); + + if (imx290->hblank) { + unsigned int hblank = mode->hmax - mode->width; + + __v4l2_ctrl_modify_range(imx290->hblank, hblank, hblank, + 1, hblank); + } + + if (imx290->vblank) { + unsigned int vblank = IMX290_VMAX_DEFAULT - mode->height; + + __v4l2_ctrl_modify_range(imx290->vblank, vblank, vblank, + 1, vblank); + } } *format = fmt->format; @@ -880,9 +896,10 @@ static const struct media_entity_operations imx290_subdev_entity_ops = { static int imx290_ctrl_init(struct imx290 *imx290) { + unsigned int blank; int ret; - v4l2_ctrl_handler_init(&imx290->ctrls, 5); + v4l2_ctrl_handler_init(&imx290->ctrls, 7); imx290->ctrls.lock = &imx290->lock; v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops, @@ -910,6 +927,26 @@ static int imx290_ctrl_init(struct imx290 *imx290) ARRAY_SIZE(imx290_test_pattern_menu) - 1, 0, 0, imx290_test_pattern_menu); + /* + * Horizontal blanking is controlled through the HMAX register, which + * contains a line length in INCK clock units. The INCK frequency is + * fixed to 74.25 MHz. The HMAX value is currently fixed to 1100, + * convert it to a number of pixels based on the nominal pixel rate. + */ + blank = imx290->current_mode->hmax - imx290->current_mode->width; + imx290->hblank = v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops, + V4L2_CID_HBLANK, blank, blank, 1, + blank); + if (imx290->hblank) + imx290->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; + + blank = IMX290_VMAX_DEFAULT - imx290->current_mode->height; + imx290->vblank = v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops, + V4L2_CID_VBLANK, blank, blank, 1, + blank); + if (imx290->vblank) + imx290->vblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; + imx290->sd.ctrl_handler = &imx290->ctrls; if (imx290->ctrls.error) { From patchwork Thu Jul 21 08:35:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 592297 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95229C433EF for ; Thu, 21 Jul 2022 08:36:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229907AbiGUIgI (ORCPT ); Thu, 21 Jul 2022 04:36:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35032 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232151AbiGUIgG (ORCPT ); Thu, 21 Jul 2022 04:36:06 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4E3BA165AA for ; Thu, 21 Jul 2022 01:36:06 -0700 (PDT) Received: from pendragon.ideasonboard.com (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id DB91D24A2; Thu, 21 Jul 2022 10:36:04 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1658392565; bh=Xx3ZCK1NUqqTysHMYE2ydKZSNvGt6yqmg34UitWcYsE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=o5wiaQpXUoZDb/ckLH9ZfOsvdVsdewZz4xOdZQtV35N+K/rWoWLfg79Eji9qnGgY1 X6XAXrMg3b+tutiLKE1VHA4fd1Es3uLWwhrs37A0IYTwofm5eeqYhNDmQqJTmNEChx 0av8gfpvvaiL6XQCIXek4O5swx5/yXF2v3ZSIZ1w= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Manivannan Sadhasivam , Sakari Ailus Subject: [PATCH 16/19] media: i2c: imx290: Move registers with fixed value to init array Date: Thu, 21 Jul 2022 11:35:37 +0300 Message-Id: <20220721083540.1525-17-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220721083540.1525-1-laurent.pinchart@ideasonboard.com> References: <20220721083540.1525-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Registers 0x3012, 0x3013 and 0x3480 are not documented and are set in the per-mode register arrays with values indentical for all modes. Move them to the common array. Signed-off-by: Laurent Pinchart --- drivers/media/i2c/imx290.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/media/i2c/imx290.c b/drivers/media/i2c/imx290.c index 78772c6327a2..fc6e87fada1c 100644 --- a/drivers/media/i2c/imx290.c +++ b/drivers/media/i2c/imx290.c @@ -192,6 +192,7 @@ static const struct imx290_regval imx290_global_init_settings[] = { { IMX290_REG_8BIT(0x300f), 0x00 }, { IMX290_REG_8BIT(0x3010), 0x21 }, { IMX290_REG_8BIT(0x3012), 0x64 }, + { IMX290_REG_8BIT(0x3013), 0x00 }, { IMX290_REG_8BIT(0x3016), 0x09 }, { IMX290_REG_8BIT(0x3070), 0x02 }, { IMX290_REG_8BIT(0x3071), 0x11 }, @@ -230,6 +231,7 @@ static const struct imx290_regval imx290_global_init_settings[] = { { IMX290_REG_8BIT(0x33b0), 0x50 }, { IMX290_REG_8BIT(0x33b2), 0x1a }, { IMX290_REG_8BIT(0x33b3), 0x04 }, + { IMX290_REG_8BIT(0x3480), 0x49 }, }; static const struct imx290_regval imx290_1080p_settings[] = { @@ -239,15 +241,12 @@ static const struct imx290_regval imx290_1080p_settings[] = { { IMX290_OPB_SIZE_V, 10 }, { IMX290_X_OUT_SIZE, 1920 }, { IMX290_Y_OUT_SIZE, 1080 }, - { IMX290_REG_8BIT(0x3012), 0x64 }, - { IMX290_REG_8BIT(0x3013), 0x00 }, { IMX290_INCKSEL1, 0x18 }, { IMX290_INCKSEL2, 0x03 }, { IMX290_INCKSEL3, 0x20 }, { IMX290_INCKSEL4, 0x01 }, { IMX290_INCKSEL5, 0x1a }, { IMX290_INCKSEL6, 0x1a }, - { IMX290_REG_8BIT(0x3480), 0x49 }, /* data rate settings */ { IMX290_REPETITION, 0x10 }, { IMX290_TCLKPOST, 87 }, @@ -267,15 +266,12 @@ static const struct imx290_regval imx290_720p_settings[] = { { IMX290_OPB_SIZE_V, 4 }, { IMX290_X_OUT_SIZE, 1280 }, { IMX290_Y_OUT_SIZE, 720 }, - { IMX290_REG_8BIT(0x3012), 0x64 }, - { IMX290_REG_8BIT(0x3013), 0x00 }, { IMX290_INCKSEL1, 0x20 }, { IMX290_INCKSEL2, 0x00 }, { IMX290_INCKSEL3, 0x20 }, { IMX290_INCKSEL4, 0x01 }, { IMX290_INCKSEL5, 0x1a }, { IMX290_INCKSEL6, 0x1a }, - { IMX290_REG_8BIT(0x3480), 0x49 }, /* data rate settings */ { IMX290_REPETITION, 0x10 }, { IMX290_TCLKPOST, 79 }, From patchwork Thu Jul 21 08:35:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 592296 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1641C43334 for ; Thu, 21 Jul 2022 08:36:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231814AbiGUIgL (ORCPT ); Thu, 21 Jul 2022 04:36:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35076 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231239AbiGUIgJ (ORCPT ); Thu, 21 Jul 2022 04:36:09 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 10BAB13FB1 for ; Thu, 21 Jul 2022 01:36:09 -0700 (PDT) Received: from pendragon.ideasonboard.com (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 8D12115AF; Thu, 21 Jul 2022 10:36:07 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1658392567; bh=tBgpJ7Cdq1QXVXakHiUYIome8RTDb+JAvAGI1A8IjMw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QddWOypBZlCa0s56KZOlniwZsh/R7yoDUO/DsYr54Uu2D8zsSKQtQnxEJPwWnPnIp hToXY/UKIFq8S8fSUx0/oJMIQGtd+oQDV2SjtkzK2+BjfTJCn14rYJ80Dvs5p3t6tn JGtTwwXQ6Kus4xn1lIjpuQ9s4xKA38tYd3w/xItQ= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Manivannan Sadhasivam , Sakari Ailus Subject: [PATCH 18/19] media: i2c: imx290: Add crop selection targets support Date: Thu, 21 Jul 2022 11:35:39 +0300 Message-Id: <20220721083540.1525-19-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220721083540.1525-1-laurent.pinchart@ideasonboard.com> References: <20220721083540.1525-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Implement read-only access to crop selection rectangles to expose the analogue crop rectangle. The public (leaked) IMX290 documentation is not very clear on how cropping is implemented and configured exactly, so the margins may not be entirely accurate. Signed-off-by: Laurent Pinchart --- drivers/media/i2c/imx290.c | 94 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 94 insertions(+) diff --git a/drivers/media/i2c/imx290.c b/drivers/media/i2c/imx290.c index baf9941c5fbe..0cb11ec1cf0f 100644 --- a/drivers/media/i2c/imx290.c +++ b/drivers/media/i2c/imx290.c @@ -105,6 +105,53 @@ #define IMX290_VMAX_DEFAULT 1125 + +/* + * The IMX290 pixel array is organized as follows: + * + * +------------------------------------+ + * | Optical Black | } Vertical effective optical black (10) + * +---+------------------------------------+---+ + * | | | | } Effective top margin (8) + * | | +----------------------------+ | | \ + * | | | | | | | + * | | | | | | | + * | | | | | | | + * | | | Recording Pixel Area | | | | Recommended height (1080) + * | | | | | | | + * | | | | | | | + * | | | | | | | + * | | +----------------------------+ | | / + * | | | | } Effective bottom margin (8) + * +---+------------------------------------+---+ + * <-> <-> <--------------------------> <-> <-> + * \---- Ignored right margin (4) + * \-------- Effective right margin (9) + * \------------------------- Recommended width (1920) + * \----------------------------------------- Effective left margin (8) + * \--------------------------------------------- Ignored left margin (4) + * + * The optical black lines are output over CSI-2 with a separate data type. + * + * The pixel array is meant to have 1920x1080 usable pixels after image + * processing in an ISP. It has 8 (9) extra active pixels usable for color + * processing in the ISP on the top and left (bottom and right) sides of the + * image. In addition, 4 additional pixels are present on the left and right + * sides of the image, documented as "ignored area". + * + * As far as is understood, all pixels of the pixel array (ignored area, color + * processing margins and recording area) can be output by the sensor. + */ + +#define IMX290_PIXEL_ARRAY_WIDTH 1945 +#define IMX290_PIXEL_ARRAY_HEIGHT 1097 +#define IMX920_PIXEL_ARRAY_MARGIN_LEFT 12 +#define IMX920_PIXEL_ARRAY_MARGIN_RIGHT 13 +#define IMX920_PIXEL_ARRAY_MARGIN_TOP 8 +#define IMX920_PIXEL_ARRAY_MARGIN_BOTTOM 9 +#define IMX290_PIXEL_ARRAY_RECORDING_WIDTH 1920 +#define IMX290_PIXEL_ARRAY_RECORDING_HEIGHT 1080 + static const char * const imx290_supply_name[] = { "vdda", "vddd", @@ -671,6 +718,52 @@ static int imx290_set_fmt(struct v4l2_subdev *sd, return 0; } +static int imx290_get_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_selection *sel) +{ + struct imx290 *imx290 = to_imx290(sd); + struct v4l2_mbus_framefmt *format; + + switch (sel->target) { + case V4L2_SEL_TGT_CROP: { + format = imx290_get_pad_format(imx290, sd_state, sel->which); + + mutex_lock(&imx290->lock); + + sel->r.top = IMX920_PIXEL_ARRAY_MARGIN_TOP + + (IMX290_PIXEL_ARRAY_RECORDING_HEIGHT - format->height) / 2; + sel->r.left = IMX920_PIXEL_ARRAY_MARGIN_LEFT + + (IMX290_PIXEL_ARRAY_RECORDING_WIDTH - format->width) / 2; + sel->r.width = format->width; + sel->r.height = format->height; + + mutex_unlock(&imx290->lock); + return 0; + } + + case V4L2_SEL_TGT_NATIVE_SIZE: + case V4L2_SEL_TGT_CROP_BOUNDS: + sel->r.top = 0; + sel->r.left = 0; + sel->r.width = IMX290_PIXEL_ARRAY_WIDTH; + sel->r.height = IMX290_PIXEL_ARRAY_HEIGHT; + + return 0; + + case V4L2_SEL_TGT_CROP_DEFAULT: + sel->r.top = IMX920_PIXEL_ARRAY_MARGIN_TOP; + sel->r.left = IMX920_PIXEL_ARRAY_MARGIN_LEFT; + sel->r.width = IMX290_PIXEL_ARRAY_RECORDING_WIDTH; + sel->r.height = IMX290_PIXEL_ARRAY_RECORDING_HEIGHT; + + return 0; + + default: + return -EINVAL; + } +} + static int imx290_entity_init_cfg(struct v4l2_subdev *subdev, struct v4l2_subdev_state *sd_state) { @@ -887,6 +980,7 @@ static const struct v4l2_subdev_pad_ops imx290_pad_ops = { .enum_frame_size = imx290_enum_frame_size, .get_fmt = imx290_get_fmt, .set_fmt = imx290_set_fmt, + .get_selection = imx290_get_selection, }; static const struct v4l2_subdev_ops imx290_subdev_ops = {