From patchwork Mon Feb 4 15:53:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 157433 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4068635jaa; Mon, 4 Feb 2019 07:55:11 -0800 (PST) X-Google-Smtp-Source: AHgI3Iam7h3Mpvnkj9Ew3Eg1GKjnFePFlbJOay6JX3DhxdpvrFN7WVEzU5UazhrjIvkpuODqsPCm X-Received: by 2002:a17:902:6946:: with SMTP id k6mr26523plt.101.1549295711091; Mon, 04 Feb 2019 07:55:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549295711; cv=none; d=google.com; s=arc-20160816; b=yaQT+beYo4gV+qiW0xr2C7LLRH0bYaE+sh0vpelM3bztpSNjgiXvF2sItfMzfR6W3N oMKb5reDjKXN2R3hD+8dXsC6Z6+2W9OqxZGX3D3wa4ZXJNK5sBc/KDSLcxc6XvV2LmWB ISdcWJ1Nuf9GWDeLrCfUPig6/3wwqO8+HoCuayZgszJN8f98UQMb/lllLt8/xF07ctDv rSnYiWi08ny9MCBg+3bBtF/X5NQ98/wbW7bOcBqJw/iZ1C7Gan1VMcyTpl/UfWl+Gg4r LstwtVI/2dySkiOs6Wghix5mNY8yuGgSvn+0fDCuxOfbIovo/azcTCxnTqSir4c+mude np3Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=6FrKqDbSMoNVkUUaesse/Kx/d9p17JD+XnpCc17GwSU=; b=VRaSw5KIS+jE6AEjIPAuw2sq4mqsh/o9sraVXJCcW9r39NRE72A6H9oT7kpZ87E3KK 7jdkbxL9mPrbJ2HZalpyfFWU0PWm0JUL43JtitMDuWveDijc0NdDGuNWCZX4bLAEKqPm /oHOZLLXRlSAjIa9sKopyzu1S7GYZM9RVYW3Ne06mp0guYIVXGN30iApDbCLrOeYkzyU 3ZVzRd7hkf64N+1AEe5ofBf6imyHlE3ADs4jDggh7dh9TTEwdtIxSPxSU6gETMpNFaS9 jiAkWLXTjln94wRhjBP4ux++j+NBAPrDEghGbpYpHWtJS1J94uvqpjx9eIkVoVyuXRYR pjwA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=gPv36YFf; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f189si343279pfg.123.2019.02.04.07.55.10; Mon, 04 Feb 2019 07:55:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=gPv36YFf; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731496AbfBDPzJ (ORCPT + 31 others); Mon, 4 Feb 2019 10:55:09 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:37316 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728291AbfBDPzF (ORCPT ); Mon, 4 Feb 2019 10:55:05 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x14FsFBf070399; Mon, 4 Feb 2019 09:54:15 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1549295655; bh=6FrKqDbSMoNVkUUaesse/Kx/d9p17JD+XnpCc17GwSU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=gPv36YFfM5oWwpjnSmMNmQYTBSYt5NnoLnH/w7WdB7gdqPPT4JK/F29DXdoKQLVmz pAnPwdPVv3Ge6cRTgc9nv65D8tARRO7+ITnaHEME5EvAlOLWSQ/5YIrB/WWZaRUQgv /BPUqsiBquMAULTdYA50xbhq4uzGoItolKErDqpo= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x14FsFnF019128 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 4 Feb 2019 09:54:15 -0600 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Mon, 4 Feb 2019 09:54:14 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Mon, 4 Feb 2019 09:54:14 -0600 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id x14Fs1mO012077; Mon, 4 Feb 2019 09:54:11 -0600 From: Roger Quadros To: CC: , , , , , , , , , , , Roger Quadros Subject: [PATCH 3/4] ARM: dts: dra7: add PRU-ICSS modules Date: Mon, 4 Feb 2019 17:53:56 +0200 Message-ID: <1549295637-24890-4-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1549295637-24890-1-git-send-email-rogerq@ti.com> References: <1549295637-24890-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna Add the DT nodes for the PRU-ICSS1 and PRU-ICSS2 processor subsystems that are present on AM57xx family of SoCs. Each PRU-ICSS instance is represented by a pruss-soc-bus node and a child PRUSS subsystem node. The two PRU-ICSSs are identical to each other. They are not supported on DRA7xx SoCs in general, so the nodes are added in disabled state to the common dra7 DTS file. They should be enabled only in the AM57xx related board files. The PRU-ICSSs on AM57xx are very similar to the PRUSS in AM33xx and AM437x except for variations in the RAM sizes and the number of interrupts coming into the MPU INTC. The interrupt events into the PRU-ICSS also requires programming of the corresponding crossbars properly. The default names for the firmware images for each PRU core are defined as follows (these can be adjusted either in derivative board dts files or through sysfs at runtime if required): PRU-ICSS1 PRU0 Core: am57xx-pru1_0-fw PRU-ICSS1 PRU1 Core: am57xx-pru1_1-fw PRU-ICSS2 PRU0 Core: am57xx-pru2_0-fw PRU-ICSS2 PRU1 Core: am57xx-pru2_1-fw Two PRU system events "vring" and "kick" have been added to each PRU node in each of the PRU-ICSS1 and PRU-ICSS2 remote processor subsystems to enable the virtio/rpmsg communication between MPU and that PRU core. The PRU system events is the preferred approach over using OMAP mailboxes, as it eliminates an external peripheral access from the PRU-side, and keeps the interrupt generation internal to the PRUSS. The difference from MPU would be minimal in using one versus the other. Mailboxes can still be used if desired. Either approach would require that an appropriate firmware image is loaded/booted on the PRU. Signed-off-by: Suman Anna Signed-off-by: Roger Quadros --- arch/arm/boot/dts/dra7.dtsi | 194 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 194 insertions(+) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 2bc9add..2458e7a 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -167,6 +167,200 @@ l4_per3: interconnect@48800000 { }; + pru_icss1: target-module@4b200000 { + compatible = "ti,sysc-pruss", "ti,sysc"; + reg = <0x4b226000 0x4>, + <0x4b226004 0x4>; + reg-names = "rev", "sysc"; + ti,no-reset-on-init; + /* Domains (P, C): coreaon_pwrdm, l4per2_clkdm */ + clocks = <&l4per2_clkctrl DRA7_L4PER2_PRUSS1_CLKCTRL 0>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 0x4b200000 0x20000000>; + + pruss1: pruss@4b200000 { + compatible = "ti,am5728-pruss"; + reg = <0x0000 0x2000>, + <0x2000 0x2000>, + <0x10000 0x8000>; + reg-names = "dram0", "dram1", + "shrdram2"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pruss1_cfg: cfg@26000 { + compatible = "syscon"; + reg = <0x26000 0x2000>; + }; + + pruss1_iep: iep@2e000 { + compatible = "syscon"; + reg = <0x2e000 0x31c>; + }; + + pruss1_mii_rt: mii_rt@32000 { + compatible = "syscon"; + reg = <0x32000 0x58>; + }; + + pruss1_intc: intc@20000 { + compatible = "ti,am5728-pruss-intc"; + reg = <0x20000 0x2000>; + reg-names = "intc"; + interrupt-controller; + #interrupt-cells = <1>; + interrupts = , + , + , + , + , + , + , + ; + interrupt-names = "host2", "host3", "host4", + "host5", "host6", "host7", + "host8", "host9"; + }; + + pru1_0: pru@34000 { + compatible = "ti,am5728-pru"; + reg = <0x34000 0x3000>, + <0x22000 0x400>, + <0x22400 0x100>; + reg-names = "iram", "control", "debug"; + gpcfg = <&pruss1_cfg 0x8>; + firmware-name = "am57xx-pru1_0-fw"; + interrupt-parent = <&pruss1_intc>; + interrupts = <16>, <17>; + interrupt-names = "vring", "kick"; + }; + + pru1_1: pru@38000 { + compatible = "ti,am5728-pru"; + reg = <0x38000 0x3000>, + <0x24000 0x400>, + <0x24400 0x100>; + reg-names = "iram", "control", "debug"; + gpcfg = <&pruss1_cfg 0xc>; + firmware-name = "am57xx-pru1_1-fw"; + interrupt-parent = <&pruss1_intc>; + interrupts = <18>, <19>; + interrupt-names = "vring", "kick"; + }; + + pruss1_mdio: mdio@32400 { + compatible = "ti,davinci_mdio"; + reg = <0x32400 0x90>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&dpll_gmac_h13x2_ck>; + clock-names = "fck"; + bus_freq = <1000000>; + status = "disabled"; + }; + }; + }; + + pru_icss2: target_module@4b280000 { + compatible = "ti,sysc-pruss", "ti,sysc"; + reg = <0x4b2a6000 0x4>, + <0x4b2a6004 0x4>; + reg-names = "rev", "sysc"; + ti,no-reset-on-init; + /* Domains (P, C): coreaon_pwrdm, l4per2_clkdm */ + clocks = <&l4per2_clkctrl DRA7_L4PER2_PRUSS2_CLKCTRL 0>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 0x4b280000 0x20000000>; + + pruss2: pruss@4b280000 { + compatible = "ti,am5728-pruss"; + reg = <0 0x2000>, + <0x2000 0x2000>, + <0x10000 0x8000>; + reg-names = "dram0", "dram1", + "shrdram2"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pruss2_cfg: cfg@26000 { + compatible = "syscon"; + reg = <0x26000 0x2000>; + }; + + pruss2_iep: iep@2e000 { + compatible = "syscon"; + reg = <0x2e000 0x31c>; + }; + + pruss2_mii_rt: mii_rt@32000 { + compatible = "syscon"; + reg = <0x32000 0x58>; + }; + + pruss2_intc: intc@20000 { + compatible = "ti,am5728-pruss-intc"; + reg = <0x20000 0x2000>; + reg-names = "intc"; + interrupt-controller; + #interrupt-cells = <1>; + interrupts = , + , + , + , + , + , + , + ; + interrupt-names = "host2", "host3", "host4", + "host5", "host6", "host7", + "host8", "host9"; + }; + + pru2_0: pru@34000 { + compatible = "ti,am5728-pru"; + reg = <0x34000 0x3000>, + <0x22000 0x400>, + <0x22400 0x100>; + reg-names = "iram", "control", "debug"; + gpcfg = <&pruss2_cfg 0x8>; + firmware-name = "am57xx-pru2_0-fw"; + interrupt-parent = <&pruss2_intc>; + interrupts = <16>, <17>; + interrupt-names = "vring", "kick"; + }; + + pru2_1: pru@38000 { + compatible = "ti,am5728-pru"; + reg = <0x38000 0x3000>, + <0x24000 0x400>, + <0x24400 0x100>; + reg-names = "iram", "control", "debug"; + gpcfg = <&pruss2_cfg 0xc>; + firmware-name = "am57xx-pru2_1-fw"; + interrupt-parent = <&pruss2_intc>; + interrupts = <18>, <19>; + interrupt-names = "vring", "kick"; + }; + + pruss2_mdio: mdio@32400 { + compatible = "ti,davinci_mdio"; + reg = <0x32400 0x90>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&dpll_gmac_h13x2_ck>; + clock-names = "fck"; + bus_freq = <1000000>; + status = "disabled"; + }; + }; + }; + axi@0 { compatible = "simple-bus"; #size-cells = <1>;