From patchwork Tue Feb 5 02:57:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Khem Raj X-Patchwork-Id: 157458 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4641518jaa; Mon, 4 Feb 2019 18:57:48 -0800 (PST) X-Google-Smtp-Source: AHgI3Ib0MtRWwcnYg9b7g/kQbiGznFt6ViJHSvbh7MqUsOnvp514YIUv6al1IlV+VMZeL7+IkiQ4 X-Received: by 2002:a17:902:e18d:: with SMTP id cd13mr2774895plb.262.1549335468525; Mon, 04 Feb 2019 18:57:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549335468; cv=none; d=google.com; s=arc-20160816; b=g4On6L3ULZU66JU+ZxIQ0otfxiKmAGhefTHOaGPqD0r/Yz3mRZ4+cjDNGa+sJ2eQL0 gru4kQ0nG//Vw4t7WxckgwLh99adUtCNnmzwz5PSwC3zqVsVZY7VlphtUUSxpWyOPGgI zrKOi0GvzHdpndtVL9lEirAsFVBRdLs1iPSG9b3DMNFrGap/whWPUUfxWEEX33twV1MH iaH+21GVSV1F2mu+QRZWWC2KDUEwr6RZbsITrpqVhMc3/TMNo9sg4vZICZir8BrTvaLy 1v6TIbxbiHk0oFm0cSr4MFVbtaDMKcOf35GKLhQKiusdns7oODJYCjqXOWU9LGKsZSS3 Yczw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:sender:content-transfer-encoding:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence:subject :mime-version:message-id:date:to:from:dkim-signature:delivered-to; bh=3Q1ghkd9MrlhroWVA4VtZClxOVgaV77VDFOU2ML2tc0=; b=HaCGqhVRE70X1h53u/y9USTwRGizcmUwndLdsGwlbVozJoSL3xtNkRJ0pl7YoUh+Yx WBcqt+fyjhmx9kZ5cFx4OBipXfKMhWK2gnP0V+bgokwqxDfNtQ+mTVFsLZYrdKAgBPPL SCzDEpDaijzYtNObev9Qa2ARjLOPUaUFUKCwhBr8nCwhAl9PPxdr0QMxCHWajyebUz3/ 3fSnSpayKAvMJ4oUmz7bKYBVJ5rbNmK+Tb1zy7qZ/x3sigfKK1tyKFhjxlDYTb4Q+r+J w0sRoFT4f5NV4vXGlWH7Ne8ORFCEa+ZmQyOQAGGQzY1EhcOHAo95S0fk86WZEfV3qwz+ Zqeg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@gmail.com header.s=20161025 header.b=CbQ55C+D; spf=pass (google.com: best guess record for domain of openembedded-core-bounces@lists.openembedded.org designates 140.211.169.62 as permitted sender) smtp.mailfrom=openembedded-core-bounces@lists.openembedded.org; dmarc=fail (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from mail.openembedded.org (mail.openembedded.org. [140.211.169.62]) by mx.google.com with ESMTP id u27si1954426pfa.103.2019.02.04.18.57.47; Mon, 04 Feb 2019 18:57:48 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of openembedded-core-bounces@lists.openembedded.org designates 140.211.169.62 as permitted sender) client-ip=140.211.169.62; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@gmail.com header.s=20161025 header.b=CbQ55C+D; spf=pass (google.com: best guess record for domain of openembedded-core-bounces@lists.openembedded.org designates 140.211.169.62 as permitted sender) smtp.mailfrom=openembedded-core-bounces@lists.openembedded.org; dmarc=fail (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from ec2-34-214-78-129.us-west-2.compute.amazonaws.com (localhost [127.0.0.1]) by mail.openembedded.org (Postfix) with ESMTP id EC7EF7C0D7; Tue, 5 Feb 2019 02:57:42 +0000 (UTC) X-Original-To: openembedded-core@lists.openembedded.org Delivered-To: openembedded-core@lists.openembedded.org Received: from mail-pf1-f196.google.com (mail-pf1-f196.google.com [209.85.210.196]) by mail.openembedded.org (Postfix) with ESMTP id 910887C0C5 for ; Tue, 5 Feb 2019 02:57:41 +0000 (UTC) Received: by mail-pf1-f196.google.com with SMTP id c123so864384pfb.0 for ; Mon, 04 Feb 2019 18:57:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=7LpKoklZpvamEUVSIX54lVQc9fSDKna37w7gsiE97Ak=; b=CbQ55C+DHpqhyNbSNtRZE3Dn+Ys3+SpEQFZbj1rGXJ/kMCLdYOP+ZbAIqgQWUiCkJH 3CvkNbjj5o1PX/n+so4BlkdDsJo/FYuCvhHDtOKcacL1xXQBY02ZzdGloAj/YM/4JeEW F+wkoV/eOHBSl2TX9K3MZ4yUwr6LGItzfQsXopFXRTz7qTGTirsNHP4OUk7q/tubp4Sb cxMPIGmolwYBu68QCuhuFro4vn8Hq/SISSClHikL71M7cmRWh3k2/0P9Vjdf2Tv3OkmO MTkgS5UoSnGL0boHUDBdIFkCoFUxZd9OF9N3UZS8JM/8g0Pnwxv0irFO72WCMaw0udsC EzfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=7LpKoklZpvamEUVSIX54lVQc9fSDKna37w7gsiE97Ak=; b=Oyz4YaMKj8j0u2hAV5nLvGYQ8160QFlm1Ua3Q5myPinVRhLFfcROkDLKAL1xolsmpK cUU/o7gIDlPF/0qb53RQlIBWeWfBGX3zzGcWAEl1+NDeV2ulm2XXum15eky/GvREfmq3 RNKN8eYmTdorr1A9LPjSD8a3O2DEka/P7VG2DE8dx3jxsX1lM4+3Yf+GeBlfiSQ36fPH bFYAl9mWpUFoPet9a4UnMcR6UCbXQBFhGTNZJDSlFT5LnV1gBRq8sIC4s4Y5zqxSQNIi cJYvhXjoX7/KtqqnZRQPUEEsKr3ZSDIrazN2azkpQVTU5sfImsPxCU8mJuqMFoaGgCFE uhrQ== X-Gm-Message-State: AHQUAuZ/H2b2eiYcVhPgdiUaU+LIGra8EKiIhfwKS7bLhPt1ylT0Ckpm x2beFHyb1NLyYQlvM6sc/4OgKbny X-Received: by 2002:a63:4f20:: with SMTP id d32mr2427610pgb.47.1549335462096; Mon, 04 Feb 2019 18:57:42 -0800 (PST) Received: from apollo.hsd1.ca.comcast.net ([2601:646:8500:6bc6::a005]) by smtp.gmail.com with ESMTPSA id u87sm2453788pfi.2.2019.02.04.18.57.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Feb 2019 18:57:41 -0800 (PST) From: Khem Raj To: openembedded-core@lists.openembedded.org Date: Mon, 4 Feb 2019 18:57:22 -0800 Message-Id: <20190205025727.1937-1-raj.khem@gmail.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Subject: [OE-core] [PATCH 1/6] arch-armv8a.inc: add tune include for armv8 X-BeenThere: openembedded-core@lists.openembedded.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Patches and discussions about the oe-core layer List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: openembedded-core-bounces@lists.openembedded.org Errors-To: openembedded-core-bounces@lists.openembedded.org From: ayaka There are some addtional instructions apart from bare armv8, also there is armv8.1, armv8.2. Most the processor would support crc, except X-gene 1. Signed-off-by: Randy Li Signed-off-by: Khem Raj --- meta/conf/machine/include/arm/arch-armv8.inc | 1 - meta/conf/machine/include/arm/arch-armv8a.inc | 28 +++++++++++++++++++ 2 files changed, 28 insertions(+), 1 deletion(-) delete mode 100644 meta/conf/machine/include/arm/arch-armv8.inc create mode 100644 meta/conf/machine/include/arm/arch-armv8a.inc -- 2.20.1 -- _______________________________________________ Openembedded-core mailing list Openembedded-core@lists.openembedded.org http://lists.openembedded.org/mailman/listinfo/openembedded-core Signed-off-by: Randy Li <ayaka@soulik.info> Signed-off-by: Khem Raj <raj.khem@gmail.com> diff --git a/meta/conf/machine/include/arm/arch-armv8.inc b/meta/conf/machine/include/arm/arch-armv8.inc deleted file mode 100644 index 5e832fae6d..0000000000 --- a/meta/conf/machine/include/arm/arch-armv8.inc +++ /dev/null @@ -1 +0,0 @@ -require conf/machine/include/arm/arch-arm64.inc diff --git a/meta/conf/machine/include/arm/arch-armv8a.inc b/meta/conf/machine/include/arm/arch-armv8a.inc new file mode 100644 index 0000000000..323d0d7f0f --- /dev/null +++ b/meta/conf/machine/include/arm/arch-armv8a.inc @@ -0,0 +1,28 @@ +DEFAULTTUNE ?= "armv8a-crc" + +TUNEVALID[armv8a] = "Enable instructions for ARMv8-a" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv8a', ' -march=armv8-a', '', d)}" +TUNEVALID[simd] = "Enable instructions for ARMv8-a Advanced SIMD and floating-point" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'simd', '+simd', '', d)}" +TUNEVALID[crc] = "Enable instructions for ARMv8-a Cyclic Redundancy Check (CRC)" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'crc', '+crc', '', d)}" +TUNEVALID[crypto] = "Enable instructions for ARMv8-a cryptographic" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'crypto', '+crypto', '', d)}" +MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv8a', 'armv8a:', '' ,d)}" + +require conf/machine/include/arm/arch-arm64.inc + +# Little Endian base configs +AVAILTUNES += "armv8a armv8a-crc armv8a-crc-crypto armv8a-crypto" +ARMPKGARCH_tune-armv8a ?= "armv8a" +ARMPKGARCH_tune-armv8a-crc ?= "armv8a" +ARMPKGARCH_tune-armv8a-crypto ?= "armv8a" +ARMPKGARCH_tune-armv8a-crc-crypto ?= "armv8a" +TUNE_FEATURES_tune-armv8a = "aarch64 armv8a simd" +TUNE_FEATURES_tune-armv8a-crc = "${TUNE_FEATURES_tune-armv8a} crc" +TUNE_FEATURES_tune-armv8a-crypto = "${TUNE_FEATURES_tune-armv8a} crypto" +TUNE_FEATURES_tune-armv8a-crc-crypto = "${TUNE_FEATURES_tune-armv8a-crc} crypto" +PACKAGE_EXTRA_ARCHS_tune-armv8a = "aarch64 armv8a simd" +PACKAGE_EXTRA_ARCHS_tune-armv8a-crc = "${PACKAGE_EXTRA_ARCHS_tune-armv8a} crc" +PACKAGE_EXTRA_ARCHS_tune-armv8a-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a} crypto" +PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} crypto" From patchwork Tue Feb 5 02:57:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Khem Raj X-Patchwork-Id: 157459 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4641813jaa; Mon, 4 Feb 2019 18:58:11 -0800 (PST) X-Google-Smtp-Source: AHgI3Ia5nePklO9GjggfXNrUrYt150+/Jwv8Rve/Vx2CwoScxoHqQUJS+Wj6D1XKPSvdNjN60fbd X-Received: by 2002:a17:902:1105:: with SMTP id d5mr2671517pla.47.1549335491693; Mon, 04 Feb 2019 18:58:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549335491; cv=none; d=google.com; s=arc-20160816; b=vUTsVbvjAE9qqJehYXKp9ZTd4mKUKJihgeJ7H0tabW3x5jdVBzX311DArsBIMRXyOv qBppKvWjEhnDMFc6QnLTXObltilLqpISrdtmU8f+S6VVdfwcU7QUXXs/W96sBbAyPLFQ voPVJ6fKgL7TKytNXMYVr+Z5pvLZAUpXfMzI+gt8axZPq4XHcMfJA3S0GhI2qXb6jECG 3Gx5GXRcPpzrEqhsN3MY2c64iN1PxMBky2zlIOwebpsNV1P8I0WolKxxNp6zDqgX4B5Y 41JCT4M2crqLSScQKQJYgF8HUPWHG7RWgiLQ238UIwZ/GGBfCX+Nwd0TurAO5qy1A2zZ ZWlA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:sender:content-transfer-encoding:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence:subject :mime-version:references:in-reply-to:message-id:date:to:from :dkim-signature:delivered-to; bh=/d+hiBIHLkQh2hlG3iye7A21Sl7XzzV/06veHzPs38I=; b=J3BaWECJoZZ6Uu+rlMw6MPvQgXz2r23qtKa3ZU6PObjcM6Z1J8eEqDGmPewxw5FHkv UmT3kTIKhRqEasHn0inzGcugrO48Nt/arzWJOiItjtfSNHosmWwQ3gqxkEPod/oR0nZN bUTiipZD1y0+ePaehnyiGBcYm+8uYFBYkT1V0b7n8fQtOqkfiXkvGmuxsom0GbCLzZf5 LHgyHDQBwaxTRtVJQjHVDJzRC4MPUv7X+Rp7QSQbIG3ddxrYbOuPDvV+IvJTsnHroJOF K52H087SjrTqvslIWka3cXiwHKjfMT6iaa46XJlR+no2cvXKsqlVbl0jekDyotQzPOtX J6Sg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@gmail.com header.s=20161025 header.b=A82DWIEp; spf=pass (google.com: best guess record for domain of openembedded-core-bounces@lists.openembedded.org designates 140.211.169.62 as permitted sender) smtp.mailfrom=openembedded-core-bounces@lists.openembedded.org; dmarc=fail (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from mail.openembedded.org (mail.openembedded.org. [140.211.169.62]) by mx.google.com with ESMTP id cf17si2153083plb.52.2019.02.04.18.58.11; Mon, 04 Feb 2019 18:58:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of openembedded-core-bounces@lists.openembedded.org designates 140.211.169.62 as permitted sender) client-ip=140.211.169.62; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@gmail.com header.s=20161025 header.b=A82DWIEp; spf=pass (google.com: best guess record for domain of openembedded-core-bounces@lists.openembedded.org designates 140.211.169.62 as permitted sender) smtp.mailfrom=openembedded-core-bounces@lists.openembedded.org; dmarc=fail (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from ec2-34-214-78-129.us-west-2.compute.amazonaws.com (localhost [127.0.0.1]) by mail.openembedded.org (Postfix) with ESMTP id 33FAD7C0F7; Tue, 5 Feb 2019 02:58:09 +0000 (UTC) X-Original-To: openembedded-core@lists.openembedded.org Delivered-To: openembedded-core@lists.openembedded.org Received: from mail-pf1-f193.google.com (mail-pf1-f193.google.com [209.85.210.193]) by mail.openembedded.org (Postfix) with ESMTP id 59CD87C0F5 for ; Tue, 5 Feb 2019 02:57:43 +0000 (UTC) Received: by mail-pf1-f193.google.com with SMTP id u6so837830pfh.11 for ; Mon, 04 Feb 2019 18:57:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lhBJ7ig+WNPpEfpL+bcyWHDhX4YKARMAa2Ozmp2D2Cg=; b=A82DWIEp5ziGgmJsm2uX+/WJsx8v3aB/I2+mwJmk+nUI9gT5mHt0dJqiQbUfyNav7y INNYk8mi7JD+LsCqbwy7MKGv4NR5uKutw/fQ9TnHjCayMMppBuB0VRyc+pq6+7bktXEw pQL3iDx/u5WQd1dxW9hkqcA93iofEVY3ZNYAT+WXMtS9e45K1ZHZtZQAuaMWxgZgQTKc h8M16MKLb/xki00YkUQEoK9PV1Na0gkYNbh0OO9gQ9apd2IyTg0fyyH6pAnpVSPWcSrD XVMw5PR31vjcrg66EUyhNVDJQnpyLZKKiDAOGaCPyA+MjeYUJiiIVsxh5njwrDxNbJ+4 QBcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lhBJ7ig+WNPpEfpL+bcyWHDhX4YKARMAa2Ozmp2D2Cg=; b=JoHmTw3R7u6dL1BHlmCN3EiFg6o5UGqXqLykz5BUfRWrs8YFH8kpZq42SeG4X1fq0L v6TjksbnE2PObzPorQD9OIZZ4lkuzxVRLVNfFkWzw+1je8EvR4paXeMn8e4Z0RyBvPZ/ EKSorHsIOpnwFByBGRxzBP724lt5ZWRR0khreLqBBQf/Gh4QtGfVhH6MF8K6CGxkMcy8 hpUfNrhFmlUEACz9J63aPZHQMwWiJJzOs+lVNSW1Boz6dQfvGzAtkcInu5vLFIiKY1PW a8PKM3BzZjRmC3TiAyQxmlER4eWrkmvQWS1a0hew6gO/ExEostUBc9yh3PT6638X2vgS dWiQ== X-Gm-Message-State: AHQUAuYtvJf7jyrdWXKmxS/YDQslpBBiW8Q8L0HQhORzEdjSH4qKMyu/ ktFu4aRTenzHSjiKwN7ZK/oBlzJB X-Received: by 2002:a63:4c04:: with SMTP id z4mr2485030pga.312.1549335464027; Mon, 04 Feb 2019 18:57:44 -0800 (PST) Received: from apollo.hsd1.ca.comcast.net ([2601:646:8500:6bc6::a005]) by smtp.gmail.com with ESMTPSA id u87sm2453788pfi.2.2019.02.04.18.57.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Feb 2019 18:57:42 -0800 (PST) From: Khem Raj To: openembedded-core@lists.openembedded.org Date: Mon, 4 Feb 2019 18:57:23 -0800 Message-Id: <20190205025727.1937-2-raj.khem@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190205025727.1937-1-raj.khem@gmail.com> References: <20190205025727.1937-1-raj.khem@gmail.com> MIME-Version: 1.0 Subject: [OE-core] [PATCH 2/6] ThunderX: update the armv8a rules X-BeenThere: openembedded-core@lists.openembedded.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Patches and discussions about the oe-core layer List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: openembedded-core-bounces@lists.openembedded.org Errors-To: openembedded-core-bounces@lists.openembedded.org From: ayaka I am not familiar with the big endian, so I don't update it. I don't have much information about the Cavium ThunderX, it looks like it supports all the ARM instructions. Signed-off-by: Randy Li Signed-off-by: Khem Raj --- meta/conf/machine/include/tune-thunderx.inc | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- 2.20.1 -- _______________________________________________ Openembedded-core mailing list Openembedded-core@lists.openembedded.org http://lists.openembedded.org/mailman/listinfo/openembedded-core diff --git a/meta/conf/machine/include/tune-thunderx.inc b/meta/conf/machine/include/tune-thunderx.inc index 3d43b0f7e5..92adf2df1f 100644 --- a/meta/conf/machine/include/tune-thunderx.inc +++ b/meta/conf/machine/include/tune-thunderx.inc @@ -1,11 +1,11 @@ -require conf/machine/include/arm/arch-armv8.inc - DEFAULTTUNE ?= "thunderx" AVAILTUNES += "thunderx thunderx_be" TUNEVALID[thunderx] = "Enable instructions for Cavium ThunderX" -TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'thunderx', ' -mcpu=thunderx ', '',d)}" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'thunderx', ' -mcpu=thunderx', '',d)}" + +require conf/machine/include/arm/arch-armv8a.inc ARMPKGARCH_tune-thunderx ?= "thunderx" ARMPKGARCH_tune-thunderx_be ?= "thunderx_be" @@ -15,5 +15,5 @@ TUNE_FEATURES_tune-thunderx_be = "${TUNE_FEATURES_tune-thunderx} bigendian" BASE_LIB_tune-thunderx = "lib64" BASE_LIB_tune-thunderx_be = "lib64" -PACKAGE_EXTRA_ARCHS_tune-thunderx = "aarch64 thunderx" +PACKAGE_EXTRA_ARCHS_tune-thunderx = "armv8a-crc-crypto thunderx" PACKAGE_EXTRA_ARCHS_tune-thunderx_be = "aarch64_be thunderx_be" From patchwork Tue Feb 5 02:57:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Khem Raj X-Patchwork-Id: 157460 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4641871jaa; Mon, 4 Feb 2019 18:58:16 -0800 (PST) X-Google-Smtp-Source: AHgI3Iabk1DUCsukp6NIG/7iOmkElz54eh8kxWg04IBDRr842+eXsuz29y21IyuIhaE+r91DboUb X-Received: by 2002:a65:51ca:: with SMTP id i10mr2360165pgq.371.1549335496447; Mon, 04 Feb 2019 18:58:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549335496; cv=none; d=google.com; s=arc-20160816; b=Ou+1x3aqk9N4pKGLngVMJCyL9obEGq5I+mIHSrNn4/hH1rH1cNWovQfPqBmm513Ehc YjzzB3lsswdxcX892BK5teM8owPr8XeBoWajtYX11G4qpQM20MNRJC69aBXi+Y4mswOp LzkmQsgKrf4gKKb8qg1yNcAE9quUnqMNGe5cTxWRnksddmf49jGrfzn+03ST34jD5Vxq b/wCmnfxgSDeM2a/3sRXd23GYIFzIm9n8gcNOrG7oU6wFlddM2kmzleKfh6nXXrbBtmw aJRpHrfSAM9y94bH+m5X0A3LNvSN17TkJ/xkcAPhcH+Uk8vT/14sf6/Wgrv6VPOiB0H1 b94g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:sender:content-transfer-encoding:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence:subject :mime-version:references:in-reply-to:message-id:date:to:from :dkim-signature:delivered-to; bh=0QuAktr9Ez+F3GHvJVNSLBQd5uaDjd8mijQNAobQLV0=; b=h8enz1b05jpf+tCrEq0M/7riEqBCdKRXLx4zFXkOKOHRZuJamc4nsgDtEFEn+cyyn3 c/oEMrh8XxP84I9NUrLL0xHK3pSWKQh2cfwXCMtK+WORUBsoN31D3cf/K/AcEEb0kkKM DIurXqGK079oVMU/UlHxQvMKeoId0gQC1GLUcAR+RzGZfqBihAgL1Ppgv5WAz7NsPaZH eR8Zf+lFeRGpOsBECxT3Cv8Geaf/RdTzUUG1J3d7EQIOnLS5eF3oQ2lwuhj+ehLmPhZo YZLkfJMIpmiCJe9Z95c+KIiB0yionlz1eNghRWhVIqOO5gkwPjAz28Hwpq00+2FntPYI 9tew== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@gmail.com header.s=20161025 header.b=dSEUxU6V; spf=pass (google.com: best guess record for domain of openembedded-core-bounces@lists.openembedded.org designates 140.211.169.62 as permitted sender) smtp.mailfrom=openembedded-core-bounces@lists.openembedded.org; dmarc=fail (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from mail.openembedded.org (mail.openembedded.org. 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Mon, 04 Feb 2019 18:57:45 -0800 (PST) Received: from apollo.hsd1.ca.comcast.net ([2601:646:8500:6bc6::a005]) by smtp.gmail.com with ESMTPSA id u87sm2453788pfi.2.2019.02.04.18.57.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Feb 2019 18:57:44 -0800 (PST) From: Khem Raj To: openembedded-core@lists.openembedded.org Date: Mon, 4 Feb 2019 18:57:24 -0800 Message-Id: <20190205025727.1937-3-raj.khem@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190205025727.1937-1-raj.khem@gmail.com> References: <20190205025727.1937-1-raj.khem@gmail.com> MIME-Version: 1.0 Subject: [OE-core] [PATCH 3/6] tune-cortexa32: add tunes for ARM Cortex-A32 X-BeenThere: openembedded-core@lists.openembedded.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Patches and discussions about the oe-core layer List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: openembedded-core-bounces@lists.openembedded.org Errors-To: openembedded-core-bounces@lists.openembedded.org From: ayaka https://developer.arm.com/products/processors/cortex-a/cortex-a32 Signed-off-by: Randy Li Signed-off-by: Khem Raj --- meta/conf/machine/include/tune-cortexa32.inc | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 meta/conf/machine/include/tune-cortexa32.inc -- 2.20.1 -- _______________________________________________ Openembedded-core mailing list Openembedded-core@lists.openembedded.org http://lists.openembedded.org/mailman/listinfo/openembedded-core diff --git a/meta/conf/machine/include/tune-cortexa32.inc b/meta/conf/machine/include/tune-cortexa32.inc new file mode 100644 index 0000000000..b66ff55e9a --- /dev/null +++ b/meta/conf/machine/include/tune-cortexa32.inc @@ -0,0 +1,16 @@ +DEFAULTTUNE ?= "cortexa32" + + +TUNEVALID[cortexa32] = "Enable Cortex-A32 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa32', ' -mcpu=cortex-a32', '', d)}" + +require conf/machine/include/arm/arch-armv8a.inc + +# Little Endian base configs +AVAILTUNES += "cortexa32 cortexa32-crypto" +ARMPKGARCH_tune-cortexa32 = "cortexa32" +ARMPKGARCH_tune-cortexa32-crypto = "cortexa32" +TUNE_FEATURES_tune-cortexa32 = "aarch64 cortexa32 simd crc" +TUNE_FEATURES_tune-cortexa32-crypto = "aarch64 cortexa32 simd crc crypto" +PACKAGE_EXTRA_ARCHS_tune-cortexa32 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa32" +PACKAGE_EXTRA_ARCHS_tune-cortexa32-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa32 cortexa32-crypto" From patchwork Tue Feb 5 02:57:25 2019 Content-Type: text/plain; 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Mon, 04 Feb 2019 18:57:46 -0800 (PST) Received: from apollo.hsd1.ca.comcast.net ([2601:646:8500:6bc6::a005]) by smtp.gmail.com with ESMTPSA id u87sm2453788pfi.2.2019.02.04.18.57.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Feb 2019 18:57:45 -0800 (PST) From: Khem Raj To: openembedded-core@lists.openembedded.org Date: Mon, 4 Feb 2019 18:57:25 -0800 Message-Id: <20190205025727.1937-4-raj.khem@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190205025727.1937-1-raj.khem@gmail.com> References: <20190205025727.1937-1-raj.khem@gmail.com> MIME-Version: 1.0 Subject: [OE-core] [PATCH 4/6] tune-cortexa35: add tunes for ARM Cortex-A35 X-BeenThere: openembedded-core@lists.openembedded.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Patches and discussions about the oe-core layer List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: openembedded-core-bounces@lists.openembedded.org Errors-To: openembedded-core-bounces@lists.openembedded.org From: ayaka https://developer.arm.com/products/processors/cortex-a/cortex-a35 Signed-off-by: Randy Li Signed-off-by: Khem Raj --- meta/conf/machine/include/tune-cortexa35.inc | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 meta/conf/machine/include/tune-cortexa35.inc -- 2.20.1 -- _______________________________________________ Openembedded-core mailing list Openembedded-core@lists.openembedded.org http://lists.openembedded.org/mailman/listinfo/openembedded-core diff --git a/meta/conf/machine/include/tune-cortexa35.inc b/meta/conf/machine/include/tune-cortexa35.inc new file mode 100644 index 0000000000..4cf00844e8 --- /dev/null +++ b/meta/conf/machine/include/tune-cortexa35.inc @@ -0,0 +1,15 @@ +DEFAULTTUNE ?= "cortexa35" + +TUNEVALID[cortexa35] = "Enable Cortex-A35 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa35', ' -mcpu=cortex-a35', '', d)}" + +require conf/machine/include/arm/arch-armv8a.inc + +# Little Endian base configs +AVAILTUNES += "cortexa35 cortexa35-crypto" +ARMPKGARCH_tune-cortexa35 = "cortexa35" +ARMPKGARCH_tune-cortexa35-crypto = "cortexa35" +TUNE_FEATURES_tune-cortexa35 = "aarch64 cortexa53 simd crc" +TUNE_FEATURES_tune-cortexa35-crypto = "aarch64 cortexa35 simd crc crypto" +PACKAGE_EXTRA_ARCHS_tune-cortexa35 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa35" +PACKAGE_EXTRA_ARCHS_tune-cortexa35-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa35 cortexa35-crypto" From patchwork Tue Feb 5 02:57:26 2019 Content-Type: text/plain; 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Mon, 04 Feb 2019 18:57:47 -0800 (PST) Received: from apollo.hsd1.ca.comcast.net ([2601:646:8500:6bc6::a005]) by smtp.gmail.com with ESMTPSA id u87sm2453788pfi.2.2019.02.04.18.57.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Feb 2019 18:57:46 -0800 (PST) From: Khem Raj To: openembedded-core@lists.openembedded.org Date: Mon, 4 Feb 2019 18:57:26 -0800 Message-Id: <20190205025727.1937-5-raj.khem@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190205025727.1937-1-raj.khem@gmail.com> References: <20190205025727.1937-1-raj.khem@gmail.com> MIME-Version: 1.0 Subject: [OE-core] [PATCH 5/6] tune-cortexa53: add tunes for ARM Cortex-A53 X-BeenThere: openembedded-core@lists.openembedded.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Patches and discussions about the oe-core layer List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: openembedded-core-bounces@lists.openembedded.org Errors-To: openembedded-core-bounces@lists.openembedded.org From: ayaka It looks that the Cryptography engine is mandatory in this platform. https://developer.arm.com/products/processors/cortex-a/cortex-a53 Signed-off-by: Randy Li Signed-off-by: Khem Raj --- meta/conf/machine/include/tune-cortexa53.inc | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 meta/conf/machine/include/tune-cortexa53.inc -- 2.20.1 -- _______________________________________________ Openembedded-core mailing list Openembedded-core@lists.openembedded.org http://lists.openembedded.org/mailman/listinfo/openembedded-core diff --git a/meta/conf/machine/include/tune-cortexa53.inc b/meta/conf/machine/include/tune-cortexa53.inc new file mode 100644 index 0000000000..a9d9cdd1f5 --- /dev/null +++ b/meta/conf/machine/include/tune-cortexa53.inc @@ -0,0 +1,15 @@ +DEFAULTTUNE ?= "cortexa53" + +TUNEVALID[cortexa53] = "Enable Cortex-A53 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa53', ' -mcpu=cortex-a53', '', d)}" + +require conf/machine/include/arm/arch-armv8a.inc + +# Little Endian base configs +AVAILTUNES += "cortexa53 cortexa53-crypto" +ARMPKGARCH_tune-cortexa53 = "cortexa53" +ARMPKGARCH_tune-cortexa53-crypto = "cortexa53" +TUNE_FEATURES_tune-cortexa53 = "aarch64 cortexa53 simd crc" +TUNE_FEATURES_tune-cortexa53-crypto = "aarch64 cortexa53 simd crc crypto" +PACKAGE_EXTRA_ARCHS_tune-cortexa53 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa53" +PACKAGE_EXTRA_ARCHS_tune-cortexa53-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa53 cortexa53-crypto" From patchwork Tue Feb 5 02:57:27 2019 Content-Type: text/plain; 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Mon, 04 Feb 2019 18:57:49 -0800 (PST) Received: from apollo.hsd1.ca.comcast.net ([2601:646:8500:6bc6::a005]) by smtp.gmail.com with ESMTPSA id u87sm2453788pfi.2.2019.02.04.18.57.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Feb 2019 18:57:47 -0800 (PST) From: Khem Raj To: openembedded-core@lists.openembedded.org Date: Mon, 4 Feb 2019 18:57:27 -0800 Message-Id: <20190205025727.1937-6-raj.khem@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190205025727.1937-1-raj.khem@gmail.com> References: <20190205025727.1937-1-raj.khem@gmail.com> MIME-Version: 1.0 Subject: [OE-core] [PATCH 6/6] tune-cortexa72: add tunes for ARM Cortex-A72 X-BeenThere: openembedded-core@lists.openembedded.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Patches and discussions about the oe-core layer List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: openembedded-core-bounces@lists.openembedded.org Errors-To: openembedded-core-bounces@lists.openembedded.org From: ayaka It looks that the Cryptography engine is mandatory in this platform. https://developer.arm.com/products/processors/cortex-a/cortex-a72 Signed-off-by: Randy Li Signed-off-by: Khem Raj --- meta/conf/machine/include/tune-cortexa72.inc | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 meta/conf/machine/include/tune-cortexa72.inc -- 2.20.1 -- _______________________________________________ Openembedded-core mailing list Openembedded-core@lists.openembedded.org http://lists.openembedded.org/mailman/listinfo/openembedded-core diff --git a/meta/conf/machine/include/tune-cortexa72.inc b/meta/conf/machine/include/tune-cortexa72.inc new file mode 100644 index 0000000000..f5a524fa04 --- /dev/null +++ b/meta/conf/machine/include/tune-cortexa72.inc @@ -0,0 +1,12 @@ +DEFAULTTUNE ?= "cortexa72" + +TUNEVALID[cortexa72] = "Enable Cortex-A72 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa72', ' -mcpu=cortex-a72', '', d)}" + +require conf/machine/include/arm/arch-armv8a.inc + +# Little Endian base configs +AVAILTUNES += "cortexa72" +ARMPKGARCH_tune-cortexa72 = "cortexa72" +TUNE_FEATURES_tune-cortexa72 = "aarch64 cortexa72 simd crc crypto" +PACKAGE_EXTRA_ARCHS_tune-cortexa72 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa72"