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Thu, 18 Aug 2022 05:42:13 -0700 Envelope-to: git@xilinx.com, linux@roeck-us.net, krzysztof.kozlowski+dt@linaro.org, wim@linux-watchdog.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-watchdog@vger.kernel.org, git@amd.com Received: from [172.23.66.193] (port=45678 helo=xhdsneeli40u.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1oOeqi-0007yi-Id; Thu, 18 Aug 2022 05:42:13 -0700 From: Srinivas Neeli To: , , , , , CC: , , , , , , , Radhey Shyam Pandey Subject: [PATCH] dt-bindings: Convert Xilinx watchdog bindings to json-schema Date: Thu, 18 Aug 2022 18:12:07 +0530 Message-ID: <20220818124207.61313-1-srinivas.neeli@xilinx.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 06cf11bd-a4e7-4386-1866-08da811714a1 X-MS-TrafficTypeDiagnostic: BYAPR02MB5464:EE_ X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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PTR:unknown-62-198.xilinx.com; CAT:NONE; SFS:(13230016)(4636009)(376002)(396003)(346002)(39860400002)(136003)(36840700001)(46966006)(40470700004)(5660300002)(40460700003)(44832011)(478600001)(36756003)(40480700001)(107886003)(316002)(966005)(110136005)(54906003)(6666004)(41300700001)(9786002)(70586007)(2906002)(70206006)(8676002)(4326008)(8936002)(356005)(26005)(1076003)(7636003)(186003)(2616005)(7696005)(7049001)(82310400005)(47076005)(336012)(426003)(83380400001)(36860700001)(82740400003)(102446001); DIR:OUT; SFP:1101; X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Aug 2022 12:42:15.5116 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 06cf11bd-a4e7-4386-1866-08da811714a1 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.62.198]; Helo=[xsj-pvapexch01.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: BN1NAM02FT004.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR02MB5464 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org Convert Xilinx watchdog bindings to DT schema format using json-schema Signed-off-by: Shubhrajyoti Datta Signed-off-by: Radhey Shyam Pandey Signed-off-by: Srinivas Neeli --- .../bindings/watchdog/of-xilinx-wdt.txt | 26 ------- .../bindings/watchdog/xlnx,xps-timebase.yaml | 71 +++++++++++++++++++ 2 files changed, 71 insertions(+), 26 deletions(-) delete mode 100644 Documentation/devicetree/bindings/watchdog/of-xilinx-wdt.txt create mode 100644 Documentation/devicetree/bindings/watchdog/xlnx,xps-timebase.yaml diff --git a/Documentation/devicetree/bindings/watchdog/of-xilinx-wdt.txt b/Documentation/devicetree/bindings/watchdog/of-xilinx-wdt.txt deleted file mode 100644 index c6ae9c9d5e3e..000000000000 --- a/Documentation/devicetree/bindings/watchdog/of-xilinx-wdt.txt +++ /dev/null @@ -1,26 +0,0 @@ -Xilinx AXI/PLB soft-core watchdog Device Tree Bindings ---------------------------------------------------------- - -Required properties: -- compatible : Should be "xlnx,xps-timebase-wdt-1.00.a" or - "xlnx,xps-timebase-wdt-1.01.a". -- reg : Physical base address and size - -Optional properties: -- clocks : Input clock specifier. Refer to common clock - bindings. -- clock-frequency : Frequency of clock in Hz -- xlnx,wdt-enable-once : 0 - Watchdog can be restarted - 1 - Watchdog can be enabled just once -- xlnx,wdt-interval : Watchdog timeout interval in 2^ clock cycles, - is integer from 8 to 31. - -Example: -axi-timebase-wdt@40100000 { - clock-frequency = <50000000>; - compatible = "xlnx,xps-timebase-wdt-1.00.a"; - clocks = <&clkc 15>; - reg = <0x40100000 0x10000>; - xlnx,wdt-enable-once = <0x0>; - xlnx,wdt-interval = <0x1b>; -} ; diff --git a/Documentation/devicetree/bindings/watchdog/xlnx,xps-timebase.yaml b/Documentation/devicetree/bindings/watchdog/xlnx,xps-timebase.yaml new file mode 100644 index 000000000000..fd2e3f2df54c --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/xlnx,xps-timebase.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/xlnx,xps-timebase.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx AXI/PLB softcore and window Watchdog Timer + +allOf: + - $ref: "watchdog.yaml#" + +maintainers: + - Shubhrajyoti Datta + - Srinivas Neeli + +description: + The Timebase watchdog timer(WDT) is a free-running 32 bit counter. + WDT uses a dual-expiration architecture. After one expiration of + the timeout interval, an interrupt is generated and the WDT state + bit is set to one in the status register. If the state bit is not + cleared (by writing a one to the state bit) before the next + expiration of the timeout interval, a WDT reset is generated. + +properties: + compatible: + oneOf: + - items: + - enum: + - xlnx,xps-timebase-wdt-1.01.a + - xlnx,xps-timebase-wdt-1.00.a + + reg: + maxItems: 1 + + clocks: + minItems: 1 + + clock-frequency: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Frequency of clock in Hz + + xlnx,wdt-interval: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Watchdog timeout interval + minimum: 8 + maximum: 32 + + xlnx,wdt-enable-once: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: If watchdog is configured as enable once, + then the watchdog cannot be disabled after + it has been enabled. + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + watchdog@40100000 { + compatible = "xlnx,xps-timebase-wdt-1.00.a"; + reg = <0x40100000 0x1000>; + clock-frequency = <50000000>; + clocks = <&clkc 15>; + xlnx,wdt-enable-once = <0x0>; + xlnx,wdt-interval = <0x1b>; + } ; +...