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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:38 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 01/39] hw/net/can: fix Xilinx ZynqMP CAN RX FIFO logic Date: Thu, 22 Sep 2022 17:34:58 +0100 Message-Id: <20220922163536.1096175-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Anton Kochkov For consistency, function "update_rx_fifo()" should use the RX FIFO register field names, not the TX FIFO ones, even if they refer to the same bit positions in the register. Signed-off-by: Anton Kochkov Reviewed-by: Francisco Iglesias Message-id: 20220817141754.2105981-1-anton.kochkov@proton.me Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1123 [PMM: tweaked commit message] Signed-off-by: Peter Maydell --- hw/net/can/xlnx-zynqmp-can.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/hw/net/can/xlnx-zynqmp-can.c b/hw/net/can/xlnx-zynqmp-can.c index 82ac48cee24..e93e6c5e194 100644 --- a/hw/net/can/xlnx-zynqmp-can.c +++ b/hw/net/can/xlnx-zynqmp-can.c @@ -696,30 +696,30 @@ static void update_rx_fifo(XlnxZynqMPCANState *s, const qemu_can_frame *frame) timestamp)); /* First 32 bit of the data. */ - fifo32_push(&s->rx_fifo, deposit32(0, R_TXFIFO_DATA1_DB3_SHIFT, - R_TXFIFO_DATA1_DB3_LENGTH, + fifo32_push(&s->rx_fifo, deposit32(0, R_RXFIFO_DATA1_DB3_SHIFT, + R_RXFIFO_DATA1_DB3_LENGTH, frame->data[0]) | - deposit32(0, R_TXFIFO_DATA1_DB2_SHIFT, - R_TXFIFO_DATA1_DB2_LENGTH, + deposit32(0, R_RXFIFO_DATA1_DB2_SHIFT, + R_RXFIFO_DATA1_DB2_LENGTH, frame->data[1]) | - deposit32(0, R_TXFIFO_DATA1_DB1_SHIFT, - R_TXFIFO_DATA1_DB1_LENGTH, + deposit32(0, R_RXFIFO_DATA1_DB1_SHIFT, + R_RXFIFO_DATA1_DB1_LENGTH, frame->data[2]) | - deposit32(0, R_TXFIFO_DATA1_DB0_SHIFT, - R_TXFIFO_DATA1_DB0_LENGTH, + deposit32(0, R_RXFIFO_DATA1_DB0_SHIFT, + R_RXFIFO_DATA1_DB0_LENGTH, frame->data[3])); /* Last 32 bit of the data. */ - fifo32_push(&s->rx_fifo, deposit32(0, R_TXFIFO_DATA2_DB7_SHIFT, - R_TXFIFO_DATA2_DB7_LENGTH, + fifo32_push(&s->rx_fifo, deposit32(0, R_RXFIFO_DATA2_DB7_SHIFT, + R_RXFIFO_DATA2_DB7_LENGTH, frame->data[4]) | - deposit32(0, R_TXFIFO_DATA2_DB6_SHIFT, - R_TXFIFO_DATA2_DB6_LENGTH, + deposit32(0, R_RXFIFO_DATA2_DB6_SHIFT, + R_RXFIFO_DATA2_DB6_LENGTH, frame->data[5]) | - deposit32(0, R_TXFIFO_DATA2_DB5_SHIFT, - R_TXFIFO_DATA2_DB5_LENGTH, + deposit32(0, R_RXFIFO_DATA2_DB5_SHIFT, + R_RXFIFO_DATA2_DB5_LENGTH, frame->data[6]) | - deposit32(0, R_TXFIFO_DATA2_DB4_SHIFT, - R_TXFIFO_DATA2_DB4_LENGTH, + deposit32(0, R_RXFIFO_DATA2_DB4_SHIFT, + R_RXFIFO_DATA2_DB4_LENGTH, frame->data[7])); ARRAY_FIELD_DP32(s->regs, INTERRUPT_STATUS_REGISTER, RXOK, 1); From patchwork Thu Sep 22 16:34:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608225 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp450023pvb; Thu, 22 Sep 2022 09:45:28 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5uJQImVrp3NsYEOQVCy866JQueTlyi20KznKo+J07CQnXltOsecD00UGLPBlUg+eAwvAoZ X-Received: by 2002:ac8:5c14:0:b0:35c:c6c0:a9b8 with SMTP id i20-20020ac85c14000000b0035cc6c0a9b8mr3529437qti.601.1663865128427; Thu, 22 Sep 2022 09:45:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663865128; cv=none; d=google.com; s=arc-20160816; b=q7eJTTEZkuUqDgAji1H6sgVoMMxi3USB3WVrk/n51baUCWJ/4AA0bbd+isw2bq2p75 VDNzP4GZo4xE+j4O7LQlSXs+JCFeM5MkWg+NadeM8sszHG73s8Oj0eMsdbyKRdkbmyUS Fxn93fqDJeDQ9xLzPTraNxXTCm0f3yL4k5dhIZ/K8ggfSh677but3ba6kj23tPSIkP8I DahPE7L7OospzEaVcjDOCSiJsYoXNz+6oI1azqty6cfvxVnASrmv8vGinbXAGwkUiMjb 2XusuEtxA1tWU+kaV+YnzbrpFu2rrxNb4hFily459ZFLH8erYjY0mxe13F0bgFzk4OQj 0kDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=SJ1E1DN8UXVJBqdhqjrjiz3vYmJMmUFOalTcFegGjrQ=; b=kfB50Y9wI3qaID0g+c5vYqmEQL9WQ98j2OSA7ybb1eqRmRJnyJnMHog6iyr2GjcWay 9s3vGyok6iK5bMa0Z9C3RKZibP/YdJ2C8p7+e6qU+UFXHKQM6ao6qUaxF7d6m5MgOYLd Cbj7DwPG8TSpTiglvLyfrLlSPL8oz1rae+vERZAio2SWBJzrqcMZ06/wfzwXypDTnqz/ eF/V8Ts1CArw/P9uVXzheGlrxyA8QnouQC32DdXGwOBfIsoSZHQ/Ga35EOStTvy0Fjoc Nq/mka/fHOkd+vfbbVCx6WC4g5gb5wcV78dOeuedjo/sKJCj4/TADbOtA3QRvNyIO1Kh 7gVQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=axmsrd1d; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:39 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 02/39] target/arm: Fix alignment for VLD4.32 Date: Thu, 22 Sep 2022 17:34:59 +0100 Message-Id: <20220922163536.1096175-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Clément Chigot When requested, the alignment for VLD4.32 is 8 and not 16. See ARM documentation about VLD4 encoding: ebytes = 1 << UInt(size); if size == '10' then alignment = if a == '0' then 1 else 8; else alignment = if a == '0' then 1 else 4*ebytes; Signed-off-by: Clément Chigot Reviewed-by: Richard Henderson Message-id: 20220914105058.2787404-1-chigot@adacore.com Signed-off-by: Peter Maydell --- target/arm/translate-neon.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/target/arm/translate-neon.c b/target/arm/translate-neon.c index 321c17e2c7e..4016339d46f 100644 --- a/target/arm/translate-neon.c +++ b/target/arm/translate-neon.c @@ -584,7 +584,11 @@ static bool trans_VLD_all_lanes(DisasContext *s, arg_VLD_all_lanes *a) case 3: return false; case 4: - align = pow2_align(size + 2); + if (size == 2) { + align = pow2_align(3); + } else { + align = pow2_align(size + 2); + } break; default: g_assert_not_reached(); From patchwork Thu Sep 22 16:35:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608244 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp495305pvb; Thu, 22 Sep 2022 11:11:59 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7FFTLvIlmecssTWaITLktzeuwYWFkw48yZRC5U6CUE0+N1A2UgegiMuJ6+Tx7qVXic4vzo X-Received: by 2002:ad4:5749:0:b0:4ad:7740:f3a7 with SMTP id q9-20020ad45749000000b004ad7740f3a7mr3693271qvx.94.1663870319423; Thu, 22 Sep 2022 11:11:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663870319; cv=none; d=google.com; s=arc-20160816; b=FoNCfvMQ+e7pdCLjWMo92qZrh9DRwAm+yffFNkbDrMxugJYySi1lXGGZyxN7Q8JCjP KQ74wBGJHix2beZaoSOJfW9jx0hZmNjMZAnqYMgOwmhxAXwuI2Fzay0wxrnfPzVGLa4y 4uPUhUIBIzIOF+YvBDXFIcowDai0A9zDWpW/Qx8i+07RlQ8NbTNrOLlFcwodoNUW6rdx 3AY/mgA5vcXr41/jmW1HelLpHybN4dwd0ZASuXZ/OKrHucon2QpYk2EwT0I2wrYkrML4 TF9A2PLFD0qK699nCoZSsWVqT6RnY7QAbsXrU7bCsI1/LLodQdCRRW1G3j3raCP1h3Cf A+Bw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=QsWOLsgF0/chVob90PgwZQ1AA7ITBpmicr/bUMVWE44=; b=D6TJUOW0aEeA8QikpTh6PIsgfgUiHuhFXuRuyqS5Fq1+8fj/s3cIs6xA47Tj0uBRXw OqkrGWs5dnWDocIWJKM5QqmjCDkLFCUdd4PKTzYgcdDmYyXFdKzQfgL6tqkSV8yVha8j ehrGpQccZP0kesbnwQFSUui4++xMhG2gSilP98FGCm28V+0us0qkl96R/F4kCgHxBCmZ EpEmjDDHzdmsE71aDePWHJfp5WnFiKnCZh1olu+p+fRA78hBh0xCC/E1tagrZkTfM0oH OSeJYzn74qohoeBK3xYWMd2KUrpavLkla5H30DCIS3Rd5dOzSoz1uqjWEFRo+xQnrXXF UN1g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KhyVNE6p; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.39 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:40 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 03/39] target/arm: Create GetPhysAddrResult Date: Thu, 22 Sep 2022 17:35:00 +0100 Message-Id: <20220922163536.1096175-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Combine 5 output pointer arguments from get_phys_addr into a single struct. Adjust all callers. Signed-off-by: Richard Henderson Message-id: 20220822152741.1617527-2-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/internals.h | 13 ++++- target/arm/helper.c | 27 ++++----- target/arm/m_helper.c | 52 ++++++----------- target/arm/ptw.c | 120 +++++++++++++++++++++------------------- target/arm/tlb_helper.c | 22 +++----- 5 files changed, 109 insertions(+), 125 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index bf60cd5f845..e9743d3e220 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1142,11 +1142,18 @@ typedef struct ARMCacheAttrs { bool is_s2_format:1; } ARMCacheAttrs; +/* Fields that are valid upon success. */ +typedef struct GetPhysAddrResult { + hwaddr phys; + target_ulong page_size; + int prot; + MemTxAttrs attrs; + ARMCacheAttrs cacheattrs; +} GetPhysAddrResult; + bool get_phys_addr(CPUARMState *env, target_ulong address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - hwaddr *phys_ptr, MemTxAttrs *attrs, int *prot, - target_ulong *page_size, - ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheattrs) + GetPhysAddrResult *result, ARMMMUFaultInfo *fi) __attribute__((nonnull)); void arm_log_exception(CPUState *cs); diff --git a/target/arm/helper.c b/target/arm/helper.c index 1a57d2e1d60..b5dac651e75 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -3190,24 +3190,19 @@ static CPAccessResult ats_access(CPUARMState *env, const ARMCPRegInfo *ri, static uint64_t do_ats_write(CPUARMState *env, uint64_t value, MMUAccessType access_type, ARMMMUIdx mmu_idx) { - hwaddr phys_addr; - target_ulong page_size; - int prot; bool ret; uint64_t par64; bool format64 = false; - MemTxAttrs attrs = {}; ARMMMUFaultInfo fi = {}; - ARMCacheAttrs cacheattrs = {}; + GetPhysAddrResult res = {}; - ret = get_phys_addr(env, value, access_type, mmu_idx, &phys_addr, &attrs, - &prot, &page_size, &fi, &cacheattrs); + ret = get_phys_addr(env, value, access_type, mmu_idx, &res, &fi); /* * ATS operations only do S1 or S1+S2 translations, so we never * have to deal with the ARMCacheAttrs format for S2 only. */ - assert(!cacheattrs.is_s2_format); + assert(!res.cacheattrs.is_s2_format); if (ret) { /* @@ -3313,12 +3308,12 @@ static uint64_t do_ats_write(CPUARMState *env, uint64_t value, /* Create a 64-bit PAR */ par64 = (1 << 11); /* LPAE bit always set */ if (!ret) { - par64 |= phys_addr & ~0xfffULL; - if (!attrs.secure) { + par64 |= res.phys & ~0xfffULL; + if (!res.attrs.secure) { par64 |= (1 << 9); /* NS */ } - par64 |= (uint64_t)cacheattrs.attrs << 56; /* ATTR */ - par64 |= cacheattrs.shareability << 7; /* SH */ + par64 |= (uint64_t)res.cacheattrs.attrs << 56; /* ATTR */ + par64 |= res.cacheattrs.shareability << 7; /* SH */ } else { uint32_t fsr = arm_fi_to_lfsc(&fi); @@ -3338,13 +3333,13 @@ static uint64_t do_ats_write(CPUARMState *env, uint64_t value, */ if (!ret) { /* We do not set any attribute bits in the PAR */ - if (page_size == (1 << 24) + if (res.page_size == (1 << 24) && arm_feature(env, ARM_FEATURE_V7)) { - par64 = (phys_addr & 0xff000000) | (1 << 1); + par64 = (res.phys & 0xff000000) | (1 << 1); } else { - par64 = phys_addr & 0xfffff000; + par64 = res.phys & 0xfffff000; } - if (!attrs.secure) { + if (!res.attrs.secure) { par64 |= (1 << 9); /* NS */ } } else { diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c index 308610f6b4e..84c6796b8d6 100644 --- a/target/arm/m_helper.c +++ b/target/arm/m_helper.c @@ -183,19 +183,14 @@ static bool v7m_stack_write(ARMCPU *cpu, uint32_t addr, uint32_t value, { CPUState *cs = CPU(cpu); CPUARMState *env = &cpu->env; - MemTxAttrs attrs = {}; MemTxResult txres; - target_ulong page_size; - hwaddr physaddr; - int prot; + GetPhysAddrResult res = {}; ARMMMUFaultInfo fi = {}; - ARMCacheAttrs cacheattrs = {}; bool secure = mmu_idx & ARM_MMU_IDX_M_S; int exc; bool exc_secure; - if (get_phys_addr(env, addr, MMU_DATA_STORE, mmu_idx, &physaddr, - &attrs, &prot, &page_size, &fi, &cacheattrs)) { + if (get_phys_addr(env, addr, MMU_DATA_STORE, mmu_idx, &res, &fi)) { /* MPU/SAU lookup failed */ if (fi.type == ARMFault_QEMU_SFault) { if (mode == STACK_LAZYFP) { @@ -228,8 +223,8 @@ static bool v7m_stack_write(ARMCPU *cpu, uint32_t addr, uint32_t value, } goto pend_fault; } - address_space_stl_le(arm_addressspace(cs, attrs), physaddr, value, - attrs, &txres); + address_space_stl_le(arm_addressspace(cs, res.attrs), res.phys, value, + res.attrs, &txres); if (txres != MEMTX_OK) { /* BusFault trying to write the data */ if (mode == STACK_LAZYFP) { @@ -276,20 +271,15 @@ static bool v7m_stack_read(ARMCPU *cpu, uint32_t *dest, uint32_t addr, { CPUState *cs = CPU(cpu); CPUARMState *env = &cpu->env; - MemTxAttrs attrs = {}; MemTxResult txres; - target_ulong page_size; - hwaddr physaddr; - int prot; + GetPhysAddrResult res = {}; ARMMMUFaultInfo fi = {}; - ARMCacheAttrs cacheattrs = {}; bool secure = mmu_idx & ARM_MMU_IDX_M_S; int exc; bool exc_secure; uint32_t value; - if (get_phys_addr(env, addr, MMU_DATA_LOAD, mmu_idx, &physaddr, - &attrs, &prot, &page_size, &fi, &cacheattrs)) { + if (get_phys_addr(env, addr, MMU_DATA_LOAD, mmu_idx, &res, &fi)) { /* MPU/SAU lookup failed */ if (fi.type == ARMFault_QEMU_SFault) { qemu_log_mask(CPU_LOG_INT, @@ -308,8 +298,8 @@ static bool v7m_stack_read(ARMCPU *cpu, uint32_t *dest, uint32_t addr, goto pend_fault; } - value = address_space_ldl(arm_addressspace(cs, attrs), physaddr, - attrs, &txres); + value = address_space_ldl(arm_addressspace(cs, res.attrs), res.phys, + res.attrs, &txres); if (txres != MEMTX_OK) { /* BusFault trying to read the data */ qemu_log_mask(CPU_LOG_INT, "...BusFault with BFSR.UNSTKERR\n"); @@ -2008,13 +1998,9 @@ static bool v7m_read_half_insn(ARMCPU *cpu, ARMMMUIdx mmu_idx, CPUState *cs = CPU(cpu); CPUARMState *env = &cpu->env; V8M_SAttributes sattrs = {}; - MemTxAttrs attrs = {}; + GetPhysAddrResult res = {}; ARMMMUFaultInfo fi = {}; - ARMCacheAttrs cacheattrs = {}; MemTxResult txres; - target_ulong page_size; - hwaddr physaddr; - int prot; v8m_security_lookup(env, addr, MMU_INST_FETCH, mmu_idx, &sattrs); if (!sattrs.nsc || sattrs.ns) { @@ -2028,16 +2014,15 @@ static bool v7m_read_half_insn(ARMCPU *cpu, ARMMMUIdx mmu_idx, "...really SecureFault with SFSR.INVEP\n"); return false; } - if (get_phys_addr(env, addr, MMU_INST_FETCH, mmu_idx, &physaddr, - &attrs, &prot, &page_size, &fi, &cacheattrs)) { + if (get_phys_addr(env, addr, MMU_INST_FETCH, mmu_idx, &res, &fi)) { /* the MPU lookup failed */ env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_IACCVIOL_MASK; armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_MEM, env->v7m.secure); qemu_log_mask(CPU_LOG_INT, "...really MemManage with CFSR.IACCVIOL\n"); return false; } - *insn = address_space_lduw_le(arm_addressspace(cs, attrs), physaddr, - attrs, &txres); + *insn = address_space_lduw_le(arm_addressspace(cs, res.attrs), res.phys, + res.attrs, &txres); if (txres != MEMTX_OK) { env->v7m.cfsr[M_REG_NS] |= R_V7M_CFSR_IBUSERR_MASK; armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_BUS, false); @@ -2060,17 +2045,12 @@ static bool v7m_read_sg_stack_word(ARMCPU *cpu, ARMMMUIdx mmu_idx, */ CPUState *cs = CPU(cpu); CPUARMState *env = &cpu->env; - MemTxAttrs attrs = {}; MemTxResult txres; - target_ulong page_size; - hwaddr physaddr; - int prot; + GetPhysAddrResult res = {}; ARMMMUFaultInfo fi = {}; - ARMCacheAttrs cacheattrs = {}; uint32_t value; - if (get_phys_addr(env, addr, MMU_DATA_LOAD, mmu_idx, &physaddr, - &attrs, &prot, &page_size, &fi, &cacheattrs)) { + if (get_phys_addr(env, addr, MMU_DATA_LOAD, mmu_idx, &res, &fi)) { /* MPU/SAU lookup failed */ if (fi.type == ARMFault_QEMU_SFault) { qemu_log_mask(CPU_LOG_INT, @@ -2088,8 +2068,8 @@ static bool v7m_read_sg_stack_word(ARMCPU *cpu, ARMMMUIdx mmu_idx, } return false; } - value = address_space_ldl(arm_addressspace(cs, attrs), physaddr, - attrs, &txres); + value = address_space_ldl(arm_addressspace(cs, res.attrs), res.phys, + res.attrs, &txres); if (txres != MEMTX_OK) { /* BusFault trying to read the data */ qemu_log_mask(CPU_LOG_INT, diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 3261039d93a..8db2abac015 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -2300,18 +2300,12 @@ static ARMCacheAttrs combine_cacheattrs(CPUARMState *env, * @address: virtual address to get physical address for * @access_type: 0 for read, 1 for write, 2 for execute * @mmu_idx: MMU index indicating required translation regime - * @phys_ptr: set to the physical address corresponding to the virtual address - * @attrs: set to the memory transaction attributes to use - * @prot: set to the permissions for the page containing phys_ptr - * @page_size: set to the size of the page containing phys_ptr + * @result: set on translation success. * @fi: set to fault info if the translation fails - * @cacheattrs: (if non-NULL) set to the cacheability/shareability attributes */ bool get_phys_addr(CPUARMState *env, target_ulong address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - hwaddr *phys_ptr, MemTxAttrs *attrs, int *prot, - target_ulong *page_size, - ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheattrs) + GetPhysAddrResult *result, ARMMMUFaultInfo *fi) { ARMMMUIdx s1_mmu_idx = stage_1_mmu_idx(mmu_idx); @@ -2322,43 +2316,54 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, */ if (arm_feature(env, ARM_FEATURE_EL2)) { hwaddr ipa; - int s2_prot; + int s1_prot; int ret; bool ipa_secure; - ARMCacheAttrs cacheattrs2 = {}; + ARMCacheAttrs cacheattrs1; ARMMMUIdx s2_mmu_idx; bool is_el0; - ret = get_phys_addr(env, address, access_type, s1_mmu_idx, &ipa, - attrs, prot, page_size, fi, cacheattrs); + ret = get_phys_addr(env, address, access_type, s1_mmu_idx, + result, fi); /* If S1 fails or S2 is disabled, return early. */ if (ret || regime_translation_disabled(env, ARMMMUIdx_Stage2)) { - *phys_ptr = ipa; return ret; } - ipa_secure = attrs->secure; + ipa = result->phys; + ipa_secure = result->attrs.secure; if (arm_is_secure_below_el3(env)) { if (ipa_secure) { - attrs->secure = !(env->cp15.vstcr_el2 & VSTCR_SW); + result->attrs.secure = !(env->cp15.vstcr_el2 & VSTCR_SW); } else { - attrs->secure = !(env->cp15.vtcr_el2 & VTCR_NSW); + result->attrs.secure = !(env->cp15.vtcr_el2 & VTCR_NSW); } } else { assert(!ipa_secure); } - s2_mmu_idx = attrs->secure ? ARMMMUIdx_Stage2_S : ARMMMUIdx_Stage2; + s2_mmu_idx = (result->attrs.secure + ? ARMMMUIdx_Stage2_S : ARMMMUIdx_Stage2); is_el0 = mmu_idx == ARMMMUIdx_E10_0 || mmu_idx == ARMMMUIdx_SE10_0; - /* S1 is done. Now do S2 translation. */ + /* + * S1 is done, now do S2 translation. + * Save the stage1 results so that we may merge + * prot and cacheattrs later. + */ + s1_prot = result->prot; + cacheattrs1 = result->cacheattrs; + memset(result, 0, sizeof(*result)); + ret = get_phys_addr_lpae(env, ipa, access_type, s2_mmu_idx, is_el0, - phys_ptr, attrs, &s2_prot, - page_size, fi, &cacheattrs2); + &result->phys, &result->attrs, + &result->prot, &result->page_size, + fi, &result->cacheattrs); fi->s2addr = ipa; + /* Combine the S1 and S2 perms. */ - *prot &= s2_prot; + result->prot &= s1_prot; /* If S2 fails, return early. */ if (ret) { @@ -2374,20 +2379,21 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, * Outer Write-Back Read-Allocate Write-Allocate. * Do not overwrite Tagged within attrs. */ - if (cacheattrs->attrs != 0xf0) { - cacheattrs->attrs = 0xff; + if (cacheattrs1.attrs != 0xf0) { + cacheattrs1.attrs = 0xff; } - cacheattrs->shareability = 0; + cacheattrs1.shareability = 0; } - *cacheattrs = combine_cacheattrs(env, *cacheattrs, cacheattrs2); + result->cacheattrs = combine_cacheattrs(env, cacheattrs1, + result->cacheattrs); /* Check if IPA translates to secure or non-secure PA space. */ if (arm_is_secure_below_el3(env)) { if (ipa_secure) { - attrs->secure = + result->attrs.secure = !(env->cp15.vstcr_el2 & (VSTCR_SA | VSTCR_SW)); } else { - attrs->secure = + result->attrs.secure = !((env->cp15.vtcr_el2 & (VTCR_NSA | VTCR_NSW)) || (env->cp15.vstcr_el2 & (VSTCR_SA | VSTCR_SW))); } @@ -2406,8 +2412,8 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, * cannot upgrade an non-secure translation regime's attributes * to secure. */ - attrs->secure = regime_is_secure(env, mmu_idx); - attrs->user = regime_is_user(env, mmu_idx); + result->attrs.secure = regime_is_secure(env, mmu_idx); + result->attrs.user = regime_is_user(env, mmu_idx); /* * Fast Context Switch Extension. This doesn't exist at all in v8. @@ -2424,20 +2430,22 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, if (arm_feature(env, ARM_FEATURE_PMSA)) { bool ret; - *page_size = TARGET_PAGE_SIZE; + result->page_size = TARGET_PAGE_SIZE; if (arm_feature(env, ARM_FEATURE_V8)) { /* PMSAv8 */ ret = get_phys_addr_pmsav8(env, address, access_type, mmu_idx, - phys_ptr, attrs, prot, page_size, fi); + &result->phys, &result->attrs, + &result->prot, &result->page_size, fi); } else if (arm_feature(env, ARM_FEATURE_V7)) { /* PMSAv7 */ ret = get_phys_addr_pmsav7(env, address, access_type, mmu_idx, - phys_ptr, prot, page_size, fi); + &result->phys, &result->prot, + &result->page_size, fi); } else { /* Pre-v7 MPU */ ret = get_phys_addr_pmsav5(env, address, access_type, mmu_idx, - phys_ptr, prot, fi); + &result->phys, &result->prot, fi); } qemu_log_mask(CPU_LOG_MMU, "PMSA MPU lookup for %s at 0x%08" PRIx32 " mmu_idx %u -> %s (prot %c%c%c)\n", @@ -2445,9 +2453,9 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, (access_type == MMU_DATA_STORE ? "writing" : "execute"), (uint32_t)address, mmu_idx, ret ? "Miss" : "Hit", - *prot & PAGE_READ ? 'r' : '-', - *prot & PAGE_WRITE ? 'w' : '-', - *prot & PAGE_EXEC ? 'x' : '-'); + result->prot & PAGE_READ ? 'r' : '-', + result->prot & PAGE_WRITE ? 'w' : '-', + result->prot & PAGE_EXEC ? 'x' : '-'); return ret; } @@ -2492,14 +2500,14 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, address = extract64(address, 0, 52); } } - *phys_ptr = address; - *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; - *page_size = TARGET_PAGE_SIZE; + result->phys = address; + result->prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; + result->page_size = TARGET_PAGE_SIZE; /* Fill in cacheattr a-la AArch64.TranslateAddressS1Off. */ hcr = arm_hcr_el2_eff(env); - cacheattrs->shareability = 0; - cacheattrs->is_s2_format = false; + result->cacheattrs.shareability = 0; + result->cacheattrs.is_s2_format = false; if (hcr & HCR_DC) { if (hcr & HCR_DCT) { memattr = 0xf0; /* Tagged, Normal, WB, RWA */ @@ -2512,24 +2520,27 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, } else { memattr = 0x44; /* Normal, NC, No */ } - cacheattrs->shareability = 2; /* outer sharable */ + result->cacheattrs.shareability = 2; /* outer sharable */ } else { memattr = 0x00; /* Device, nGnRnE */ } - cacheattrs->attrs = memattr; + result->cacheattrs.attrs = memattr; return 0; } if (regime_using_lpae_format(env, mmu_idx)) { return get_phys_addr_lpae(env, address, access_type, mmu_idx, false, - phys_ptr, attrs, prot, page_size, - fi, cacheattrs); + &result->phys, &result->attrs, + &result->prot, &result->page_size, + fi, &result->cacheattrs); } else if (regime_sctlr(env, mmu_idx) & SCTLR_XP) { return get_phys_addr_v6(env, address, access_type, mmu_idx, - phys_ptr, attrs, prot, page_size, fi); + &result->phys, &result->attrs, + &result->prot, &result->page_size, fi); } else { return get_phys_addr_v5(env, address, access_type, mmu_idx, - phys_ptr, prot, page_size, fi); + &result->phys, &result->prot, + &result->page_size, fi); } } @@ -2538,21 +2549,16 @@ hwaddr arm_cpu_get_phys_page_attrs_debug(CPUState *cs, vaddr addr, { ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; - hwaddr phys_addr; - target_ulong page_size; - int prot; - bool ret; + GetPhysAddrResult res = {}; ARMMMUFaultInfo fi = {}; ARMMMUIdx mmu_idx = arm_mmu_idx(env); - ARMCacheAttrs cacheattrs = {}; + bool ret; - *attrs = (MemTxAttrs) {}; - - ret = get_phys_addr(env, addr, MMU_DATA_LOAD, mmu_idx, &phys_addr, - attrs, &prot, &page_size, &fi, &cacheattrs); + ret = get_phys_addr(env, addr, MMU_DATA_LOAD, mmu_idx, &res, &fi); + *attrs = res.attrs; if (ret) { return -1; } - return phys_addr; + return res.phys; } diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c index 5a709eab56f..ad225b1cb20 100644 --- a/target/arm/tlb_helper.c +++ b/target/arm/tlb_helper.c @@ -209,11 +209,8 @@ bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size, { ARMCPU *cpu = ARM_CPU(cs); ARMMMUFaultInfo fi = {}; - hwaddr phys_addr; - target_ulong page_size; - int prot, ret; - MemTxAttrs attrs = {}; - ARMCacheAttrs cacheattrs = {}; + GetPhysAddrResult res = {}; + int ret; /* * Walk the page table and (if the mapping exists) add the page @@ -223,25 +220,24 @@ bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size, */ ret = get_phys_addr(&cpu->env, address, access_type, core_to_arm_mmu_idx(&cpu->env, mmu_idx), - &phys_addr, &attrs, &prot, &page_size, - &fi, &cacheattrs); + &res, &fi); if (likely(!ret)) { /* * Map a single [sub]page. Regions smaller than our declared * target page size are handled specially, so for those we * pass in the exact addresses. */ - if (page_size >= TARGET_PAGE_SIZE) { - phys_addr &= TARGET_PAGE_MASK; + if (res.page_size >= TARGET_PAGE_SIZE) { + res.phys &= TARGET_PAGE_MASK; address &= TARGET_PAGE_MASK; } /* Notice and record tagged memory. */ - if (cpu_isar_feature(aa64_mte, cpu) && cacheattrs.attrs == 0xf0) { - arm_tlb_mte_tagged(&attrs) = true; + if (cpu_isar_feature(aa64_mte, cpu) && res.cacheattrs.attrs == 0xf0) { + arm_tlb_mte_tagged(&res.attrs) = true; } - tlb_set_page_with_attrs(cs, address, phys_addr, attrs, - prot, mmu_idx, page_size); + tlb_set_page_with_attrs(cs, address, res.phys, res.attrs, + res.prot, mmu_idx, res.page_size); return true; } else if (probe) { return false; From patchwork Thu Sep 22 16:35:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608250 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp502985pvb; Thu, 22 Sep 2022 11:28:17 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6LN1mjhor0cf+MLH9s1/e4i/H7yu6rQAGMN2qKQTda9mMaHBiQaEAve5pGx+/6qebtDcHp X-Received: by 2002:a05:622a:96:b0:35c:f4dd:c17d with SMTP id o22-20020a05622a009600b0035cf4ddc17dmr4095892qtw.390.1663871297624; Thu, 22 Sep 2022 11:28:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663871297; cv=none; d=google.com; s=arc-20160816; b=bREdssXkL1QpDaOMJB0YaMujiONg8UJcMrnHAxB/obwRRl6EHRRQrkvUMQyN4M/thl EP8ear2IW9AaMeok2PcJhPEWPAIUVQehX3EFHGo14UNO9ZfhY4D08BX6XXcn6dIV0re7 5Oj9gW7TbOnqFUKG8BhgHOvXRU53tSEPsZQmL1XqZ13ZE3P9Kz91CYjzeenG3nrUPpCQ PWdEvcLZkVIu5CP5V7A/NZDuauHzQZhseyMc8oBJp4x3kWYSJr9I0+UZ5V3iMjnYPVxb 1IRDoLK2FeZbRp+CAQCDbC8WZMoatxuHwVOu5/n4unlOMOVKRxWYJXwecsInADQuGimZ AM+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=gRurciE+TALpwZNtDPbsw3br2HBbVUeEcSlrHdrEwwM=; b=j9aaKLIiBmaFmKR0Zn1wvtgV256mgxFud3JSELW5wru1ccbBRkKdGyqY4qspcrIPsg UC4FmK89dUSC0RONvvovD+t4M/iJzOsWdoDSZNebgLrRn7m7nr+7dc57alqloQlvhLsR gXe6R/Ep6Le9Y8mahEOimwbjoxzfvo3IaWfflPhmcbzWgc5ZZic+7VKg7c+hPs9tFIAx ei0aiH3NdcR/vsfhzPB1X7uzf6UatgfhdlfqF+ynqrwvNYH/1PTk8VFn2bXMqsCeetAv oo2KtW6Xg7il/AI1NV16/tzCmIgBPau/cR56xOBcX/K+2Wg48vMaE/pUUfQugB+ketc9 T2Jw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Y7KZiyGt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.40 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:40 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 04/39] target/arm: Use GetPhysAddrResult in get_phys_addr_lpae Date: Thu, 22 Sep 2022 17:35:01 +0100 Message-Id: <20220922163536.1096175-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20220822152741.1617527-4-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/ptw.c | 69 ++++++++++++++++++------------------------------ 1 file changed, 26 insertions(+), 43 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 8db2abac015..e8d3f88628e 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -16,10 +16,8 @@ static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - bool s1_is_el0, hwaddr *phys_ptr, - MemTxAttrs *txattrs, int *prot, - target_ulong *page_size_ptr, - ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheattrs) + bool s1_is_el0, GetPhysAddrResult *result, + ARMMMUFaultInfo *fi) __attribute__((nonnull)); /* This mapping is common between ID_AA64MMFR0.PARANGE and TCR_ELx.{I}PS. */ @@ -204,18 +202,13 @@ static hwaddr S1_ptw_translate(CPUARMState *env, ARMMMUIdx mmu_idx, { if (arm_mmu_idx_is_stage1_of_2(mmu_idx) && !regime_translation_disabled(env, ARMMMUIdx_Stage2)) { - target_ulong s2size; - hwaddr s2pa; - int s2prot; - int ret; ARMMMUIdx s2_mmu_idx = *is_secure ? ARMMMUIdx_Stage2_S : ARMMMUIdx_Stage2; - ARMCacheAttrs cacheattrs = {}; - MemTxAttrs txattrs = {}; + GetPhysAddrResult s2 = {}; + int ret; ret = get_phys_addr_lpae(env, addr, MMU_DATA_LOAD, s2_mmu_idx, false, - &s2pa, &txattrs, &s2prot, &s2size, fi, - &cacheattrs); + &s2, fi); if (ret) { assert(fi->type != ARMFault_None); fi->s2addr = addr; @@ -225,7 +218,7 @@ static hwaddr S1_ptw_translate(CPUARMState *env, ARMMMUIdx mmu_idx, return ~0; } if ((arm_hcr_el2_eff(env) & HCR_PTW) && - ptw_attrs_are_device(env, cacheattrs)) { + ptw_attrs_are_device(env, s2.cacheattrs)) { /* * PTW set and S1 walk touched S2 Device memory: * generate Permission fault. @@ -249,7 +242,7 @@ static hwaddr S1_ptw_translate(CPUARMState *env, ARMMMUIdx mmu_idx, assert(!*is_secure); } - addr = s2pa; + addr = s2.phys; } return addr; } @@ -972,19 +965,13 @@ static bool check_s2_mmu_setup(ARMCPU *cpu, bool is_aa64, int level, * table walk), must be true if this is stage 2 of a stage 1+2 * walk for an EL0 access. If @mmu_idx is anything else, * @s1_is_el0 is ignored. - * @phys_ptr: set to the physical address corresponding to the virtual address - * @attrs: set to the memory transaction attributes to use - * @prot: set to the permissions for the page containing phys_ptr - * @page_size_ptr: set to the size of the page containing phys_ptr + * @result: set on translation success, * @fi: set to fault info if the translation fails - * @cacheattrs: (if non-NULL) set to the cacheability/shareability attributes */ static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - bool s1_is_el0, hwaddr *phys_ptr, - MemTxAttrs *txattrs, int *prot, - target_ulong *page_size_ptr, - ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheattrs) + bool s1_is_el0, GetPhysAddrResult *result, + ARMMMUFaultInfo *fi) { ARMCPU *cpu = env_archcpu(env); /* Read an LPAE long-descriptor translation table. */ @@ -1302,16 +1289,16 @@ static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address, if (mmu_idx == ARMMMUIdx_Stage2 || mmu_idx == ARMMMUIdx_Stage2_S) { ns = mmu_idx == ARMMMUIdx_Stage2; xn = extract32(attrs, 11, 2); - *prot = get_S2prot(env, ap, xn, s1_is_el0); + result->prot = get_S2prot(env, ap, xn, s1_is_el0); } else { ns = extract32(attrs, 3, 1); xn = extract32(attrs, 12, 1); pxn = extract32(attrs, 11, 1); - *prot = get_S1prot(env, mmu_idx, aarch64, ap, ns, xn, pxn); + result->prot = get_S1prot(env, mmu_idx, aarch64, ap, ns, xn, pxn); } fault_type = ARMFault_Permission; - if (!(*prot & (1 << access_type))) { + if (!(result->prot & (1 << access_type))) { goto do_fault; } @@ -1321,23 +1308,23 @@ static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address, * the CPU doesn't support TZ or this is a non-secure translation * regime, because the attribute will already be non-secure. */ - txattrs->secure = false; + result->attrs.secure = false; } /* When in aarch64 mode, and BTI is enabled, remember GP in the IOTLB. */ if (aarch64 && guarded && cpu_isar_feature(aa64_bti, cpu)) { - arm_tlb_bti_gp(txattrs) = true; + arm_tlb_bti_gp(&result->attrs) = true; } if (mmu_idx == ARMMMUIdx_Stage2 || mmu_idx == ARMMMUIdx_Stage2_S) { - cacheattrs->is_s2_format = true; - cacheattrs->attrs = extract32(attrs, 0, 4); + result->cacheattrs.is_s2_format = true; + result->cacheattrs.attrs = extract32(attrs, 0, 4); } else { /* Index into MAIR registers for cache attributes */ uint8_t attrindx = extract32(attrs, 0, 3); uint64_t mair = env->cp15.mair_el[regime_el(env, mmu_idx)]; assert(attrindx <= 7); - cacheattrs->is_s2_format = false; - cacheattrs->attrs = extract64(mair, attrindx * 8, 8); + result->cacheattrs.is_s2_format = false; + result->cacheattrs.attrs = extract64(mair, attrindx * 8, 8); } /* @@ -1346,13 +1333,13 @@ static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address, * that case comes from TCR_ELx, which we extracted earlier. */ if (param.ds) { - cacheattrs->shareability = param.sh; + result->cacheattrs.shareability = param.sh; } else { - cacheattrs->shareability = extract32(attrs, 6, 2); + result->cacheattrs.shareability = extract32(attrs, 6, 2); } - *phys_ptr = descaddr; - *page_size_ptr = page_size; + result->phys = descaddr; + result->page_size = page_size; return false; do_fault: @@ -2356,10 +2343,8 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, cacheattrs1 = result->cacheattrs; memset(result, 0, sizeof(*result)); - ret = get_phys_addr_lpae(env, ipa, access_type, s2_mmu_idx, is_el0, - &result->phys, &result->attrs, - &result->prot, &result->page_size, - fi, &result->cacheattrs); + ret = get_phys_addr_lpae(env, ipa, access_type, s2_mmu_idx, + is_el0, result, fi); fi->s2addr = ipa; /* Combine the S1 and S2 perms. */ @@ -2530,9 +2515,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, if (regime_using_lpae_format(env, mmu_idx)) { return get_phys_addr_lpae(env, address, access_type, mmu_idx, false, - &result->phys, &result->attrs, - &result->prot, &result->page_size, - fi, &result->cacheattrs); + result, fi); } else if (regime_sctlr(env, mmu_idx) & SCTLR_XP) { return get_phys_addr_v6(env, address, access_type, mmu_idx, &result->phys, &result->attrs, From patchwork Thu Sep 22 16:35:02 2022 Content-Type: text/plain; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.41 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:41 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 05/39] target/arm: Use GetPhysAddrResult in get_phys_addr_v6 Date: Thu, 22 Sep 2022 17:35:02 +0100 Message-Id: <20220922163536.1096175-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20220822152741.1617527-5-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/ptw.c | 30 ++++++++++++++---------------- 1 file changed, 14 insertions(+), 16 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index e8d3f88628e..600d9e6650d 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -536,8 +536,7 @@ do_fault: static bool get_phys_addr_v6(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - hwaddr *phys_ptr, MemTxAttrs *attrs, int *prot, - target_ulong *page_size, ARMMMUFaultInfo *fi) + GetPhysAddrResult *result, ARMMMUFaultInfo *fi) { ARMCPU *cpu = env_archcpu(env); int level = 1; @@ -597,11 +596,11 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_t address, phys_addr = (desc & 0xff000000) | (address & 0x00ffffff); phys_addr |= (uint64_t)extract32(desc, 20, 4) << 32; phys_addr |= (uint64_t)extract32(desc, 5, 4) << 36; - *page_size = 0x1000000; + result->page_size = 0x1000000; } else { /* Section. */ phys_addr = (desc & 0xfff00000) | (address & 0x000fffff); - *page_size = 0x100000; + result->page_size = 0x100000; } ap = ((desc >> 10) & 3) | ((desc >> 13) & 4); xn = desc & (1 << 4); @@ -627,12 +626,12 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_t address, case 1: /* 64k page. */ phys_addr = (desc & 0xffff0000) | (address & 0xffff); xn = desc & (1 << 15); - *page_size = 0x10000; + result->page_size = 0x10000; break; case 2: case 3: /* 4k page. */ phys_addr = (desc & 0xfffff000) | (address & 0xfff); xn = desc & 1; - *page_size = 0x1000; + result->page_size = 0x1000; break; default: /* Never happens, but compiler isn't smart enough to tell. */ @@ -640,7 +639,7 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_t address, } } if (domain_prot == 3) { - *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; + result->prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; } else { if (pxn && !regime_is_user(env, mmu_idx)) { xn = 1; @@ -658,14 +657,14 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_t address, fi->type = ARMFault_AccessFlag; goto do_fault; } - *prot = simple_ap_to_rw_prot(env, mmu_idx, ap >> 1); + result->prot = simple_ap_to_rw_prot(env, mmu_idx, ap >> 1); } else { - *prot = ap_to_rw_prot(env, mmu_idx, ap, domain_prot); + result->prot = ap_to_rw_prot(env, mmu_idx, ap, domain_prot); } - if (*prot && !xn) { - *prot |= PAGE_EXEC; + if (result->prot && !xn) { + result->prot |= PAGE_EXEC; } - if (!(*prot & (1 << access_type))) { + if (!(result->prot & (1 << access_type))) { /* Access permission fault. */ fi->type = ARMFault_Permission; goto do_fault; @@ -676,9 +675,9 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_t address, * the CPU doesn't support TZ or this is a non-secure translation * regime, because the attribute will already be non-secure. */ - attrs->secure = false; + result->attrs.secure = false; } - *phys_ptr = phys_addr; + result->phys = phys_addr; return false; do_fault: fi->domain = domain; @@ -2518,8 +2517,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, result, fi); } else if (regime_sctlr(env, mmu_idx) & SCTLR_XP) { return get_phys_addr_v6(env, address, access_type, mmu_idx, - &result->phys, &result->attrs, - &result->prot, &result->page_size, fi); + result, fi); } else { return get_phys_addr_v5(env, address, access_type, mmu_idx, &result->phys, &result->prot, From patchwork Thu Sep 22 16:35:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608240 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp489008pvb; Thu, 22 Sep 2022 11:00:52 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5ICgSxc2L31K8VV5SvY04uJi3ss6fST98b7TOv2UKyI8/JsXgEjkPAiDINyId0CbMWkdQ6 X-Received: by 2002:ac8:5a06:0:b0:35c:cc7b:610c with SMTP id n6-20020ac85a06000000b0035ccc7b610cmr3897041qta.131.1663869652364; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.42 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:42 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 06/39] target/arm: Use GetPhysAddrResult in get_phys_addr_v5 Date: Thu, 22 Sep 2022 17:35:03 +0100 Message-Id: <20220922163536.1096175-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20220822152741.1617527-6-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/ptw.c | 25 +++++++++++-------------- 1 file changed, 11 insertions(+), 14 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 600d9e6650d..4e2476278e1 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -414,9 +414,7 @@ static int simple_ap_to_rw_prot(CPUARMState *env, ARMMMUIdx mmu_idx, int ap) static bool get_phys_addr_v5(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - hwaddr *phys_ptr, int *prot, - target_ulong *page_size, - ARMMMUFaultInfo *fi) + GetPhysAddrResult *result, ARMMMUFaultInfo *fi) { int level = 1; uint32_t table; @@ -464,7 +462,7 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t address, /* 1Mb section. */ phys_addr = (desc & 0xfff00000) | (address & 0x000fffff); ap = (desc >> 10) & 3; - *page_size = 1024 * 1024; + result->page_size = 1024 * 1024; } else { /* Lookup l2 entry. */ if (type == 1) { @@ -486,12 +484,12 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t address, case 1: /* 64k page. */ phys_addr = (desc & 0xffff0000) | (address & 0xffff); ap = (desc >> (4 + ((address >> 13) & 6))) & 3; - *page_size = 0x10000; + result->page_size = 0x10000; break; case 2: /* 4k page. */ phys_addr = (desc & 0xfffff000) | (address & 0xfff); ap = (desc >> (4 + ((address >> 9) & 6))) & 3; - *page_size = 0x1000; + result->page_size = 0x1000; break; case 3: /* 1k page, or ARMv6/XScale "extended small (4k) page" */ if (type == 1) { @@ -499,7 +497,7 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t address, if (arm_feature(env, ARM_FEATURE_XSCALE) || arm_feature(env, ARM_FEATURE_V6)) { phys_addr = (desc & 0xfffff000) | (address & 0xfff); - *page_size = 0x1000; + result->page_size = 0x1000; } else { /* * UNPREDICTABLE in ARMv5; we choose to take a @@ -510,7 +508,7 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t address, } } else { phys_addr = (desc & 0xfffffc00) | (address & 0x3ff); - *page_size = 0x400; + result->page_size = 0x400; } ap = (desc >> 4) & 3; break; @@ -519,14 +517,14 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t address, g_assert_not_reached(); } } - *prot = ap_to_rw_prot(env, mmu_idx, ap, domain_prot); - *prot |= *prot ? PAGE_EXEC : 0; - if (!(*prot & (1 << access_type))) { + result->prot = ap_to_rw_prot(env, mmu_idx, ap, domain_prot); + result->prot |= result->prot ? PAGE_EXEC : 0; + if (!(result->prot & (1 << access_type))) { /* Access permission fault. */ fi->type = ARMFault_Permission; goto do_fault; } - *phys_ptr = phys_addr; + result->phys = phys_addr; return false; do_fault: fi->domain = domain; @@ -2520,8 +2518,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, result, fi); } else { return get_phys_addr_v5(env, address, access_type, mmu_idx, - &result->phys, &result->prot, - &result->page_size, fi); + result, fi); } } From patchwork Thu Sep 22 16:35:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608224 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp447754pvb; Thu, 22 Sep 2022 09:41:24 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4OgpTNLntmxkQ2ALC1zzb94Or06ReLUnB2xV94WGfJ79o9V8jRwlWG8Nog51hYb+yvwrS8 X-Received: by 2002:a05:622a:54f:b0:35c:f68f:44c3 with SMTP id m15-20020a05622a054f00b0035cf68f44c3mr3577011qtx.546.1663864884435; Thu, 22 Sep 2022 09:41:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663864884; cv=none; d=google.com; s=arc-20160816; b=Z510lqn8yfNUp3Xut3nXEfqg5UlIPgLJtyqbeiE0AJJJlatNm/FW9AJ77KuRkCVMjt x8wikUrsJSZKkqj6DLGSV9bWqOFcnQViCRW9bmoyNlUculsp97UbGO9+cXVUt4JCEaRj RyNB7JSAO3PG8XHZwxR1fwF+GR+lMVzN9xPXDSKfx4dEEyH/g0KTR+ePQwrW+VXGpvfT gQMoTjM0NJ/HgkJ6h5zwuVn9FcN0PJRwnDJnjVGffxC3m7WkBNx72k9ohK4u+N3gRDPQ KxiaAjz9h3t449//ZxcBAgo/rfv1c7tKfxFYHi8zRRg6EcS8jA2TaXJa42qtgXIi/LWP i2vA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=o5zeYSJg5vCaz9F7elm+Lb7yX0lwKPPrfwrGwePP0L0=; b=P33DYj4XE+Fl3RN9txtGYo604OgBIDmIR8TlCNNYsNqtu4sBj+oJK+vAMVDLnSAgg8 JyMM+vTOvSwH7LxdqYcu3ym73ezhI1NBEk8sSjyL2oln1aQioh7tQVFtxLB4a5lwRPmz tdaBJsfa0W11xjjZEqUXFA/7N5rYugj5UHZvEcWjxWqfpVWh2SFUZsffer0j3/61yEz+ 3BKi7VqKP0Y23ZzVCCCzcexZKb5jiKgWkHIEnrkAEWZqJeZ4eFwEvWBbkI+DkYb3cvo2 z6eYA/7toHjCNpiQVjVyjYTF20BkZhRkKfrk9YT8JLsQu+gJKvsxYfmlBvkPTxxf9BRh WDmQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pClGnQWn; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.42 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:42 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 07/39] target/arm: Use GetPhysAddrResult in get_phys_addr_pmsav5 Date: Thu, 22 Sep 2022 17:35:04 +0100 Message-Id: <20220922163536.1096175-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20220822152741.1617527-7-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/ptw.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 4e2476278e1..70abcce81f9 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -1351,7 +1351,7 @@ do_fault: static bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - hwaddr *phys_ptr, int *prot, + GetPhysAddrResult *result, ARMMMUFaultInfo *fi) { int n; @@ -1361,12 +1361,12 @@ static bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address, if (regime_translation_disabled(env, mmu_idx)) { /* MPU disabled. */ - *phys_ptr = address; - *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; + result->phys = address; + result->prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; return false; } - *phys_ptr = address; + result->phys = address; for (n = 7; n >= 0; n--) { base = env->cp15.c6_region[n]; if ((base & 1) == 0) { @@ -1402,16 +1402,16 @@ static bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address, fi->level = 1; return true; } - *prot = PAGE_READ | PAGE_WRITE; + result->prot = PAGE_READ | PAGE_WRITE; break; case 2: - *prot = PAGE_READ; + result->prot = PAGE_READ; if (!is_user) { - *prot |= PAGE_WRITE; + result->prot |= PAGE_WRITE; } break; case 3: - *prot = PAGE_READ | PAGE_WRITE; + result->prot = PAGE_READ | PAGE_WRITE; break; case 5: if (is_user) { @@ -1419,10 +1419,10 @@ static bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address, fi->level = 1; return true; } - *prot = PAGE_READ; + result->prot = PAGE_READ; break; case 6: - *prot = PAGE_READ; + result->prot = PAGE_READ; break; default: /* Bad permission. */ @@ -1430,7 +1430,7 @@ static bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address, fi->level = 1; return true; } - *prot |= PAGE_EXEC; + result->prot |= PAGE_EXEC; return false; } @@ -2427,7 +2427,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, } else { /* Pre-v7 MPU */ ret = get_phys_addr_pmsav5(env, address, access_type, mmu_idx, - &result->phys, &result->prot, fi); + result, fi); } qemu_log_mask(CPU_LOG_MMU, "PMSA MPU lookup for %s at 0x%08" PRIx32 " mmu_idx %u -> %s (prot %c%c%c)\n", From patchwork Thu Sep 22 16:35:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608232 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp472049pvb; Thu, 22 Sep 2022 10:23:52 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6XNLDNxHncqNp7BAqh6on33jFYd+egcb2RtVM2F7IeWOxu5PiuXtw/ID61K4t5WiOz9T9i X-Received: by 2002:ad4:5bc3:0:b0:4ad:d379:d2d4 with SMTP id t3-20020ad45bc3000000b004add379d2d4mr368662qvt.24.1663867432118; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.43 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:43 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 08/39] target/arm: Use GetPhysAddrResult in get_phys_addr_pmsav7 Date: Thu, 22 Sep 2022 17:35:05 +0100 Message-Id: <20220922163536.1096175-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20220822152741.1617527-8-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/ptw.c | 36 +++++++++++++++++------------------- 1 file changed, 17 insertions(+), 19 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 70abcce81f9..36b108907fc 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -1513,17 +1513,16 @@ static bool pmsav7_use_background_region(ARMCPU *cpu, ARMMMUIdx mmu_idx, static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - hwaddr *phys_ptr, int *prot, - target_ulong *page_size, + GetPhysAddrResult *result, ARMMMUFaultInfo *fi) { ARMCPU *cpu = env_archcpu(env); int n; bool is_user = regime_is_user(env, mmu_idx); - *phys_ptr = address; - *page_size = TARGET_PAGE_SIZE; - *prot = 0; + result->phys = address; + result->page_size = TARGET_PAGE_SIZE; + result->prot = 0; if (regime_translation_disabled(env, mmu_idx) || m_is_ppb_region(env, address)) { @@ -1535,7 +1534,7 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address, * which always does a direct read using address_space_ldl(), rather * than going via this function, so we don't need to check that here. */ - get_phys_addr_pmsav7_default(env, mmu_idx, address, prot); + get_phys_addr_pmsav7_default(env, mmu_idx, address, &result->prot); } else { /* MPU enabled */ for (n = (int)cpu->pmsav7_dregion - 1; n >= 0; n--) { /* region search */ @@ -1577,7 +1576,7 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address, if (ranges_overlap(base, rmask, address & TARGET_PAGE_MASK, TARGET_PAGE_SIZE)) { - *page_size = 1; + result->page_size = 1; } continue; } @@ -1615,7 +1614,7 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address, continue; } if (rsize < TARGET_PAGE_BITS) { - *page_size = 1 << rsize; + result->page_size = 1 << rsize; } break; } @@ -1626,7 +1625,7 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address, fi->type = ARMFault_Background; return true; } - get_phys_addr_pmsav7_default(env, mmu_idx, address, prot); + get_phys_addr_pmsav7_default(env, mmu_idx, address, &result->prot); } else { /* a MPU hit! */ uint32_t ap = extract32(env->pmsav7.dracr[n], 8, 3); uint32_t xn = extract32(env->pmsav7.dracr[n], 12, 1); @@ -1643,16 +1642,16 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address, case 5: break; /* no access */ case 3: - *prot |= PAGE_WRITE; + result->prot |= PAGE_WRITE; /* fall through */ case 2: case 6: - *prot |= PAGE_READ | PAGE_EXEC; + result->prot |= PAGE_READ | PAGE_EXEC; break; case 7: /* for v7M, same as 6; for R profile a reserved value */ if (arm_feature(env, ARM_FEATURE_M)) { - *prot |= PAGE_READ | PAGE_EXEC; + result->prot |= PAGE_READ | PAGE_EXEC; break; } /* fall through */ @@ -1668,16 +1667,16 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address, case 1: case 2: case 3: - *prot |= PAGE_WRITE; + result->prot |= PAGE_WRITE; /* fall through */ case 5: case 6: - *prot |= PAGE_READ | PAGE_EXEC; + result->prot |= PAGE_READ | PAGE_EXEC; break; case 7: /* for v7M, same as 6; for R profile a reserved value */ if (arm_feature(env, ARM_FEATURE_M)) { - *prot |= PAGE_READ | PAGE_EXEC; + result->prot |= PAGE_READ | PAGE_EXEC; break; } /* fall through */ @@ -1690,14 +1689,14 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address, /* execute never */ if (xn) { - *prot &= ~PAGE_EXEC; + result->prot &= ~PAGE_EXEC; } } } fi->type = ARMFault_Permission; fi->level = 1; - return !(*prot & (1 << access_type)); + return !(result->prot & (1 << access_type)); } bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address, @@ -2422,8 +2421,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, } else if (arm_feature(env, ARM_FEATURE_V7)) { /* PMSAv7 */ ret = get_phys_addr_pmsav7(env, address, access_type, mmu_idx, - &result->phys, &result->prot, - &result->page_size, fi); + result, fi); } else { /* Pre-v7 MPU */ ret = get_phys_addr_pmsav5(env, address, access_type, mmu_idx, From patchwork Thu Sep 22 16:35:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608252 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp504971pvb; Thu, 22 Sep 2022 11:33:02 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4rgASJlMC7Exy5eWTSVR/HUWU4eERXSE1g5saqXU8+0oMgfZ33b4WRVfync6xY0z/HljAS X-Received: by 2002:a05:622a:5d1:b0:35d:b68:f735 with SMTP id d17-20020a05622a05d100b0035d0b68f735mr3994142qtb.563.1663871582513; Thu, 22 Sep 2022 11:33:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663871582; cv=none; d=google.com; s=arc-20160816; b=mpkFJx1LP724Fi7pdtWSxFzLWKRfkTQfIRa5Ef5M0SAoN23HWwFa/WP+HNmqU3xAJs aaERJzbLhLZ3CM/1+o3CBlrGZun+gmEE4oju1QC6MTt1Fv1MOzDDMh3SR+st+d7sXvDs 9b3L3EZbZl0gByGkv3PpGFvnYJ0SxH0w/ooT083fOQm5LfMUm9CvdEj/PaecpLM4hLFO NJRA67SUU8t4qbWmNmzMq20nFITaPubLrTppCSk5DYDI5ik5ZsarG3bBIoCjqRVfdUfZ g4bNofL6dky9mrDJUqTEJq108meTsen/IGlBXqdMo6dSUPeOVsjYFYIVF8nBBsQU5/qz pRMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=lW/oPgeXhT91EvmbPc8n7WToY6I3Ebq62IKaIqyShd4=; b=qL0aYkF/WYltGBjjAyPiuEDzw9A2T9spI4FMB1EqBWX7zk2dZSLUWTBfHK2SFxg14m 892MPe0ZB7wiT1eAVaH7142iyFNXumRPsAhlmkDu8rP4VAoU5eoYiAgWWSYXb3xfr9mU oBo4BsDlx4D9pZW0UHXRJ16DBP+CATVwcoEvhgTiLMzbPOMs9EF/wawNpM6SCXBik82X wTt6ZCKm8Rd1SPOivkzLIJt7l0utaQPWzuEbwED0C7d2yhA1WO2ZvwfobzZ2DWSLmdq6 at/JHBcXIzqlXOdL5yM9LP1y/ZdvANoC5CQ1LvTXJYbb1aamDI+N2uGrFkQUGCiAKxoe fDyQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=peDWqQoc; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.44 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:44 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 09/39] target/arm: Use GetPhysAddrResult in get_phys_addr_pmsav8 Date: Thu, 22 Sep 2022 17:35:06 +0100 Message-Id: <20220922163536.1096175-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20220822152741.1617527-9-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/ptw.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 36b108907fc..2286f6e12db 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -1967,8 +1967,7 @@ void v8m_security_lookup(CPUARMState *env, uint32_t address, static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - hwaddr *phys_ptr, MemTxAttrs *txattrs, - int *prot, target_ulong *page_size, + GetPhysAddrResult *result, ARMMMUFaultInfo *fi) { uint32_t secure = regime_is_secure(env, mmu_idx); @@ -2003,9 +2002,9 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address, } else { fi->type = ARMFault_QEMU_SFault; } - *page_size = sattrs.subpage ? 1 : TARGET_PAGE_SIZE; - *phys_ptr = address; - *prot = 0; + result->page_size = sattrs.subpage ? 1 : TARGET_PAGE_SIZE; + result->phys = address; + result->prot = 0; return true; } } else { @@ -2015,7 +2014,7 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address, * might downgrade a secure access to nonsecure. */ if (sattrs.ns) { - txattrs->secure = false; + result->attrs.secure = false; } else if (!secure) { /* * NS access to S memory must fault. @@ -2028,17 +2027,19 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address, * for M_FAKE_FSR_SFAULT in arm_v7m_cpu_do_interrupt(). */ fi->type = ARMFault_QEMU_SFault; - *page_size = sattrs.subpage ? 1 : TARGET_PAGE_SIZE; - *phys_ptr = address; - *prot = 0; + result->page_size = sattrs.subpage ? 1 : TARGET_PAGE_SIZE; + result->phys = address; + result->prot = 0; return true; } } } - ret = pmsav8_mpu_lookup(env, address, access_type, mmu_idx, phys_ptr, - txattrs, prot, &mpu_is_subpage, fi, NULL); - *page_size = sattrs.subpage || mpu_is_subpage ? 1 : TARGET_PAGE_SIZE; + ret = pmsav8_mpu_lookup(env, address, access_type, mmu_idx, + &result->phys, &result->attrs, &result->prot, + &mpu_is_subpage, fi, NULL); + result->page_size = + sattrs.subpage || mpu_is_subpage ? 1 : TARGET_PAGE_SIZE; return ret; } @@ -2416,8 +2417,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, if (arm_feature(env, ARM_FEATURE_V8)) { /* PMSAv8 */ ret = get_phys_addr_pmsav8(env, address, access_type, mmu_idx, - &result->phys, &result->attrs, - &result->prot, &result->page_size, fi); + result, fi); } else if (arm_feature(env, ARM_FEATURE_V7)) { /* PMSAv7 */ ret = get_phys_addr_pmsav7(env, address, access_type, mmu_idx, From patchwork Thu Sep 22 16:35:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608241 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp490463pvb; Thu, 22 Sep 2022 11:02:56 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4tHb0Okjrvxkjr1UqXmhd0wk09Bupi7wpv45kpiskD/qIvwkx4uYdhlZPoC0KvNYV4vpeX X-Received: by 2002:a05:622a:1053:b0:35c:bab4:bd80 with SMTP id f19-20020a05622a105300b0035cbab4bd80mr3944053qte.189.1663869776389; Thu, 22 Sep 2022 11:02:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663869776; cv=none; d=google.com; s=arc-20160816; b=nq7f4DXoW0n3dOQvHAPbTtw7nD3tqgZytjRDj4MOg0VsPUPgO0ZBYZqxRtkzCx5dIU jEHTYoHmN8uP7w1Z48iapjrbZdDu7bTrX64mz96G5QWCQjmrSFFJo7URUEdfw6f+PARf VvFVx4o6mgVBhWXk2lkI/ww/hbHCerzgH+mSPoOcH7f3+JChEWcxIl4o5C/3JCFkVVZ1 wzWaQzXkcT31pm851c/oWURqk92blTqUCkAJB8uiQD0zI2nMssCZYiExdRVypUO7kNiS THLOa/E9NjBi9Ny6HpDKp44/S+oqhhhLm6O0MJvI1WIavgFLuxTv7rnaxmjJqgUqrKAr AeZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=J6uh2yvAURvOGI2KB27pPtR0TDZYnQFcux+7TXKe5wo=; b=NK1X4l+SloQmVWUZJEgpmBz4eOGSms6VQhiGJppYnDAhL/ktibruK7AxmQLSvTiOZq Lm8DY9ayMijg3BxDoAFgYg5z7I21q+A5HXCWEMqSAZJcJUf0R4welhc1VbCQGsCiufF1 WUkV/6sghLtmq+SpwerbiPAFZyI+gvrKp6nvgpz19s4gDHigdAIOkzjQjKOw4q6vrRNO d4tt4X6YM0VmrrO5ihec1jgta0KmHSFf8LQBE1MIwSeBuY6ehNsJF5tTgBBklI7/ZVug kavAF7ifKHMEKXUn06Ai0MxxUGzYKlvLXR44bmPcsOkKyBuTogSSp1QjzqUo+MNsnwgf XLoA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gjJhshDA; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.44 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:45 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 10/39] target/arm: Use GetPhysAddrResult in pmsav8_mpu_lookup Date: Thu, 22 Sep 2022 17:35:07 +0100 Message-Id: <20220922163536.1096175-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20220822152741.1617527-10-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/internals.h | 11 +++++------ target/arm/m_helper.c | 16 +++++++--------- target/arm/ptw.c | 20 +++++++++----------- 3 files changed, 21 insertions(+), 26 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index e9743d3e220..103ae743a75 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1125,12 +1125,6 @@ void v8m_security_lookup(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, V8M_SAttributes *sattrs); -bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address, - MMUAccessType access_type, ARMMMUIdx mmu_idx, - hwaddr *phys_ptr, MemTxAttrs *txattrs, - int *prot, bool *is_subpage, - ARMMMUFaultInfo *fi, uint32_t *mregion); - /* Cacheability and shareability attributes for a memory access */ typedef struct ARMCacheAttrs { /* @@ -1156,6 +1150,11 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, GetPhysAddrResult *result, ARMMMUFaultInfo *fi) __attribute__((nonnull)); +bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address, + MMUAccessType access_type, ARMMMUIdx mmu_idx, + GetPhysAddrResult *result, bool *is_subpage, + ARMMMUFaultInfo *fi, uint32_t *mregion); + void arm_log_exception(CPUState *cs); #endif /* !CONFIG_USER_ONLY */ diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c index 84c6796b8d6..69d4a63fa6d 100644 --- a/target/arm/m_helper.c +++ b/target/arm/m_helper.c @@ -2770,15 +2770,10 @@ uint32_t HELPER(v7m_tt)(CPUARMState *env, uint32_t addr, uint32_t op) V8M_SAttributes sattrs = {}; uint32_t tt_resp; bool r, rw, nsr, nsrw, mrvalid; - int prot; - ARMMMUFaultInfo fi = {}; - MemTxAttrs attrs = {}; - hwaddr phys_addr; ARMMMUIdx mmu_idx; uint32_t mregion; bool targetpriv; bool targetsec = env->v7m.secure; - bool is_subpage; /* * Work out what the security state and privilege level we're @@ -2809,18 +2804,21 @@ uint32_t HELPER(v7m_tt)(CPUARMState *env, uint32_t addr, uint32_t op) * inspecting the other MPU state. */ if (arm_current_el(env) != 0 || alt) { + GetPhysAddrResult res = {}; + ARMMMUFaultInfo fi = {}; + bool is_subpage; + /* We can ignore the return value as prot is always set */ pmsav8_mpu_lookup(env, addr, MMU_DATA_LOAD, mmu_idx, - &phys_addr, &attrs, &prot, &is_subpage, - &fi, &mregion); + &res, &is_subpage, &fi, &mregion); if (mregion == -1) { mrvalid = false; mregion = 0; } else { mrvalid = true; } - r = prot & PAGE_READ; - rw = prot & PAGE_WRITE; + r = res.prot & PAGE_READ; + rw = res.prot & PAGE_WRITE; } else { r = false; rw = false; diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 2286f6e12db..d6890048f13 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -1701,8 +1701,7 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address, bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - hwaddr *phys_ptr, MemTxAttrs *txattrs, - int *prot, bool *is_subpage, + GetPhysAddrResult *result, bool *is_subpage, ARMMMUFaultInfo *fi, uint32_t *mregion) { /* @@ -1724,8 +1723,8 @@ bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address, uint32_t addr_page_limit = addr_page_base + (TARGET_PAGE_SIZE - 1); *is_subpage = false; - *phys_ptr = address; - *prot = 0; + result->phys = address; + result->prot = 0; if (mregion) { *mregion = -1; } @@ -1807,7 +1806,7 @@ bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address, if (matchregion == -1) { /* hit using the background region */ - get_phys_addr_pmsav7_default(env, mmu_idx, address, prot); + get_phys_addr_pmsav7_default(env, mmu_idx, address, &result->prot); } else { uint32_t ap = extract32(env->pmsav8.rbar[secure][matchregion], 1, 2); uint32_t xn = extract32(env->pmsav8.rbar[secure][matchregion], 0, 1); @@ -1822,9 +1821,9 @@ bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address, xn = 1; } - *prot = simple_ap_to_rw_prot(env, mmu_idx, ap); - if (*prot && !xn && !(pxn && !is_user)) { - *prot |= PAGE_EXEC; + result->prot = simple_ap_to_rw_prot(env, mmu_idx, ap); + if (result->prot && !xn && !(pxn && !is_user)) { + result->prot |= PAGE_EXEC; } /* * We don't need to look the attribute up in the MAIR0/MAIR1 @@ -1837,7 +1836,7 @@ bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address, fi->type = ARMFault_Permission; fi->level = 1; - return !(*prot & (1 << access_type)); + return !(result->prot & (1 << access_type)); } static bool v8m_is_sau_exempt(CPUARMState *env, @@ -2036,8 +2035,7 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address, } ret = pmsav8_mpu_lookup(env, address, access_type, mmu_idx, - &result->phys, &result->attrs, &result->prot, - &mpu_is_subpage, fi, NULL); + result, &mpu_is_subpage, fi, NULL); result->page_size = sattrs.subpage || mpu_is_subpage ? 1 : TARGET_PAGE_SIZE; return ret; From patchwork Thu Sep 22 16:35:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608246 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp498328pvb; Thu, 22 Sep 2022 11:17:06 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7isW54dRZHGb0+lYZnDV99FrLMV9hDqwYO7gajENgRHPPFf/lRheXLMH5StPapP5nbgvdy X-Received: by 2002:a05:620a:31a1:b0:6ce:d7be:496b with SMTP id bi33-20020a05620a31a100b006ced7be496bmr3142883qkb.192.1663870626689; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.45 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:46 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 11/39] target/arm: Remove is_subpage argument to pmsav8_mpu_lookup Date: Thu, 22 Sep 2022 17:35:08 +0100 Message-Id: <20220922163536.1096175-12-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson This can be made redundant with result->page_size, by moving the basic set of page_size from get_phys_addr_pmsav8. We still need to overwrite page_size when v8m_security_lookup signals a subpage. Signed-off-by: Richard Henderson Message-id: 20220822152741.1617527-11-richard.henderson@linaro.org [PMM: Update a comment that used to refer to is_subpage] Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/internals.h | 4 ++-- target/arm/m_helper.c | 3 +-- target/arm/ptw.c | 23 ++++++++++++----------- 3 files changed, 15 insertions(+), 15 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 103ae743a75..f8b22d3ab0b 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1152,8 +1152,8 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - GetPhysAddrResult *result, bool *is_subpage, - ARMMMUFaultInfo *fi, uint32_t *mregion); + GetPhysAddrResult *result, ARMMMUFaultInfo *fi, + uint32_t *mregion); void arm_log_exception(CPUState *cs); diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c index 69d4a63fa6d..01263990dc3 100644 --- a/target/arm/m_helper.c +++ b/target/arm/m_helper.c @@ -2806,11 +2806,10 @@ uint32_t HELPER(v7m_tt)(CPUARMState *env, uint32_t addr, uint32_t op) if (arm_current_el(env) != 0 || alt) { GetPhysAddrResult res = {}; ARMMMUFaultInfo fi = {}; - bool is_subpage; /* We can ignore the return value as prot is always set */ pmsav8_mpu_lookup(env, addr, MMU_DATA_LOAD, mmu_idx, - &res, &is_subpage, &fi, &mregion); + &res, &fi, &mregion); if (mregion == -1) { mrvalid = false; mregion = 0; diff --git a/target/arm/ptw.c b/target/arm/ptw.c index d6890048f13..bb3c709f8f5 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -1701,8 +1701,8 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address, bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - GetPhysAddrResult *result, bool *is_subpage, - ARMMMUFaultInfo *fi, uint32_t *mregion) + GetPhysAddrResult *result, ARMMMUFaultInfo *fi, + uint32_t *mregion) { /* * Perform a PMSAv8 MPU lookup (without also doing the SAU check @@ -1710,8 +1710,9 @@ bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address, * mregion is (if not NULL) set to the region number which matched, * or -1 if no region number is returned (MPU off, address did not * hit a region, address hit in multiple regions). - * We set is_subpage to true if the region hit doesn't cover the - * entire TARGET_PAGE the address is within. + * If the region hit doesn't cover the entire TARGET_PAGE the address + * is within, then we set the result page_size to 1 to force the + * memory system to use a subpage. */ ARMCPU *cpu = env_archcpu(env); bool is_user = regime_is_user(env, mmu_idx); @@ -1722,7 +1723,7 @@ bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address, uint32_t addr_page_base = address & TARGET_PAGE_MASK; uint32_t addr_page_limit = addr_page_base + (TARGET_PAGE_SIZE - 1); - *is_subpage = false; + result->page_size = TARGET_PAGE_SIZE; result->phys = address; result->prot = 0; if (mregion) { @@ -1774,13 +1775,13 @@ bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address, ranges_overlap(base, limit - base + 1, addr_page_base, TARGET_PAGE_SIZE)) { - *is_subpage = true; + result->page_size = 1; } continue; } if (base > addr_page_base || limit < addr_page_limit) { - *is_subpage = true; + result->page_size = 1; } if (matchregion != -1) { @@ -1972,7 +1973,6 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address, uint32_t secure = regime_is_secure(env, mmu_idx); V8M_SAttributes sattrs = {}; bool ret; - bool mpu_is_subpage; if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { v8m_security_lookup(env, address, access_type, mmu_idx, &sattrs); @@ -2035,9 +2035,10 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address, } ret = pmsav8_mpu_lookup(env, address, access_type, mmu_idx, - result, &mpu_is_subpage, fi, NULL); - result->page_size = - sattrs.subpage || mpu_is_subpage ? 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:46 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 12/39] target/arm: Add is_secure parameter to v8m_security_lookup Date: Thu, 22 Sep 2022 17:35:09 +0100 Message-Id: <20220922163536.1096175-13-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Remove the use of regime_is_secure from v8m_security_lookup, passing the new parameter to the lookup instead. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20220822152741.1617527-12-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/internals.h | 2 +- target/arm/m_helper.c | 9 ++++++--- target/arm/ptw.c | 9 +++++---- 3 files changed, 12 insertions(+), 8 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index f8b22d3ab0b..e97f5c3d47e 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1123,7 +1123,7 @@ typedef struct V8M_SAttributes { void v8m_security_lookup(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - V8M_SAttributes *sattrs); + bool secure, V8M_SAttributes *sattrs); /* Cacheability and shareability attributes for a memory access */ typedef struct ARMCacheAttrs { diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c index 01263990dc3..45fbf195590 100644 --- a/target/arm/m_helper.c +++ b/target/arm/m_helper.c @@ -689,7 +689,8 @@ static bool arm_v7m_load_vector(ARMCPU *cpu, int exc, bool targets_secure, if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { V8M_SAttributes sattrs = {}; - v8m_security_lookup(env, addr, MMU_DATA_LOAD, mmu_idx, &sattrs); + v8m_security_lookup(env, addr, MMU_DATA_LOAD, mmu_idx, + targets_secure, &sattrs); if (sattrs.ns) { attrs.secure = false; } else if (!targets_secure) { @@ -2002,7 +2003,8 @@ static bool v7m_read_half_insn(ARMCPU *cpu, ARMMMUIdx mmu_idx, ARMMMUFaultInfo fi = {}; MemTxResult txres; - v8m_security_lookup(env, addr, MMU_INST_FETCH, mmu_idx, &sattrs); + v8m_security_lookup(env, addr, MMU_INST_FETCH, mmu_idx, + regime_is_secure(env, mmu_idx), &sattrs); if (!sattrs.nsc || sattrs.ns) { /* * This must be the second half of the insn, and it straddles a @@ -2826,7 +2828,8 @@ uint32_t HELPER(v7m_tt)(CPUARMState *env, uint32_t addr, uint32_t op) } if (env->v7m.secure) { - v8m_security_lookup(env, addr, MMU_DATA_LOAD, mmu_idx, &sattrs); + v8m_security_lookup(env, addr, MMU_DATA_LOAD, mmu_idx, + targetsec, &sattrs); nsr = sattrs.ns && r; nsrw = sattrs.ns && rw; } else { diff --git a/target/arm/ptw.c b/target/arm/ptw.c index bb3c709f8f5..74d2f63359f 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -1857,8 +1857,8 @@ static bool v8m_is_sau_exempt(CPUARMState *env, } void v8m_security_lookup(CPUARMState *env, uint32_t address, - MMUAccessType access_type, ARMMMUIdx mmu_idx, - V8M_SAttributes *sattrs) + MMUAccessType access_type, ARMMMUIdx mmu_idx, + bool is_secure, V8M_SAttributes *sattrs) { /* * Look up the security attributes for this address. Compare the @@ -1886,7 +1886,7 @@ void v8m_security_lookup(CPUARMState *env, uint32_t address, } if (idau_exempt || v8m_is_sau_exempt(env, address, access_type)) { - sattrs->ns = !regime_is_secure(env, mmu_idx); + sattrs->ns = !is_secure; return; } @@ -1975,7 +1975,8 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address, bool ret; if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { - v8m_security_lookup(env, address, access_type, mmu_idx, &sattrs); + v8m_security_lookup(env, address, access_type, mmu_idx, + secure, &sattrs); if (access_type == MMU_INST_FETCH) { /* * Instruction fetches always use the MMU bank and the From patchwork Thu Sep 22 16:35:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608235 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp475820pvb; Thu, 22 Sep 2022 10:31:32 -0700 (PDT) X-Google-Smtp-Source: AMsMyM70Nji7CcAKRVg0AkB6sZUf3MQyu/zPLeWWuf2IGpLeYkAo2Nab6uPms9pYrutubw+vKeqZ X-Received: by 2002:a05:622a:134d:b0:35c:e289:f62e with SMTP id w13-20020a05622a134d00b0035ce289f62emr3849396qtk.596.1663867892624; Thu, 22 Sep 2022 10:31:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663867892; cv=none; d=google.com; s=arc-20160816; b=DMFnBE71LtI3gMu6ZFZXGMcvHSiFGNrvHdMSC8F0bFHI7rInQMsaJWKCVuO06qCb5e YR0z89exELBp4sTNZNuskI805rgwXsJhdZcmfcnE68oqt6ib7V0c7r2ZCZJRz51ybwsc h2+2S8dFtj4pwN0SM+t8h4n8U+zXaj1S4GrPowyB5o08Su+WZrd8keVmZ0PZe0psxyvx MBjljIyuu3r7o3d0zG0Ef3pUEdGqP2nY1G+hv8pkwpQ5y3jkbhoDVEoxD7BRHSEAgEXP YXyK3UFjSGg7MhZjsOivVVt9yNlTGwB41BwgGrWoflCdlxyYmNplAKzICskxGNzio/oI /8pg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=S7xMDGIoF+c3kK5sdvwsAuiDPlnfpu+Z56njaQYlxFw=; b=Slb/QNldtFjzaTb8BQcpXnnYiQSDRBbXl1Umtkt1L1iRqDJI1C+uDJn7xHhhh4ElD7 EnEHyDj1ikFS2AnWdDjH6S0zG2TluTHJgpdAjd+/wUG4F1HoxeJcjaW7ZjjBI6lNCUdN kK2JGJoicWKIhxNdU4Hrc9GSTsXnaEobZY2vgxbsVmWoI6xT5XVkVVYlXBeaBPZbHDdq 0HOE1ta0N4+6rvCPqR2OSupopsxcMvGLIugN1z4C28dL+lJlZl313uESxKFLAUeO4fmA QeIQQiiw8SXEZkuVwhDehTGXheXKNBJfMRJrjy3/eoVeGcsLdgUBHvQoJijlmPPpRDw9 90UQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Qw7S/BuJ"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:47 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 13/39] target/arm: Add secure parameter to pmsav8_mpu_lookup Date: Thu, 22 Sep 2022 17:35:10 +0100 Message-Id: <20220922163536.1096175-14-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Remove the use of regime_is_secure from pmsav8_mpu_lookup, passing the new parameter to the lookup instead. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20220822152741.1617527-13-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/internals.h | 4 ++-- target/arm/m_helper.c | 2 +- target/arm/ptw.c | 7 +++---- 3 files changed, 6 insertions(+), 7 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index e97f5c3d47e..307a5965053 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1152,8 +1152,8 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - GetPhysAddrResult *result, ARMMMUFaultInfo *fi, - uint32_t *mregion); + bool is_secure, GetPhysAddrResult *result, + ARMMMUFaultInfo *fi, uint32_t *mregion); void arm_log_exception(CPUState *cs); diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c index 45fbf195590..5ee4ee15b36 100644 --- a/target/arm/m_helper.c +++ b/target/arm/m_helper.c @@ -2810,7 +2810,7 @@ uint32_t HELPER(v7m_tt)(CPUARMState *env, uint32_t addr, uint32_t op) ARMMMUFaultInfo fi = {}; /* We can ignore the return value as prot is always set */ - pmsav8_mpu_lookup(env, addr, MMU_DATA_LOAD, mmu_idx, + pmsav8_mpu_lookup(env, addr, MMU_DATA_LOAD, mmu_idx, targetsec, &res, &fi, &mregion); if (mregion == -1) { mrvalid = false; diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 74d2f63359f..308a9cc3ac9 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -1701,8 +1701,8 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address, bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - GetPhysAddrResult *result, ARMMMUFaultInfo *fi, - uint32_t *mregion) + bool secure, GetPhysAddrResult *result, + ARMMMUFaultInfo *fi, uint32_t *mregion) { /* * Perform a PMSAv8 MPU lookup (without also doing the SAU check @@ -1716,7 +1716,6 @@ bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address, */ ARMCPU *cpu = env_archcpu(env); bool is_user = regime_is_user(env, mmu_idx); - uint32_t secure = regime_is_secure(env, mmu_idx); int n; int matchregion = -1; bool hit = false; @@ -2035,7 +2034,7 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address, } } - ret = pmsav8_mpu_lookup(env, address, access_type, mmu_idx, + ret = pmsav8_mpu_lookup(env, address, access_type, mmu_idx, secure, result, fi, NULL); if (sattrs.subpage) { result->page_size = 1; From patchwork Thu Sep 22 16:35:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608226 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp455337pvb; Thu, 22 Sep 2022 09:55:04 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6mmvVsVjlj8mgQ3XNWDN36ObRJoVChZveQKx2mJqx5F0q9NdJm2EpThmHutcIkoUbfLkcu X-Received: by 2002:a05:6214:d85:b0:4aa:acc6:750 with SMTP id e5-20020a0562140d8500b004aaacc60750mr3400038qve.58.1663865704846; Thu, 22 Sep 2022 09:55:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663865704; cv=none; d=google.com; s=arc-20160816; b=F8ugQg4YhtvSCl9H5Y0eR7afzgn1uDQOlYCP71HT3xVKf/+QScHuHOPfwsuuELqOkO /O4L+nwkRTWuVkjtNcqzVxmjpE6SzsCvnCHzO7mhnjQmE+EzhL7GjPA50Dqe1rnISBL0 +cl2thX0VzWGUbwSt6mh8AITTIkytq3QtRdCzzsURXGlIuUPK41mVzEvdG01T/iIMMoW h7uYZc1wjoJTqCtpQwRBD4NtsA2MIKUmMQkidp5DSSZ/5w43Rm8OtPzIk5GCBL+bKJ91 876X4aTrl+pRKMKw2LdXKu2h0wX+uNXSW7Ei3CI14P8uE5Bl4ZiBg+pMN6ZTIQxV4awS NcNg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=oH2L/FyjI2KdEq5MITDl2AegrqX2BdO76qwDWANjXFo=; b=S9gXwGA3Gpg8zAsQ4m9oRpA10bThZcfGAkNcYjjy3DkpLjmTG26Js9zYKIrg//t+qA +9k8Cmmaej8B+nxRUS9apcpms6sho4vuBbPKqQ2C3zD35xOdVThqGIt3r5B7Lnzfg5N4 dG77q6BdvajogAQELDJUzgNRNoeo4hHkLLDo2jyh7GYKaZwQ6dJz+B/jVSIHkBC95eQ2 6gO4JnUhkFI4fRRXPVl33eIAvtm+ncOw2oMGjbjS/hg9gGibxk5cu7ode5t2btEpOtZl 2X4UGWpp+DzZ7hm2k37nZmlib/NpD75cW5PAKja1PWM0h/NeAlJO7etXssEvHuzaOIqm roKA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VfNM77wU; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:47 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 14/39] target/arm: Add is_secure parameter to get_phys_addr_v5 Date: Thu, 22 Sep 2022 17:35:11 +0100 Message-Id: <20220922163536.1096175-15-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Remove the use of regime_is_secure from get_phys_addr_v5, passing the new parameter to the lookup instead. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson [PMM: Folded in definition of local is_secure in get_phys_addr(), since I dropped the earlier patch that would have provided it] Message-id: 20220822152741.1617527-14-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/ptw.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 308a9cc3ac9..96639da504e 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -414,7 +414,8 @@ static int simple_ap_to_rw_prot(CPUARMState *env, ARMMMUIdx mmu_idx, int ap) static bool get_phys_addr_v5(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - GetPhysAddrResult *result, ARMMMUFaultInfo *fi) + bool is_secure, GetPhysAddrResult *result, + ARMMMUFaultInfo *fi) { int level = 1; uint32_t table; @@ -433,8 +434,7 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t address, fi->type = ARMFault_Translation; goto do_fault; } - desc = arm_ldl_ptw(env, table, regime_is_secure(env, mmu_idx), - mmu_idx, fi); + desc = arm_ldl_ptw(env, table, is_secure, mmu_idx, fi); if (fi->type != ARMFault_None) { goto do_fault; } @@ -472,8 +472,7 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t address, /* Fine pagetable. */ table = (desc & 0xfffff000) | ((address >> 8) & 0xffc); } - desc = arm_ldl_ptw(env, table, regime_is_secure(env, mmu_idx), - mmu_idx, fi); + desc = arm_ldl_ptw(env, table, is_secure, mmu_idx, fi); if (fi->type != ARMFault_None) { goto do_fault; } @@ -2291,6 +2290,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, GetPhysAddrResult *result, ARMMMUFaultInfo *fi) { ARMMMUIdx s1_mmu_idx = stage_1_mmu_idx(mmu_idx); + bool is_secure = regime_is_secure(env, mmu_idx); if (mmu_idx != s1_mmu_idx) { /* @@ -2393,7 +2393,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, * cannot upgrade an non-secure translation regime's attributes * to secure. */ - result->attrs.secure = regime_is_secure(env, mmu_idx); + result->attrs.secure = is_secure; result->attrs.user = regime_is_user(env, mmu_idx); /* @@ -2515,7 +2515,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, result, fi); } else { return get_phys_addr_v5(env, address, access_type, mmu_idx, - result, fi); + is_secure, result, fi); } } From patchwork Thu Sep 22 16:35:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608237 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp483074pvb; Thu, 22 Sep 2022 10:46:35 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4GNgnPfWaMvNfTdWtkRRleO/drb2z3lPrVbDH6EPDrIvhwvyTNAtsNASC2S8VTx9LkGb32 X-Received: by 2002:a05:622a:b:b0:35d:9b4:8315 with SMTP id x11-20020a05622a000b00b0035d09b48315mr3821705qtw.559.1663868795785; Thu, 22 Sep 2022 10:46:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663868795; cv=none; d=google.com; s=arc-20160816; b=VI6Ru5KkrH284NQlihxii6/FBg1JWa4URnqmzIIU9lW8beWdp38BYHpHoSRZ06lAFf Dr6PwaNoSm3Pk1uo14pElgAZXIMNnYsT40JAmiGPoA5+DZ1I678cpZLzLACfakF+9PsE JE/UQQCdjbZ436KPdW23gBa1qDlEyMFNdmosVXfzRDOdvkbraM7+c31SOT5J5HCWbDSy v8fyO48/MCb3CxLQX1aC8hRiWzrVxfWOwTPjyElh+YBq7GMui6LvxEtzrgJddkxNMyZj wca+eJkCwk46oSKWMeOqq7qaqPHtN/24+1hxMmAIzTo8wM1L253z6dEY720gxA4yIedE EmVA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=P6VqYbsDKhpYGPN8qnEH9BRbInbjOHH/i/5rsjAXUA4=; b=HU3WkByJsmAELobqJ3R6myVPHMxnpYVj5vxkMTRzs2xH4rnRvsGMFD74AoyJxetT9N MNVcyXb0mJs/B6Fm4I+Qfqas2aGjTXW9TS7Gp1+ICkDIVKHzAjJXW3S9Iqt8EM1Mui1E 2H+j7JE1pEqtsMtKXoTuXg/xTVNbD/56a+RhLCTxsEDdMoSzDil1uh6gR8/bAluEdUp8 eJQBRxaxk5novyZSORnw8YZotE2sUeUk0qjgUAFiPLsAiDL4PMsU8HaV1oifWuoF6nKe EmgaFj7ID0kz7qrmuQDg1KcyE/rCrUmrtLk3o8xyqnSrBbN7iUvpn4P/6IxpipvK6f9Z NimA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bdOdQoWW; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.48 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:48 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 15/39] target/arm: Add is_secure parameter to get_phys_addr_v6 Date: Thu, 22 Sep 2022 17:35:12 +0100 Message-Id: <20220922163536.1096175-16-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Remove the use of regime_is_secure from get_phys_addr_v6, passing the new parameter to the lookup instead. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20220822152741.1617527-15-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/ptw.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 96639da504e..8f0810a1968 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -533,7 +533,8 @@ do_fault: static bool get_phys_addr_v6(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - GetPhysAddrResult *result, ARMMMUFaultInfo *fi) + bool is_secure, GetPhysAddrResult *result, + ARMMMUFaultInfo *fi) { ARMCPU *cpu = env_archcpu(env); int level = 1; @@ -556,8 +557,7 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_t address, fi->type = ARMFault_Translation; goto do_fault; } - desc = arm_ldl_ptw(env, table, regime_is_secure(env, mmu_idx), - mmu_idx, fi); + desc = arm_ldl_ptw(env, table, is_secure, mmu_idx, fi); if (fi->type != ARMFault_None) { goto do_fault; } @@ -610,8 +610,7 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_t address, ns = extract32(desc, 3, 1); /* Lookup l2 entry. */ table = (desc & 0xfffffc00) | ((address >> 10) & 0x3fc); - desc = arm_ldl_ptw(env, table, regime_is_secure(env, mmu_idx), - mmu_idx, fi); + desc = arm_ldl_ptw(env, table, is_secure, mmu_idx, fi); if (fi->type != ARMFault_None) { goto do_fault; } @@ -2512,7 +2511,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, result, fi); } else if (regime_sctlr(env, mmu_idx) & SCTLR_XP) { return get_phys_addr_v6(env, address, access_type, mmu_idx, - result, fi); + is_secure, result, fi); } else { return get_phys_addr_v5(env, address, access_type, mmu_idx, is_secure, result, fi); From patchwork Thu Sep 22 16:35:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608238 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp485873pvb; Thu, 22 Sep 2022 10:53:19 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7TKWxB3K+tEzsNNTHJZYk3PXeVr0I24n1+AzjEG1cKpzzlomeLIqLfDWRBsXvVBu1CUlnX X-Received: by 2002:ad4:5c4d:0:b0:4ac:942f:78b0 with SMTP id a13-20020ad45c4d000000b004ac942f78b0mr3553041qva.48.1663869199268; Thu, 22 Sep 2022 10:53:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663869199; cv=none; d=google.com; s=arc-20160816; b=E6BT8DUl3aRXUsQpXBvHCPELQ/D6Ps6sBdOFT8LmsP/NUNvvrOeyKMgXOeQ/SO56c5 mXWdpeTXSrCV9eDPmpoDpntOkceliwVZXBca9t9ttbU51cgxg7xeyE3r0QznxzNGOooN F56C9G6fOXVTSlVCMguf5JyTd2SV5PT47UetvpSeCRnn9Lfg1wxs+S5y27hcUhMkPu8Y h5j8V9NxpjA52Ij87ZHUcilCSG8QthcLh101p9o0boMOk83fjTyxaYS+jFhK8WUlkubI zQwrg5ZZ3Rt/H7AgVMQpjgvOsh7yWc8kMpKnlBwWvJ81lV40SSa2HAU7pxuL1yA1R1Ap B2QA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=CrKz6cgBD504H1V9Pxtox14yL/5f8r5NQpbBSzrvaPw=; b=Ai8s10cj4CkaIZxV6ZtqAWT+6RM6GI8ZZNEr7YMDlXb7DPpGx7QlE2OAhrkEk6Hkqz 39NFR3hTHzGjTTOraXuHjRJRN6OwjgjxYsBCA9BuXHgGaMw2nHCKYyKOqGfa8TKEV5Zx X4jIJNw17TWT6STlkA4FQ9rNQ9K0zX38a/ShpBD9ayRIl7xHiqOIDouxk7HrbobAFBfC PGowdMtHoypuOwAyjUIcY7VYDPv9W5vsGxUB0h66L70inIEn5sGZc4YPv2xUoARDDbB8 MNfk7tLqZWkeqFYzY7iuaJ65ZkwWujkX9pwGiWDb9bIXG1stqYKdYvi8x7xlrk9ukkBd jQIA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GuYQW+VN; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.48 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:49 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 16/39] target/arm: Add secure parameter to get_phys_addr_pmsav8 Date: Thu, 22 Sep 2022 17:35:13 +0100 Message-Id: <20220922163536.1096175-17-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Remove the use of regime_is_secure from get_phys_addr_pmsav8. Since we already had a local variable named secure, use that. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20220822152741.1617527-16-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/ptw.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 8f0810a1968..6a73f16e092 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -1964,10 +1964,9 @@ void v8m_security_lookup(CPUARMState *env, uint32_t address, static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - GetPhysAddrResult *result, + bool secure, GetPhysAddrResult *result, ARMMMUFaultInfo *fi) { - uint32_t secure = regime_is_secure(env, mmu_idx); V8M_SAttributes sattrs = {}; bool ret; @@ -2415,7 +2414,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, if (arm_feature(env, ARM_FEATURE_V8)) { /* PMSAv8 */ ret = get_phys_addr_pmsav8(env, address, access_type, mmu_idx, - result, fi); + is_secure, result, fi); } else if (arm_feature(env, ARM_FEATURE_V7)) { /* PMSAv7 */ ret = get_phys_addr_pmsav7(env, address, access_type, mmu_idx, From patchwork Thu Sep 22 16:35:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608227 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp456928pvb; Thu, 22 Sep 2022 09:58:42 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4MY/1gIK/g3fnBRpIUTPBV3/x4DYC3J5Np5I49GKxX7db+29rCxFfV/Enn3NC9/eiYjH2X X-Received: by 2002:a37:e10e:0:b0:6cd:f114:6a85 with SMTP id c14-20020a37e10e000000b006cdf1146a85mr2895106qkm.77.1663865922651; Thu, 22 Sep 2022 09:58:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663865922; cv=none; d=google.com; s=arc-20160816; b=rquY+kA3PmmTvCo7qR414vEFCPCEb4LfRomiIVjuVH2DNWhbIEkEiWBy/nOHDvmYcf DtfLQ3it1HBYHXUxA9aWYIZwKJJeME7rLgH4BSH3wINWYiByZywO8LcDnz1eyJgYCZWd QiB2rgIPp7zgZ4c5JvWCwWp2iiaHVt1Z3w8k3PwerC8ya0kG+UI7ha+bCWv/Jmncq0Rl daP1n9cbiE42Ack+6gqk6WIdzNav7imPUye8MzeNzHpQOUQ5LAaRMG3si2TF7Cc+d5Oa kegdUnMoCzIpDH7sVhJryiMfQwcunxolrZavEpG6BtskgRm4J8cJszZCjg5e4ZyQ1Mjp yjWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=LvDKHoXAgkm2T+dsnl2sSCZXSWJJItk6xpHr063ViKM=; b=FQJT6U+ydigd8mwI6TfX/+WLDf3CpT6yU9IOKdHYeGA6dfkxooMDrsEXF+pRef6vDO DYGnhQQz5u7Gp1F+n/zl3tdTvRChLwS+No7gZQHIkiR/5Jzy78azSkMa8b7/mvV0bwYR T1TPW0w7IWfFRp2kGHLrNCfx9aWmJknBWH9zVjHijS7vbLnHQEPyJT9iDHhBZVZRJx1x BiWdkwXPEJnWfkLLnHWpZR0PejJp0Jkybljf5j2xRSNooj5If1aHzwaPJ9uWYGLXRb7E AP+f9piYrS+EXHLtqLxwbMY66NBG35/2bHdDRUqrp15v4TxjEpO5OHrAqgiJvzGYyLAL xl6Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TgBOxyk3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.49 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:49 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 17/39] target/arm: Add is_secure parameter to pmsav7_use_background_region Date: Thu, 22 Sep 2022 17:35:14 +0100 Message-Id: <20220922163536.1096175-18-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Remove the use of regime_is_secure from pmsav7_use_background_region, using the new parameter instead. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20220822152741.1617527-17-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/ptw.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 6a73f16e092..9e1f60d10b4 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -1489,7 +1489,7 @@ static bool m_is_system_region(CPUARMState *env, uint32_t address) } static bool pmsav7_use_background_region(ARMCPU *cpu, ARMMMUIdx mmu_idx, - bool is_user) + bool is_secure, bool is_user) { /* * Return true if we should use the default memory map as a @@ -1502,8 +1502,7 @@ static bool pmsav7_use_background_region(ARMCPU *cpu, ARMMMUIdx mmu_idx, } if (arm_feature(env, ARM_FEATURE_M)) { - return env->v7m.mpu_ctrl[regime_is_secure(env, mmu_idx)] - & R_V7M_MPU_CTRL_PRIVDEFENA_MASK; + return env->v7m.mpu_ctrl[is_secure] & R_V7M_MPU_CTRL_PRIVDEFENA_MASK; } else { return regime_sctlr(env, mmu_idx) & SCTLR_BR; } @@ -1516,6 +1515,7 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address, { ARMCPU *cpu = env_archcpu(env); int n; + bool secure = regime_is_secure(env, mmu_idx); bool is_user = regime_is_user(env, mmu_idx); result->phys = address; @@ -1618,7 +1618,7 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address, } if (n == -1) { /* no hits */ - if (!pmsav7_use_background_region(cpu, mmu_idx, is_user)) { + if (!pmsav7_use_background_region(cpu, mmu_idx, secure, is_user)) { /* background fault */ fi->type = ARMFault_Background; return true; @@ -1739,7 +1739,7 @@ bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address, } else if (m_is_ppb_region(env, address)) { hit = true; } else { - if (pmsav7_use_background_region(cpu, mmu_idx, is_user)) { + if (pmsav7_use_background_region(cpu, mmu_idx, secure, is_user)) { hit = true; } From patchwork Thu Sep 22 16:35:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608254 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp506819pvb; Thu, 22 Sep 2022 11:37:28 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7TwYhnMLdCxtp4/sfjKSYDI5jhQCRz8IU19RWb1YLCNyNK5J48l4ybpE1G7KkclU/mCCn+ X-Received: by 2002:a05:620a:2844:b0:6b8:8cc3:9387 with SMTP id h4-20020a05620a284400b006b88cc39387mr3215221qkp.615.1663871848191; Thu, 22 Sep 2022 11:37:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663871848; cv=none; d=google.com; s=arc-20160816; b=G3b2W3G7dkjSKcSOPNPMtbF6nK6QVrRZWFwMry/AFT5PEvNvJxhMUPP+XM3zaO4zJf /6bi4blxNicrxaStU9j6p5YHqbnIdkWqTKdaKBeV3tVSbhRzfzIjhSgvrdiQ5iFc0iww NsFMFfoaSWd7rQdYIC7uGR7uFP982610u1sXaxmw+O85v9FInTIfZNsPnzUXYAptyS8C 2ljxaG4PChKGFdysOeQsX2plQ2gUm+j0ltFnshK8BVoceOlhkGlrGlHCTTUxzxA6z02Y cmRCkY/eTWdyoBY3dAxPK8vQVj0J0A9ZMGde667TPfS6MHT88X4pKGjRA4FZUhrFtvH6 F2rg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=1rDY2/LSnTUCTndHvs7H1iIVK1L+jcasQz21+xSz1h0=; b=hQJii25WxA2fn7HoDAf6VATAHrmEvXvjwZ6P1E+YHd7913Y6KyYaWclu3RUvNeLhuC 0KlLIoj8XNpRxGgJ3QbiwJY+IIwaCYuQbhQjX0RFtsCGfuhbNpVye8w8s5oFdlnbuXfJ TR6ERobQ343Gup12pNd7zN/ZVy6Bd2O5aaT9HyQd/lFm827b9dX9lM5giwKi9jOnijLa e2PfJ80lqkI7E3D7ri5v0H0CgtZGBrDUgA75lNX8DRYU3mmpSK1fWL16pklOuCUKrpmz EddYa4unS1zLcVKNwElffPBp1c4RB9iQ4PD6n8gak/o8oNAt97LB/JgIIA8US9Bd+k2B /95g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="a/+ZIOel"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:50 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 18/39] target/arm: Add secure parameter to get_phys_addr_pmsav7 Date: Thu, 22 Sep 2022 17:35:15 +0100 Message-Id: <20220922163536.1096175-19-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Remove the use of regime_is_secure from get_phys_addr_pmsav7, using the new parameter instead. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20220822152741.1617527-19-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/ptw.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 9e1f60d10b4..1e81eefa47a 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -1510,12 +1510,11 @@ static bool pmsav7_use_background_region(ARMCPU *cpu, ARMMMUIdx mmu_idx, static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - GetPhysAddrResult *result, + bool secure, GetPhysAddrResult *result, ARMMMUFaultInfo *fi) { ARMCPU *cpu = env_archcpu(env); int n; - bool secure = regime_is_secure(env, mmu_idx); bool is_user = regime_is_user(env, mmu_idx); result->phys = address; @@ -2418,7 +2417,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, } else if (arm_feature(env, ARM_FEATURE_V7)) { /* PMSAv7 */ ret = get_phys_addr_pmsav7(env, address, access_type, mmu_idx, - result, fi); + is_secure, result, fi); } else { /* Pre-v7 MPU */ ret = get_phys_addr_pmsav5(env, address, access_type, mmu_idx, From patchwork Thu Sep 22 16:35:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608228 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp460504pvb; Thu, 22 Sep 2022 10:04:04 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5IuUEZQLOiHbknMwpcgc/JaJz4MgBF/J5Y9yElXsSXdNxb/ixwg1kDgew+xQg2LmtjNnbW X-Received: by 2002:ac8:5a15:0:b0:35d:ef5:811a with SMTP id n21-20020ac85a15000000b0035d0ef5811amr3580998qta.667.1663866243823; Thu, 22 Sep 2022 10:04:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663866243; cv=none; d=google.com; s=arc-20160816; b=beWmdcy1S4hpIc8ttvNkBGWPIhVlydLH88zT3Jn7m16pUenjHlkJFUBqQNPD3UjmnD HDET6r5gTYuUFNu95/2/ip4QXNt74f7QfmkvpJrHh/DWMh78I+pcqLZqOAfb0jCqoiFZ 8+i+DgREUBaCSbC7FpKnMPAYLwPcPCb1DJvtnDCFBVu6TgqVSguMeqt0pPmB3PuIEpKD Ltb3LWiAusoPiulHg0k5QJqQWQy/kSskX+c06tu4fPyd8B0Lt2zg73e3guWgzd12gPex u/qAipvvEqBp6j0NvztDqlsrViZUQEt8TJLLz8QaJmG4wsbIp7ou9HmyE1oaVypXnuQf GyGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=aCTJbIT8uO+HceBgWHPJKhsRADhgD74hU3NYWDoWeL4=; b=Lq5xr8+vF51Bc2gB6sxknQP4NZmKSfGp/iZrvRHoP/8K4bskLg+LBAVOYCFmfk88yJ ZPYpdqLHkqSZWypIuk4G6Zxfzw7EP+YQGt9G4DVaTVpfzyQAoqyG8V86vQVBHInaX60u yG3JYPHuc+Os2xtfRr4g7KkBP1/WBCTY24lIgJA2neCBroIj1u+kowLVgN/sCwpjPRU6 AFeNrVhA80ArGqnKfNJnv93symcsOIo1g3I7EolW5WPkcTpcYrWHlBfLo92wG4oUVlVJ rJzJs9arNJQXDuijDA9NAAhDIDE4cIaDQCnrNVwbvWPRmv5AourEtXTKKlBQG1D0PB/4 zYXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KviiahCs; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:50 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 19/39] target/arm: Add is_secure parameter to get_phys_addr_pmsav5 Date: Thu, 22 Sep 2022 17:35:16 +0100 Message-Id: <20220922163536.1096175-20-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Remove the use of regime_is_secure from get_phys_addr_pmsav5. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20220822152741.1617527-21-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/ptw.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 1e81eefa47a..2ddfc028abb 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -1349,7 +1349,7 @@ do_fault: static bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, - GetPhysAddrResult *result, + bool is_secure, GetPhysAddrResult *result, ARMMMUFaultInfo *fi) { int n; @@ -2421,7 +2421,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, } else { /* Pre-v7 MPU */ ret = get_phys_addr_pmsav5(env, address, access_type, mmu_idx, - result, fi); + is_secure, result, fi); } qemu_log_mask(CPU_LOG_MMU, "PMSA MPU lookup for %s at 0x%08" PRIx32 " mmu_idx %u -> %s (prot %c%c%c)\n", From patchwork Thu Sep 22 16:35:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608255 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp507383pvb; Thu, 22 Sep 2022 11:38:55 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5L81AMDCswF8qibN5ynGlaiJ3Kiq38mGdnrhgVKKLmm45ulMaYNFcMiCf8TKj2l4AS/Vdv X-Received: by 2002:ac8:5706:0:b0:35c:bd27:bdd4 with SMTP id 6-20020ac85706000000b0035cbd27bdd4mr4086943qtw.68.1663871935140; Thu, 22 Sep 2022 11:38:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663871935; cv=none; d=google.com; s=arc-20160816; b=ReJtjrj6G39XwEWQWVuSWWJenvYip+xRmAHXLtZWX+ygeyE9E6RovMqBnvb28Tm55N FSApXj9Iww93d9snlbG87wSXoYelVqTeb7M7/1OKGSucczCZSgWW0HtybZ4VGdllsks/ hruweWwFs09AJwIRVLx3qpDtrHmYpkv+ZVsPNaDjHvowBgsLLA28ehAcIP1ysTKEpkvT pZqFH1zp751uoUELbqPNBy0U6bDtJ7V5r0Hn5NxOtS8ZwA/0H0SDchLKEGbtNRsnhgKU v+ukg8k87Tl7yOy9UKhqo2KoxNWhFywE62BnZ582utbBPSYwtxSuAwGGKGoZDuIDEFsg 0RwQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=VGATNFAYBw8EtHTqtsDKOUj2+4XhHnTvCj4CQXtJ0zM=; b=iYcQME4MhQwBIyFQA0LteUleCXgpZGWev13xZYYMtxz1UxFkjOh7OizyTDbff81ywm OIgfQu+qHil3XrW8thuwPCKdW8HDVoOvSwrqFA+gExeIcvkx4TeRZa6dklNYZPDr/1rL bU0dGEN5qFTnJ7Chxx1l6dbeHY2GfMp/bT+ZfNuoLHs0LSLCxpHlQ/MuhvToxx1WoP5B xGErW+twHhkJR23uY0BfLkNqfq0nHfNSiP4I9XlgTw1dCvwqysCHg9ZvXU/urdp4vNUz xsfWDCZUclJbT3PHd3HnTr+xN31bILO4MWZgeAT+sR0T/V12/8dHYvQCYH50v+m3EccA Rmcg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mWnuW4St; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.51 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:51 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 20/39] hw/acpi: Add ospm_status hook implementation for acpi-ged Date: Thu, 22 Sep 2022 17:35:17 +0100 Message-Id: <20220922163536.1096175-21-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Keqian Zhu Setup an ARM virtual machine of machine virt and execute qmp "query-acpi-ospm-status" causes segmentation fault with following dumpstack: #1 0x0000aaaaab64235c in qmp_query_acpi_ospm_status (errp=errp@entry=0xfffffffff030) at ../monitor/qmp-cmds.c:312 #2 0x0000aaaaabfc4e20 in qmp_marshal_query_acpi_ospm_status (args=, ret=0xffffea4ffe90, errp=0xffffea4ffe88) at qapi/qapi-commands-acpi.c:63 #3 0x0000aaaaabff8ba0 in do_qmp_dispatch_bh (opaque=0xffffea4ffe98) at ../qapi/qmp-dispatch.c:128 #4 0x0000aaaaac02e594 in aio_bh_call (bh=0xffffe0004d80) at ../util/async.c:150 #5 aio_bh_poll (ctx=ctx@entry=0xaaaaad0f6040) at ../util/async.c:178 #6 0x0000aaaaac00bd40 in aio_dispatch (ctx=ctx@entry=0xaaaaad0f6040) at ../util/aio-posix.c:421 #7 0x0000aaaaac02e010 in aio_ctx_dispatch (source=0xaaaaad0f6040, callback=, user_data=) at ../util/async.c:320 #8 0x0000fffff76f6884 in g_main_context_dispatch () at /usr/lib64/libglib-2.0.so.0 #9 0x0000aaaaac0452d4 in glib_pollfds_poll () at ../util/main-loop.c:297 #10 os_host_main_loop_wait (timeout=0) at ../util/main-loop.c:320 #11 main_loop_wait (nonblocking=nonblocking@entry=0) at ../util/main-loop.c:596 #12 0x0000aaaaab5c9e50 in qemu_main_loop () at ../softmmu/runstate.c:734 #13 0x0000aaaaab185370 in qemu_main (argc=argc@entry=47, argv=argv@entry=0xfffffffff518, envp=envp@entry=0x0) at ../softmmu/main.c:38 #14 0x0000aaaaab16f99c in main (argc=47, argv=0xfffffffff518) at ../softmmu/main.c:47 Fixes: ebb62075021a ("hw/acpi: Add ACPI Generic Event Device Support") Signed-off-by: Keqian Zhu Reviewed-by: Igor Mammedov Message-id: 20220816094957.31700-1-zhukeqian1@huawei.com Signed-off-by: Peter Maydell --- hw/acpi/generic_event_device.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c index e28457a7d10..a3d31631fe0 100644 --- a/hw/acpi/generic_event_device.c +++ b/hw/acpi/generic_event_device.c @@ -267,6 +267,13 @@ static void acpi_ged_unplug_cb(HotplugHandler *hotplug_dev, } } +static void acpi_ged_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list) +{ + AcpiGedState *s = ACPI_GED(adev); + + acpi_memory_ospm_status(&s->memhp_state, list); +} + static void acpi_ged_send_event(AcpiDeviceIf *adev, AcpiEventStatusBits ev) { AcpiGedState *s = ACPI_GED(adev); @@ -409,6 +416,7 @@ static void acpi_ged_class_init(ObjectClass *class, void *data) hc->unplug_request = acpi_ged_unplug_request_cb; hc->unplug = acpi_ged_unplug_cb; + adevc->ospm_status = acpi_ged_ospm_status; adevc->send_event = acpi_ged_send_event; } From patchwork Thu Sep 22 16:35:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608243 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp493726pvb; Thu, 22 Sep 2022 11:08:43 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5ZrkRHhlidDbT4hvYyJzOmFhO13trLR62laoPqqQVmgZLzNs9cGqWASRPf9pQiD4iAwBS1 X-Received: by 2002:a37:a84a:0:b0:6cd:edee:f9af with SMTP id r71-20020a37a84a000000b006cdedeef9afmr3173582qke.600.1663870123215; Thu, 22 Sep 2022 11:08:43 -0700 (PDT) ARC-Seal: i=1; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.51 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:52 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 21/39] hw/net/lan9118: Signal TSFL_INT flag when TX FIFO reaches specified level Date: Thu, 22 Sep 2022 17:35:18 +0100 Message-Id: <20220922163536.1096175-22-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Lucas Dietrich The LAN9118 allows the guest to specify a level for both the TX and RX FIFOs at which an interrupt will be generated. We implement the RSFL_INT interrupt for the RX FIFO but are missing the handling of the equivalent TSFL_INT for the TX FIFO. Add the missing test to set the interrupt if the TX FIFO has exceeded the guest-specified level. This flag is required for Micrium lan911x ethernet driver to work. Signed-off-by: Lucas Dietrich [PMM: Tweaked commit message and comment] Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/net/lan9118.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c index 456ae38107b..f1cba559672 100644 --- a/hw/net/lan9118.c +++ b/hw/net/lan9118.c @@ -696,6 +696,14 @@ static void do_tx_packet(lan9118_state *s) n = (s->tx_status_fifo_head + s->tx_status_fifo_used) & 511; s->tx_status_fifo[n] = status; s->tx_status_fifo_used++; + + /* + * Generate TSFL interrupt if TX FIFO level exceeds the level + * specified in the FIFO_INT TX Status Level field. + */ + if (s->tx_status_fifo_used > ((s->fifo_int >> 16) & 0xff)) { + s->int_sts |= TSFL_INT; + } if (s->tx_status_fifo_used == 512) { s->int_sts |= TSFF_INT; /* TODO: Stop transmission. */ From patchwork Thu Sep 22 16:35:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608249 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp502119pvb; Thu, 22 Sep 2022 11:26:01 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6+LmBGmYt2gF63W/OWWFb3JLDFNsNO9QcAowMnqCMpEW3vdpgHbPozcUVghQWCwh52jNa5 X-Received: by 2002:a05:620a:1b89:b0:6ce:8b2b:7f0e with SMTP id dv9-20020a05620a1b8900b006ce8b2b7f0emr3163055qkb.15.1663871161426; Thu, 22 Sep 2022 11:26:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663871161; cv=none; d=google.com; s=arc-20160816; b=fp1hW94LtsNEw+AQN81NWwTszQAZQZ6EPVr5INJ/JU/xPIdbNNgI+nvQ2/NEeO2OZT krjnUa0SGvqTvabPJ9eI09FehL+tWqAtYJAbfAHmbYJpFeVKb3QapO2ikVNVM0TRjqcy DJspKcAQMZAli7LWGgcSljTdKpXcRziJpvck1PzUrO5lWLI1H8tbgXGGa6fYMeObCh1I SOJFM0NoWi3vKBs+C02+DBzNnhMaYOHsMH1Z1OjsY349+qKKy+/2qpfQqINOQpqZB3wJ nTn/TfapLf3SLoSiMmexlrimnRyGRTiwD5k/sGSICWPBHSc9J7exyXBF5vHDNywcJK3d pgxw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=ceS53dBC44zXtToPxcVfNPKGDYvq9xpEKY2mO0aTDyM=; b=u2mxCM45FM+99G8V1eJy0ckHDcUbBtwtts6jC1mZ+SKlKA1pm5OEJ299XYh12mENdK yeTvrp+LzzxSnMrQNDGsSAASaf9lLmqVB2olWK3T8T7j4/MDE1jc7NEWQW4wNXTxCvyj N0Tkq53TmzPfa+/S2+mptqsCHnEt8FMhs7uYmOIs/jCMIw14IwQ98/aZXLrsKUEgrrmG 6X2aj2TvUkr8+bbZfLk1BokgPK0e+qZHZbnmPNPx8HkMJlZp4Ny5SM69IRXhGzi2Dn/C 49cLaDpQ/b0tUcIRlgdrkCFbsodZ1TVPEFR9sLc32zqeC9YIrSwlgnQhnJeuAoKFZ37+ y/jg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sZ54Rn3R; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:52 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 22/39] chardev/baum: Replace magic values by X_MAX / Y_MAX definitions Date: Thu, 22 Sep 2022 17:35:19 +0100 Message-Id: <20220922163536.1096175-23-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Replace '84' magic value by the X_MAX definition, and '1' by Y_MAX. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau Reviewed-by: Samuel Thibault Signed-off-by: Peter Maydell Message-id: 20220819153931.3147384-2-peter.maydell@linaro.org --- chardev/baum.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/chardev/baum.c b/chardev/baum.c index 79d618e3504..6d538808a0f 100644 --- a/chardev/baum.c +++ b/chardev/baum.c @@ -87,6 +87,9 @@ #define BUF_SIZE 256 +#define X_MAX 84 +#define Y_MAX 1 + struct BaumChardev { Chardev parent; @@ -244,11 +247,11 @@ static int baum_deferred_init(BaumChardev *baum) brlapi_perror("baum: brlapi__getDisplaySize"); return 0; } - if (baum->y > 1) { - baum->y = 1; + if (baum->y > Y_MAX) { + baum->y = Y_MAX; } - if (baum->x > 84) { - baum->x = 84; + if (baum->x > X_MAX) { + baum->x = X_MAX; } con = qemu_console_lookup_by_index(0); From patchwork Thu Sep 22 16:35:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608247 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp500374pvb; Thu, 22 Sep 2022 11:21:49 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6dXj1Bkl0RwgXscyo+g9Espoq68tBijl2Jqo2XKv2Va2hcFZn6Ji4nOSIqhxoOc5NEhqJA X-Received: by 2002:a05:620a:2182:b0:6cd:ccbd:5c38 with SMTP id g2-20020a05620a218200b006cdccbd5c38mr3005241qka.695.1663870909054; Thu, 22 Sep 2022 11:21:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663870909; cv=none; d=google.com; s=arc-20160816; b=di3rWr1KiYR/38ygSMVVj3hkw7w6rxSU7gTabmdIkH8DR5Lxmz+v200G1N/+asAALM +D4Drtvm3MdMoNt7HU6cc+zU6f0CHKb3QhLngfjxAkha1lWB5MzFShyzXSdN9NqIZPdN wu1oAcwYHanUTO4BdoBpmNHhTJG4otMMzbxCU0T5+WXQjqqefk39JiEDTM1By7zH4G7E XLbtr4/CgmBZRBQn2MQstiacQYuxnxRC1KZ1kr0s5cBFA8eWeApgWIe4TvVJxGdvwLUX CX+qLvadap/VxLzPmpS2/AXLieuyU3oQ4vGrZtV/N73NtWxYaaDHVjOkRVfrWykE3Eyn 8ZdA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=pWGWLI7V6s9hSnLclf2++UgbHO3xok2cYFgCGF9FY5E=; b=iZ5K5+U74MosjQ1UG7MzgkzIBhmnwJYSU2i67f4uj8LC6AuyvFKDMzBJHpN5agLMpk 6lgfQ3GntN4+XMMcNfEQd27PZzPhzlow2VW2QXNQX/l2SG+lF6C0tDZnP3rw9YFOpsz/ 8DAouvTGiKGPN5BLdg9B+Ym1xPPg0d9n0FtPdyhnlWHvgydv8k1sAUOVQps//BDjhAdB aKLWXeKSiOUFLc+sjdPy2gqjRtmK4iWBQ1ogpDVtVtu3IfiBjEkV8BihM2a2F1AMraps DAMImi2iSnSWvND5aA+JrheR96gPr3qWa7Wx3uzugcRenhastIIWlTGiXku3lzzsr3BG LaDA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FcAK5RqG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:53 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 23/39] chardev/baum: Use definitions to avoid dynamic stack allocation Date: Thu, 22 Sep 2022 17:35:20 +0100 Message-Id: <20220922163536.1096175-24-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé We know 'x * y' will be at most 'X_MAX * Y_MAX' (which is not a big value, it is actually 84). Instead of having the compiler use variable-length array, declare an array able to hold the maximum 'x * y'. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau Reviewed-by: Samuel Thibault Signed-off-by: Peter Maydell Message-id: 20220819153931.3147384-3-peter.maydell@linaro.org --- chardev/baum.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/chardev/baum.c b/chardev/baum.c index 6d538808a0f..6a210ffd815 100644 --- a/chardev/baum.c +++ b/chardev/baum.c @@ -383,9 +383,9 @@ static int baum_eat_packet(BaumChardev *baum, const uint8_t *buf, int len) switch (req) { case BAUM_REQ_DisplayData: { - uint8_t cells[baum->x * baum->y], c; - uint8_t text[baum->x * baum->y]; - uint8_t zero[baum->x * baum->y]; + uint8_t cells[X_MAX * Y_MAX], c; + uint8_t text[X_MAX * Y_MAX]; + uint8_t zero[X_MAX * Y_MAX]; int cursor = BRLAPI_CURSOR_OFF; int i; @@ -408,7 +408,7 @@ static int baum_eat_packet(BaumChardev *baum, const uint8_t *buf, int len) } timer_del(baum->cellCount_timer); - memset(zero, 0, sizeof(zero)); + memset(zero, 0, baum->x * baum->y); brlapi_writeArguments_t wa = { .displayNumber = BRLAPI_DISPLAY_DEFAULT, From patchwork Thu Sep 22 16:35:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608261 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp514421pvb; Thu, 22 Sep 2022 11:56:42 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4QNpiBC3QhSvqXuxxWM35cvAb2V1JWNGYWBwggpXfRPdszCbGNbU63apWUyqvvNQ9ltdFC X-Received: by 2002:a05:6214:300b:b0:4ad:a84b:99cd with SMTP id ke11-20020a056214300b00b004ada84b99cdmr931851qvb.42.1663873002244; Thu, 22 Sep 2022 11:56:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663873002; cv=none; d=google.com; s=arc-20160816; b=ydB35A1kf9vN73MZQ9jTApi7t3Ff+KJwhGEHnwQS+6DqT0BY2SAUdTgTHJRfFHaaze dmoz6r+L6Ys5tFGIEqCGil+xiesEme6+1Ir7LBldwFnMKau3u+3hZColYoq+8yTz0VXO cUbjibTAwSvKDxOStZob5sw19UHXMc+X1Q/Z0E1ZxmLW4Z8qquek/gRhmnECHyyA0ikh 4Z2Zko74VxKev91wanrhPqnZacG34xEK+gd0PjojOBn1AjogHc0q+XVLq4LdQOm0DrqV eQsKNkoi2eMWXHgnny+vWfQBnsQzX13ujB4AnpaDoqgaQBv6SjO/ILncupt1hcHJ5CIF fr9g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=Iq7GHbEjHTo1LvtpoRoRhaQR0OgzbS3qn4RhqhBWZ9U=; b=a0bzTOt+RFOyElfyTviorxK12+xqPHINmthjetRr46u9u7qdrD8nduQdHhk/DOQBpf 7i06u2ks924uCnFYV/ClSWfszW5rZMnQsVxh1gpK3a1vy+grqZzdAyRatR49HoJk+SBH tCw5ORqRIeHVdXQ4leF4y/8s7GT8hEuqBbS6wrj/3oyaEgaS1K+otb7cz6oUNSPIA0BR bq+toWibk9K3NSPBGnV18SZFgxqN1rkuQ0IvN7aSpoVhFdraUj1l5ge5ESnWXjG3Fwxb grRH6IRns60DnVw7NtibmiXCMwk+bcxY8pPIferW6gtbKuCQH6gt602NFaSiGmJPDt0W 6qHA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=w6gCJm01; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:53 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 24/39] chardev/baum: Avoid dynamic stack allocation Date: Thu, 22 Sep 2022 17:35:21 +0100 Message-Id: <20220922163536.1096175-25-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Use autofree heap allocation instead of variable-length array on the stack. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau Reviewed-by: Samuel Thibault Signed-off-by: Peter Maydell Message-id: 20220819153931.3147384-4-peter.maydell@linaro.org --- chardev/baum.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/chardev/baum.c b/chardev/baum.c index 6a210ffd815..0a0d12661a4 100644 --- a/chardev/baum.c +++ b/chardev/baum.c @@ -299,7 +299,8 @@ static void baum_chr_accept_input(struct Chardev *chr) static void baum_write_packet(BaumChardev *baum, const uint8_t *buf, int len) { Chardev *chr = CHARDEV(baum); - uint8_t io_buf[1 + 2 * len], *cur = io_buf; + g_autofree uint8_t *io_buf = g_malloc(1 + 2 * len); + uint8_t *cur = io_buf; int room; *cur++ = ESC; while (len--) From patchwork Thu Sep 22 16:35:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608259 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp511633pvb; Thu, 22 Sep 2022 11:49:45 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4USFyd+IGFAc4uW0uxBkJ/Yyt1DTK9H2AcJzfdwTnRejLbetJ3t3JotaGDQzJB35G6ULIH X-Received: by 2002:ac8:5881:0:b0:35b:b25b:6fd5 with SMTP id t1-20020ac85881000000b0035bb25b6fd5mr4141478qta.169.1663872585405; Thu, 22 Sep 2022 11:49:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663872585; cv=none; d=google.com; s=arc-20160816; b=W7SorhSuNZV9PyCeaFN4TJE4J+N/syTzGbsaF4cbMQi36y4IML2U57mawe+OJJ1wlT 2dGShpWCwQmYDHnoQp0zdBNLPUMRv8MCHuGpyomugCr7XLpI5DRbbtlWHa+kA1IhLYDF 42FM3gpohfGJdEhaPdA/Rmb4Ax8TsvK36/V8l0lygHJvCSFRT+WAmWrXoXPNR8g1ykvS c4MFQlFr4OmSjtL6OGmF+cZ1tJHwQ9U1QmQ3jj/ACctX7DMb5QdPevtFcApyndsySLEI vkPygpdulQ49tUQ+2ZH2zPRSZCfTOCgn0adKvaU98EGYbl7nw/tQnz44Y4YTwDKlDQg6 snRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=qX86iXQWy4diJSSYD9PIr2CHjWMIxQY9Dao4svxApxw=; b=GbPlIk+udfNpVgKJAC24lI10Z+iz9K+EXPB/KgHuyNHkgUDh+iwVTXylGB8RoxQp6D L+kaAESVzNvS1Rckc1UAMnmRt/krdSCg/NaRb5pI6Njo9c4k4muXOuYjm757rCIFjOWY xRGpRm5HRbNYexnGOD5U3Ec/uIF0K03shYNCobpcBsHWztNebJ4o9cCx6i8q93LqJAYA j/XZ//vqVNoTaPrkxesfLFfK3ySgh2bh7lojAd8l8yZ2rX0oabcWUGrPcOxA/sm1ffKu 6HYmAA64Qy8VS/SWBOPuDnxdvERSdgBlcwsH9dcOaAkQfkuYZwXNT0SlBBLCIKJK/52z M5Ww== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Yv6LuHE6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.54 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:54 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 25/39] io/channel-websock: Replace strlen(const_str) by sizeof(const_str) - 1 Date: Thu, 22 Sep 2022 17:35:22 +0100 Message-Id: <20220922163536.1096175-26-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé The combined_key[... QIO_CHANNEL_WEBSOCK_GUID_LEN ...] array in qio_channel_websock_handshake_send_res_ok() expands to a call to strlen(QIO_CHANNEL_WEBSOCK_GUID), and the compiler doesn't realize the string is const, so consider combined_key[] being a variable-length array. To remove the variable-length array, we provide it a hint to the compiler by using sizeof() - 1 instead of strlen(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Daniel P. Berrangé Signed-off-by: Peter Maydell Message-id: 20220819153931.3147384-5-peter.maydell@linaro.org --- io/channel-websock.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/io/channel-websock.c b/io/channel-websock.c index 9619906ac36..fb4932ade70 100644 --- a/io/channel-websock.c +++ b/io/channel-websock.c @@ -32,7 +32,7 @@ #define QIO_CHANNEL_WEBSOCK_CLIENT_KEY_LEN 24 #define QIO_CHANNEL_WEBSOCK_GUID "258EAFA5-E914-47DA-95CA-C5AB0DC85B11" -#define QIO_CHANNEL_WEBSOCK_GUID_LEN strlen(QIO_CHANNEL_WEBSOCK_GUID) +#define QIO_CHANNEL_WEBSOCK_GUID_LEN (sizeof(QIO_CHANNEL_WEBSOCK_GUID) - 1) #define QIO_CHANNEL_WEBSOCK_HEADER_PROTOCOL "sec-websocket-protocol" #define QIO_CHANNEL_WEBSOCK_HEADER_VERSION "sec-websocket-version" From patchwork Thu Sep 22 16:35:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608262 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp515450pvb; Thu, 22 Sep 2022 11:59:49 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5hXAWskzv9carIs/WsFat1bkmjjQ7nVaxThRtAqhu4NC22iqwkBb6jr8aw370InY6B/k+8 X-Received: by 2002:ac8:754c:0:b0:35c:caea:3e73 with SMTP id b12-20020ac8754c000000b0035ccaea3e73mr4188207qtr.504.1663873189233; Thu, 22 Sep 2022 11:59:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663873189; cv=none; d=google.com; s=arc-20160816; b=O085Xvay/BCB8cllFcoZMaU6KSYlNLhjmBQDDcicV+IgKAD/Uh+/xuSav4SouBJ+iW jzy+rOm1DNqEIEjwAXFaIWjEkxXyKc3PEpCik++58NA3IXEVPee6+Nv0PbLsKx2eOCOZ DmUeONXz86PJ9Y1ZcqxXxpuDRpdLPJUsqp0HvKzB2I4+Gw/zLWKnDXYUAwCeu9hT2Qyh xoMIGapFWMYJFSx6/8pST8G1aNoZf5JJnNK7gt0R6ls6lTmeUFrjLqqjxNogZB6ErM3x 6oLHmKgtvIs2QyCv03fGHesRZ7YiDoCRjQnR6NLI2ha+ShmMk81opiDOLoJRjWMbxpjx gk+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=CiM/H1ZT11GJiU4qYe1Z3GEoKJxYHvPyHuyNl3EOOzE=; b=ymPrQyOre6TiDkGz6XUVpgW2/E+vHyFmVOhZ62fGGdbBo0oharblpk9PwbCoQ4jiyY MbeD+uVwuMLAXAcmaVeE8KfW8bnjpTF8d3jjscmrZ0tAkpF638T5HIbKX2P8akpXunsE bwFCwMQzhV0ST4aM598+rU5P4riuc+zu2Fp697vD6DprlufpD9h1FZlUt4StDPtPVILc 1MupEavGlNQdhugR79zqMzxoAcZsJrI9mouY6ar0cWmDDoeFlp/WEKsbNR9OOyf8yB3w y/uRAPRLpBjHmWP9dpXaGDnBOxUeAVevXszqO7bOS+nrnOMu5myO0QhCGOxtWWqr97Py v8pw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ddwaR6VD; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.54 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:55 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 26/39] hw/net/e1000e_core: Use definition to avoid dynamic stack allocation Date: Thu, 22 Sep 2022 17:35:23 +0100 Message-Id: <20220922163536.1096175-27-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé The compiler isn't clever enough to figure 'min_buf_size' is a constant, so help it by using a definitions instead. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Jason Wang Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell Message-id: 20220819153931.3147384-6-peter.maydell@linaro.org --- hw/net/e1000e_core.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/net/e1000e_core.c b/hw/net/e1000e_core.c index 208e3e0d798..82aa61fedcd 100644 --- a/hw/net/e1000e_core.c +++ b/hw/net/e1000e_core.c @@ -1622,15 +1622,16 @@ e1000e_rx_fix_l4_csum(E1000ECore *core, struct NetRxPkt *pkt) } } +/* Min. octets in an ethernet frame sans FCS */ +#define MIN_BUF_SIZE 60 + ssize_t e1000e_receive_iov(E1000ECore *core, const struct iovec *iov, int iovcnt) { static const int maximum_ethernet_hdr_len = (14 + 4); - /* Min. octets in an ethernet frame sans FCS */ - static const int min_buf_size = 60; uint32_t n = 0; - uint8_t min_buf[min_buf_size]; + uint8_t min_buf[MIN_BUF_SIZE]; struct iovec min_iov; uint8_t *filter_buf; size_t size, orig_size; From patchwork Thu Sep 22 16:35:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608256 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp508085pvb; Thu, 22 Sep 2022 11:40:56 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5b2GNZb9/1DhGFvGhJ9QCClLIFygwMYLZ2ruR/v1AUiY5xMJuGCsEJLjcJVf+RrQfZk4nC X-Received: by 2002:ae9:ed92:0:b0:6cd:ed2c:8062 with SMTP id c140-20020ae9ed92000000b006cded2c8062mr3199832qkg.82.1663872056417; Thu, 22 Sep 2022 11:40:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663872056; cv=none; d=google.com; s=arc-20160816; b=L0St7gUX8hlOpSU/9QgqueeWa5suoNkj9esykIYlJ+ohFgc4JcPUHP/NUBY2nuJbNH EtIhzrRJPoBMQoC6yKy2Gs6xby3brx3cFUKB+GEcbRSrLgE2NfWXBaWLdV/BfhrRxyjz 199L3lvX6yB5KXDy/Ly/fuc5OQ/BDQXeNqOZgE1/M2ePHsPpMZLLfCjZ1jLCPSK3Jl4f /nVitL8cNA/pLMeRA8g+5U6e0afXQParmRtFLR9AFhCPh77aYBJC5lG31wInMQCh9KoY Pznb2q/p3SdcHEqSHXP+VtZukAfpgsTadeWb2WC8kNuUkiDk1JqU2jnBApJT3mkspTzM oLew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=ztKwOrqkfodqtKzngCt55ZxSfx72kc5wCij+ohkVkGQ=; b=Cj8MDUGgbutBxyWZHzUevvag6uZon12tXibLq30ShIFBdNjL97cdktud6Dqho7CL48 0kUQyfKy+qM6mxu1OxLDjUQgPYGvXjqYebMLsDHFWBXWG1tQzcegxgyqVf3HpDtPjfeY QzaxlNNBg0JiiPvNmRWTXqfTN0TmroOgEf/Zy1HemXEcoi43osCapTvLZ4lRbFi018KN WsKZDkgALqZRAewkHOfgrraqf0JJoDpYBAkOsA1wRtb7jPMLFTessf0wzAS5YtCQIkf4 2hba3Uin74S7hjMrLkSECRN9Did1l8kWtVdCFX38gUlNAx+N76pIWyh+Sai2kbiBLqKb iPQg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=j6osT53I; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.55 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:55 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 27/39] hw/ppc/pnv: Avoid dynamic stack allocation Date: Thu, 22 Sep 2022 17:35:24 +0100 Message-Id: <20220922163536.1096175-28-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Use autofree heap allocation instead of variable-length array on the stack. Signed-off-by: Philippe Mathieu-Daudé Acked-by: David Gibson Signed-off-by: Peter Maydell Reviewed-by: Peter Maydell Reviewed-by: Daniel Henrique Barboza Message-id: 20220819153931.3147384-7-peter.maydell@linaro.org --- hw/ppc/pnv.c | 4 ++-- hw/ppc/spapr.c | 8 ++++---- hw/ppc/spapr_pci_nvlink2.c | 2 +- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 354aa289d18..78e00afb9b9 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -138,7 +138,7 @@ static void pnv_dt_core(PnvChip *chip, PnvCore *pc, void *fdt) int smt_threads = CPU_CORE(pc)->nr_threads; CPUPPCState *env = &cpu->env; PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs); - uint32_t servers_prop[smt_threads]; + g_autofree uint32_t *servers_prop = g_new(uint32_t, smt_threads); int i; uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40), 0xffffffff, 0xffffffff}; @@ -241,7 +241,7 @@ static void pnv_dt_core(PnvChip *chip, PnvCore *pc, void *fdt) servers_prop[i] = cpu_to_be32(pc->pir + i); } _FDT((fdt_setprop(fdt, offset, "ibm,ppc-interrupt-server#s", - servers_prop, sizeof(servers_prop)))); + servers_prop, sizeof(*servers_prop) * smt_threads))); } static void pnv_dt_icp(PnvChip *chip, void *fdt, uint32_t pir, diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index cc1adc23faf..8bbaf4f8a4e 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -177,8 +177,8 @@ static int spapr_fixup_cpu_smt_dt(void *fdt, int offset, PowerPCCPU *cpu, int smt_threads) { int i, ret = 0; - uint32_t servers_prop[smt_threads]; - uint32_t gservers_prop[smt_threads * 2]; + g_autofree uint32_t *servers_prop = g_new(uint32_t, smt_threads); + g_autofree uint32_t *gservers_prop = g_new(uint32_t, smt_threads * 2); int index = spapr_get_vcpu_id(cpu); if (cpu->compat_pvr) { @@ -196,12 +196,12 @@ static int spapr_fixup_cpu_smt_dt(void *fdt, int offset, PowerPCCPU *cpu, gservers_prop[i*2 + 1] = 0; } ret = fdt_setprop(fdt, offset, "ibm,ppc-interrupt-server#s", - servers_prop, sizeof(servers_prop)); + servers_prop, sizeof(*servers_prop) * smt_threads); if (ret < 0) { return ret; } ret = fdt_setprop(fdt, offset, "ibm,ppc-interrupt-gserver#s", - gservers_prop, sizeof(gservers_prop)); + gservers_prop, sizeof(*gservers_prop) * smt_threads * 2); return ret; } diff --git a/hw/ppc/spapr_pci_nvlink2.c b/hw/ppc/spapr_pci_nvlink2.c index 63b476c8f72..2a8a11be1d6 100644 --- a/hw/ppc/spapr_pci_nvlink2.c +++ b/hw/ppc/spapr_pci_nvlink2.c @@ -397,7 +397,7 @@ void spapr_phb_nvgpu_populate_pcidev_dt(PCIDevice *dev, void *fdt, int offset, continue; } if (dev == nvslot->gpdev) { - uint32_t npus[nvslot->linknum]; + g_autofree uint32_t *npus = g_new(uint32_t, nvslot->linknum); for (j = 0; j < nvslot->linknum; ++j) { PCIDevice *npdev = nvslot->links[j].npdev; From patchwork Thu Sep 22 16:35:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608239 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp487946pvb; Thu, 22 Sep 2022 10:58:05 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6H1uWI8PoVWmye6xSZjvZZ3JPytm/CtC1KDVuXvbVV86BWCS5GEpS+7BDNKVTayXwee7nv X-Received: by 2002:a05:6214:1d28:b0:4ad:6a63:b2c8 with SMTP id f8-20020a0562141d2800b004ad6a63b2c8mr3607583qvd.113.1663869485846; Thu, 22 Sep 2022 10:58:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663869485; cv=none; d=google.com; s=arc-20160816; b=pvW4HjPHwLnS+qslgPWuKmXfnyMcJuN2KTI1gGWC1IeM2crHLCbP7yGlBJVrHB6Cgm xIf2HLqNDM9pdcs6KI7KfRRvf40WnOMBcuejrKz/LBp9YhhQN/CvdhmK8fE04pPZEeVW yOb7wpcD633MPTAgyCHQAQj9erotUE5a+byKzuH87inXygOQLAhNs/3BT2VNVVqLzcpk ijUIwi+a9IRlv+y0TjQ+5WgAues1nna/S3lpCKaoqHAVbB941MdXP7GiRveleis/auIj Z8ETx5OqG5wmYq+6JiId+ftr0NKdcVRlw7/aAlzdKdHVFGjofR7AW5VWs3K9DvagjWbK 2SjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=325OKYY2nX8aI0G82FZc2RGAVSyYsN8rb3hEEYonRaA=; b=pUnaPsOnwxc/l5UBjyqHpmC44cJuLDaK8atw4b7VGKanfT4Rph9+VIekMrsImZERtS MIJC5tddeiwoi0OSQt6Vj3CXFe219558izjFuyiaNvKDqymffJfZfL6GWHxZF1nKu2Dv pmGg0rXwd98IqHUXl8pbVZcYtK6EvUMkPorAdstlSTQQlTNP/z1goHmLkW+5NbfSUoNG eqizaWRijOUQJU4mn4vpQchtz13AJT6OPqlzXQYX4Qjcc/z3qG3VNJhZfcm0y2tnyy+K lS05sCPKupT2TYfjA/YytpuCA3oSM/Nv/Eq6gMpDL7gvEQlmk7DOOBjh0DOgDKUCE8WH 2WPA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qTPOOld9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.56 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:56 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 28/39] hw/intc/xics: Avoid dynamic stack allocation Date: Thu, 22 Sep 2022 17:35:25 +0100 Message-Id: <20220922163536.1096175-29-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Use autofree heap allocation instead of variable-length array on the stack. Signed-off-by: Philippe Mathieu-Daudé Acked-by: David Gibson Reviewed-by: Greg Kurz Signed-off-by: Peter Maydell Message-id: 20220819153931.3147384-8-peter.maydell@linaro.org --- hw/intc/xics.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/intc/xics.c b/hw/intc/xics.c index 5b0b4d96242..dcd021af668 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -567,8 +567,8 @@ static void ics_reset_irq(ICSIRQState *irq) static void ics_reset(DeviceState *dev) { ICSState *ics = ICS(dev); + g_autofree uint8_t *flags = g_malloc(ics->nr_irqs); int i; - uint8_t flags[ics->nr_irqs]; for (i = 0; i < ics->nr_irqs; i++) { flags[i] = ics->irqs[i].flags; From patchwork Thu Sep 22 16:35:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608251 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp504274pvb; Thu, 22 Sep 2022 11:31:31 -0700 (PDT) X-Google-Smtp-Source: AMsMyM45gX8/012IILSeCJwQGVdiISk4aXJYljDA6tNFQ5oUoFxS6xjZMIPtpAJg5Fr0ExbXbBYe X-Received: by 2002:a05:620a:17aa:b0:6ce:5fe3:1c35 with SMTP id ay42-20020a05620a17aa00b006ce5fe31c35mr3156007qkb.337.1663871491239; Thu, 22 Sep 2022 11:31:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663871491; cv=none; d=google.com; s=arc-20160816; b=xOV6iTc4hvAcnjk3pqu+3qVngZ9R6FFgSz4WZQYNbJxG53NwLhIKnbcvQ/X2TfYuZl Fbt3mD8x+UXAS+uuty0TDUKTNj/ocT524U776gSm6GX75z/WVaPMXCL1kXgfg2JqiGvk yAM0+QG4NE5nT/EaPsCqf1rTRoN0ozblHEe/gxKaqJ2uFM0TUIklHv+sDVeMAjU9Iqx+ 6cF4gUTpJF7DSMNCvBbHc3Wk5IZN1NMYGXda7KA9jUJ75gT9Gc1NWysF6iG0VR7886AW 5xdzU6UUK6DyuygUxtqEp6n3dkMMHclEJwXguiZRdCU7nyWPcy8oAz1458k9X/sbTHAq /lWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=HVLDjT4fU1zPU/nL/+pXZz3AlOxWu0cbWVrJuViFf8w=; b=zUcSU7kVgP+WXuRG8Pd6b3bvfJhPei+2dNG9QgHx6ryDA0a/leRms8l9V8bWFF97Dz fPAb9eQ6edIH/DMpGiGXg5gG9BkM3PxHaXhdNFPjn1XpeU9mGhv9V5C72q2KwGHZvBhY uwyq+5OzTppdqkYgtmO4wwq4sImlZsEnVVdBvbswpBwW7t+/fOP/22BnoQyzct6GM5l5 03bcel1mczlY/dtTc7188rzI9iRNpdpOuTAh4RtWUtYZSxg7J4n1mS+lw94zJhHQYYoS zw1HySEp/Zp2uku57WyQkgQR9zMW0iUqz+/sfclogED3KQgIu4OufEnHP/Z189/+6qeW qzkw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mT1icSoH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.56 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:57 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 29/39] hw/i386/multiboot: Avoid dynamic stack allocation Date: Thu, 22 Sep 2022 17:35:26 +0100 Message-Id: <20220922163536.1096175-30-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Use autofree heap allocation instead of variable-length array on the stack. Replace the snprintf() call by g_strdup_printf(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell Message-id: 20220819153931.3147384-9-peter.maydell@linaro.org --- hw/i386/multiboot.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/i386/multiboot.c b/hw/i386/multiboot.c index 0a10089f14b..963e29362e4 100644 --- a/hw/i386/multiboot.c +++ b/hw/i386/multiboot.c @@ -163,6 +163,7 @@ int load_multiboot(X86MachineState *x86ms, uint8_t *mb_bootinfo_data; uint32_t cmdline_len; GList *mods = NULL; + g_autofree char *kcmdline = NULL; /* Ok, let's see if it is a multiboot image. The header is 12x32bit long, so the latest entry may be 8192 - 48. */ @@ -362,9 +363,7 @@ int load_multiboot(X86MachineState *x86ms, } /* Commandline support */ - char kcmdline[strlen(kernel_filename) + strlen(kernel_cmdline) + 2]; - snprintf(kcmdline, sizeof(kcmdline), "%s %s", - kernel_filename, kernel_cmdline); + kcmdline = g_strdup_printf("%s %s", kernel_filename, kernel_cmdline); stl_p(bootinfo + MBI_CMDLINE, mb_add_cmdline(&mbs, kcmdline)); stl_p(bootinfo + MBI_BOOTLOADER, mb_add_bootloader(&mbs, bootloader_name)); From patchwork Thu Sep 22 16:35:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608258 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp509216pvb; Thu, 22 Sep 2022 11:44:11 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4plASVKo3l+4eQ9ycnGU4DOcK9vneVlKooZ228PfrKjqHpClMgXYo1nz6l4PNizgQyAzGZ X-Received: by 2002:ac8:5b53:0:b0:35b:a603:6cdf with SMTP id n19-20020ac85b53000000b0035ba6036cdfmr4092417qtw.357.1663872251028; Thu, 22 Sep 2022 11:44:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663872251; cv=none; d=google.com; s=arc-20160816; b=ehDjw9aueEucO/G/7tKvq2My392jGMzx6V2r5vdHk3N5YxieZk3IXU1oFcOgcKZtxA sSqR78UbWgZBSEGE7WpgvHAi9cNe+OZ77no1Ciaj6uIQMeu9SoBNMxiB9ntd17Dn8mEf aFmqVCO9/hOlF/2c/IiECwwtclpz13f7mLjwm7uaOKiA5gXkuB+vCqTspOKOiNBZs6mD W11tMWqtXonQWTPu8A6NXWka2PboESzNnQXaDFJEPI+5mQE94CF4vsl8QIXz9+0usrNR QXO5tuajFfSqHncwDxToXcy0ZOp9zzlCLgPVnpcthJxFt1UUkA95JYX5srA3CnHhWwzK yfAA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=UoIEVd6qFvT+Ln9sMhn/rS//C5+/7lw2UA59aXrFoHY=; b=jSsXQVLMb1VHLiK4Q7bt72HYxsxhPbPH4j5wPYRDpGdg4P4A4a/bBl+55no9BR/G7R ZpTMEXV6nDMbXADRfbKbfCzHkvCIbEimfvbF2hkeW6dOFzYM6Kfg5Q3Y/+9wsqBu2PrU NRwe2PUmO33zL+ss+SgQTO4b9h4gX4N7NWNTj5uZ7mXSzvX8DjUOjmag7lD2xQwiWoz3 kHEbP0XHRHt/9U0wKbX47dcMW9dOtIdTTfESa1sxqaM/cb5gTsF/yYh4pThXTew5VKR0 YKVgQMD63LPzRxC8xX0wgf2p/H3VB5Jk5ZKgvBjCOgv3uWQcTZOd0xIHiQiX2ZP7THMj yuog== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iBqZAQda; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.57 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:57 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 30/39] hw/usb/hcd-ohci: Use definition to avoid dynamic stack allocation Date: Thu, 22 Sep 2022 17:35:27 +0100 Message-Id: <20220922163536.1096175-31-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé The compiler isn't clever enough to figure 'width' is a constant, so help it by using a definitions instead. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell Message-id: 20220819153931.3147384-10-peter.maydell@linaro.org --- hw/usb/hcd-ohci.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c index 895b29fb865..5585fd32ccf 100644 --- a/hw/usb/hcd-ohci.c +++ b/hw/usb/hcd-ohci.c @@ -805,13 +805,14 @@ static int ohci_service_iso_td(OHCIState *ohci, struct ohci_ed *ed) return 1; } +#define HEX_CHAR_PER_LINE 16 + static void ohci_td_pkt(const char *msg, const uint8_t *buf, size_t len) { bool print16; bool printall; - const int width = 16; int i; - char tmp[3 * width + 1]; + char tmp[3 * HEX_CHAR_PER_LINE + 1]; char *p = tmp; print16 = !!trace_event_get_state_backends(TRACE_USB_OHCI_TD_PKT_SHORT); @@ -822,7 +823,7 @@ static void ohci_td_pkt(const char *msg, const uint8_t *buf, size_t len) } for (i = 0; ; i++) { - if (i && (!(i % width) || (i == len))) { + if (i && (!(i % HEX_CHAR_PER_LINE) || (i == len))) { if (!printall) { trace_usb_ohci_td_pkt_short(msg, tmp); break; From patchwork Thu Sep 22 16:35:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608253 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp506078pvb; Thu, 22 Sep 2022 11:35:31 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4092hAuUp55/xPXIk/T3jG131+0gCQtWhLMvl+67p02e2YtG9MiuwIXQwTBJva/nI9RxaU X-Received: by 2002:a37:a9c6:0:b0:6cc:f925:132f with SMTP id s189-20020a37a9c6000000b006ccf925132fmr3204034qke.4.1663871731037; Thu, 22 Sep 2022 11:35:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663871731; cv=none; d=google.com; s=arc-20160816; b=WnU93QYINSlKXH1+3Z/PU+HyuXaBBErDuKjHD6xLce6ZnsBuoY3MmjYK7/GAsH7OQC TX7zTCJ7ZWhkjdnR33qqIxe8uBIOR5kq3wOC1NqnS2fQoCkmU/8UtYcspYB2zc9KhI4z DY8A0bZjIOXFIcu4hEYAsmuAr5oiCPzQD0bR+v8i3/6il1QzCJLH4DoFclIABffSYAYw j5APPoiC/5XbHXSOnlMS45m5pH6iM9YD+vNba+gWR+WManATGz5XyuQLwazv4FD7gj1U pZHrOwn72LNP/KJQ37HDXHuaYAADFjH7gZdaEeYe6g1ic/1Avy6hgW7WpOj25wIsyxde 0ILQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=l8BTHv6Rvs1T1FBsTL+iOTvROMJj6hLiW9QKgE0n3iY=; b=fRiejDLc+D7psEjDWPTahqqMgOC7L8wWiNdpHNpkrCvaB+q5Qc1g9V8+hbMG45ng91 kzV46A8jk3bIgkbDVW6i/8nIlnSgSKF8VTBR8LwwS6yPlgN/vEzIj/C/52wf/BDLW7VX XjQSv/LBUei/AtWm4bV3NbXkEo2lPbYCxzRiqFd4iTNzWSbPR92OMZ6OPJ0ouDo6HPzA xbPF/eV8UED4DWb6b2jybJ6f6DtO45MBlJSWvKhIEMDvvgkANcryzdNHklMahgX4QtUq LyfYZ55S29YJ7XG0Uh1pYYFe31c4BCygYOTEklI/Ys84S+A8ImOQEosaUjFwjNwZ5C/2 TlSw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Xtay/0Az"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.57 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:58 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 31/39] ui/curses: Avoid dynamic stack allocation Date: Thu, 22 Sep 2022 17:35:28 +0100 Message-Id: <20220922163536.1096175-32-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Use autofree heap allocation instead of variable-length array on the stack. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell Message-id: 20220819153931.3147384-11-peter.maydell@linaro.org --- ui/curses.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ui/curses.c b/ui/curses.c index 861d63244c7..de962faa7cd 100644 --- a/ui/curses.c +++ b/ui/curses.c @@ -69,7 +69,7 @@ static void curses_update(DisplayChangeListener *dcl, int x, int y, int w, int h) { console_ch_t *line; - cchar_t curses_line[width]; + g_autofree cchar_t *curses_line = g_new(cchar_t, width); wchar_t wch[CCHARW_MAX]; attr_t attrs; short colors; From patchwork Thu Sep 22 16:35:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608260 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp513118pvb; Thu, 22 Sep 2022 11:53:53 -0700 (PDT) X-Google-Smtp-Source: AMsMyM775NmGbXrbG0r6fgn5UH07Mii7xB2MPYdFY9g4gqhYJz7wzu9OzKXYu+QWVe82L/OZ8LYG X-Received: by 2002:ac8:7d90:0:b0:35b:afd3:20aa with SMTP id c16-20020ac87d90000000b0035bafd320aamr4045671qtd.252.1663872833135; Thu, 22 Sep 2022 11:53:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663872833; cv=none; d=google.com; s=arc-20160816; b=dCekhfPeNicn7yUWKU92B5XaydYopaWo2XnQDprVhLxeasYA/9GT2cTQ36rl+uvm6O taPnTj1A9JYwA1OsS8CDig0tWS7Rm2JBVWTkesIEMi3VRKQTVfXD7Ms2W2WKI1Asl01O kMMzav1x5azeESmFrI7mVQzqbqzLoJz6h/Fkc+JptJPmR1owMvUvoEnA0Ej9/zAmEdCR kxW6ODV29GDZgh18sSAG3YbJz6dMzXw+VxUBd2SfdRO3XHgmGHZ/ZKyVO61OgpvUFiL7 4ei568RAyqwhzUGoP/UKVj8jR3pP8fyOL9lsVaDAj4vGG8JuiDq8+EFswQCwzJITLpeG HNLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=bhukZinHP19tc2MABOlYOy3TPhufYb3LdwBHDFcAuKE=; b=dBpuvYtPScddOqnz3P6BXS2DE4qKr0etHsiRyj8pg6srYyoYSs3maJyhjU33xzjD4G I50NrIb8fglSG+KK9A9JIl09ScHM/vNMsAXLgkm9p9SV9EMG0RhkJS2eNpIrvbiiAlkE t4g70zsROoLmHtwMuhTK2MD1BXeYo0HJeEx03NlVZUsgj32cM2GeVpQc3YYEBUhJf8fv fheP0ZGNZWjE4mtkf/tpXSue0zLgnQgL61c70EasFS4clVQX7xDWBmItaXuMHzX2odB5 JNFGAe2/giNxK6X+PEbnb1x29Rkc7vhJAwhQRMgRxnNF+OwYfhpj3CUxSKpTP4e40LDF 6m3w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CS47AR3K; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.58 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:58 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 32/39] tests/unit/test-vmstate: Avoid dynamic stack allocation Date: Thu, 22 Sep 2022 17:35:29 +0100 Message-Id: <20220922163536.1096175-33-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Use autofree heap allocation instead of variable-length array on the stack. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell Message-id: 20220819153931.3147384-12-peter.maydell@linaro.org --- tests/unit/test-vmstate.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/tests/unit/test-vmstate.c b/tests/unit/test-vmstate.c index 72077b57800..541bb4f63e3 100644 --- a/tests/unit/test-vmstate.c +++ b/tests/unit/test-vmstate.c @@ -87,17 +87,16 @@ static void save_buffer(const uint8_t *buf, size_t buf_size) static void compare_vmstate(const uint8_t *wire, size_t size) { QEMUFile *f = open_test_file(false); - uint8_t result[size]; + g_autofree uint8_t *result = g_malloc(size); /* read back as binary */ - g_assert_cmpint(qemu_get_buffer(f, result, sizeof(result)), ==, - sizeof(result)); + g_assert_cmpint(qemu_get_buffer(f, result, size), ==, size); g_assert(!qemu_file_get_error(f)); /* Compare that what is on the file is the same that what we expected to be there */ - SUCCESS(memcmp(result, wire, sizeof(result))); + SUCCESS(memcmp(result, wire, size)); /* Must reach EOF */ qemu_get_byte(f); From patchwork Thu Sep 22 16:35:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608233 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp472602pvb; Thu, 22 Sep 2022 10:25:02 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7fZKItF2vMwxKDi7muiOaZ4WxuerUDBrSRrXeFKdf5tiWs0vr/OoJSYwvTYwF9NaxXaMkR X-Received: by 2002:a05:622a:8f:b0:35c:f532:3305 with SMTP id o15-20020a05622a008f00b0035cf5323305mr3904417qtw.180.1663867501946; Thu, 22 Sep 2022 10:25:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663867501; cv=none; d=google.com; s=arc-20160816; b=CYIuXMMsU0djvDlRY7kaJY2m9/Zx0SoviHRDzYfySA0/FakFmiG4FCBzbUOQb5Dngb bH1TW2T0anue+T1nZPosV5808uYI6KjkOJOOcFC8Tim/YdNlhWLvZcJMCNv1iXvcfpIk hhR36BGLZP+B1HNiHaGts18wzfSeCFBle3RYGutzuPM2LPBRhqa2BwWFu+83gup7M5Zv GDnzPW4h/vu5pQRZuOzBIA4e0/OnamodajVOdLDKAIO3BmBVZlTKy+UhUxjmDuCUCr9x ohZHv+g3N23ZEFUT0z9eRnvoLRlvjCq5OmLjtW14HmxbH+VQ2FF2XFO+YqZf5FzqXLOl VKsw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=fRuzNdVxdAJZ2ReB6Zxl4KaSdRZlenZ74jhT7D/lFHc=; b=jNevT9vWz2AW8DROwV8VhbyWgL4CVRmbKY418/rCnETGqynfHj7uL4hKKLcbVR0UmT T/SMz/e77LrCgVogyHKXIVm7dzXhefQDc3uGxcc6XoDnsah8Cs7nLh6AuYd25easjp0v i29HGvTAeo861fv1HRtPpOUC0k2SPn1JV8Tgqi4jdjm+Wksg2TofyJPlReMIq7OID0cx 8uhZpaiUE6A+6fFc/Qai7+DcqRoIq+2eLfFwGajNapXBE1z3Mny67ZzhP9rchsx1uHRN WxQeUbdUiecq1AfrMBkCYjH52jfh9U6OnKlPWNMLvXbi49uGXXl04hYvHZoNaMBS2S0+ up9A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=t11A2SKE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.59 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:59 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 33/39] configure: Remove unused python_version variable Date: Thu, 22 Sep 2022 17:35:30 +0100 Message-Id: <20220922163536.1096175-34-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Shellcheck correctly reports that we set python_version and never use it. This is a leftover from commit f9332757898a7: we used to use python_version purely to as part of the summary information printed at the end of a configure run, and that commit changed to printing the information from meson (which looks up the python version itself). Remove the unused variable. Signed-off-by: Peter Maydell Reviewed-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé Message-id: 20220825150703.4074125-2-peter.maydell@linaro.org --- configure | 3 --- 1 file changed, 3 deletions(-) diff --git a/configure b/configure index 0bbf9d28af7..b5ace4cb49e 100755 --- a/configure +++ b/configure @@ -1112,9 +1112,6 @@ if ! $python -c 'import sys; sys.exit(sys.version_info < (3,6))'; then "Use --python=/path/to/python to specify a supported Python." fi -# Preserve python version since some functionality is dependent on it -python_version=$($python -c 'import sys; print("%d.%d.%d" % (sys.version_info[0], sys.version_info[1], sys.version_info[2]))' 2>/dev/null) - # Suppress writing compiled files python="$python -B" From patchwork Thu Sep 22 16:35:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608230 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp468348pvb; Thu, 22 Sep 2022 10:16:23 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6b4pVvJ265k44CBlvu3i+imYq3YbQUJr//iXcMXH06nUNWfRcc/kAClc1vah5TeYF+5hi/ X-Received: by 2002:a05:620a:4694:b0:6ce:4f6d:e31 with SMTP id bq20-20020a05620a469400b006ce4f6d0e31mr2913103qkb.151.1663866983696; Thu, 22 Sep 2022 10:16:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663866983; cv=none; d=google.com; s=arc-20160816; b=aHzJGCK96ikgyrfqg7MIO7+ucdYe02zff8v4mqVDdyd45KlXcLUP6oQUB2vWos9QpR f4HQrAenrsQ5fD4h7quJW4OS3GHQOxYBlnOQAZhK5oEq7bpjuVx1Sa8rV1omwql4or8o FDOCxwAXleS4LEsxzXHJ5F+xybCmNQ4KxsEI7oJ9/1v2APSTY6znnd4gnONZGFD2B2pM 8XExpG720HSp8yrZLqi6AR3oj8JAHP6PiE4Jx6suvN9JnBoJdtbuUiIFN6MlOMQa5RAJ LPRINDelArrN7V5nqSeHLlGMHSfhgsPniM/mwMs2l+TzmSudCAhUIX5l15J4grGM/PbY utXg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=V+573S55AipTOAMAMMsIfcmoZJ0maiQeMsyNXIQuG+w=; b=giRL4WM4ykJSXrkoa9I56K7poqY8Xa8QXpHuQ/ghGeKT71UksVnTdZ3yD/YOhxju39 p+P0U8rr8VeVBOi27dCtDM9yufYQsuS+7y1UXHF5/QA9spwpz1/YixX5jcJXNwmCDokK HIBCfxk1UgKWq/vnQ2Gl/aEeIj03v3zgL4NfqACsuNeGIy9CyDyqfUSCyxqmheeYQgjn XOGeWzeXcWTH/VfcnPSEnR2LFbLUHJwLgHSngDX7RdLe0ZHX1pMdI4vuT8a8n4XCEg/r YoPfPRAq+BnGBr9gKy5KJJ4zLfuepakA+ov+of8y3tqU4xD+HiWEY+6utwOEubWVOLLu ZVUA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WWj59uYv; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.35.59 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:35:59 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 34/39] configure: Remove unused meson_args variable Date: Thu, 22 Sep 2022 17:35:31 +0100 Message-Id: <20220922163536.1096175-35-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The meson_args variable was added in commit 3b4da13293482134b, but was not used in that commit and isn't used today. Delete the unnecessary assignment. Signed-off-by: Peter Maydell Reviewed-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé Message-id: 20220825150703.4074125-3-peter.maydell@linaro.org --- configure | 1 - 1 file changed, 1 deletion(-) diff --git a/configure b/configure index b5ace4cb49e..e42d43d6a50 100755 --- a/configure +++ b/configure @@ -311,7 +311,6 @@ pie="" coroutine="" plugins="$default_feature" meson="" -meson_args="" ninja="" bindir="bin" skip_meson=no From patchwork Thu Sep 22 16:35:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608245 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp495533pvb; Thu, 22 Sep 2022 11:12:27 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5cmODqBLp6HBwFuiV54p0nOX7ViBvuU2rS7zDsbXnzd6ZOMxLCjJ0P0ng5Uoa4RrGhCsTQ X-Received: by 2002:a05:620a:404d:b0:6be:9818:ea49 with SMTP id i13-20020a05620a404d00b006be9818ea49mr3047098qko.197.1663870347181; Thu, 22 Sep 2022 11:12:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663870347; cv=none; d=google.com; s=arc-20160816; b=DeMFxch+2biPT8Q2DHJGr71/sFNscSTLaeSXTi2cmkKdGjTTKW+32Dwbnv/3yTiWTg ZUA6NxwuYG2Gn6kG9dbAyF+jLaNcpKZ4rxolJbSrclhblzmgLreap4rk75vDajDbv0vv t7fYUrAg1dt3uNxILR84iaDjS1xSREQHinydqBVc7IMdnjG/7A0l5mJb2VXgajuOIlU3 VaQfKK/56SYQoNSfO3fXiP0hQNL0Fm06DfglDcn/efSgdiotvPBPFzl14y7uYbykDKM9 dn1uYkJXCNN0JYNgdxT+C60T/19Ib07bObVIlT3S+iQt/TTIHr4YZgrjC1hdzRnfRIO9 JetA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=QdnrSN8AocizR5yIDpAyLK6s+nPqJhACaI+pjubOY7c=; b=woA2QLBJyUkdO9m1OkXRx+az/BGtGuFDT/NPg5sXMqNHA/EygSdqQL6CN9t7XCGUWk 7wILOTjmXueNSaEd6U9nzisjpu+fboIlFHFKi0ElqwzN9mE/BzP7L3d/AriaMruoh80F PkVfi7cDOETxYQbbwz9mfctcI53lLGR3GF1xVsZ0xfcgxLfUegUdSfx2IaFGctklN8vj r3Uo7bi9hP60nDmD4JLa5jLBZDLf0fRFErWkZreUQSnI3JgPDLynM3y6d/938RzzYx+Q DASLDcWcRkogyGqq5Bx334dL8Ogp2BINs0EkV5qRslSfSnWqjrStGRkVxOQmdeGu/tWO ixnQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=c3QrRVDI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.36.00 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:36:00 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 35/39] configure: Add missing quoting for some easy cases Date: Thu, 22 Sep 2022 17:35:32 +0100 Message-Id: <20220922163536.1096175-36-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This commit adds quotes in some places which: * are spotted by shellcheck * are obviously incorrect * are easy to fix just by adding the quotes It doesn't attempt fix all of the places shellcheck finds errors, or even all the ones which are easy to fix. It's just a random sampling which is hopefully easy to review and which cuts down the size of the problem for next time somebody wants to try to look at shellcheck errors. Signed-off-by: Peter Maydell Reviewed-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé Message-id: 20220825150703.4074125-4-peter.maydell@linaro.org --- configure | 64 +++++++++++++++++++++++++++---------------------------- 1 file changed, 32 insertions(+), 32 deletions(-) diff --git a/configure b/configure index e42d43d6a50..86cc6259181 100755 --- a/configure +++ b/configure @@ -57,7 +57,7 @@ GNUmakefile: ; EOF cd build - exec $source_path/configure "$@" + exec "$source_path/configure" "$@" fi # Temporary directory used for files created while @@ -691,7 +691,7 @@ meson_option_build_array() { printf ']\n' } -. $source_path/scripts/meson-buildoptions.sh +. "$source_path/scripts/meson-buildoptions.sh" meson_options= meson_option_add() { @@ -711,7 +711,7 @@ for opt do case "$opt" in --help|-h) show_help=yes ;; - --version|-V) exec cat $source_path/VERSION + --version|-V) exec cat "$source_path/VERSION" ;; --prefix=*) prefix="$optarg" ;; @@ -985,7 +985,7 @@ default_target_list="" mak_wilds="" if [ "$linux_user" != no ]; then - if [ "$targetos" = linux ] && [ -d $source_path/linux-user/include/host/$cpu ]; then + if [ "$targetos" = linux ] && [ -d "$source_path/linux-user/include/host/$cpu" ]; then linux_user=yes elif [ "$linux_user" = yes ]; then error_exit "linux-user not supported on this architecture" @@ -995,7 +995,7 @@ if [ "$bsd_user" != no ]; then if [ "$bsd_user" = "" ]; then test $targetos = freebsd && bsd_user=yes fi - if [ "$bsd_user" = yes ] && ! [ -d $source_path/bsd-user/$targetos ]; then + if [ "$bsd_user" = yes ] && ! [ -d "$source_path/bsd-user/$targetos" ]; then error_exit "bsd-user not supported on this host OS" fi fi @@ -1117,7 +1117,7 @@ python="$python -B" if test -z "$meson"; then if test "$explicit_python" = no && has meson && version_ge "$(meson --version)" 0.59.3; then meson=meson - elif test $git_submodules_action != 'ignore' ; then + elif test "$git_submodules_action" != 'ignore' ; then meson=git elif test -e "${source_path}/meson/meson.py" ; then meson=internal @@ -1834,7 +1834,7 @@ esac container="no" if test $use_containers = "yes"; then if has "docker" || has "podman"; then - container=$($python $source_path/tests/docker/docker.py probe) + container=$($python "$source_path"/tests/docker/docker.py probe) fi fi @@ -2284,7 +2284,7 @@ if test "$QEMU_GA_DISTRO" = ""; then QEMU_GA_DISTRO=Linux fi if test "$QEMU_GA_VERSION" = ""; then - QEMU_GA_VERSION=$(cat $source_path/VERSION) + QEMU_GA_VERSION=$(cat "$source_path"/VERSION) fi @@ -2533,7 +2533,7 @@ fi for target in $target_list; do target_dir="$target" target_name=$(echo $target | cut -d '-' -f 1)$EXESUF - mkdir -p $target_dir + mkdir -p "$target_dir" case $target in *-user) symlink "../qemu-$target_name" "$target_dir/qemu-$target_name" ;; *) symlink "../qemu-system-$target_name" "$target_dir/qemu-system-$target_name" ;; @@ -2568,14 +2568,14 @@ for target in $target_list; do config_target_mak=tests/tcg/config-$target.mak echo "# Automatically generated by configure - do not modify" > $config_target_mak - echo "TARGET_NAME=$arch" >> $config_target_mak + echo "TARGET_NAME=$arch" >> "$config_target_mak" case $target in xtensa*-linux-user) # the toolchain is not complete with headers, only build softmmu tests continue ;; *-softmmu) - test -f $source_path/tests/tcg/$arch/Makefile.softmmu-target || continue + test -f "$source_path/tests/tcg/$arch/Makefile.softmmu-target" || continue qemu="qemu-system-$arch" ;; *-linux-user|*-bsd-user) @@ -2590,73 +2590,73 @@ for target in $target_list; do # compilers is a requirememt for adding a new test that needs a # compiler feature. - echo "BUILD_STATIC=$build_static" >> $config_target_mak - write_target_makefile >> $config_target_mak + echo "BUILD_STATIC=$build_static" >> "$config_target_mak" + write_target_makefile >> "$config_target_mak" case $target in aarch64-*) if do_compiler "$target_cc" $target_cflags \ -march=armv8.1-a+sve -o $TMPE $TMPC; then - echo "CROSS_CC_HAS_SVE=y" >> $config_target_mak + echo "CROSS_CC_HAS_SVE=y" >> "$config_target_mak" fi if do_compiler "$target_cc" $target_cflags \ -march=armv8.1-a+sve2 -o $TMPE $TMPC; then - echo "CROSS_CC_HAS_SVE2=y" >> $config_target_mak + echo "CROSS_CC_HAS_SVE2=y" >> "$config_target_mak" fi if do_compiler "$target_cc" $target_cflags \ -march=armv8.3-a -o $TMPE $TMPC; then - echo "CROSS_CC_HAS_ARMV8_3=y" >> $config_target_mak + echo "CROSS_CC_HAS_ARMV8_3=y" >> "$config_target_mak" fi if do_compiler "$target_cc" $target_cflags \ -mbranch-protection=standard -o $TMPE $TMPC; then - echo "CROSS_CC_HAS_ARMV8_BTI=y" >> $config_target_mak + echo "CROSS_CC_HAS_ARMV8_BTI=y" >> "$config_target_mak" fi if do_compiler "$target_cc" $target_cflags \ -march=armv8.5-a+memtag -o $TMPE $TMPC; then - echo "CROSS_CC_HAS_ARMV8_MTE=y" >> $config_target_mak + echo "CROSS_CC_HAS_ARMV8_MTE=y" >> "$config_target_mak" fi ;; ppc*) if do_compiler "$target_cc" $target_cflags \ -mpower8-vector -o $TMPE $TMPC; then - echo "CROSS_CC_HAS_POWER8_VECTOR=y" >> $config_target_mak + echo "CROSS_CC_HAS_POWER8_VECTOR=y" >> "$config_target_mak" fi if do_compiler "$target_cc" $target_cflags \ -mpower10 -o $TMPE $TMPC; then - echo "CROSS_CC_HAS_POWER10=y" >> $config_target_mak + echo "CROSS_CC_HAS_POWER10=y" >> "$config_target_mak" fi ;; i386-linux-user) if do_compiler "$target_cc" $target_cflags \ -Werror -fno-pie -o $TMPE $TMPC; then - echo "CROSS_CC_HAS_I386_NOPIE=y" >> $config_target_mak + echo "CROSS_CC_HAS_I386_NOPIE=y" >> "$config_target_mak" fi ;; esac elif test -n "$container_image"; then echo "build-tcg-tests-$target: docker-image-$container_image" >> $makefile - echo "BUILD_STATIC=y" >> $config_target_mak - write_container_target_makefile >> $config_target_mak + echo "BUILD_STATIC=y" >> "$config_target_mak" + write_container_target_makefile >> "$config_target_mak" case $target in aarch64-*) - echo "CROSS_CC_HAS_SVE=y" >> $config_target_mak - echo "CROSS_CC_HAS_SVE2=y" >> $config_target_mak - echo "CROSS_CC_HAS_ARMV8_3=y" >> $config_target_mak - echo "CROSS_CC_HAS_ARMV8_BTI=y" >> $config_target_mak - echo "CROSS_CC_HAS_ARMV8_MTE=y" >> $config_target_mak + echo "CROSS_CC_HAS_SVE=y" >> "$config_target_mak" + echo "CROSS_CC_HAS_SVE2=y" >> "$config_target_mak" + echo "CROSS_CC_HAS_ARMV8_3=y" >> "$config_target_mak" + echo "CROSS_CC_HAS_ARMV8_BTI=y" >> "$config_target_mak" + echo "CROSS_CC_HAS_ARMV8_MTE=y" >> "$config_target_mak" ;; ppc*) - echo "CROSS_CC_HAS_POWER8_VECTOR=y" >> $config_target_mak - echo "CROSS_CC_HAS_POWER10=y" >> $config_target_mak + echo "CROSS_CC_HAS_POWER8_VECTOR=y" >> "$config_target_mak" + echo "CROSS_CC_HAS_POWER10=y" >> "$config_target_mak" ;; i386-linux-user) - echo "CROSS_CC_HAS_I386_NOPIE=y" >> $config_target_mak + echo "CROSS_CC_HAS_I386_NOPIE=y" >> "$config_target_mak" ;; esac got_cross_cc=yes fi if test $got_cross_cc = yes; then mkdir -p tests/tcg/$target - echo "QEMU=$PWD/$qemu" >> $config_target_mak + echo "QEMU=$PWD/$qemu" >> "$config_target_mak" echo "run-tcg-tests-$target: $qemu\$(EXESUF)" >> $makefile tcg_tests_targets="$tcg_tests_targets $target" fi From patchwork Thu Sep 22 16:35:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608263 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp518003pvb; Thu, 22 Sep 2022 12:04:25 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5EoNkhslAg+2rLP9gdx2maz7/zX93GApfWUkQ9esbWxkuVzPVdz4LMtuqrZotu+TYlJbEv X-Received: by 2002:ac8:5bc5:0:b0:35d:129b:5104 with SMTP id b5-20020ac85bc5000000b0035d129b5104mr4258752qtb.237.1663873465098; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.36.00 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:36:01 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 36/39] configure: Add './' on front of glob of */config-devices.mak.d Date: Thu, 22 Sep 2022 17:35:33 +0100 Message-Id: <20220922163536.1096175-37-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Shellcheck warns that in rm -f */config-devices.mak.d the glob might expand to something with a '-' in it, which would then be misinterpreted as an option to rm. Fix this by adding './'. Signed-off-by: Peter Maydell Reviewed-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé Message-id: 20220825150703.4074125-5-peter.maydell@linaro.org --- configure | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configure b/configure index 86cc6259181..482497e9743 100755 --- a/configure +++ b/configure @@ -1093,7 +1093,7 @@ exit 0 fi # Remove old dependency files to make sure that they get properly regenerated -rm -f */config-devices.mak.d +rm -f ./*/config-devices.mak.d if test -z "$python" then From patchwork Thu Sep 22 16:35:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608231 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp470833pvb; Thu, 22 Sep 2022 10:21:23 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5AX94PAjJPpfw8K0U0lDxD9+9Rs8RD7b/YG+B9OMfbtFcOpOyPU7tinWEKVeWtQaeCHwZV X-Received: by 2002:ae9:ebc2:0:b0:6cb:ca9d:c4f9 with SMTP id b185-20020ae9ebc2000000b006cbca9dc4f9mr3038679qkg.651.1663867283481; Thu, 22 Sep 2022 10:21:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663867283; cv=none; d=google.com; s=arc-20160816; b=ZQL4N5hsEjPk3RLtU0tpJ/LGzsZf0RhQPvfr6h0PqEOL+8mXIfyHZW4Tbv2hJ3veXy ahw7dknMhlo8ufHQpG0eHXDHGytBTocAtZTm9/NsTgvRt+WEg/NT9hS5Gss7bMsayTDx pbaQkyyR+PdYXz/Tcfm5aX82nPWBR0uOyjer/gUEIj2jlhXgu+21V9l5m1dRAwCKqDkY gqdsD/7VT5wOvLaU1cuFZTG+QvZyuXa1dPE8MEcE9g1tRcXb9AclZEZW1hQMmipZ416B vraUVWEm0XD2hel2AsPecM/+EjdYs0sEjeA3dJS3nC7olMOd+p6sBE0ORCmIH6yz7r1A 54Gw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=TG32nrt188N9s066qYdYkNxMuVya1mUQYmfslcHcgmc=; b=McfyjnD9MXHFESeLzHe3HkMm9XBwhnfSI6ZynP3mVTsCuvOK4WeJdmxNUwMvgKrJcG otIBvkNiOnN1YLCMWaGjt3+njDUNYJB4Lq0CtkzNCAKyAUdDDYo3G+72Gg+MwgqFs1+Z Y1rdbAORfBgCuXZc6840Hp3Wc4//Ja1WbD89pX98go9b7058Fuktt/DUiT+dD5Qnfgfr 6n3KtlK1Z8PljWcRaFKd6Np0s4l89JZTITefGPFARvCbeblRRV8A0nvm9FgJEncPmwY4 QS7lSEmuaowGrbASliSbFzDnPCnEoLJUYYeYo8ppw4XiifWsj4woaUb7JLnK5WkLltec LBLA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QmtySLhl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.36.01 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:36:01 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 37/39] configure: Remove use of backtick `...` syntax Date: Thu, 22 Sep 2022 17:35:34 +0100 Message-Id: <20220922163536.1096175-38-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There's only one place in configure where we use `...` to execute a command and capture the result. Switch to $() to match the rest of the script. This silences a shellcheck warning. Signed-off-by: Peter Maydell Reviewed-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé Message-id: 20220825150703.4074125-6-peter.maydell@linaro.org --- configure | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configure b/configure index 482497e9743..8b48e72a135 100755 --- a/configure +++ b/configure @@ -2311,7 +2311,7 @@ LINKS="$LINKS python" LINKS="$LINKS contrib/plugins/Makefile " for f in $LINKS ; do if [ -e "$source_path/$f" ]; then - mkdir -p `dirname ./$f` + mkdir -p "$(dirname ./"$f")" symlink "$source_path/$f" "$f" fi done From patchwork Thu Sep 22 16:35:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608229 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp465053pvb; Thu, 22 Sep 2022 10:10:31 -0700 (PDT) X-Google-Smtp-Source: AMsMyM49BgicyMT5PkdVTpARndd3pONCDJwNCvBnu574CcpoFdoEDqa9j0bP7v/Lt8sDjEgCqgpX X-Received: by 2002:ad4:5966:0:b0:4ad:7832:a8ec with SMTP id eq6-20020ad45966000000b004ad7832a8ecmr3506795qvb.82.1663866631248; Thu, 22 Sep 2022 10:10:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663866631; cv=none; d=google.com; s=arc-20160816; b=pw1ecUtxnxJcEWnL/Uz6S3v6s/M1GZyDKac9dgyvlnj1kMlCHRLpYJYVCa3V9V2477 tPk39jtbpESQSuf2C/x2Xt2GF+YTC7g5xyX6rRts089AwMmcaNn01FJF1ZXQj9URnhpq x1e1vRU3Cwg2GJ1Jz9qWUFLCWIkjoSM2+EKMz10benmU/uZiHwQDfm6DZAG0W0Aj+Ccy aDnuYvqI+3JGU2YMmDXAYGzqcJN83xts/VowwbAhNcRXVHwOLFrWD/YewcxQGFOLTvhe 4iMReK9YA+Ba3bDxEQ2cqgXx0ghMWQwoTNttr6qDLwQKujiKfyR7hYcbeDBgCxShxion nw7w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=v7AVH/6LvpLE+QUztT5pZ1JpIwSOJX2Mt8zbxlW+u0s=; b=OFg2o7XgBbs9rX7Ts2ZZv6julztj/LEH3eiz9M5PHckbkACSbcoOVoijScHyfPXIYg 2a3HnONFLiiWMjhTN7v2NqY8iqznX+cRVwqcLwHgS00AKyrIR9Q9/bK8o2yw89amV6cn o9SsUdgkEdu4ULDK1HGk6yxDLEsQ203/f1Qb4FyB7Rn6hJN5v+HijQPfHtuXkvJAmlX2 TE3vOTwJ6w4qF1AWUhJ2r+FIblg0lWaz5hDw3WKKKnJxwHinSuq6/d3gSPqWgKLoikwB MPchmvQWtZOQnQVyb1fqdNm18Y7b75SKqjOWFy7ho0vxAFIG9FusOF5NkoXPvSrIqakX O3Uw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gTtY5bTu; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.36.02 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:36:02 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 38/39] configure: Check mkdir result directly, not via $? Date: Thu, 22 Sep 2022 17:35:35 +0100 Message-Id: <20220922163536.1096175-39-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Shellcheck warns that we have one place where we run a command and then check if it failed using $?; this is better written to simply check the command in the 'if' statement directly. Signed-off-by: Peter Maydell Reviewed-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé Message-id: 20220825150703.4074125-7-peter.maydell@linaro.org --- configure | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/configure b/configure index 8b48e72a135..b39561b2ed7 100755 --- a/configure +++ b/configure @@ -67,8 +67,7 @@ fi # it when configure exits.) TMPDIR1="config-temp" rm -rf "${TMPDIR1}" -mkdir -p "${TMPDIR1}" -if [ $? -ne 0 ]; then +if ! mkdir -p "${TMPDIR1}"; then echo "ERROR: failed to create temporary directory" exit 1 fi From patchwork Thu Sep 22 16:35:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 608257 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp508614pvb; Thu, 22 Sep 2022 11:42:33 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7JgwvkKPeTm34RXYpcM6rlcgsnI6gsex1G+6U2KHpttA3EiPoPW2RsdrRvEfpB2d2DcxNW X-Received: by 2002:a05:622a:ce:b0:35c:f5de:3976 with SMTP id p14-20020a05622a00ce00b0035cf5de3976mr4018042qtw.437.1663872153719; Thu, 22 Sep 2022 11:42:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663872153; cv=none; d=google.com; s=arc-20160816; b=KfUG4sQAA8xWTZLhvtQp81Ycr9RQqYXwMZNC2/tjhYlJbJkdrY281uo3UsvuUMCpEw H/C5to1f64sh/sDHDhnBAngRfTliOr7xiGFsGcH+loblQh2J+0A8/ngPZxNGEoD6OIy8 3WgBxEs73YNg8/W8XwLHX+mjO5n5kDm0H+eUN3PHOT2+E6N7XrbWrfLHKPTYLNwabpPL 0iLHTh0x0slYK3gom+RPZ0B42as4P3aN5LxMufihjrNdtI/1n6GsZ6ZLLqRcMFlNb81D QO7PNaKoo+yakzcxTXgcwItV0bxWdOkZPRxoo1fgZq91o0Il62SMjpKaUscT1ji7RwpF 7Mfw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=L95wwHp5RV6cXArMSmbL8Hcv0LZd0gpd8eOHxANOlTY=; b=FmnFgywqYtYvtG+eyM6SWQF9GwK0QK+eSRscOChLUpUhkbatvhp8IO86x+6m8bTwDw /t3nrxXuS3CTEMv1FroQmfhfOG/zrVNi7CWJKlKHDdSTzXZSLqiaKVNfMvxMSKVo0YUS 8Ud/uc/rSXpMO7rq02QTl2fimzNq39i9YvgFPgeUzRw0/uBfyQH4UHDzNLFGfgvuQsLF vfxA69EzWflkGJk00nuLIIh1xqW6ZfLd9FEI9FrWpjFecJ82/hvrwY3qc+akc+TIhLaS x8h+ui5/4Ep48Jri310fiKbQrklKEO1VbtKu/SNq+MhI7mVA7vGi640v4INqUoJTaizL CQTQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=T4WuxWu4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id iw1-20020a05600c54c100b003b3401f1e24sm6452599wmb.28.2022.09.22.09.36.02 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 09:36:02 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 39/39] configure: Avoid use of 'local' as it is non-POSIX Date: Thu, 22 Sep 2022 17:35:36 +0100 Message-Id: <20220922163536.1096175-40-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922163536.1096175-1-peter.maydell@linaro.org> References: <20220922163536.1096175-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We use the non-POSIX 'local' keyword in just two places in configure; rewrite to avoid it. In do_compiler(), just drop the 'local' keyword. The variable 'compiler' is only used elsewhere in the do_compiler_werror() function, which already uses the variable as a normal non-local one. In probe_target_compiler(), $try and $t are both local; make them normal variables and use a more obviously distinct variable name for $t. Signed-off-by: Peter Maydell Reviewed-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé Message-id: 20220825150703.4074125-8-peter.maydell@linaro.org --- configure | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/configure b/configure index b39561b2ed7..cc4ecd6008b 100755 --- a/configure +++ b/configure @@ -110,7 +110,7 @@ error_exit() { do_compiler() { # Run the compiler, capturing its output to the log. First argument # is compiler binary to execute. - local compiler="$1" + compiler="$1" shift if test -n "$BASH_VERSION"; then eval ' echo >>config.log " @@ -2065,7 +2065,6 @@ probe_target_compiler() { : ${container_cross_strip:=${container_cross_prefix}strip} done - local t try try=cross case "$target_arch:$cpu" in aarch64_be:aarch64 | \ @@ -2078,8 +2077,8 @@ probe_target_compiler() { try='native cross' ;; esac eval "target_cflags=\${cross_cc_cflags_$target_arch}" - for t in $try; do - case $t in + for thistry in $try; do + case $thistry in native) target_cc=$cc target_ccas=$ccas