From patchwork Wed Feb 27 21:54:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jyri Sarha X-Patchwork-Id: 159296 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp4939342jad; Wed, 27 Feb 2019 13:54:49 -0800 (PST) X-Google-Smtp-Source: AHgI3IZyBprR+V+x4KtS4aKUcl4I35s1wELob+A1ETSCzVWvP3Jxy0E8qki32Q3IPFBmMgxG4NAl X-Received: by 2002:a63:1105:: with SMTP id g5mr5098499pgl.322.1551304489169; Wed, 27 Feb 2019 13:54:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1551304489; cv=none; d=google.com; s=arc-20160816; b=LDQOneNJAH9DzDwSU86cAzolJzMxf3w8/6mUv8yk0ttM9ThdtNfLyNFCqj//s8CJJL kASlmuWrqh2wMri8LpjTAjDdqsmpD5dSSvE4KOoQ7cbc1Okzsb2sYhTiaY8ZV5kCn8aq 8DgjY84I6L+jPaRKz/3IZSU5tlSKZdDpf4dAwzlebiXpEqOO1cqVUCgX4jEB4mWEIqFR nl56HuaekU3Gj4wU5rdQ2D5alKzL/X/VxiYkZtC+sr8MSG/Nv+kBp3g7PLtR7M2cCuaF R2Xh3s39dhoX4V4Vf3y9OJPcfOg3uEI/z+5vJBZwhnok4SjdKh0Dqyt4RSfEa6Vfggf9 69hw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=UFrI3BA0IIMkWTpYq7qsz6lkzhyRsYB5NHE00r38zSQ=; b=joq8VLAv/hGjshxoVHWllBl98ipICnXdIeOGcf1Pq/hxex+Mv7IFVQ92bR/QgqTs/6 w/r98AkfjdkKFtE4NyWCpHns4huAzj+u0pEYSyHleb3/myDOokgHUKVfvTBsntdBbT+h V1SOWouIKCyJprkyHL9w+o9rSXLI7K715JiYGe/puf48aUtbGYtw92nOLLJ93s56DAMI ZOm9xarSErVz9Q3Y10IZHzIu+z/j4qDv9y6ASIfcmEicU1HOFT93AY9VemfPQCpLV1zU ielgn5YIyhSD5IfpV2cISuKUvZFtRTwgUOy5z13TpqD1NURwzA9JCMwCb/W32bE1N8p3 oolQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=aSykWdMn; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g84si6132260pfd.187.2019.02.27.13.54.48; Wed, 27 Feb 2019 13:54:49 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=aSykWdMn; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729432AbfB0Vys (ORCPT + 7 others); Wed, 27 Feb 2019 16:54:48 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:43524 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726594AbfB0Vys (ORCPT ); Wed, 27 Feb 2019 16:54:48 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x1RLsUgS034112; Wed, 27 Feb 2019 15:54:30 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1551304470; bh=UFrI3BA0IIMkWTpYq7qsz6lkzhyRsYB5NHE00r38zSQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=aSykWdMn9aIynfX6ZMR0YRFcw3g90cJacjovvvM7tHYsO9hUykLnaCmYMIiZziekr 9CGK1PDIMx+bku5vVui0smfHCpizT/aW0P1kAfFD9MQqUNoiEeInwcpbElU394QpGj zdN/xO6Fp2zImdnYUecQRCdPLCG+Peqz8BJSOSNo= Received: from DLEE101.ent.ti.com (dlee101.ent.ti.com [157.170.170.31]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x1RLsUuC105362 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 27 Feb 2019 15:54:30 -0600 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Wed, 27 Feb 2019 15:54:28 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Wed, 27 Feb 2019 15:54:28 -0600 Received: from jadmar.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id x1RLsNec017712; Wed, 27 Feb 2019 15:54:26 -0600 From: Jyri Sarha To: , CC: , , , , , , , , Subject: [PATCH v2 1/5] drm/bridge: sii902x: add input_bus_flags Date: Wed, 27 Feb 2019 23:54:19 +0200 Message-ID: <087bea83b75afa55f0b156da3893e99c49ebb186.1551303673.git.jsarha@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Tomi Valkeinen The driver always sets InputBusFmt:EDGE to 0 (falling edge). Add drm_bridge_timings's input_bus_flags to reflect that the bridge samples on falling edges. Signed-off-by: Tomi Valkeinen Signed-off-by: Jyri Sarha Reviewed-by: Andrzej Hajda --- drivers/gpu/drm/bridge/sii902x.c | 7 +++++++ 1 file changed, 7 insertions(+) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm/bridge/sii902x.c index bfa902013aa4..1afa000141d5 100644 --- a/drivers/gpu/drm/bridge/sii902x.c +++ b/drivers/gpu/drm/bridge/sii902x.c @@ -459,6 +459,12 @@ static int sii902x_i2c_bypass_deselect(struct i2c_mux_core *mux, u32 chan_id) return 0; } +static const struct drm_bridge_timings default_sii902x_timings = { + .input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE + | DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE + | DRM_BUS_FLAG_DE_HIGH, +}; + static int sii902x_probe(struct i2c_client *client, const struct i2c_device_id *id) { @@ -529,6 +535,7 @@ static int sii902x_probe(struct i2c_client *client, sii902x->bridge.funcs = &sii902x_bridge_funcs; sii902x->bridge.of_node = dev->of_node; + sii902x->bridge.timings = &default_sii902x_timings; drm_bridge_add(&sii902x->bridge); i2c_set_clientdata(client, sii902x); From patchwork Wed Feb 27 21:54:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jyri Sarha X-Patchwork-Id: 159298 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp4939352jad; Wed, 27 Feb 2019 13:54:49 -0800 (PST) X-Google-Smtp-Source: AHgI3Ia/bJ9fQRPjYjP7M6XMGdSS8El9uJCJ9236P6wtcYrnYCw8BXNjJEufSJ/WqZ3js2NlM5Ph X-Received: by 2002:a65:5281:: with SMTP id y1mr5208143pgp.59.1551304489880; Wed, 27 Feb 2019 13:54:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1551304489; cv=none; d=google.com; s=arc-20160816; b=z/YXeafFZUTCXyGllKn5Atl9BoYoCXxE/aB/7PtyCVAlt0AYnNQc6zRlm2eyV3pvYj FdEoQ3CKvo+JZRN0bmpl1RA9AwOFmIjk4Iw/YF9NPu5TapxMyxwh0Sp/DeftShEWS7er SPWpnrTJ3ZnxLayOvYn3SHbdrmQ6e6i0jG0TMX/LymdIrx+emc6BZ8Xvxi+wvrJXoOz0 f/B/YZVVoiVEaY4u1QIdoxefgn33nqalEiUync/loEJT5j8tl4V79Ogix5VJbczc5BSN k/NEbed/UCalBxashPfEOCxBzcyWjAJJXUbhNn12DZYt5xV0798HGCM2IdGjG1FAm5CT P4WA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=Qr1pZOa0KFwYZm0HU8GIdEYPsQm7pmVFUF+oIZkTgCA=; b=NWGuQcC7s7vveCad1eQn1oQBDVDL0I4kCRdgPn5mYR8cIIJOqv523b9sU+Hru/4eNe JTOcB6cHdbByiW3zuRDNed9Q44fsGlZ1yWmuf0za6l1dbf7BYQjQl1O+ZUUjM0mtjLAa 5fFtC1G0x56aL2kZ0AOjdm3RG+1JgRu8iFLiQb52zC1UGajHxDMj+CWpGJdQ66pyYy3b Heh6aD0zqzWCjgiJTXjmFP2wUQbLf5hN8Wru6DHEOmu8An8M43HPz+mj5ybjVxQAXe+f eomO7QiTSuwPWB9IViD6dW6xQY2+9cr2+FG3ASbr3QC8U6H4oMtU83xfKx/5pqyNiOvF FyMQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="RyF3/BCG"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g84si6132260pfd.187.2019.02.27.13.54.49; Wed, 27 Feb 2019 13:54:49 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="RyF3/BCG"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728397AbfB0Vyt (ORCPT + 7 others); Wed, 27 Feb 2019 16:54:49 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:48096 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726594AbfB0Vys (ORCPT ); Wed, 27 Feb 2019 16:54:48 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x1RLsV1P007131; Wed, 27 Feb 2019 15:54:31 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1551304471; bh=Qr1pZOa0KFwYZm0HU8GIdEYPsQm7pmVFUF+oIZkTgCA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=RyF3/BCGUCk2HYO3uPyoe86CQKVulO6xN8UiTLdzcOLkSakI36sndJ6ErbZS0lgd9 7V3QnnGm41mcEqbLUOnncqdtGtNtQK2Rd/SedkuRImzcZsYFPwXXqWzzQqAf6Sy1IN WnZiyWsxcHN4zs2D5Tx9XRd7HuZai+faivFMy100= Received: from DFLE106.ent.ti.com (dfle106.ent.ti.com [10.64.6.27]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x1RLsVZd005615 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 27 Feb 2019 15:54:31 -0600 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Wed, 27 Feb 2019 15:54:31 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Wed, 27 Feb 2019 15:54:31 -0600 Received: from jadmar.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id x1RLsNed017712; Wed, 27 Feb 2019 15:54:29 -0600 From: Jyri Sarha To: , CC: , , , , , , , , Subject: [PATCH v2 2/5] drm/bridge: sii902x: Set output mode to HDMI or DVI according to EDID Date: Wed, 27 Feb 2019 23:54:20 +0200 Message-ID: <08d50e5eec760273a3b3699ea98732f5ec66ad25.1551303673.git.jsarha@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Set output mode to HDMI or DVI according to EDID HDMI signature. Signed-off-by: Jyri Sarha Reviewed-by: Andrzej Hajda --- drivers/gpu/drm/bridge/sii902x.c | 9 +++++++++ 1 file changed, 9 insertions(+) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm/bridge/sii902x.c index 1afa000141d5..0e21fa419d27 100644 --- a/drivers/gpu/drm/bridge/sii902x.c +++ b/drivers/gpu/drm/bridge/sii902x.c @@ -181,11 +181,15 @@ static int sii902x_get_modes(struct drm_connector *connector) struct sii902x *sii902x = connector_to_sii902x(connector); u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24; struct edid *edid; + u8 output_mode = SII902X_SYS_CTRL_OUTPUT_DVI; int num = 0, ret; edid = drm_get_edid(connector, sii902x->i2cmux->adapter[0]); drm_connector_update_edid_property(connector, edid); if (edid) { + if (drm_detect_hdmi_monitor(edid)) + output_mode = SII902X_SYS_CTRL_OUTPUT_HDMI; + num = drm_add_edid_modes(connector, edid); kfree(edid); } @@ -195,6 +199,11 @@ static int sii902x_get_modes(struct drm_connector *connector) if (ret) return ret; + ret = regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA, + SII902X_SYS_CTRL_OUTPUT_MODE, output_mode); + if (ret) + return ret; + return num; } From patchwork Wed Feb 27 21:54:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jyri Sarha X-Patchwork-Id: 159297 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp4939349jad; Wed, 27 Feb 2019 13:54:49 -0800 (PST) X-Google-Smtp-Source: AHgI3IYbReFVK9tHF2ohNbOTn55BV5cPZLQCkzV4ImizdClRYW98SWeLGwFfoHOy+ZJlaXP/rxZ5 X-Received: by 2002:a62:1e82:: with SMTP id e124mr3930994pfe.258.1551304489590; Wed, 27 Feb 2019 13:54:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1551304489; cv=none; d=google.com; s=arc-20160816; b=f5zms1ENpexKUhMNFNhf7gwDHvtIm7SJQ12rFXkvxRo4omG+XB9f9Aj7Q7Et69hV+j XwRJ3hV599mq6nThl2Uf9VdQQh4u7t7T8VTSYyWXRtMjHHX1Mw/LjmyEYdPKb0EYWR+r J6EsdADbKZ6xD2SMzXRh2eq4buT7Qal2r57t8a4dBniUKoJuipgnJD8RLdNWRTVi4fsl 6eVS+eVBC0/iFq5+XYbD5jJLrRdoALDM0KypSk38p7q/DpQzJv1xpGfxDnk46zhu2dRo mw0PBAg1SMEPGuwSnXpYRdnMDj5uOGj68vFUxoNH7ZWGsP1fiasTg8KG1aiSpD22p9wR zMAQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=aeZI37GFnyma8X2vPjVtuNaWX5uyfHRYc610foJkr9U=; b=ouZc4r9sQ3z9BQCq47dZV8SMD1IsMAENRchxHzGRzxI6TAo4o6tPIaJ+ZTbAOMoznc 1OLN9guRqwUisOs2jX7Zr4HH3gOiYHYyoaDtDpKIJatd8GvEyyYkoUDdv2/13bCRDdEF hN8ugJBcx3JS2pmR8teJlOgw9Bh9XF+HAjqEngZ1wONysIf/CWq7QWz7Ktf194M+T90o HQ9UtsrD8oWGDiBQEoaKW/lQSRbHx0n4EKoLCpsyJB0QDKZ7Vwo5JHlaR5cIj9r2sMUu a42x16lKy/QDZColVIka/boV8DfECiryVq6Rtu7OWkKueAwSeGZNECbPD1kmzpAtBlML apng== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=c2pesg3l; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g84si6132260pfd.187.2019.02.27.13.54.49; Wed, 27 Feb 2019 13:54:49 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=c2pesg3l; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729825AbfB0Vyt (ORCPT + 7 others); Wed, 27 Feb 2019 16:54:49 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:48094 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728397AbfB0Vys (ORCPT ); Wed, 27 Feb 2019 16:54:48 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x1RLsamJ007183; Wed, 27 Feb 2019 15:54:36 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1551304476; bh=aeZI37GFnyma8X2vPjVtuNaWX5uyfHRYc610foJkr9U=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=c2pesg3l1qYdWlGa5d67tOJdfYFLfpywrGzoMRs6OLcGfl05rBnV5u59b158Y4PrB B+8XoDuT6S9PHdD8O080E+F2NHsgYeXJjHNNyR6PTnagE10SgxU37vYsHq4o4OvLI4 dOrhjohODRdk2FmvgsCL4ov0JRpGU4l8ftnRxNTU= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x1RLsatX040626 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 27 Feb 2019 15:54:36 -0600 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Wed, 27 Feb 2019 15:54:33 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Wed, 27 Feb 2019 15:54:33 -0600 Received: from jadmar.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id x1RLsNee017712; Wed, 27 Feb 2019 15:54:31 -0600 From: Jyri Sarha To: , CC: , , , , , , , , Subject: [PATCH v2 3/5] drm/bridge: sii902x: pixel clock unit is 10kHz instead of 1kHz Date: Wed, 27 Feb 2019 23:54:21 +0200 Message-ID: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The pixel clock unit in the first two registers (0x00 and 0x01) of sii9022 is 10kHz, not 1kHz as in struct drm_display_mode. Division by 10 fixes the issue. Signed-off-by: Jyri Sarha Reviewed-by: Andrzej Hajda --- drivers/gpu/drm/bridge/sii902x.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki Reviewed-by: Laurent Pinchart diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm/bridge/sii902x.c index 0e21fa419d27..1e917777ed72 100644 --- a/drivers/gpu/drm/bridge/sii902x.c +++ b/drivers/gpu/drm/bridge/sii902x.c @@ -248,10 +248,11 @@ static void sii902x_bridge_mode_set(struct drm_bridge *bridge, struct regmap *regmap = sii902x->regmap; u8 buf[HDMI_INFOFRAME_SIZE(AVI)]; struct hdmi_avi_infoframe frame; + u16 pixel_clock_10kHz = adj->clock / 10; int ret; - buf[0] = adj->clock; - buf[1] = adj->clock >> 8; + buf[0] = pixel_clock_10kHz & 0xFF; + buf[1] = pixel_clock_10kHz >> 8; buf[2] = adj->vrefresh; buf[3] = 0x00; buf[4] = adj->hdisplay; From patchwork Wed Feb 27 21:54:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jyri Sarha X-Patchwork-Id: 159299 Delivered-To: patch@linaro.org Received: by 2002:a02:5cc1:0:0:0:0:0 with SMTP id w62csp4939368jad; Wed, 27 Feb 2019 13:54:51 -0800 (PST) X-Google-Smtp-Source: AHgI3Ib4Ln88fTwAOKNKZuztmz7BJHfH7RVpbMN1bbGsKe83IcnhhqmsTO/VdaXcXu0mIlhWF4cg X-Received: by 2002:a17:902:728d:: with SMTP id d13mr4472691pll.12.1551304491465; Wed, 27 Feb 2019 13:54:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1551304491; cv=none; d=google.com; s=arc-20160816; b=jyLPB2DAA0cItSpRiqNoXF1vwgSjtCHC94vBfl/gHKCZNZM8swd3f1ym+930pzTZM5 N/fixcQhXlb5zbbnXW0Yw2nJIPvIQEhfNNzhpOEyVOWr3grFBCEALQFKOlL9FkC5t7MX /IMdsYLGjl1NwtXttwmidcGqH9rbhhMwdi0TscR+3Xj0ft6e+toayMtEQk19G/OP5lkt K+9I3DZa9PQ4XWzoFiEz00FFNfUUwjt4qDL8aYx/YfUJA+IGmrlamdxJD6qz7uaBUKA7 LULy1DEz+KlURsY4Jh0lWg9Zu/FEvFIUDFun2Fo4L/0ucyK36Uti2Q4DNYkuD5JysHAe MutA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=aorpD4A+zm8SJPn1KhBpz4E3vfoxNo00P0E5GkUZtK4=; b=pOnFWvBjxV4SrDiGBsQNoWTfZ0nTmZPE3g/R/lLgD3QrUIJ+Cf0iuFn7hjdKnCvhbK WDWAEnlRLZJzb8yoRtepNg6cYH9NMH2X/LOdYUHVinJy9I1HOn1gFeMhq+44htamaaby JhVfXny21kMzINlXiUAJFI0wtQRYegLpNMwxMGVQSkZFk/WfRtcKFTu4dKRFMA1J0Sr/ pJTaNkmkhQpFXKy2OEHWY98kYHlSqpchZCb37QODjBXnJocn5oFeZ++KNAC5JI2sgLgP SE5BpEx27h7lq8uaqJYATvrPZzzuhGwytuf1H6iO6O+RGmsB166sJLkbJjaclxxdP6GW 12+A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=nuETszDW; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Fix it by selecting I2C_MUX for DRM_SII902X config option. Fixes: 88664675239 ("drm/bridge/sii902x: Fix EDID readback") Signed-off-by: Jyri Sarha --- drivers/gpu/drm/bridge/Kconfig | 1 + 1 file changed, 1 insertion(+) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki Reviewed-by: Andrzej Hajda diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index fb0b37918382..a6f6ff8f06b3 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -95,6 +95,7 @@ config DRM_SII902X depends on OF select DRM_KMS_HELPER select REGMAP_I2C + select I2C_MUX ---help--- Silicon Image sii902x bridge chip driver. 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[209.132.180.67]) by mx.google.com with ESMTP id g84si6132260pfd.187.2019.02.27.13.54.58; Wed, 27 Feb 2019 13:54:59 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=hnTgFU3J; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730190AbfB0Vy6 (ORCPT + 7 others); Wed, 27 Feb 2019 16:54:58 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:37324 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729986AbfB0Vy6 (ORCPT ); Wed, 27 Feb 2019 16:54:58 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x1RLsgMm043774; Wed, 27 Feb 2019 15:54:42 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1551304482; bh=F+VFr8L2Y1Hjg61N94b1DZBgeXOkeWY7sPm3kD/o3C8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=hnTgFU3JC3quo5KrXiWzXhAyDFbo4ga9JvdIeCWaEXIE4Ic3STsuZarw3byV7cu/u lMW4Cm3cOrwA3yLLjpAchAXcQCvGwhcjGisf+808MtMYIrRpmdP25lmpJH1S6eiXtS R8WGwUyy0tZauVpaoefr/OwjMJzeFnPqpFVWF0Ds= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x1RLsgmd040693 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 27 Feb 2019 15:54:42 -0600 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Wed, 27 Feb 2019 15:54:39 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Wed, 27 Feb 2019 15:54:39 -0600 Received: from jadmar.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id x1RLsNeg017712; Wed, 27 Feb 2019 15:54:36 -0600 From: Jyri Sarha To: , CC: , , , , , , , , Subject: [PATCH v2 5/5] drm/bridge: sii902x: Implement HDMI audio support Date: Wed, 27 Feb 2019 23:54:23 +0200 Message-ID: <21632d24b955ef7d9c29e05426224c65507202a9.1551303673.git.jsarha@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Implement HDMI audio support by using ASoC HDMI codec. The commit implements the necessary callbacks and configuration for the HDMI codec and registers a virtual platform device for the codec to attach. Signed-off-by: Jyri Sarha --- .../bindings/display/bridge/sii902x.txt | 36 +- drivers/gpu/drm/bridge/sii902x.c | 453 +++++++++++++++++- include/dt-bindings/sound/sii902x-audio.h | 11 + 3 files changed, 493 insertions(+), 7 deletions(-) create mode 100644 include/dt-bindings/sound/sii902x-audio.h -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/Documentation/devicetree/bindings/display/bridge/sii902x.txt b/Documentation/devicetree/bindings/display/bridge/sii902x.txt index 72d2dc6c3e6b..647b2fd84db9 100644 --- a/Documentation/devicetree/bindings/display/bridge/sii902x.txt +++ b/Documentation/devicetree/bindings/display/bridge/sii902x.txt @@ -5,9 +5,32 @@ Required properties: - reg: i2c address of the bridge Optional properties: - - interrupts: describe the interrupt line used to inform the host + - interrupts: describe the interrupt line used to inform the host about hotplug events. - reset-gpios: OF device-tree gpio specification for RST_N pin. + - i2s-fifo-routing: Array of exactly 4 integers indicating i2s + pins for audio fifo routing. First integer defines routing to + fifo 0 and second to fifo 1, etc. Integers can be filled with + definitions from: include/dt-bindings/sound/sii902x-audio.h + The available definitions are: + - ENABLE_BIT: enable this audio fifo + - CONNECT_SD#: route audio input from SD0, SD1, SD2, or SD3 i2s + data input pin + - LEFT_RIGHT_SWAP_BIT: swap i2s input channels for this fifo + I2S HDMI audio is configured only if this property is found. + - clocks: phandle mclk + - clock-names: "mclk" + Describes SII902x MCLK input. MCLK is used to produce + HDMI audio CTS values. This property is required if + "i2s-fifo-routing"-property is present. This property follows + Documentation/devicetree/bindings/clock/clock-bindings.txt + consumer binding. + - #sound-dai-cells = <0>: ASoC codec dai available for simple-card + If audio properties are present sii902x provides an ASoC + codec component driver that can be used by other ASoC + components like simple-card. See binding document for + details: + Documentation/devicetree/bindings/sound/simple-card.txt Optional subnodes: - video input: this subnode can contain a video input port node @@ -21,6 +44,17 @@ Example: compatible = "sil,sii9022"; reg = <0x39>; reset-gpios = <&pioA 1 0>; + + #sound-dai-cells = <0>; + i2s-fifo-routing = < + (ENABLE_BIT|CONNECT_SD0) + 0 + 0 + 0 + >; + clocks = <&mclk>; + clock-names = "mclk"; + ports { #address-cells = <1>; #size-cells = <0>; diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm/bridge/sii902x.c index 1e917777ed72..2be27bc54fb5 100644 --- a/drivers/gpu/drm/bridge/sii902x.c +++ b/drivers/gpu/drm/bridge/sii902x.c @@ -27,12 +27,16 @@ #include #include #include +#include #include #include #include #include +#include +#include + #define SII902X_TPI_VIDEO_DATA 0x0 #define SII902X_TPI_PIXEL_REPETITION 0x8 @@ -74,6 +78,77 @@ #define SII902X_AVI_POWER_STATE_MSK GENMASK(1, 0) #define SII902X_AVI_POWER_STATE_D(l) ((l) & SII902X_AVI_POWER_STATE_MSK) +/* Audio */ +#define SII902X_TPI_I2S_ENABLE_MAPPING_REG 0x1f +#define SII902X_TPI_I2S_CONFIG_FIFO0 (0 << 0) +#define SII902X_TPI_I2S_CONFIG_FIFO1 (1 << 0) +#define SII902X_TPI_I2S_CONFIG_FIFO2 (2 << 0) +#define SII902X_TPI_I2S_CONFIG_FIFO3 (3 << 0) +#define SII902X_TPI_I2S_LEFT_RIGHT_SWAP (1 << 2) +#define SII902X_TPI_I2S_AUTO_DOWNSAMPLE (1 << 3) +#define SII902X_TPI_I2S_SELECT_SD0 (0 << 4) +#define SII902X_TPI_I2S_SELECT_SD1 (1 << 4) +#define SII902X_TPI_I2S_SELECT_SD2 (2 << 4) +#define SII902X_TPI_I2S_SELECT_SD3 (3 << 4) +#define SII902X_TPI_I2S_FIFO_ENABLE (1 << 7) + +#define SII902X_TPI_I2S_INPUT_CONFIG_REG 0x20 +#define SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES (0 << 0) +#define SII902X_TPI_I2S_FIRST_BIT_SHIFT_NO (1 << 0) +#define SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST (0 << 1) +#define SII902X_TPI_I2S_SD_DIRECTION_LSB_FIRST (1 << 1) +#define SII902X_TPI_I2S_SD_JUSTIFY_LEFT (0 << 2) +#define SII902X_TPI_I2S_SD_JUSTIFY_RIGHT (1 << 2) +#define SII902X_TPI_I2S_WS_POLARITY_LOW (0 << 3) +#define SII902X_TPI_I2S_WS_POLARITY_HIGH (1 << 3) +#define SII902X_TPI_I2S_MCLK_MULTIPLIER_128 (0 << 4) +#define SII902X_TPI_I2S_MCLK_MULTIPLIER_256 (1 << 4) +#define SII902X_TPI_I2S_MCLK_MULTIPLIER_384 (2 << 4) +#define SII902X_TPI_I2S_MCLK_MULTIPLIER_512 (3 << 4) +#define SII902X_TPI_I2S_MCLK_MULTIPLIER_768 (4 << 4) +#define SII902X_TPI_I2S_MCLK_MULTIPLIER_1024 (5 << 4) +#define SII902X_TPI_I2S_MCLK_MULTIPLIER_1152 (6 << 4) +#define SII902X_TPI_I2S_MCLK_MULTIPLIER_192 (7 << 4) +#define SII902X_TPI_I2S_SCK_EDGE_FALLING (0 << 7) +#define SII902X_TPI_I2S_SCK_EDGE_RISING (1 << 7) + +#define SII902X_TPI_I2S_STRM_HDR_BASE 0x21 +#define SII902X_TPI_I2S_STRM_HDR_SIZE 5 + +#define SII902X_TPI_AUDIO_CONFIG_BYTE2_REG 0x26 +#define SII902X_TPI_AUDIO_CODING_STREAM_HEADER (0 << 0) +#define SII902X_TPI_AUDIO_CODING_PCM (1 << 0) +#define SII902X_TPI_AUDIO_CODING_AC3 (2 << 0) +#define SII902X_TPI_AUDIO_CODING_MPEG1 (3 << 0) +#define SII902X_TPI_AUDIO_CODING_MP3 (4 << 0) +#define SII902X_TPI_AUDIO_CODING_MPEG2 (5 << 0) +#define SII902X_TPI_AUDIO_CODING_AAC (6 << 0) +#define SII902X_TPI_AUDIO_CODING_DTS (7 << 0) +#define SII902X_TPI_AUDIO_CODING_ATRAC (8 << 0) +#define SII902X_TPI_AUDIO_MUTE_DISABLE (0 << 4) +#define SII902X_TPI_AUDIO_MUTE_ENABLE (1 << 4) +#define SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS (0 << 5) +#define SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS (1 << 5) +#define SII902X_TPI_AUDIO_INTERFACE_DISABLE (0 << 6) +#define SII902X_TPI_AUDIO_INTERFACE_SPDIF (1 << 6) +#define SII902X_TPI_AUDIO_INTERFACE_I2S (2 << 6) + +#define SII902X_TPI_AUDIO_CONFIG_BYTE3_REG 0x27 +#define SII902X_TPI_AUDIO_FREQ_STREAM (0 << 3) +#define SII902X_TPI_AUDIO_FREQ_32KHZ (1 << 3) +#define SII902X_TPI_AUDIO_FREQ_44KHZ (2 << 3) +#define SII902X_TPI_AUDIO_FREQ_48KHZ (3 << 3) +#define SII902X_TPI_AUDIO_FREQ_88KHZ (4 << 3) +#define SII902X_TPI_AUDIO_FREQ_96KHZ (5 << 3) +#define SII902X_TPI_AUDIO_FREQ_176KHZ (6 << 3) +#define SII902X_TPI_AUDIO_FREQ_192KHZ (7 << 3) +#define SII902X_TPI_AUDIO_SAMPLE_SIZE_STREAM (0 << 6) +#define SII902X_TPI_AUDIO_SAMPLE_SIZE_16 (1 << 6) +#define SII902X_TPI_AUDIO_SAMPLE_SIZE_20 (2 << 6) +#define SII902X_TPI_AUDIO_SAMPLE_SIZE_24 (3 << 6) + +#define SII902X_TPI_AUDIO_CONFIG_BYTE4_REG 0x28 + #define SII902X_INT_ENABLE 0x3c #define SII902X_INT_STATUS 0x3d #define SII902X_HOTPLUG_EVENT BIT(0) @@ -81,6 +156,16 @@ #define SII902X_REG_TPI_RQB 0xc7 +/* Indirect internal register access */ +#define SII902X_IND_SET_PAGE 0xbc +#define SII902X_IND_OFFSET 0xbd +#define SII902X_IND_VALUE 0xbe + +#define SII902X_TPI_MISC_INFOFRAME_BASE 0xbf +#define SII902X_TPI_MISC_INFOFRAME_END 0xde +#define SII902X_TPI_MISC_INFOFRAME_SIZE \ + (SII902X_TPI_MISC_INFOFRAME_END - SII902X_TPI_MISC_INFOFRAME_BASE) + #define SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS 500 struct sii902x { @@ -90,6 +175,16 @@ struct sii902x { struct drm_connector connector; struct gpio_desc *reset_gpio; struct i2c_mux_core *i2cmux; + /* + * Mutex protects audio and video functions from interfering + * each other, by keeping their i2c command sequences atomic. + */ + struct mutex mutex; + struct sii902x_audio { + struct platform_device *pdev; + struct clk *mclk; + u32 i2s_fifo_routing[4]; + } audio; }; static int sii902x_read_unlocked(struct i2c_client *i2c, u8 reg, u8 *val) @@ -161,8 +256,12 @@ sii902x_connector_detect(struct drm_connector *connector, bool force) struct sii902x *sii902x = connector_to_sii902x(connector); unsigned int status; + mutex_lock(&sii902x->mutex); + regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status); + mutex_unlock(&sii902x->mutex); + return (status & SII902X_PLUGGED_STATUS) ? connector_status_connected : connector_status_disconnected; } @@ -184,6 +283,8 @@ static int sii902x_get_modes(struct drm_connector *connector) u8 output_mode = SII902X_SYS_CTRL_OUTPUT_DVI; int num = 0, ret; + mutex_lock(&sii902x->mutex); + edid = drm_get_edid(connector, sii902x->i2cmux->adapter[0]); drm_connector_update_edid_property(connector, edid); if (edid) { @@ -197,14 +298,19 @@ static int sii902x_get_modes(struct drm_connector *connector) ret = drm_display_info_set_bus_formats(&connector->display_info, &bus_format, 1); if (ret) - return ret; + goto error_out; ret = regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA, SII902X_SYS_CTRL_OUTPUT_MODE, output_mode); if (ret) - return ret; + goto error_out; + + ret = num; + +error_out: + mutex_unlock(&sii902x->mutex); - return num; + return ret; } static enum drm_mode_status sii902x_mode_valid(struct drm_connector *connector, @@ -224,20 +330,28 @@ static void sii902x_bridge_disable(struct drm_bridge *bridge) { struct sii902x *sii902x = bridge_to_sii902x(bridge); + mutex_lock(&sii902x->mutex); + regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA, SII902X_SYS_CTRL_PWR_DWN, SII902X_SYS_CTRL_PWR_DWN); + + mutex_unlock(&sii902x->mutex); } static void sii902x_bridge_enable(struct drm_bridge *bridge) { struct sii902x *sii902x = bridge_to_sii902x(bridge); + mutex_lock(&sii902x->mutex); + regmap_update_bits(sii902x->regmap, SII902X_PWR_STATE_CTRL, SII902X_AVI_POWER_STATE_MSK, SII902X_AVI_POWER_STATE_D(0)); regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA, SII902X_SYS_CTRL_PWR_DWN, 0); + + mutex_unlock(&sii902x->mutex); } static void sii902x_bridge_mode_set(struct drm_bridge *bridge, @@ -264,26 +378,31 @@ static void sii902x_bridge_mode_set(struct drm_bridge *bridge, buf[9] = SII902X_TPI_AVI_INPUT_RANGE_AUTO | SII902X_TPI_AVI_INPUT_COLORSPACE_RGB; + mutex_lock(&sii902x->mutex); + ret = regmap_bulk_write(regmap, SII902X_TPI_VIDEO_DATA, buf, 10); if (ret) - return; + goto out; ret = drm_hdmi_avi_infoframe_from_display_mode(&frame, adj, false); if (ret < 0) { DRM_ERROR("couldn't fill AVI infoframe\n"); - return; + goto out; } ret = hdmi_avi_infoframe_pack(&frame, buf, sizeof(buf)); if (ret < 0) { DRM_ERROR("failed to pack AVI infoframe: %d\n", ret); - return; + goto out; } /* Do not send the infoframe header, but keep the CRC field. */ regmap_bulk_write(regmap, SII902X_TPI_AVI_INFOFRAME, buf + HDMI_INFOFRAME_HEADER_SIZE - 1, HDMI_AVI_INFOFRAME_SIZE + 1); + +out: + mutex_unlock(&sii902x->mutex); } static int sii902x_bridge_attach(struct drm_bridge *bridge) @@ -324,6 +443,323 @@ static const struct drm_bridge_funcs sii902x_bridge_funcs = { .enable = sii902x_bridge_enable, }; +static int sii902x_mute(struct sii902x *sii902x, bool mute) +{ + struct device *dev = &sii902x->i2c->dev; + unsigned int val = mute ? SII902X_TPI_AUDIO_MUTE_ENABLE : + SII902X_TPI_AUDIO_MUTE_DISABLE; + + dev_dbg(dev, "%s: %s\n", __func__, mute ? "Muted" : "Unmuted"); + + return regmap_update_bits(sii902x->regmap, + SII902X_TPI_AUDIO_CONFIG_BYTE2_REG, + SII902X_TPI_AUDIO_MUTE_ENABLE, val); +} + +static const unsigned int sii902x_mclk_div_table[] = { + 128, 256, 384, 512, 768, 1024, 1152, 192 }; + +static int sii902x_select_mclk_div(u8 *i2s_config_reg, unsigned int rate, + unsigned int mclk) +{ + unsigned int div = mclk / rate; + int distance = 100000; + u8 i, nearest = 0; + + for (i = 0; i < ARRAY_SIZE(sii902x_mclk_div_table); i++) { + unsigned int d = abs(div - sii902x_mclk_div_table[i]); + + if (d >= distance) + continue; + + nearest = i; + distance = d; + if (d == 0) + break; + } + + *i2s_config_reg |= nearest << 4; + + if (distance != 0) + return sii902x_mclk_div_table[nearest]; + + return 0; +} + +static const struct sii902x_sample_freq { + u32 freq; + u8 val; +} sii902x_sample_freq[] = { + { .freq = 32000, .val = SII902X_TPI_AUDIO_FREQ_32KHZ }, + { .freq = 44000, .val = SII902X_TPI_AUDIO_FREQ_44KHZ }, + { .freq = 48000, .val = SII902X_TPI_AUDIO_FREQ_48KHZ }, + { .freq = 88000, .val = SII902X_TPI_AUDIO_FREQ_88KHZ }, + { .freq = 96000, .val = SII902X_TPI_AUDIO_FREQ_96KHZ }, + { .freq = 176000, .val = SII902X_TPI_AUDIO_FREQ_176KHZ }, + { .freq = 192000, .val = SII902X_TPI_AUDIO_FREQ_192KHZ }, +}; + +static int sii902x_audio_hw_params(struct device *dev, void *data, + struct hdmi_codec_daifmt *daifmt, + struct hdmi_codec_params *params) +{ + struct sii902x *sii902x = dev_get_drvdata(dev); + u8 i2s_config_reg = SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST; + u8 config_byte2_reg = (SII902X_TPI_AUDIO_INTERFACE_I2S | + SII902X_TPI_AUDIO_MUTE_ENABLE | + SII902X_TPI_AUDIO_CODING_PCM); + u8 config_byte3_reg = 0; + u8 infoframe_buf[HDMI_INFOFRAME_SIZE(AUDIO)]; + unsigned long mclk_rate; + int i, ret; + + if (daifmt->bit_clk_master || daifmt->frame_clk_master) { + dev_dbg(dev, "%s: I2S master mode not supported\n", __func__); + return -EINVAL; + } + + switch (daifmt->fmt) { + case HDMI_I2S: + i2s_config_reg |= SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES | + SII902X_TPI_I2S_SD_JUSTIFY_LEFT; + break; + case HDMI_RIGHT_J: + i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_RIGHT; + break; + case HDMI_LEFT_J: + i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_LEFT; + break; + default: + dev_dbg(dev, "%s: Unsupported i2s format %u\n", __func__, + daifmt->fmt); + return -EINVAL; + } + + if (daifmt->bit_clk_inv) + i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_FALLING; + else + i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_RISING; + + if (daifmt->frame_clk_inv) + i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_LOW; + else + i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_HIGH; + + if (params->channels > 2) + config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS; + else + config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS; + + switch (params->sample_width) { + case 16: + config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_16; + break; + case 20: + config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_20; + break; + case 24: + case 32: + config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_24; + break; + default: + dev_err(dev, "%s: Unsupported sample width %u\n", __func__, + params->sample_width); + return -EINVAL; + } + + for (i = 0; i < ARRAY_SIZE(sii902x_sample_freq); i++) { + if (params->sample_rate == sii902x_sample_freq[i].freq) { + config_byte3_reg |= sii902x_sample_freq[i].val; + break; + } + } + + mclk_rate = clk_get_rate(sii902x->audio.mclk); + + ret = sii902x_select_mclk_div(&i2s_config_reg, params->sample_rate, + mclk_rate); + if (ret) + dev_dbg(dev, "Inaccurate reference clock (%ld/%d != %u)\n", + mclk_rate, ret, params->sample_rate); + + ret = clk_prepare_enable(sii902x->audio.mclk); + if (ret) { + dev_err(dev, "Enabling mclk failed: %d\n", ret); + return ret; + } + + mutex_lock(&sii902x->mutex); + + ret = regmap_write(sii902x->regmap, + SII902X_TPI_AUDIO_CONFIG_BYTE2_REG, + config_byte2_reg); + if (ret < 0) + goto out; + + ret = regmap_write(sii902x->regmap, SII902X_TPI_I2S_INPUT_CONFIG_REG, + i2s_config_reg); + if (ret) + goto out; + + for (i = 0; i < ARRAY_SIZE(sii902x->audio.i2s_fifo_routing); i++) + regmap_write(sii902x->regmap, + SII902X_TPI_I2S_ENABLE_MAPPING_REG, + sii902x->audio.i2s_fifo_routing[i]); + + ret = regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE3_REG, + config_byte3_reg); + if (ret) + goto out; + + ret = regmap_bulk_write(sii902x->regmap, SII902X_TPI_I2S_STRM_HDR_BASE, + params->iec.status, + min((size_t) SII902X_TPI_I2S_STRM_HDR_SIZE, + sizeof(params->iec.status))); + if (ret) + goto out; + + ret = hdmi_audio_infoframe_pack(¶ms->cea, infoframe_buf, + sizeof(infoframe_buf)); + if (ret < 0) { + dev_err(dev, "%s: Failed to pack audio infoframe: %d\n", + __func__, ret); + goto out; + } + + ret = regmap_bulk_write(sii902x->regmap, + SII902X_TPI_MISC_INFOFRAME_BASE, + infoframe_buf, + min(ret, SII902X_TPI_MISC_INFOFRAME_SIZE)); + if (ret) + goto out; + + /* Decode Level 0 Packets */ + ret = regmap_write(sii902x->regmap, SII902X_IND_SET_PAGE, 0x02); + if (ret) + goto out; + + ret = regmap_write(sii902x->regmap, SII902X_IND_OFFSET, 0x24); + if (ret) + goto out; + + ret = regmap_write(sii902x->regmap, SII902X_IND_VALUE, 0x02); + if (ret) + goto out; + + dev_dbg(dev, "%s: hdmi audio enabled\n", __func__); +out: + mutex_unlock(&sii902x->mutex); + + if (ret) { + clk_disable_unprepare(sii902x->audio.mclk); + dev_err(dev, "%s: hdmi audio enable failed: %d\n", __func__, + ret); + } + + return ret; +} + +static void sii902x_audio_shutdown(struct device *dev, void *data) +{ + struct sii902x *sii902x = dev_get_drvdata(dev); + + mutex_lock(&sii902x->mutex); + + regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE2_REG, + SII902X_TPI_AUDIO_INTERFACE_DISABLE); + + mutex_unlock(&sii902x->mutex); + + clk_disable_unprepare(sii902x->audio.mclk); +} + +int sii902x_audio_digital_mute(struct device *dev, void *data, bool enable) +{ + struct sii902x *sii902x = dev_get_drvdata(dev); + + mutex_lock(&sii902x->mutex); + + sii902x_mute(sii902x, enable); + + mutex_unlock(&sii902x->mutex); + + return 0; +} + +static int sii902x_audio_get_eld(struct device *dev, void *data, + uint8_t *buf, size_t len) +{ + struct sii902x *sii902x = dev_get_drvdata(dev); + + mutex_lock(&sii902x->mutex); + + memcpy(buf, sii902x->connector.eld, + min(sizeof(sii902x->connector.eld), len)); + + mutex_unlock(&sii902x->mutex); + + return 0; +} + +static const struct hdmi_codec_ops sii902x_audio_codec_ops = { + .hw_params = sii902x_audio_hw_params, + .audio_shutdown = sii902x_audio_shutdown, + .digital_mute = sii902x_audio_digital_mute, + .get_eld = sii902x_audio_get_eld, +}; + +static int sii902x_audio_codec_init(struct sii902x *sii902x, + struct device *dev) +{ + static const u8 i2s_fifo_defaults[] = { + SII902X_TPI_I2S_CONFIG_FIFO0, + SII902X_TPI_I2S_CONFIG_FIFO1, + SII902X_TPI_I2S_CONFIG_FIFO2, + SII902X_TPI_I2S_CONFIG_FIFO3, + }; + struct hdmi_codec_pdata codec_data = { + .ops = &sii902x_audio_codec_ops, + .i2s = 1, /* Only i2s support for now. */ + .spdif = 0, + .max_i2s_channels = 0, + }; + int ret, i; + + ret = of_property_read_u32_array(dev->of_node, "i2s-fifo-routing", + sii902x->audio.i2s_fifo_routing, + ARRAY_SIZE(sii902x->audio.i2s_fifo_routing)); + + if (ret != 0) { + if (ret == -EINVAL) + dev_dbg(dev, "%s: No \"i2s-fifo-routing\", no audio\n", + __func__); + else + dev_err(dev, + "%s: Error gettin \"i2s-fifo-routing\": %d\n", + __func__, ret); + return 0; + } + + sii902x->audio.mclk = devm_clk_get(dev, "mclk"); + if (IS_ERR(sii902x->audio.mclk)) { + dev_err(dev, "%s: No clock (audio mclk) found: %ld\n", + __func__, PTR_ERR(sii902x->audio.mclk)); + return 0; + } + + for (i = 0; i < ARRAY_SIZE(sii902x->audio.i2s_fifo_routing); i++) { + if (sii902x->audio.i2s_fifo_routing[i] & ENABLE_BIT) + codec_data.max_i2s_channels += 2; + sii902x->audio.i2s_fifo_routing[i] |= i2s_fifo_defaults[i]; + } + + sii902x->audio.pdev = platform_device_register_data( + dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO, + &codec_data, sizeof(codec_data)); + + return PTR_ERR_OR_ZERO(sii902x->audio.pdev); +} + static const struct regmap_range sii902x_volatile_ranges[] = { { .range_min = 0, .range_max = 0xff }, }; @@ -336,6 +772,7 @@ static const struct regmap_access_table sii902x_volatile_table = { static const struct regmap_config sii902x_regmap_config = { .reg_bits = 8, .val_bits = 8, + .max_register = SII902X_TPI_MISC_INFOFRAME_END, .volatile_table = &sii902x_volatile_table, .cache_type = REGCACHE_NONE, }; @@ -508,6 +945,8 @@ static int sii902x_probe(struct i2c_client *client, return PTR_ERR(sii902x->reset_gpio); } + mutex_init(&sii902x->mutex); + sii902x_reset(sii902x); ret = regmap_write(sii902x->regmap, SII902X_REG_TPI_RQB, 0x0); @@ -548,6 +987,8 @@ static int sii902x_probe(struct i2c_client *client, sii902x->bridge.timings = &default_sii902x_timings; drm_bridge_add(&sii902x->bridge); + sii902x_audio_codec_init(sii902x, dev); + i2c_set_clientdata(client, sii902x); sii902x->i2cmux = i2c_mux_alloc(client->adapter, dev, diff --git a/include/dt-bindings/sound/sii902x-audio.h b/include/dt-bindings/sound/sii902x-audio.h new file mode 100644 index 000000000000..32e50a926b6f --- /dev/null +++ b/include/dt-bindings/sound/sii902x-audio.h @@ -0,0 +1,11 @@ +#ifndef __DT_SII9022_AUDIO_H +#define __DT_SII9022_AUDIO_H + +#define ENABLE_BIT 0x80 +#define CONNECT_SD0 0x00 +#define CONNECT_SD1 0x10 +#define CONNECT_SD2 0x20 +#define CONNECT_SD3 0x30 +#define LEFT_RIGHT_SWAP_BIT 0x04 + +#endif /* __DT_SII9022_AUDIO_H */