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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id p15-20020adfce0f000000b0022cbf4cda62sm16209186wrn.27.2022.11.09.08.14.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Nov 2022 08:14:47 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH for-8.0 1/9] hw/arm: Convert TYPE_ARM_SMMU to 3-phase reset Date: Wed, 9 Nov 2022 16:14:36 +0000 Message-Id: <20221109161444.3397405-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221109161444.3397405-1-peter.maydell@linaro.org> References: <20221109161444.3397405-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the TYPE_ARM_SMMU device to 3-phase reset. The legacy method doesn't do anything that's invalid in the hold phase, so the conversion is simple and not a behaviour change. Note that we must convert this base class before we can convert the TYPE_ARM_SMMUV3 subclass -- transitional support in Resettable handles "chain to parent class reset" when the base class is 3-phase and the subclass is still using legacy reset, but not the other way around. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Eric Auger --- hw/arm/smmu-common.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c index e09b9c13b74..220838525d4 100644 --- a/hw/arm/smmu-common.c +++ b/hw/arm/smmu-common.c @@ -526,9 +526,9 @@ static void smmu_base_realize(DeviceState *dev, Error **errp) } } -static void smmu_base_reset(DeviceState *dev) +static void smmu_base_reset_hold(Object *obj) { - SMMUState *s = ARM_SMMU(dev); + SMMUState *s = ARM_SMMU(obj); g_hash_table_remove_all(s->configs); g_hash_table_remove_all(s->iotlb); @@ -543,12 +543,13 @@ static Property smmu_dev_properties[] = { static void smmu_base_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); SMMUBaseClass *sbc = ARM_SMMU_CLASS(klass); device_class_set_props(dc, smmu_dev_properties); device_class_set_parent_realize(dc, smmu_base_realize, &sbc->parent_realize); - dc->reset = smmu_base_reset; + rc->phases.hold = smmu_base_reset_hold; } static const TypeInfo smmu_base_info = { From patchwork Wed Nov 9 16:14:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 622932 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp354905pvb; Wed, 9 Nov 2022 08:17:22 -0800 (PST) X-Google-Smtp-Source: AMsMyM7BlWRUuOLz+SLi8EbvDrvSCNwvjnzuriA+WdhtS5/vFfOK/QRmsTEyWikNKFUqeDbBNibz X-Received: by 2002:a37:6cc4:0:b0:6fa:50a1:ff75 with SMTP id h187-20020a376cc4000000b006fa50a1ff75mr31093346qkc.340.1668010641909; Wed, 09 Nov 2022 08:17:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668010641; cv=none; d=google.com; s=arc-20160816; b=pj9c4NUClmxe4dHZ8tzqNLJF/y9/3CkucCllSAPBTG1j++Ov3mSOkX/antTWPD4d5A +wGWjFOnSHauelrSi4NEr4OMaZwSEtBuO/BQc4zUJzkuWFw6yXiWHAY9AtolfFEK8MkW 2pIZAQu1MqY1XrCZswpEzqFGeoJXn4eGkDjaAJRRs9njrPHSXWwnJh172W28YN/NeqXv YPe5K7nXhJd9CwlHxzywLdq2d0H9E+GMm9d0h3Qkflyz9NrOyW0oLEWI9HipIbnHnvd8 7SMYPTOC8Z/ewVrwBcm3p8Xp+ZzlY/qE+Y9Po/byjT8RdP2eUVH0sZmxtPO/anc9dOis M+vg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=TkW7T5S7zm7opSYfPV3c9ibz6QYvnDa1N5Ybi4vqCbI=; b=sbBE6QLS1zMs3nI27PvMbhfDdYWjAq2rPANsfuGjVbUbUQPH0v2ry+Dl9f9nzU4Ja+ j7Tzruqo3zrXM7LuU/YRgwCBKUmKkmRDQf/kDt6JbyBNuPvKjJSvDUcwrWAy1j3ocGDK KN+txgOz9aEZFD8oF0jWmHpbXE0mfRiQ4vsNW0l5QdwCJ9xcLsq55l8jJ9NSRSYow7cz 4rYDoKy8hFX6Ovgelht5Q9KYoEOtb4H0Nqjzyz8RxDPUGZTwtspdoquKujZdLOiH6YkA UZJzXFIbC2S/2dEQ6KQvG55g2vIvizfUSpI2vBN2SN4JVfinnFa7hHQdxAROwmqAI85u eLuQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ww8G8SPu; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id p15-20020adfce0f000000b0022cbf4cda62sm16209186wrn.27.2022.11.09.08.14.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Nov 2022 08:14:48 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH for-8.0 2/9] hw/arm: Convert TYPE_ARM_SMMUV3 to 3-phase reset Date: Wed, 9 Nov 2022 16:14:37 +0000 Message-Id: <20221109161444.3397405-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221109161444.3397405-1-peter.maydell@linaro.org> References: <20221109161444.3397405-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the TYPE_ARM_SMMUV3 device to 3-phase reset. The legacy reset method doesn't do anything that's invalid in the hold phase, so the conversion only requires changing it to a hold phase method, and using the 3-phase versions of the "save the parent reset method and chain to it" code. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Eric Auger Reviewed-by: Philippe Mathieu-Daudé --- include/hw/arm/smmuv3.h | 2 +- hw/arm/smmuv3.c | 12 ++++++++---- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h index c641e60735e..f1921fdf9e7 100644 --- a/include/hw/arm/smmuv3.h +++ b/include/hw/arm/smmuv3.h @@ -77,7 +77,7 @@ struct SMMUv3Class { /*< public >*/ DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; }; #define TYPE_ARM_SMMUV3 "arm-smmuv3" diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index daa80e9c7b6..955b89c8d59 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -1431,12 +1431,14 @@ static void smmu_init_irq(SMMUv3State *s, SysBusDevice *dev) } } -static void smmu_reset(DeviceState *dev) +static void smmu_reset_hold(Object *obj) { - SMMUv3State *s = ARM_SMMUV3(dev); + SMMUv3State *s = ARM_SMMUV3(obj); SMMUv3Class *c = ARM_SMMUV3_GET_CLASS(s); - c->parent_reset(dev); + if (c->parent_phases.hold) { + c->parent_phases.hold(obj); + } smmuv3_init_regs(s); } @@ -1520,10 +1522,12 @@ static void smmuv3_instance_init(Object *obj) static void smmuv3_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); SMMUv3Class *c = ARM_SMMUV3_CLASS(klass); dc->vmsd = &vmstate_smmuv3; - device_class_set_parent_reset(dc, smmu_reset, &c->parent_reset); + resettable_class_set_parent_phases(rc, NULL, smmu_reset_hold, NULL, + &c->parent_phases); c->parent_realize = dc->realize; dc->realize = smmu_realize; } From patchwork Wed Nov 9 16:14:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 622928 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp353644pvb; Wed, 9 Nov 2022 08:15:31 -0800 (PST) X-Google-Smtp-Source: AMsMyM7bVZVwEBDeAE1kCbIxXsbxUJNq+tBbSLrIdl2PcnaIyxeJr1dbyoiU9r+sOSZViKlxnIit X-Received: by 2002:a0c:ac49:0:b0:4b1:ccd5:6bd6 with SMTP id m9-20020a0cac49000000b004b1ccd56bd6mr56058909qvb.130.1668010531041; Wed, 09 Nov 2022 08:15:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668010531; cv=none; d=google.com; s=arc-20160816; b=XeUUP/eAhr0nTBmg5pbUZsVzfFfim+4/cNc4Z9J03fFSv8ruyXZYIvAne5wB2YFzjb M8BE9nOJROoZxqX/MN+oRlPtAwfQBOZeqKxk7kXG18muRY26NqTUMnAvsi2kiDXiIaMx yM3vTi6klebETwT1uKGSmZc60kuu47hUr6WAuOH3N9hrMASujduIbF0P9fBtcuToNBhF 25hd63n3yTEi07ED0k/jqvd2wo8sYC9m9KffXVUxgjRZRjOg1axqOcABHFuiInzrFyxH 5S6EQ0GLdVgeCeoWXmPDvMnkhnhllTF5RMeyFnrVVk/ToohV0p7JQsxtqZpYijcyz0iV oanQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=Ly4OSovRHvN+53CgiCfPFZpycGRSTR1uUEH/wJ6P+uc=; b=HYkL3jnFEldndntfJm+tusHJ6xCrfwojMzpChi9xfFWX+TMaXJRnyG90MT0rPRCG0M vYVAxq5ClA806YhebK9U3oVKfSyicMrKXv4T0gfgw07rAGx/u5sqqlCL8RL1i9C8IPIc G0odwQ4u1vqcAq5JaiuOZATlPfDcPLx5kLQ+A9iI0OuRRHiVleS2uNepIoQMvbrvJ1Sy hUwGE7LMGNnpdh5qyUl3v3X6rzktkfOdjgjOSmK4dwSiNbMYMn2n5IWzS1CEKiRB7K2B nXgevAjKpU3M9/gbtEQrdZ2GXMTKLClC1mKlyQxjzlJ482psCw2PBJ+R2GS5dLrHFRuc h/9Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=M37MRuhi; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id p15-20020adfce0f000000b0022cbf4cda62sm16209186wrn.27.2022.11.09.08.14.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Nov 2022 08:14:49 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH for-8.0 3/9] hw/intc: Convert TYPE_ARM_GIC_COMMON to 3-phase reset Date: Wed, 9 Nov 2022 16:14:38 +0000 Message-Id: <20221109161444.3397405-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221109161444.3397405-1-peter.maydell@linaro.org> References: <20221109161444.3397405-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the TYPE_ARM_GIC_COMMON device to 3-phase reset. This is a simple no-behaviour-change conversion. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- hw/intc/arm_gic_common.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c index 7b44d5625b6..a379cea3959 100644 --- a/hw/intc/arm_gic_common.c +++ b/hw/intc/arm_gic_common.c @@ -261,9 +261,9 @@ static inline void arm_gic_common_reset_irq_state(GICState *s, int first_cpu, } } -static void arm_gic_common_reset(DeviceState *dev) +static void arm_gic_common_reset_hold(Object *obj) { - GICState *s = ARM_GIC_COMMON(dev); + GICState *s = ARM_GIC_COMMON(obj); int i, j; int resetprio; @@ -364,9 +364,10 @@ static Property arm_gic_common_properties[] = { static void arm_gic_common_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); ARMLinuxBootIfClass *albifc = ARM_LINUX_BOOT_IF_CLASS(klass); - dc->reset = arm_gic_common_reset; + rc->phases.hold = arm_gic_common_reset_hold; dc->realize = arm_gic_common_realize; device_class_set_props(dc, arm_gic_common_properties); dc->vmsd = &vmstate_gic; From patchwork Wed Nov 9 16:14:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 622929 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp354069pvb; Wed, 9 Nov 2022 08:16:07 -0800 (PST) X-Google-Smtp-Source: AMsMyM7hK8zqk4rI4dqBpSOT1u7mb+cBkd7Vfeb4bGI5WemCEtXjxeIYVbfWEe/TyfGC4uNMiVmC X-Received: by 2002:a05:622a:2286:b0:3a5:1ab4:77fb with SMTP id ay6-20020a05622a228600b003a51ab477fbmr46606768qtb.85.1668010567733; Wed, 09 Nov 2022 08:16:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668010567; cv=none; d=google.com; s=arc-20160816; b=eDydc0BOw+Wc9HgWvxFLbLxS2haiS9zihgyglujxpxvtWT+hfj1soke6DEB30hF4lq X1kkCRavbDRFF12YjwYsUXdj6LfdP7U1gtvDePbmccx8hXtbhfuUnNNsEK8DqnYhNlDh wxWVHEWB1fKMz6Ape73KNQeJEzgRaEArH0udDCrsCm7HXhW+oEwbiRX9Q5LzeA74qCs6 f/okF8DIdm1V2VxLEPWjI2VWwKbJtsddcnwzPHp5ad6T4Mmgwart2iT35kXp09JNjKX2 wiN/jKdSo8iWkwYj5yXpIKHLZMhhaeFyrlMVUGMGhUjNwZjK083XiLwmrhKfwiRqcijE km9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=94zFxEDln0hVAcYsJJAZunaQ0vJlEEsykd+74gFzfm0=; b=Cvmxa66oBTYj10eTtqjGy2RXtSMo4xlHSKfi+pnPiiYEgZUgR0tUhGtFptFTBo3o/J 9NpJwHcTBLOrsXrgA9cjuGIWxIFxGqqbODE7tR5Q5GeiMfgtb7/5Kyou8Ips8HKthz1W yBhKkUR8RS50XfDuRan52i978KRtMi/F/QpgckPlD9HIiTfuOyaycsZiByXhgg0+PB2B 4s7B6wU8mF4Ymdbc43PeUSZeMHgEwUG8nct0+0D3WObQEGaYQS25aTmfgAj7a20aSvKJ E8K36FzkrI5MNz3yXjDWfjtyQao4Ek3t8a6xYfo7NFUO9QFvgWF6mDhG8I4yIKpx3l8q 5A9g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DeIkwfa+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id p15-20020adfce0f000000b0022cbf4cda62sm16209186wrn.27.2022.11.09.08.14.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Nov 2022 08:14:50 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH for-8.0 4/9] hw/intc: Convert TYPE_ARM_GIC_KVM to 3-phase reset Date: Wed, 9 Nov 2022 16:14:39 +0000 Message-Id: <20221109161444.3397405-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221109161444.3397405-1-peter.maydell@linaro.org> References: <20221109161444.3397405-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Now we have converted TYPE_ARM_GIC_COMMON, we can convert the TYPE_ARM_GIC_KVM subclass to 3-phase reset. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- hw/intc/arm_gic_kvm.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c index 7d2a13273a4..1d588946bce 100644 --- a/hw/intc/arm_gic_kvm.c +++ b/hw/intc/arm_gic_kvm.c @@ -38,7 +38,7 @@ DECLARE_OBJ_CHECKERS(GICState, KVMARMGICClass, struct KVMARMGICClass { ARMGICCommonClass parent_class; DeviceRealize parent_realize; - void (*parent_reset)(DeviceState *dev); + ResettablePhases parent_phases; }; void kvm_arm_gic_set_irq(uint32_t num_irq, int irq, int level) @@ -473,12 +473,14 @@ static void kvm_arm_gic_get(GICState *s) } } -static void kvm_arm_gic_reset(DeviceState *dev) +static void kvm_arm_gic_reset_hold(Object *obj) { - GICState *s = ARM_GIC_COMMON(dev); + GICState *s = ARM_GIC_COMMON(obj); KVMARMGICClass *kgc = KVM_ARM_GIC_GET_CLASS(s); - kgc->parent_reset(dev); + if (kgc->parent_phases.hold) { + kgc->parent_phases.hold(obj); + } if (kvm_arm_gic_can_save_restore(s)) { kvm_arm_gic_put(s); @@ -593,6 +595,7 @@ static void kvm_arm_gic_realize(DeviceState *dev, Error **errp) static void kvm_arm_gic_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); ARMGICCommonClass *agcc = ARM_GIC_COMMON_CLASS(klass); KVMARMGICClass *kgc = KVM_ARM_GIC_CLASS(klass); @@ -600,7 +603,8 @@ static void kvm_arm_gic_class_init(ObjectClass *klass, void *data) agcc->post_load = kvm_arm_gic_put; device_class_set_parent_realize(dc, kvm_arm_gic_realize, &kgc->parent_realize); - device_class_set_parent_reset(dc, kvm_arm_gic_reset, &kgc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, kvm_arm_gic_reset_hold, NULL, + &kgc->parent_phases); } static const TypeInfo kvm_arm_gic_info = { From patchwork Wed Nov 9 16:14:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 622927 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp353574pvb; Wed, 9 Nov 2022 08:15:25 -0800 (PST) X-Google-Smtp-Source: AA0mqf4lRnaVO9hW4d3fmi0vsvSrBq4+Tw5e/lzWbIEL0oqVo6xh+4MZMDR2R11tv+qGgqTVRpbX X-Received: by 2002:ae9:f30d:0:b0:6fb:7cb:7b21 with SMTP id p13-20020ae9f30d000000b006fb07cb7b21mr6143039qkg.653.1668010525250; Wed, 09 Nov 2022 08:15:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668010525; cv=none; d=google.com; s=arc-20160816; b=nRdRJ5wu5VVuJ4ZIiREpf0gkOXLAZeRaVR8rBv14FsjXovkAAusB7gtLD4Wox9GDj6 2RFo70tbwY1R1WvUEab4WCCN8Xu0KKobxqwrrxLSUmxeBKmi8/oU4wZr7hzPcHMWWVkH q62S1orY5JxzlVBrB22R+RZkCDPi5iocSmXIHOMuFDW6lSXqbeFiMlpDMdkVjcFHhlVD +HtpH0oZxY/O4lL86r32s3e+waFMrG2RRcAlGh9LdKA5FCh4WOJbyHeKcK3N+iOqrFOX ZPeuogYeVhasDHdqhbP1Oln2d49unkd0hlZTVUahHMetl0nQK2gZLLDzgIU4aMHUCTyD hWuw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=LQMjmXDjci7tzxnXSukseV+1Ik+M+TaUYDCQHT998tw=; b=G8ulKotzGo1oH9Iahps1wQ8rvzNas0VyH3tN3G5Vn06F5Yjw6wjOiKtSsXi/F8U0Xs 7+MOn4gcUHn8RBgHGjL2q943N7nYrh5VAPRbVjrHLMQBxFL4cC8Nh5nnDJ9kr/cHK9BV sKykpCiP1ngM3z0DAjNkoCWJTYupzVXH3HB6L+l0qXVEjk5A9T8S3PHYoTYJx1oQKQ29 LRJPgVAJjwciW9ivn6dhpG928da3jr37tzikxu9+WZU3wCwNamWNAA8aVVtX6ljqbyVu vhuGzKCiSOcYy+9j3qVzRZorma+gVxoyTrIlTcDBzVhUVFTNKjTU6mKmygz3jxK+1h2F Ukuw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fkvovwRj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id p15-20020adfce0f000000b0022cbf4cda62sm16209186wrn.27.2022.11.09.08.14.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Nov 2022 08:14:51 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH for-8.0 5/9] hw/intc: Convert TYPE_ARM_GICV3_COMMON to 3-phase reset Date: Wed, 9 Nov 2022 16:14:40 +0000 Message-Id: <20221109161444.3397405-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221109161444.3397405-1-peter.maydell@linaro.org> References: <20221109161444.3397405-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the TYPE_ARM_GICV3_COMMON parent class to 3-phase reset. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- hw/intc/arm_gicv3_common.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index 351843db4aa..642a8243ed4 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -450,9 +450,9 @@ static void arm_gicv3_finalize(Object *obj) g_free(s->redist_region_count); } -static void arm_gicv3_common_reset(DeviceState *dev) +static void arm_gicv3_common_reset_hold(Object *obj) { - GICv3State *s = ARM_GICV3_COMMON(dev); + GICv3State *s = ARM_GICV3_COMMON(obj); int i; for (i = 0; i < s->num_cpu; i++) { @@ -578,9 +578,10 @@ static Property arm_gicv3_common_properties[] = { static void arm_gicv3_common_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); ARMLinuxBootIfClass *albifc = ARM_LINUX_BOOT_IF_CLASS(klass); - dc->reset = arm_gicv3_common_reset; + rc->phases.hold = arm_gicv3_common_reset_hold; dc->realize = arm_gicv3_common_realize; device_class_set_props(dc, arm_gicv3_common_properties); dc->vmsd = &vmstate_gicv3; From patchwork Wed Nov 9 16:14:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 622931 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp354597pvb; Wed, 9 Nov 2022 08:16:53 -0800 (PST) X-Google-Smtp-Source: AA0mqf5PE6bGNqrkERQeOSLKNTlP3hRVJ0aqXoEBA/rngWxwj3nV1E0GVamk7ZHmmJ51Ed0Ch9vM X-Received: by 2002:ac8:7318:0:b0:3a5:9bb4:894 with SMTP id x24-20020ac87318000000b003a59bb40894mr9904020qto.316.1668010613197; Wed, 09 Nov 2022 08:16:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668010613; cv=none; d=google.com; s=arc-20160816; b=EENCK3YCYFWBg+N3A05XVvphioAgwHcJdpHrv6xvHu1y+k8CkMvrb4ABwWb/vs8goY +SmTA02/GSKI9JPCsLwVjnAL1iTCgmSHZv0Hy8b25fHQv9wo0uXrH0Q9b6c/s+bkPFJD K3ow9E/h0J0wQxIe6UwHWYM8Clj/PfeZiOHtaUpXF1YKAqT592GEqc3rVYBoqgShJrjs sk6aS/YcJpO2ymV4H59Vg2ICxFkn3BPPEnR/ICo4ax6yEjTr9+ejmQobss2V9sO56ATH d9F3CaJ7C2MyI98AcC9uXpSYvMJYexuD1gALIOTIwMFBX8L6CZfGXRRmBkBBpu+jw7BI SMeA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=ca3S+uVbBJTLXkcc5so3RKCbYfZ7cQitrV38GQNpu6s=; b=1KX0omDdx7MvKuzO5FIP9Y6DsN0ADifFxkBYm7GXMjMB7oYjQsPkfw9WTAH5u/O23k aCb4jjrnRlU+3jIS+hrtIqKg5XQozxqh1qyoatnuG90/IRWH54pWnEfqnxtTdum/doTX RFItEVRXEZPF4RRiLZ0ETz95B57dZc1HSVdABhH0tlZF3GxTk+SbjRaRVMcxCT37QdbZ x57oHK0YgAJsM7eKqIEnyg5wZaxUwsmMVOR5zofP0zKGPNY0Ax0kminhdU0EqQrDbICx W9kFrWS9vVHEdBjd9rQhj7aFiY77bMm5wQmtY2Sq8+2c51iGuX0pDDjSDdern7xHIOTQ DXtQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UGq0qXcb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id p15-20020adfce0f000000b0022cbf4cda62sm16209186wrn.27.2022.11.09.08.14.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Nov 2022 08:14:52 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH for-8.0 6/9] hw/intc: Convert TYPE_KVM_ARM_GICV3 to 3-phase reset Date: Wed, 9 Nov 2022 16:14:41 +0000 Message-Id: <20221109161444.3397405-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221109161444.3397405-1-peter.maydell@linaro.org> References: <20221109161444.3397405-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the TYPE_KVM_ARM_GICV3 device to 3-phase reset. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- hw/intc/arm_gicv3_kvm.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c index 3ca643ecba4..72ad916d3db 100644 --- a/hw/intc/arm_gicv3_kvm.c +++ b/hw/intc/arm_gicv3_kvm.c @@ -77,7 +77,7 @@ DECLARE_OBJ_CHECKERS(GICv3State, KVMARMGICv3Class, struct KVMARMGICv3Class { ARMGICv3CommonClass parent_class; DeviceRealize parent_realize; - void (*parent_reset)(DeviceState *dev); + ResettablePhases parent_phases; }; static void kvm_arm_gicv3_set_irq(void *opaque, int irq, int level) @@ -703,14 +703,16 @@ static void arm_gicv3_icc_reset(CPUARMState *env, const ARMCPRegInfo *ri) c->icc_ctlr_el1[GICV3_S] = c->icc_ctlr_el1[GICV3_NS]; } -static void kvm_arm_gicv3_reset(DeviceState *dev) +static void kvm_arm_gicv3_reset_hold(Object *obj) { - GICv3State *s = ARM_GICV3_COMMON(dev); + GICv3State *s = ARM_GICV3_COMMON(obj); KVMARMGICv3Class *kgc = KVM_ARM_GICV3_GET_CLASS(s); DPRINTF("Reset\n"); - kgc->parent_reset(dev); + if (kgc->parent_phases.hold) { + kgc->parent_phases.hold(obj); + } if (s->migration_blocker) { DPRINTF("Cannot put kernel gic state, no kernel interface\n"); @@ -890,6 +892,7 @@ static void kvm_arm_gicv3_realize(DeviceState *dev, Error **errp) static void kvm_arm_gicv3_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); ARMGICv3CommonClass *agcc = ARM_GICV3_COMMON_CLASS(klass); KVMARMGICv3Class *kgc = KVM_ARM_GICV3_CLASS(klass); @@ -897,7 +900,8 @@ static void kvm_arm_gicv3_class_init(ObjectClass *klass, void *data) agcc->post_load = kvm_arm_gicv3_put; device_class_set_parent_realize(dc, kvm_arm_gicv3_realize, &kgc->parent_realize); - device_class_set_parent_reset(dc, kvm_arm_gicv3_reset, &kgc->parent_reset); + resettable_class_set_parent_phases(rc, NULL, kvm_arm_gicv3_reset_hold, NULL, + &kgc->parent_phases); } static const TypeInfo kvm_arm_gicv3_info = { From patchwork Wed Nov 9 16:14:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 622930 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp354340pvb; Wed, 9 Nov 2022 08:16:31 -0800 (PST) X-Google-Smtp-Source: AMsMyM6OJxrgoxVQQW74/yf82tYWiLORz4bfHVnUMsR/vAJLmAJC0thRfCqlRiB0J0MPOJsDbZfU X-Received: by 2002:a05:620a:f11:b0:6cf:be4e:e953 with SMTP id v17-20020a05620a0f1100b006cfbe4ee953mr44028141qkl.437.1668010591806; Wed, 09 Nov 2022 08:16:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668010591; cv=none; d=google.com; s=arc-20160816; b=XQmVm4Xv4nqO+2+laiJyZqYOpuY4fqWoJrRX0CUDmiCNNwpG9CWBpyHcAvw7dDqJsM RJYV1HDXpmjoPk0G+K9cF8YGPdOe0UNomOfdQ/ZpgnRylLP5cicKcJgNcOLi6vaxx5uO WfmzKfraRYAnzE0w7QPkzHxueSoAOhjRY1Ah5f4phDu73NwbKWqL5TKcU81dsU+4fJRp D5OVdvj94Kqk2fgNL+pAe06VbRnGqO01pYr8rfmr82yVmUvDuRtqvyJcwJtfHm3kg+JH 2Mjc92ijuwu4QlE8fHPtI0Ov2vhpLPOL5LdsG+uXkNCSKbwvpLy83ZPmYsoJhJxW8xZt d2GA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=7mC8UF4zmF3jcxIrFTqcyevksmdmVsanaUTLeosn6Mw=; b=QvIajFQZoHTdz+5ZJun/wg3Gy9mjDBYfFvqL3CP1aVbSc4YUMV8ROEUhnswcWV9zE/ PG48EF4CjlHhX0gM4i/QTk0hT6sR7b8KHzAf+bc0Da5quSm+8k9EroixynbUVBd0zOsq mxmWgi/1mBFAiUVxYOql/8ysnLuhaqmbjggyXKQwU9OVIG6sGrzSXMG0Bjf6QmSZQkVI /G+iv7DudDmkak6gpjv5drH8ENPbhSbxDt4bph9O+8nssTyyGu90WKsYF+krRnbCHeKx Q8okgsxQR2AqDHEO3Ujg8C5kkWzRZH9Z0Hari4rqKCNSE1cl6PoKnmG/vWMAK5Fx0u40 lvyQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=C4v2Kd9z; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id p15-20020adfce0f000000b0022cbf4cda62sm16209186wrn.27.2022.11.09.08.14.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Nov 2022 08:14:53 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH for-8.0 7/9] hw/intc: Convert TYPE_ARM_GICV3_ITS_COMMON to 3-phase reset Date: Wed, 9 Nov 2022 16:14:42 +0000 Message-Id: <20221109161444.3397405-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221109161444.3397405-1-peter.maydell@linaro.org> References: <20221109161444.3397405-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the TYPE_ARM_GICV3_ITS_COMMON parent class to 3-phase reset. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- hw/intc/arm_gicv3_its_common.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/intc/arm_gicv3_its_common.c b/hw/intc/arm_gicv3_its_common.c index 90b85f1e25c..d7532a7a899 100644 --- a/hw/intc/arm_gicv3_its_common.c +++ b/hw/intc/arm_gicv3_its_common.c @@ -122,9 +122,9 @@ void gicv3_its_init_mmio(GICv3ITSState *s, const MemoryRegionOps *ops, msi_nonbroken = true; } -static void gicv3_its_common_reset(DeviceState *dev) +static void gicv3_its_common_reset_hold(Object *obj) { - GICv3ITSState *s = ARM_GICV3_ITS_COMMON(dev); + GICv3ITSState *s = ARM_GICV3_ITS_COMMON(obj); s->ctlr = 0; s->cbaser = 0; @@ -137,8 +137,9 @@ static void gicv3_its_common_reset(DeviceState *dev) static void gicv3_its_common_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); - dc->reset = gicv3_its_common_reset; + rc->phases.hold = gicv3_its_common_reset_hold; dc->vmsd = &vmstate_its; } From patchwork Wed Nov 9 16:14:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 622933 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp356015pvb; Wed, 9 Nov 2022 08:19:01 -0800 (PST) X-Google-Smtp-Source: AMsMyM4aWwAUtxQnIBnDJN5W+tHP1yVdkCnqskPgrDMvTWoDe0yhaL+Dg2mkSsslFqMnDONzB/WF X-Received: by 2002:a05:620a:1997:b0:6f7:13e7:3400 with SMTP id bm23-20020a05620a199700b006f713e73400mr44751982qkb.90.1668010741291; Wed, 09 Nov 2022 08:19:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668010741; cv=none; d=google.com; s=arc-20160816; b=uV752g1e3WarNrzgJfUrVXgY5EPfxzuWseTLbmXd1bv9ajN5eCsBb9JSqIUQ97K8LU phgHaeiNP7opBCHpkPXVyg5YxP5wYe5iT0nhpSvk1l8Zb1WGQ19SCi+g4TcmQ1+0LS5+ znGwvsxslVPbpC1ktMCdJc7NPtzsOGf5qyV2GV9qK4c0ho41UNme5BZpwibIfY3CaFUn nlCvq1V3vhpC6FcYWMbvWXfcpwngjB86M7hgg7s2V2Hki8SjhKkXnWWRP7BUTZMymWPm 29JgrO0/a4t+X2+yd1NHGWnyxsXKalWNddURBDkLgWKgDBCniPSfRPdZSEs+ldasX9b9 OBcQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=kuIn7I6CLp9VWQfNOdiiRV8ytBoQboktwZZOEvzvoPA=; b=xf+BwHUNMMYwpTk0zJn8bSEXdp14I7h4pBq4MLyqQ3LNf0u7+vtZkvfqmkA3YudqeZ kp4p3m0emjOAHflqmk7sFVERF9sK7G1VIO3pbG2lifO0DOPpaScjHZWlhx8FWEnQ10mM xGgVIRNcIJbl7SgGaq8YRIotS/jUfmsoiilkprlpG4voZqXGFe1Gq1EPzYPHdqIzVt+e xFFJmmR9LmXO1rDppsTwzulp8aOp8xgQ5OYePjNbU1aNKpjVsJ6IrOS/ZTt0Xnw4xLra X+PFAhpKsd36AP32yC7GrtwrjPs+ncd8wWhU3J3xL5JFcu/nt7894tGTyHuaNvD0DIy1 Vhgw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wfsrMWK9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id p15-20020adfce0f000000b0022cbf4cda62sm16209186wrn.27.2022.11.09.08.14.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Nov 2022 08:14:54 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH for-8.0 8/9] hw/intc: Convert TYPE_ARM_GICV3_ITS to 3-phase reset Date: Wed, 9 Nov 2022 16:14:43 +0000 Message-Id: <20221109161444.3397405-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221109161444.3397405-1-peter.maydell@linaro.org> References: <20221109161444.3397405-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the TYPE_ARM_GICV3_ITS device to 3-phase reset. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- hw/intc/arm_gicv3_its.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 2ff21ed6bbe..57c79da5c55 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -27,7 +27,7 @@ DECLARE_OBJ_CHECKERS(GICv3ITSState, GICv3ITSClass, struct GICv3ITSClass { GICv3ITSCommonClass parent_class; - void (*parent_reset)(DeviceState *dev); + ResettablePhases parent_phases; }; /* @@ -1953,12 +1953,14 @@ static void gicv3_arm_its_realize(DeviceState *dev, Error **errp) } } -static void gicv3_its_reset(DeviceState *dev) +static void gicv3_its_reset_hold(Object *obj) { - GICv3ITSState *s = ARM_GICV3_ITS_COMMON(dev); + GICv3ITSState *s = ARM_GICV3_ITS_COMMON(obj); GICv3ITSClass *c = ARM_GICV3_ITS_GET_CLASS(s); - c->parent_reset(dev); + if (c->parent_phases.hold) { + c->parent_phases.hold(obj); + } /* Quiescent bit reset to 1 */ s->ctlr = FIELD_DP32(s->ctlr, GITS_CTLR, QUIESCENT, 1); @@ -2012,12 +2014,14 @@ static Property gicv3_its_props[] = { static void gicv3_its_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); GICv3ITSClass *ic = ARM_GICV3_ITS_CLASS(klass); GICv3ITSCommonClass *icc = ARM_GICV3_ITS_COMMON_CLASS(klass); dc->realize = gicv3_arm_its_realize; device_class_set_props(dc, gicv3_its_props); - device_class_set_parent_reset(dc, gicv3_its_reset, &ic->parent_reset); + resettable_class_set_parent_phases(rc, NULL, gicv3_its_reset_hold, NULL, + &ic->parent_phases); icc->post_load = gicv3_its_post_load; } From patchwork Wed Nov 9 16:14:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 622936 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp357479pvb; Wed, 9 Nov 2022 08:21:23 -0800 (PST) X-Google-Smtp-Source: AA0mqf4blUqs5GmN6jJdS8/q5XNFdSQFshzQsWU316sMi3R/nAnsVuApm/N8COa0t3RGD54m5JMF X-Received: by 2002:ac8:5f48:0:b0:3a5:a2f7:367f with SMTP id y8-20020ac85f48000000b003a5a2f7367fmr8283218qta.491.1668010883662; Wed, 09 Nov 2022 08:21:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668010883; cv=none; d=google.com; s=arc-20160816; b=OuE9X3aYIu94s6/OViKebpBd5F8Vkh/JxTyQIEobGuCQRzBXOryWl9L16WwqCgjVul mzLRQVqxLnR6BxD0T92KJZacGdVketa/qIIzJb+qzjua57wH5oG7Mqk8/7kavp38eAlD waDwXXlknD4ZNta0y/I4it5RTm2eLfJEd4N9dwcnVjH8jbnDxS40ouTBuffiRGNgu6kl O2rzY5oKerq/XlZ3bkwzOD4Z4wFaDeTqvLcbw4ymvwhApn9NcWM8FSFwthjCp58orAtO 2a/QCg6xfRIxXmLTVR3FpE2aVTD1h5DwqRH6th6l9S/oQeQVfkegqJiqdA8RRjttYKMB bgjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=MhXy5FBRE7GB4BVHsReuiuVjoZnsxoIVvRZtpjaxie8=; b=UM6jl17Pi4P2Nz8/pNoufnUxOtLOwVLjdBpGQ/aoTQWgglFGwcgIMnX2T5KD1bwbPF hxCbDNVVNW7G++AdVy/7MD7mHob1elT24oXMNfrRyfl+3KZnQBih4zdb/t2bK/y2+roX RiDIoE4vwhqxSeA4niZVKkfobJ8qWQga5hHI6ATB/kH+7yjBRU9Zkakgou31d7mzDCTv WKE/mSDiJjC8tQ1WekwOr7mLdHPXTLGuR8SR2aDI7froW+9wPJy0Fefhb92g6aRlnY3H VlpCk7OFT45IlpWt/JfKtmwzhEjl147FpgtpiyyO7zjriJxVMkV3NO4AIIDaUjt7rhhg 7q3A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hUGj8q8O; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id p15-20020adfce0f000000b0022cbf4cda62sm16209186wrn.27.2022.11.09.08.14.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Nov 2022 08:14:55 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH for-8.0 9/9] hw/intc: Convert TYPE_KVM_ARM_ITS to 3-phase reset Date: Wed, 9 Nov 2022 16:14:44 +0000 Message-Id: <20221109161444.3397405-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221109161444.3397405-1-peter.maydell@linaro.org> References: <20221109161444.3397405-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Convert the TYPE_KVM_ARM_ITS device to 3-phase reset. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- hw/intc/arm_gicv3_its_kvm.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/hw/intc/arm_gicv3_its_kvm.c b/hw/intc/arm_gicv3_its_kvm.c index 529c7bd4946..7eda9fb86ea 100644 --- a/hw/intc/arm_gicv3_its_kvm.c +++ b/hw/intc/arm_gicv3_its_kvm.c @@ -37,7 +37,7 @@ DECLARE_OBJ_CHECKERS(GICv3ITSState, KVMARMITSClass, struct KVMARMITSClass { GICv3ITSCommonClass parent_class; - void (*parent_reset)(DeviceState *dev); + ResettablePhases parent_phases; }; @@ -197,13 +197,15 @@ static void kvm_arm_its_post_load(GICv3ITSState *s) GITS_CTLR, &s->ctlr, true, &error_abort); } -static void kvm_arm_its_reset(DeviceState *dev) +static void kvm_arm_its_reset_hold(Object *obj) { - GICv3ITSState *s = ARM_GICV3_ITS_COMMON(dev); + GICv3ITSState *s = ARM_GICV3_ITS_COMMON(obj); KVMARMITSClass *c = KVM_ARM_ITS_GET_CLASS(s); int i; - c->parent_reset(dev); + if (c->parent_phases.hold) { + c->parent_phases.hold(obj); + } if (kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL, KVM_DEV_ARM_ITS_CTRL_RESET)) { @@ -241,12 +243,14 @@ static Property kvm_arm_its_props[] = { static void kvm_arm_its_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); GICv3ITSCommonClass *icc = ARM_GICV3_ITS_COMMON_CLASS(klass); KVMARMITSClass *ic = KVM_ARM_ITS_CLASS(klass); dc->realize = kvm_arm_its_realize; device_class_set_props(dc, kvm_arm_its_props); - device_class_set_parent_reset(dc, kvm_arm_its_reset, &ic->parent_reset); + resettable_class_set_parent_phases(rc, NULL, kvm_arm_its_reset_hold, NULL, + &ic->parent_phases); icc->send_msi = kvm_its_send_msi; icc->pre_save = kvm_arm_its_pre_save; icc->post_load = kvm_arm_its_post_load;