From patchwork Fri Mar 22 08:06:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jyri Sarha X-Patchwork-Id: 160870 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp519111jan; Fri, 22 Mar 2019 01:06:39 -0700 (PDT) X-Google-Smtp-Source: APXvYqzMwyhXZrKbM62ZvMVxLTsGgtoe5GDIZ4tF7AbGgCKFksTdgMylWCyKdcdXJW8SXaiB1Nps X-Received: by 2002:a17:902:2aca:: with SMTP id j68mr8157078plb.233.1553241999731; Fri, 22 Mar 2019 01:06:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553241999; cv=none; d=google.com; s=arc-20160816; b=EUhMyyUSxkvyity6u3ENxl0NtRbCOcjWBA/PrN9dB8I77V8AfyWrvzccDBesG9w1Rb Mzg2YtWv5w7DA/aTOyMOBS5y0wZBC77671UU177TUHp8250J8+7kZxmMuJ7ydyyIOATY DEQ0Lwi5MMqiQAfmVq+CRLd0YN/3oV/zTajyNgJD1RCjxGGPfpCFMfeSDLcKPuFEMY8M WFLq3T/LqoOQUgmNdyjWZY8TheH7d4oNXr6qypZIpJyJPg+eDdi8UAaMpnLb3iMoCd4l OAsJ++9uf9K66ii+amJ26fcLPcgMJSJj5L7AekO+yRkujkTEuFJLHeJETCg1TN4nGqHo udLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=8lAyTP2FaI+yQ7DiOCK6p+kRnfn3lYWlIlhioXRUk0Q=; b=fq3Wlay3cJd4DhOvXQgNjiEmCqWyZbAX4QKmOrkvTj7a66HhFDjm/SalKMmiV/ENtz Fcl7E3ykoBfSIqUIVNySi3h8JR0JivDAhqk4fh3U7UTotOsOgkCD5nhAqWNUEPeeB5qR uKZgtEeCT8wLK1Rw5NPuUPpwjxabGG5ESfK/K/07C62FhS/5mnyDWH33ueu/hHLlFZoY emsatxak2dLGkxs1Tca7euAjRaO/SvgPKVhZxkzW49ZRaF6UNvKAOppUheTcyI8bWG6T 9xVTM+d4AeyQc8k3zzVH+s5x6aDa+v015bAY3kl7KoT8mJAoIZOyDDFpjE2NBoqMfm/i Tt/Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=niHOMSkw; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i7si6805977plb.410.2019.03.22.01.06.39; Fri, 22 Mar 2019 01:06:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=niHOMSkw; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727451AbfCVIGj (ORCPT + 7 others); Fri, 22 Mar 2019 04:06:39 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:44990 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726055AbfCVIGi (ORCPT ); Fri, 22 Mar 2019 04:06:38 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x2M86Nbx048385; Fri, 22 Mar 2019 03:06:23 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1553241983; bh=8lAyTP2FaI+yQ7DiOCK6p+kRnfn3lYWlIlhioXRUk0Q=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=niHOMSkwxGTuGbpeXgsViTlWlW3qtU7Tfb9pEVvuS6yMRUE+7qB8AWlwUSoYMs3OT OO5TW0+356JQ9HKqx4tizQ0AI2rP+BXXS9mmJxk719zWaCVGtSQKuUdAKqqn/7paLn g2QCl5PXi6ak24LHESKCmI7aPfTMqgAlhSWxK/uI= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x2M86NwT035524 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 22 Mar 2019 03:06:23 -0500 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Fri, 22 Mar 2019 03:06:21 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1713.5 via Frontend Transport; Fri, 22 Mar 2019 03:06:21 -0500 Received: from jadmar.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id x2M86GbY003094; Fri, 22 Mar 2019 03:06:19 -0500 From: Jyri Sarha To: , , CC: , , , , , , , , Subject: [PATCH v5 1/6] drm/bridge: sii902x: add input_bus_flags Date: Fri, 22 Mar 2019 10:06:10 +0200 Message-ID: <04c0665a905df954544a640536f890a14e222fa6.1553241734.git.jsarha@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Tomi Valkeinen The driver always sets InputBusFmt:EDGE to 0 (falling edge). Add drm_bridge_timings's input_bus_flags to reflect that the bridge samples on falling edges. Signed-off-by: Tomi Valkeinen Signed-off-by: Jyri Sarha Reviewed-by: Andrzej Hajda Reviewed-by: Laurent Pinchart --- drivers/gpu/drm/bridge/sii902x.c | 7 +++++++ 1 file changed, 7 insertions(+) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm/bridge/sii902x.c index bfa902013aa4..1afa000141d5 100644 --- a/drivers/gpu/drm/bridge/sii902x.c +++ b/drivers/gpu/drm/bridge/sii902x.c @@ -459,6 +459,12 @@ static int sii902x_i2c_bypass_deselect(struct i2c_mux_core *mux, u32 chan_id) return 0; } +static const struct drm_bridge_timings default_sii902x_timings = { + .input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE + | DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE + | DRM_BUS_FLAG_DE_HIGH, +}; + static int sii902x_probe(struct i2c_client *client, const struct i2c_device_id *id) { @@ -529,6 +535,7 @@ static int sii902x_probe(struct i2c_client *client, sii902x->bridge.funcs = &sii902x_bridge_funcs; sii902x->bridge.of_node = dev->of_node; + sii902x->bridge.timings = &default_sii902x_timings; drm_bridge_add(&sii902x->bridge); i2c_set_clientdata(client, sii902x); From patchwork Fri Mar 22 08:06:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jyri Sarha X-Patchwork-Id: 160872 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp519195jan; Fri, 22 Mar 2019 01:06:46 -0700 (PDT) X-Google-Smtp-Source: APXvYqxsN2XbA81A9BXPA8DiZYkJafhJBgVh0Gim4Tsat7dSTM01dAHSJZT2hmpcHlccr6CTmeTB X-Received: by 2002:a62:54c5:: with SMTP id i188mr7696788pfb.188.1553242006568; Fri, 22 Mar 2019 01:06:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553242006; cv=none; d=google.com; s=arc-20160816; b=wa1XX9dQVNHgNp2+1718pan+cJjP7cGiw50SrC7+5IKu+xPQFhF3R8tfFm+YZVZlqe vG+IGQiUCcK+igZ9+cSuH92wqo1/0bHQ19jrdv6Ux32UZ+udz4HojzabZUPub9PvEE51 zp4irJeimOiSmLqtnf511tR8uCe3CTSnvQkKxD8TRTdXheZpdQXi677eWm+Vcxi9VLl1 KqpX00UYUph8HareYDI27cqB1O1Ln324KWcpjZM12r7hephuK+nDulE8YZbNkPKe3HwE nv9C5lnKhrphxVQ7favnyKFS7FARbjjEq0wwI4KHJV+AxfBY6MuJDKgdB5hDtVBqoUTJ 0VRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=AQtv1bgNGRZbjvL9U7uoKaFfljaJ55FuLTfopsRT5U0=; b=w1kb81YmFGCetNURi90C6SHFwLmvyfxxMAZRSZBS1CCi1oVd9CmbaZ9w4G1WVilIv7 2zrJS5Tp7pevkLCDFXDe2jS+fK04aOkb+ehoNPGgE3RX/0TmFXF4IEZkbjgz8mElfwVV LF9ij0qFPwU/9LxQAgr1DmZaYVgjgA5Zog0I1QTARzFDCo76caoQ5jgAtZYg7ZX2ngn0 MVcIat9b3tAGR8lp6m0KccbhYvs1PuBsEfNS7cx1PFUDViS+AcQXCdDV8jqxs7bGpLZ1 +WAsRv0pnEJKEzXGARQH8mN0u0GmEdKdK/IJRhXI8bnNwJJx066dUgjxkFk/tso74tVQ G6Ow== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ZkHFNz8l; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i7si6805977plb.410.2019.03.22.01.06.46; Fri, 22 Mar 2019 01:06:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ZkHFNz8l; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727461AbfCVIGq (ORCPT + 7 others); Fri, 22 Mar 2019 04:06:46 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:57830 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726055AbfCVIGp (ORCPT ); Fri, 22 Mar 2019 04:06:45 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x2M86OIV018665; Fri, 22 Mar 2019 03:06:24 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1553241984; bh=AQtv1bgNGRZbjvL9U7uoKaFfljaJ55FuLTfopsRT5U0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ZkHFNz8lSyAsGzmu6iLNQ3WYeQGPZISAHJJ3G3GzH0ZsBTa08SV9x0mBDgteuJvr8 u5wvlB1QInmKAse5Do6NOECPwBGM+tty4xcvRzuZ/MmwXTb1LqMgsGkVoSFOiUpNe4 hFq/wbdMb4U6bq58ntowtXMsNQ94QSjfWRCqA2TU= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x2M86OUG125772 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 22 Mar 2019 03:06:24 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Fri, 22 Mar 2019 03:06:24 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1713.5 via Frontend Transport; Fri, 22 Mar 2019 03:06:24 -0500 Received: from jadmar.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id x2M86GbZ003094; Fri, 22 Mar 2019 03:06:22 -0500 From: Jyri Sarha To: , , CC: , , , , , , , , Subject: [PATCH v5 2/6] drm/bridge: sii902x: Set output mode to HDMI or DVI according to EDID Date: Fri, 22 Mar 2019 10:06:11 +0200 Message-ID: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Set output mode to HDMI or DVI according to EDID HDMI signature. Signed-off-by: Jyri Sarha Reviewed-by: Andrzej Hajda Reviewed-by: Laurent Pinchart --- drivers/gpu/drm/bridge/sii902x.c | 9 +++++++++ 1 file changed, 9 insertions(+) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm/bridge/sii902x.c index 1afa000141d5..f73eaa6d729a 100644 --- a/drivers/gpu/drm/bridge/sii902x.c +++ b/drivers/gpu/drm/bridge/sii902x.c @@ -180,12 +180,16 @@ static int sii902x_get_modes(struct drm_connector *connector) { struct sii902x *sii902x = connector_to_sii902x(connector); u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24; + u8 output_mode = SII902X_SYS_CTRL_OUTPUT_DVI; struct edid *edid; int num = 0, ret; edid = drm_get_edid(connector, sii902x->i2cmux->adapter[0]); drm_connector_update_edid_property(connector, edid); if (edid) { + if (drm_detect_hdmi_monitor(edid)) + output_mode = SII902X_SYS_CTRL_OUTPUT_HDMI; + num = drm_add_edid_modes(connector, edid); kfree(edid); } @@ -195,6 +199,11 @@ static int sii902x_get_modes(struct drm_connector *connector) if (ret) return ret; + ret = regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA, + SII902X_SYS_CTRL_OUTPUT_MODE, output_mode); + if (ret) + return ret; + return num; } From patchwork Fri Mar 22 08:06:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jyri Sarha X-Patchwork-Id: 160873 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp519214jan; Fri, 22 Mar 2019 01:06:47 -0700 (PDT) X-Google-Smtp-Source: APXvYqyj/Lhu9jtR1HP0rIzDgSKm01rNrlcapB+EnRW5E9GEaAYYB3GHK3SPiMQzobi76RSqDAZZ X-Received: by 2002:a62:e80f:: with SMTP id c15mr7779348pfi.93.1553242007306; Fri, 22 Mar 2019 01:06:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553242007; cv=none; d=google.com; s=arc-20160816; b=OYvQud0flSNEHf/HtFUXNchlY+FMi5kZTs/GVPQME1JCeEy3X4EzF3LpRRz8xllg5c a2Qk4v61JVtjDFoMs87f2EWKs1N+20ciI1FF1yFilWBTqTDn2NwjHsJMyvlVSzLhoA3R Hlky4My1qIRm5vWob/vFHQWSOZP3a+mBtogGMzAVtAjSyUyePsHqNqqpMTy4W6EiGD6v CN28DLt7fhEdQOgLtuIvYSB8D70pkQt6313JEHt45Oe5AHlHEeuByM/+HDVoOB+fbWGO JC1ciVoSJ4fK0K+aVMAXdwFBVbMOBTMb7p2N+TqJxRsSyvzQhToQIe6pPplC33UGU6Z4 UWmg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=TtcklV9/u/nGp3jPjWv6PktwDCKTz9ywWibne5rkceQ=; b=fH9vSoXnQT+BbHCmTTbuz5//mCkgey6IgnPIHLmc160sqwPfifCCd8IFJU7JFEmrwX taImYniVHAGfTgFkEwQWH4g+Mb8w7jx+NvIYyUTGAI5AysJ0FQrnml1LjoBqqEkMnrtr OlUq7zrKh5Ln1PrJS+des7iBL+AhSGUgPDlsw2WnKxlqM4tC2s3et3gwrjHVQ5QsIUZQ gvrCozhEn2xMcgDSLCGaVF6CnJhxv8A40ETkdwptbNqVvziOLJZdKncn/YHOXJM7+BXq ol3ZK4Fz5AGSL4RtR5Kzi2qh8w7FOfiaPNogX1TOeGtkBAe78hbQZ4uqsZ1SS0m/L1NI l87Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=kVpdHbad; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Jyri Sarha Reviewed-by: Laurent Pinchart --- Documentation/devicetree/bindings/display/bridge/sii902x.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/Documentation/devicetree/bindings/display/bridge/sii902x.txt b/Documentation/devicetree/bindings/display/bridge/sii902x.txt index 72d2dc6c3e6b..c4c1855ca654 100644 --- a/Documentation/devicetree/bindings/display/bridge/sii902x.txt +++ b/Documentation/devicetree/bindings/display/bridge/sii902x.txt @@ -5,7 +5,7 @@ Required properties: - reg: i2c address of the bridge Optional properties: - - interrupts: describe the interrupt line used to inform the host + - interrupts: describe the interrupt line used to inform the host about hotplug events. - reset-gpios: OF device-tree gpio specification for RST_N pin. From patchwork Fri Mar 22 08:06:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jyri Sarha X-Patchwork-Id: 160874 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp519274jan; Fri, 22 Mar 2019 01:06:50 -0700 (PDT) X-Google-Smtp-Source: APXvYqxUNdZhHDRTvYoCwXoSBXxeKQv4SnwrRjN6ZdJ0CkNfkuNv8SRSOHEWu/MtUyJ/u4pmtwfB X-Received: by 2002:a17:902:234b:: with SMTP id n11mr8230360plg.89.1553242010628; Fri, 22 Mar 2019 01:06:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553242010; cv=none; d=google.com; s=arc-20160816; b=01IRr3ucKsYWT7KTbJ9KeJV+Do4orgNVU7AzqwWrZVjIc7n+4xsUaYO2xRg9Ji1Xfe vCUO7Q/naU22RAAhusJ5eTMk799ixa1xatpS6bxUEdMnPBoQCSfiU2DaCg25OodBULT1 voaVVmEgjWZmY2n4cwtUaf5jzT97uJ5MG4UmB1hCOjOHC6isOvEsWasPGWT6/iUOa/2x 3zQHAhLWtEkv8AQDOqJtcmZK4rnWrq5UyCEqAEUh2Tq2gZUeiV8QhM2cU0RUu6drce15 cWXJ6/5K7YoAsAQDER318uRhYPeKMsvf+dV6AKNZbSk/xikCbIXbXRKCEru847fTH1PZ VJIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=FQO/dIwu801nLGui2ggKqQWGoH29i5ukfqwyG9hwtn8=; b=bYRqzokEm6mqZ0NdRoAKrDSE3u07vS6+9cF1ThICZQtXxFVVKZMq/UXe3CyZH8z9c9 3KcfgsMwkcqtvb+S/O5uRVhA+6miVorp6DgawPaz9Pv66WmQDqClpOvv4RnW9AOcjRh7 PCIkI9bJN5WfouCmcR0/1wuEUMibHBQo47Jiofw62TZQF34ZFLsMHwSYbIXtcOERdBfp yJfR3sG0H33uS6M3OjQVJf224PKrEaS8reXdU7HBdstsUYjTSYzWI0mzt3GTUSxwwmir 5lAJOXWlckeutgwsKJPsmcMNytSbfVH+t3n9wUAshvO7gTyG33a6kjl4Ob2Apu1IbvfP 7nxQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=eLLHuEsZ; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i7si6805977plb.410.2019.03.22.01.06.50; Fri, 22 Mar 2019 01:06:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=eLLHuEsZ; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727558AbfCVIGu (ORCPT + 7 others); Fri, 22 Mar 2019 04:06:50 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:45020 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727457AbfCVIGt (ORCPT ); Fri, 22 Mar 2019 04:06:49 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x2M86Yf0048478; Fri, 22 Mar 2019 03:06:34 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1553241994; bh=FQO/dIwu801nLGui2ggKqQWGoH29i5ukfqwyG9hwtn8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=eLLHuEsZiOyrcHwhyooCNqNwXxI8ae2LSOpRC6M1jGYP5H9hWgBY/W/LClch6odKe byTkutFLl5Jw7SXn6aVDb4e4gOvHO23Z5iSDwuc6uRbspf44GbkSDA/JfXQb5tAKV2 LIMUBh5QG2mnH5W+DKlUcgWU2EJ9D8RhZT0Vs3FY= Received: from DFLE101.ent.ti.com (dfle101.ent.ti.com [10.64.6.22]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x2M86YmT024421 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 22 Mar 2019 03:06:34 -0500 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Fri, 22 Mar 2019 03:06:32 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1713.5 via Frontend Transport; Fri, 22 Mar 2019 03:06:32 -0500 Received: from jadmar.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id x2M86Gbc003094; Fri, 22 Mar 2019 03:06:30 -0500 From: Jyri Sarha To: , , CC: , , , , , , , , Subject: [PATCH v5 5/6] dt-bindings: display: sii902x: Add HDMI audio bindings Date: Fri, 22 Mar 2019 10:06:14 +0200 Message-ID: <1013f1f5383bafff4ca345ac223719a9815405b2.1553241734.git.jsarha@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The sii902x chip family supports also HDMI audio. Add binding for describing the necessary i2s and mclk wiring for it. Signed-off-by: Jyri Sarha --- .../bindings/display/bridge/sii902x.txt | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/Documentation/devicetree/bindings/display/bridge/sii902x.txt b/Documentation/devicetree/bindings/display/bridge/sii902x.txt index c4c1855ca654..e78d069da439 100644 --- a/Documentation/devicetree/bindings/display/bridge/sii902x.txt +++ b/Documentation/devicetree/bindings/display/bridge/sii902x.txt @@ -9,6 +9,33 @@ Optional properties: about hotplug events. - reset-gpios: OF device-tree gpio specification for RST_N pin. + HDMI audio properties: + - sil,i2s-data-lanes: Array of up to 4 integers with values of 0-3 + Each integer indicates which i2s pin is connected to which + audio fifo. The first integer selects i2s audio pin for the + first audio fifo#0 (HDMI channels 1&2), second for fifo#1 + (HDMI channels 3&4), and so on. There is 4 fifos and 4 i2s + pins (SD0 - SD3). Any i2s pin can be connected to any fifo, + but there can be no gaps. E.g. an i2s pin must be mapped to + fifo#0 and fifo#1 before mapping a channel to fifo#2. + I2S HDMI audio is configured only if this property is found. + - clocks: phandle and clock specifier for each clock listed in + the clock-names property + - clock-names: "mclk" + Describes SII902x MCLK input. MCLK is used to produce + HDMI audio CTS values. This property is required if + "i2s-data-lanes"-property is present. This property follows + Documentation/devicetree/bindings/clock/clock-bindings.txt + consumer binding. + + If HDMI audio is configured the sii902x device becomes an ASoC + codec component, that can be used in configuring full audio + devices with ASoC simple-card or audio-graph-card. See their + binding documents on how to describe how the sii902x device is + connected to the rest of the audio system: + Documentation/devicetree/bindings/sound/simple-card.txt + Documentation/devicetree/bindings/sound/audio-graph-card.txt + Optional subnodes: - video input: this subnode can contain a video input port node to connect the bridge to a display controller output (See this @@ -21,6 +48,12 @@ Example: compatible = "sil,sii9022"; reg = <0x39>; reset-gpios = <&pioA 1 0>; + + #sound-dai-cells = <0>; + i2s-data-lanes = < 0 1 2 >; + clocks = <&mclk>; + clock-names = "mclk"; + ports { #address-cells = <1>; #size-cells = <0>; From patchwork Fri Mar 22 08:06:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jyri Sarha X-Patchwork-Id: 160875 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp519332jan; Fri, 22 Mar 2019 01:06:54 -0700 (PDT) X-Google-Smtp-Source: APXvYqx0tPY92UAcEiB9c7VGzYR8x1F8dqP1SuhGABTX1XnD8j7u6KQ6mcQysuOm8lxiAr7cSbKP X-Received: by 2002:a17:902:234b:: with SMTP id n11mr8230653plg.89.1553242014638; Fri, 22 Mar 2019 01:06:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553242014; cv=none; d=google.com; s=arc-20160816; b=bKi1gqwmhi5xxbyiUWz/feAIVDKBMp7Qa1uK3pdiG3SkVZavysIsnbbiEVbL1E3QlB TajiY6mOt4iaA6un6qAa5uT6cn/iILrcaVihpAZkCHntikrHNn0S6KxmSsPAvq3oqTXx +Himn2+iPeoXKGDFzXloW2GjxTSJK3UQSUy3czqss78+c1T0M6P5Rf8+1hg7bdq+XNKl rhXyVPQ8Jm2mBfxyoipcWGkyhZKSmu6lUuC358b4pXrK5VZMtvJ66yDRP9FQicLSh4QB 8pmQBIu323wXdbwKfcXDlJbVcXrV9y6G54vLeZD94o2hHcl2v5+cozUY67iCB44dYy+E 8IiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=BQ/vyu+PKrqir0ObC0+08J1oa1iwqReG5o4REG6C8OM=; b=UKWYM9kWTRn2KYIIAqnc9UP0XSZHQhkEpN44VH0qWiUVNBYOG3GQsSpRs9qt4oqWf9 jIKOKAcqjqmeSr1RcUMkXaWqzlYTcDkh23IQedcW+KxoJmm8fUBBQ6Nxes9gbPR2gpn/ nLzD5CW1YBZ3kz+mJMvpNHNQK2fSWihME09FFacfjIM/A1MJbQi81GHVdFds3+svjo0G oeFOlWD/j9ugP4Jwg1ruDmlnbGU6fCstgFzagHElgSgMlqN1Ev945jtKIlovIR1k6n6o XheFFQPsDD32hUX5Bcieb5L578KRKknWNjyX/T3S+EV8ZR+Sk1/BKbvd9UKGRNL4bfEs S1oA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=SVkFMvE2; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i7si6805977plb.410.2019.03.22.01.06.54; Fri, 22 Mar 2019 01:06:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=SVkFMvE2; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727591AbfCVIGy (ORCPT + 7 others); Fri, 22 Mar 2019 04:06:54 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:57852 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727457AbfCVIGx (ORCPT ); Fri, 22 Mar 2019 04:06:53 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x2M86bTZ018769; Fri, 22 Mar 2019 03:06:37 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1553241997; bh=BQ/vyu+PKrqir0ObC0+08J1oa1iwqReG5o4REG6C8OM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=SVkFMvE2FmonTqO8isj/MkE+2xIQoHY9O2HcwljCwE/uNtT17UVX2qESoRCuEFrin XLd3DjYoUxCfVhK5mswxm1brtbA6iAHuEU9Rghe0cP6areOzT16BJ7QOPh6/TfMv15 S/HulAn7qb3MXn6rCLJjSqzi+bNI1SueMEzz+U9k= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x2M86bPE024462 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 22 Mar 2019 03:06:37 -0500 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Fri, 22 Mar 2019 03:06:35 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1713.5 via Frontend Transport; Fri, 22 Mar 2019 03:06:35 -0500 Received: from jadmar.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id x2M86Gbd003094; Fri, 22 Mar 2019 03:06:32 -0500 From: Jyri Sarha To: , , CC: , , , , , , , , Subject: [PATCH v5 6/6] drm/bridge: sii902x: Implement HDMI audio support Date: Fri, 22 Mar 2019 10:06:15 +0200 Message-ID: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Implement HDMI audio support by using ASoC HDMI codec. The commit implements the necessary callbacks and configuration for the HDMI codec and registers a virtual platform device for the codec to attach. Signed-off-by: Jyri Sarha --- drivers/gpu/drm/bridge/sii902x.c | 459 ++++++++++++++++++++++++++++++- 1 file changed, 453 insertions(+), 6 deletions(-) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm/bridge/sii902x.c index 358cf81c5ea4..cb12e264111d 100644 --- a/drivers/gpu/drm/bridge/sii902x.c +++ b/drivers/gpu/drm/bridge/sii902x.c @@ -27,12 +27,15 @@ #include #include #include +#include #include #include #include #include +#include + #define SII902X_TPI_VIDEO_DATA 0x0 #define SII902X_TPI_PIXEL_REPETITION 0x8 @@ -74,6 +77,77 @@ #define SII902X_AVI_POWER_STATE_MSK GENMASK(1, 0) #define SII902X_AVI_POWER_STATE_D(l) ((l) & SII902X_AVI_POWER_STATE_MSK) +/* Audio */ +#define SII902X_TPI_I2S_ENABLE_MAPPING_REG 0x1f +#define SII902X_TPI_I2S_CONFIG_FIFO0 (0 << 0) +#define SII902X_TPI_I2S_CONFIG_FIFO1 (1 << 0) +#define SII902X_TPI_I2S_CONFIG_FIFO2 (2 << 0) +#define SII902X_TPI_I2S_CONFIG_FIFO3 (3 << 0) +#define SII902X_TPI_I2S_LEFT_RIGHT_SWAP (1 << 2) +#define SII902X_TPI_I2S_AUTO_DOWNSAMPLE (1 << 3) +#define SII902X_TPI_I2S_SELECT_SD0 (0 << 4) +#define SII902X_TPI_I2S_SELECT_SD1 (1 << 4) +#define SII902X_TPI_I2S_SELECT_SD2 (2 << 4) +#define SII902X_TPI_I2S_SELECT_SD3 (3 << 4) +#define SII902X_TPI_I2S_FIFO_ENABLE (1 << 7) + +#define SII902X_TPI_I2S_INPUT_CONFIG_REG 0x20 +#define SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES (0 << 0) +#define SII902X_TPI_I2S_FIRST_BIT_SHIFT_NO (1 << 0) +#define SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST (0 << 1) +#define SII902X_TPI_I2S_SD_DIRECTION_LSB_FIRST (1 << 1) +#define SII902X_TPI_I2S_SD_JUSTIFY_LEFT (0 << 2) +#define SII902X_TPI_I2S_SD_JUSTIFY_RIGHT (1 << 2) +#define SII902X_TPI_I2S_WS_POLARITY_LOW (0 << 3) +#define SII902X_TPI_I2S_WS_POLARITY_HIGH (1 << 3) +#define SII902X_TPI_I2S_MCLK_MULTIPLIER_128 (0 << 4) +#define SII902X_TPI_I2S_MCLK_MULTIPLIER_256 (1 << 4) +#define SII902X_TPI_I2S_MCLK_MULTIPLIER_384 (2 << 4) +#define SII902X_TPI_I2S_MCLK_MULTIPLIER_512 (3 << 4) +#define SII902X_TPI_I2S_MCLK_MULTIPLIER_768 (4 << 4) +#define SII902X_TPI_I2S_MCLK_MULTIPLIER_1024 (5 << 4) +#define SII902X_TPI_I2S_MCLK_MULTIPLIER_1152 (6 << 4) +#define SII902X_TPI_I2S_MCLK_MULTIPLIER_192 (7 << 4) +#define SII902X_TPI_I2S_SCK_EDGE_FALLING (0 << 7) +#define SII902X_TPI_I2S_SCK_EDGE_RISING (1 << 7) + +#define SII902X_TPI_I2S_STRM_HDR_BASE 0x21 +#define SII902X_TPI_I2S_STRM_HDR_SIZE 5 + +#define SII902X_TPI_AUDIO_CONFIG_BYTE2_REG 0x26 +#define SII902X_TPI_AUDIO_CODING_STREAM_HEADER (0 << 0) +#define SII902X_TPI_AUDIO_CODING_PCM (1 << 0) +#define SII902X_TPI_AUDIO_CODING_AC3 (2 << 0) +#define SII902X_TPI_AUDIO_CODING_MPEG1 (3 << 0) +#define SII902X_TPI_AUDIO_CODING_MP3 (4 << 0) +#define SII902X_TPI_AUDIO_CODING_MPEG2 (5 << 0) +#define SII902X_TPI_AUDIO_CODING_AAC (6 << 0) +#define SII902X_TPI_AUDIO_CODING_DTS (7 << 0) +#define SII902X_TPI_AUDIO_CODING_ATRAC (8 << 0) +#define SII902X_TPI_AUDIO_MUTE_DISABLE (0 << 4) +#define SII902X_TPI_AUDIO_MUTE_ENABLE (1 << 4) +#define SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS (0 << 5) +#define SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS (1 << 5) +#define SII902X_TPI_AUDIO_INTERFACE_DISABLE (0 << 6) +#define SII902X_TPI_AUDIO_INTERFACE_SPDIF (1 << 6) +#define SII902X_TPI_AUDIO_INTERFACE_I2S (2 << 6) + +#define SII902X_TPI_AUDIO_CONFIG_BYTE3_REG 0x27 +#define SII902X_TPI_AUDIO_FREQ_STREAM (0 << 3) +#define SII902X_TPI_AUDIO_FREQ_32KHZ (1 << 3) +#define SII902X_TPI_AUDIO_FREQ_44KHZ (2 << 3) +#define SII902X_TPI_AUDIO_FREQ_48KHZ (3 << 3) +#define SII902X_TPI_AUDIO_FREQ_88KHZ (4 << 3) +#define SII902X_TPI_AUDIO_FREQ_96KHZ (5 << 3) +#define SII902X_TPI_AUDIO_FREQ_176KHZ (6 << 3) +#define SII902X_TPI_AUDIO_FREQ_192KHZ (7 << 3) +#define SII902X_TPI_AUDIO_SAMPLE_SIZE_STREAM (0 << 6) +#define SII902X_TPI_AUDIO_SAMPLE_SIZE_16 (1 << 6) +#define SII902X_TPI_AUDIO_SAMPLE_SIZE_20 (2 << 6) +#define SII902X_TPI_AUDIO_SAMPLE_SIZE_24 (3 << 6) + +#define SII902X_TPI_AUDIO_CONFIG_BYTE4_REG 0x28 + #define SII902X_INT_ENABLE 0x3c #define SII902X_INT_STATUS 0x3d #define SII902X_HOTPLUG_EVENT BIT(0) @@ -81,6 +155,16 @@ #define SII902X_REG_TPI_RQB 0xc7 +/* Indirect internal register access */ +#define SII902X_IND_SET_PAGE 0xbc +#define SII902X_IND_OFFSET 0xbd +#define SII902X_IND_VALUE 0xbe + +#define SII902X_TPI_MISC_INFOFRAME_BASE 0xbf +#define SII902X_TPI_MISC_INFOFRAME_END 0xde +#define SII902X_TPI_MISC_INFOFRAME_SIZE \ + (SII902X_TPI_MISC_INFOFRAME_END - SII902X_TPI_MISC_INFOFRAME_BASE) + #define SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS 500 struct sii902x { @@ -90,6 +174,16 @@ struct sii902x { struct drm_connector connector; struct gpio_desc *reset_gpio; struct i2c_mux_core *i2cmux; + /* + * Mutex protects audio and video functions from interfering + * each other, by keeping their i2c command sequences atomic. + */ + struct mutex mutex; + struct sii902x_audio { + struct platform_device *pdev; + struct clk *mclk; + u32 i2s_fifo_sequence[4]; + } audio; }; static int sii902x_read_unlocked(struct i2c_client *i2c, u8 reg, u8 *val) @@ -161,8 +255,12 @@ sii902x_connector_detect(struct drm_connector *connector, bool force) struct sii902x *sii902x = connector_to_sii902x(connector); unsigned int status; + mutex_lock(&sii902x->mutex); + regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status); + mutex_unlock(&sii902x->mutex); + return (status & SII902X_PLUGGED_STATUS) ? connector_status_connected : connector_status_disconnected; } @@ -184,6 +282,8 @@ static int sii902x_get_modes(struct drm_connector *connector) struct edid *edid; int num = 0, ret; + mutex_lock(&sii902x->mutex); + edid = drm_get_edid(connector, sii902x->i2cmux->adapter[0]); drm_connector_update_edid_property(connector, edid); if (edid) { @@ -197,14 +297,19 @@ static int sii902x_get_modes(struct drm_connector *connector) ret = drm_display_info_set_bus_formats(&connector->display_info, &bus_format, 1); if (ret) - return ret; + goto error_out; ret = regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA, SII902X_SYS_CTRL_OUTPUT_MODE, output_mode); if (ret) - return ret; + goto error_out; + + ret = num; + +error_out: + mutex_unlock(&sii902x->mutex); - return num; + return ret; } static enum drm_mode_status sii902x_mode_valid(struct drm_connector *connector, @@ -224,20 +329,28 @@ static void sii902x_bridge_disable(struct drm_bridge *bridge) { struct sii902x *sii902x = bridge_to_sii902x(bridge); + mutex_lock(&sii902x->mutex); + regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA, SII902X_SYS_CTRL_PWR_DWN, SII902X_SYS_CTRL_PWR_DWN); + + mutex_unlock(&sii902x->mutex); } static void sii902x_bridge_enable(struct drm_bridge *bridge) { struct sii902x *sii902x = bridge_to_sii902x(bridge); + mutex_lock(&sii902x->mutex); + regmap_update_bits(sii902x->regmap, SII902X_PWR_STATE_CTRL, SII902X_AVI_POWER_STATE_MSK, SII902X_AVI_POWER_STATE_D(0)); regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA, SII902X_SYS_CTRL_PWR_DWN, 0); + + mutex_unlock(&sii902x->mutex); } static void sii902x_bridge_mode_set(struct drm_bridge *bridge, @@ -264,26 +377,31 @@ static void sii902x_bridge_mode_set(struct drm_bridge *bridge, buf[9] = SII902X_TPI_AVI_INPUT_RANGE_AUTO | SII902X_TPI_AVI_INPUT_COLORSPACE_RGB; + mutex_lock(&sii902x->mutex); + ret = regmap_bulk_write(regmap, SII902X_TPI_VIDEO_DATA, buf, 10); if (ret) - return; + goto out; ret = drm_hdmi_avi_infoframe_from_display_mode(&frame, adj, false); if (ret < 0) { DRM_ERROR("couldn't fill AVI infoframe\n"); - return; + goto out; } ret = hdmi_avi_infoframe_pack(&frame, buf, sizeof(buf)); if (ret < 0) { DRM_ERROR("failed to pack AVI infoframe: %d\n", ret); - return; + goto out; } /* Do not send the infoframe header, but keep the CRC field. */ regmap_bulk_write(regmap, SII902X_TPI_AVI_INFOFRAME, buf + HDMI_INFOFRAME_HEADER_SIZE - 1, HDMI_AVI_INFOFRAME_SIZE + 1); + +out: + mutex_unlock(&sii902x->mutex); } static int sii902x_bridge_attach(struct drm_bridge *bridge) @@ -324,6 +442,330 @@ static const struct drm_bridge_funcs sii902x_bridge_funcs = { .enable = sii902x_bridge_enable, }; +static int sii902x_mute(struct sii902x *sii902x, bool mute) +{ + struct device *dev = &sii902x->i2c->dev; + unsigned int val = mute ? SII902X_TPI_AUDIO_MUTE_ENABLE : + SII902X_TPI_AUDIO_MUTE_DISABLE; + + dev_dbg(dev, "%s: %s\n", __func__, mute ? "Muted" : "Unmuted"); + + return regmap_update_bits(sii902x->regmap, + SII902X_TPI_AUDIO_CONFIG_BYTE2_REG, + SII902X_TPI_AUDIO_MUTE_ENABLE, val); +} + +static const unsigned int sii902x_mclk_div_table[] = { + 128, 256, 384, 512, 768, 1024, 1152, 192 }; + +static int sii902x_select_mclk_div(u8 *i2s_config_reg, unsigned int rate, + unsigned int mclk) +{ + unsigned int div = mclk / rate; + int distance = 100000; + u8 i, nearest = 0; + + for (i = 0; i < ARRAY_SIZE(sii902x_mclk_div_table); i++) { + unsigned int d = abs(div - sii902x_mclk_div_table[i]); + + if (d >= distance) + continue; + + nearest = i; + distance = d; + if (d == 0) + break; + } + + *i2s_config_reg |= nearest << 4; + + if (distance != 0) + return sii902x_mclk_div_table[nearest]; + + return 0; +} + +static const struct sii902x_sample_freq { + u32 freq; + u8 val; +} sii902x_sample_freq[] = { + { .freq = 32000, .val = SII902X_TPI_AUDIO_FREQ_32KHZ }, + { .freq = 44000, .val = SII902X_TPI_AUDIO_FREQ_44KHZ }, + { .freq = 48000, .val = SII902X_TPI_AUDIO_FREQ_48KHZ }, + { .freq = 88000, .val = SII902X_TPI_AUDIO_FREQ_88KHZ }, + { .freq = 96000, .val = SII902X_TPI_AUDIO_FREQ_96KHZ }, + { .freq = 176000, .val = SII902X_TPI_AUDIO_FREQ_176KHZ }, + { .freq = 192000, .val = SII902X_TPI_AUDIO_FREQ_192KHZ }, +}; + +static int sii902x_audio_hw_params(struct device *dev, void *data, + struct hdmi_codec_daifmt *daifmt, + struct hdmi_codec_params *params) +{ + struct sii902x *sii902x = dev_get_drvdata(dev); + u8 i2s_config_reg = SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST; + u8 config_byte2_reg = (SII902X_TPI_AUDIO_INTERFACE_I2S | + SII902X_TPI_AUDIO_MUTE_ENABLE | + SII902X_TPI_AUDIO_CODING_PCM); + u8 config_byte3_reg = 0; + u8 infoframe_buf[HDMI_INFOFRAME_SIZE(AUDIO)]; + unsigned long mclk_rate; + int i, ret; + + if (daifmt->bit_clk_master || daifmt->frame_clk_master) { + dev_dbg(dev, "%s: I2S master mode not supported\n", __func__); + return -EINVAL; + } + + switch (daifmt->fmt) { + case HDMI_I2S: + i2s_config_reg |= SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES | + SII902X_TPI_I2S_SD_JUSTIFY_LEFT; + break; + case HDMI_RIGHT_J: + i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_RIGHT; + break; + case HDMI_LEFT_J: + i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_LEFT; + break; + default: + dev_dbg(dev, "%s: Unsupported i2s format %u\n", __func__, + daifmt->fmt); + return -EINVAL; + } + + if (daifmt->bit_clk_inv) + i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_FALLING; + else + i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_RISING; + + if (daifmt->frame_clk_inv) + i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_LOW; + else + i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_HIGH; + + if (params->channels > 2) + config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS; + else + config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS; + + switch (params->sample_width) { + case 16: + config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_16; + break; + case 20: + config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_20; + break; + case 24: + case 32: + config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_24; + break; + default: + dev_err(dev, "%s: Unsupported sample width %u\n", __func__, + params->sample_width); + return -EINVAL; + } + + for (i = 0; i < ARRAY_SIZE(sii902x_sample_freq); i++) { + if (params->sample_rate == sii902x_sample_freq[i].freq) { + config_byte3_reg |= sii902x_sample_freq[i].val; + break; + } + } + + ret = clk_prepare_enable(sii902x->audio.mclk); + if (ret) { + dev_err(dev, "Enabling mclk failed: %d\n", ret); + return ret; + } + + mclk_rate = clk_get_rate(sii902x->audio.mclk); + + ret = sii902x_select_mclk_div(&i2s_config_reg, params->sample_rate, + mclk_rate); + if (ret) + dev_dbg(dev, "Inaccurate reference clock (%ld/%d != %u)\n", + mclk_rate, ret, params->sample_rate); + + mutex_lock(&sii902x->mutex); + + ret = regmap_write(sii902x->regmap, + SII902X_TPI_AUDIO_CONFIG_BYTE2_REG, + config_byte2_reg); + if (ret < 0) + goto out; + + ret = regmap_write(sii902x->regmap, SII902X_TPI_I2S_INPUT_CONFIG_REG, + i2s_config_reg); + if (ret) + goto out; + + for (i = 0; sii902x->audio.i2s_fifo_sequence[i] && + i < ARRAY_SIZE(sii902x->audio.i2s_fifo_sequence); i++) + regmap_write(sii902x->regmap, + SII902X_TPI_I2S_ENABLE_MAPPING_REG, + sii902x->audio.i2s_fifo_sequence[i]); + + ret = regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE3_REG, + config_byte3_reg); + if (ret) + goto out; + + ret = regmap_bulk_write(sii902x->regmap, SII902X_TPI_I2S_STRM_HDR_BASE, + params->iec.status, + min((size_t) SII902X_TPI_I2S_STRM_HDR_SIZE, + sizeof(params->iec.status))); + if (ret) + goto out; + + ret = hdmi_audio_infoframe_pack(¶ms->cea, infoframe_buf, + sizeof(infoframe_buf)); + if (ret < 0) { + dev_err(dev, "%s: Failed to pack audio infoframe: %d\n", + __func__, ret); + goto out; + } + + ret = regmap_bulk_write(sii902x->regmap, + SII902X_TPI_MISC_INFOFRAME_BASE, + infoframe_buf, + min(ret, SII902X_TPI_MISC_INFOFRAME_SIZE)); + if (ret) + goto out; + + /* Decode Level 0 Packets */ + ret = regmap_write(sii902x->regmap, SII902X_IND_SET_PAGE, 0x02); + if (ret) + goto out; + + ret = regmap_write(sii902x->regmap, SII902X_IND_OFFSET, 0x24); + if (ret) + goto out; + + ret = regmap_write(sii902x->regmap, SII902X_IND_VALUE, 0x02); + if (ret) + goto out; + + dev_dbg(dev, "%s: hdmi audio enabled\n", __func__); +out: + mutex_unlock(&sii902x->mutex); + + if (ret) { + clk_disable_unprepare(sii902x->audio.mclk); + dev_err(dev, "%s: hdmi audio enable failed: %d\n", __func__, + ret); + } + + return ret; +} + +static void sii902x_audio_shutdown(struct device *dev, void *data) +{ + struct sii902x *sii902x = dev_get_drvdata(dev); + + mutex_lock(&sii902x->mutex); + + regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE2_REG, + SII902X_TPI_AUDIO_INTERFACE_DISABLE); + + mutex_unlock(&sii902x->mutex); + + clk_disable_unprepare(sii902x->audio.mclk); +} + +int sii902x_audio_digital_mute(struct device *dev, void *data, bool enable) +{ + struct sii902x *sii902x = dev_get_drvdata(dev); + + mutex_lock(&sii902x->mutex); + + sii902x_mute(sii902x, enable); + + mutex_unlock(&sii902x->mutex); + + return 0; +} + +static int sii902x_audio_get_eld(struct device *dev, void *data, + uint8_t *buf, size_t len) +{ + struct sii902x *sii902x = dev_get_drvdata(dev); + + mutex_lock(&sii902x->mutex); + + memcpy(buf, sii902x->connector.eld, + min(sizeof(sii902x->connector.eld), len)); + + mutex_unlock(&sii902x->mutex); + + return 0; +} + +static const struct hdmi_codec_ops sii902x_audio_codec_ops = { + .hw_params = sii902x_audio_hw_params, + .audio_shutdown = sii902x_audio_shutdown, + .digital_mute = sii902x_audio_digital_mute, + .get_eld = sii902x_audio_get_eld, +}; + +static int sii902x_audio_codec_init(struct sii902x *sii902x, + struct device *dev) +{ + static const u8 audio_fifo_id[] = { + SII902X_TPI_I2S_CONFIG_FIFO0, + SII902X_TPI_I2S_CONFIG_FIFO1, + SII902X_TPI_I2S_CONFIG_FIFO2, + SII902X_TPI_I2S_CONFIG_FIFO3, + }; + static const u8 i2s_lane_id[] = { + SII902X_TPI_I2S_SELECT_SD0, + SII902X_TPI_I2S_SELECT_SD1, + SII902X_TPI_I2S_SELECT_SD2, + SII902X_TPI_I2S_SELECT_SD3, + }; + struct hdmi_codec_pdata codec_data = { + .ops = &sii902x_audio_codec_ops, + .i2s = 1, /* Only i2s support for now. */ + .spdif = 0, + .max_i2s_channels = 0, + }; + u8 lanes[4]; + u32 num_lanes, i; + + num_lanes = of_property_read_variable_u8_array(dev->of_node, + "sil,i2s-data-lanes", + lanes, 1, + ARRAY_SIZE(lanes)); + if (num_lanes < 0) { + if (num_lanes == -EINVAL) + dev_dbg(dev, + "%s: No \"sil,i2s-data-lanes\", no audio\n", + __func__); + else + dev_err(dev, + "%s: Error gettin \"sil,i2s-data-lanes\": %d\n", + __func__, num_lanes); + return 0; + } + codec_data.max_i2s_channels = 2 * num_lanes; + + for (i = 0; i < num_lanes; i++) + sii902x->audio.i2s_fifo_sequence[i] |= audio_fifo_id[i] | + i2s_lane_id[lanes[i]] | SII902X_TPI_I2S_FIFO_ENABLE; + + if (IS_ERR(sii902x->audio.mclk)) { + dev_err(dev, "%s: No clock (audio mclk) found: %ld\n", + __func__, PTR_ERR(sii902x->audio.mclk)); + return 0; + } + + sii902x->audio.pdev = platform_device_register_data( + dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO, + &codec_data, sizeof(codec_data)); + + return PTR_ERR_OR_ZERO(sii902x->audio.pdev); +} + static const struct regmap_range sii902x_volatile_ranges[] = { { .range_min = 0, .range_max = 0xff }, }; @@ -336,6 +778,7 @@ static const struct regmap_access_table sii902x_volatile_table = { static const struct regmap_config sii902x_regmap_config = { .reg_bits = 8, .val_bits = 8, + .max_register = SII902X_TPI_MISC_INFOFRAME_END, .volatile_table = &sii902x_volatile_table, .cache_type = REGCACHE_NONE, }; @@ -508,6 +951,8 @@ static int sii902x_probe(struct i2c_client *client, return PTR_ERR(sii902x->reset_gpio); } + mutex_init(&sii902x->mutex); + sii902x_reset(sii902x); ret = regmap_write(sii902x->regmap, SII902X_REG_TPI_RQB, 0x0); @@ -548,6 +993,8 @@ static int sii902x_probe(struct i2c_client *client, sii902x->bridge.timings = &default_sii902x_timings; drm_bridge_add(&sii902x->bridge); + sii902x_audio_codec_init(sii902x, dev); + i2c_set_clientdata(client, sii902x); sii902x->i2cmux = i2c_mux_alloc(client->adapter, dev,