From patchwork Mon Jan 16 09:49:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 644769 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE861C63797 for ; Mon, 16 Jan 2023 09:50:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229574AbjAPJue (ORCPT ); Mon, 16 Jan 2023 04:50:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42062 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229695AbjAPJuS (ORCPT ); Mon, 16 Jan 2023 04:50:18 -0500 Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1840014EBC for ; Mon, 16 Jan 2023 01:50:17 -0800 (PST) Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 30DEB84F3E; Mon, 16 Jan 2023 10:50:15 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1673862615; bh=WAmnVGsimjmdvnZWXULuuXp7+Eh9H18zFKGwj3xn/gs=; h=From:To:Cc:Subject:Date:From; b=jvrQpwCTcn7TIyWrrVeHpSeEO3sD0ykuOQIblPV/nUs9oU1TD41x3dcU5BjBdrSKn DMw/OCvKEZZ0Gqu3ssg4mFI7hZKovk04pTEGg5Sy/11l3Km6FG09uWfIv4MlJeDTMs GXrRFpYSeDoxSuc0CVshywlOJ/isC4beBb0u8M+moIIeL4c/b6hVR5jPODMgBuRzWQ tK8QEWS2ff7kxftpf7zWAICE3ocuZ8VhDJMFgB2zIP1i0Ob7HbfOR5r9BR7+GD4/zx D3re6XqLxBQNC8nbsp6sCtWF8g9Ppavj/ALVu433P+YK31CGDVpx9nZvD51+LjqwH9 /wf5k5padCX/A== From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: Marek Vasut , Linus Walleij , Marc Zyngier , Bartosz Golaszewski , Loic Poulain , NXP Linux Team , Peng Fan , Shawn Guo Subject: [PATCH v7 1/2] gpio: mxc: Protect GPIO irqchip RMW with bgpio spinlock Date: Mon, 16 Jan 2023 10:49:56 +0100 Message-Id: <20230116094957.5756-1-marex@denx.de> X-Mailer: git-send-email 2.39.0 MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The driver currently performs register read-modify-write without locking in its irqchip part, this could lead to a race condition when configuring interrupt mode setting. Add the missing bgpio spinlock lock/unlock around the register read-modify-write. Reviewed-by: Linus Walleij Reviewed-by: Marc Zyngier Fixes: 07bd1a6cc7cbb ("MXC arch: Add gpio support for the whole platform") Signed-off-by: Marek Vasut --- Cc: Bartosz Golaszewski Cc: Linus Walleij Cc: Loic Poulain Cc: Marc Zyngier Cc: NXP Linux Team Cc: Peng Fan Cc: Shawn Guo --- V3: New patch V4: Include linux/spinlock.h V5: Use raw_spinlock per 3c938cc5cebcb ("gpio: use raw spinlock for gpio chip shadowed data") V6: No change V7: Rebase on current next-20230116 --- drivers/gpio/gpio-mxc.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index d5626c572d24e..2d9d498727f10 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -159,6 +160,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) { struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); struct mxc_gpio_port *port = gc->private; + unsigned long flags; u32 bit, val; u32 gpio_idx = d->hwirq; int edge; @@ -197,6 +199,8 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) return -EINVAL; } + raw_spin_lock_irqsave(&port->gc.bgpio_lock, flags); + if (GPIO_EDGE_SEL >= 0) { val = readl(port->base + GPIO_EDGE_SEL); if (edge == GPIO_INT_BOTH_EDGES) @@ -217,15 +221,20 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) writel(1 << gpio_idx, port->base + GPIO_ISR); port->pad_type[gpio_idx] = type; + raw_spin_unlock_irqrestore(&port->gc.bgpio_lock, flags); + return 0; } static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio) { void __iomem *reg = port->base; + unsigned long flags; u32 bit, val; int edge; + raw_spin_lock_irqsave(&port->gc.bgpio_lock, flags); + reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */ bit = gpio & 0xf; val = readl(reg); @@ -243,6 +252,8 @@ static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio) return; } writel(val | (edge << (bit << 1)), reg); + + raw_spin_unlock_irqrestore(&port->gc.bgpio_lock, flags); } /* handle 32 interrupts in one status register */ From patchwork Mon Jan 16 09:49:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 643265 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40A71C54EBE for ; Mon, 16 Jan 2023 09:50:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229531AbjAPJuc (ORCPT ); Mon, 16 Jan 2023 04:50:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41156 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229698AbjAPJuT (ORCPT ); Mon, 16 Jan 2023 04:50:19 -0500 Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B77E314EB7 for ; Mon, 16 Jan 2023 01:50:17 -0800 (PST) Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id AA1018552C; Mon, 16 Jan 2023 10:50:15 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1673862616; bh=LlxdRq+LS3uNYQoqQjAgfSe8RvgV76LTyReNgpjcnAA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gaaDX6bKWxM32+CFOnuXYruSDtaWkhSXB7v7oCmDNZEiYzmcnIpp9tzAaWM/MsKYO JqN76XxfwsECBsurQX93Jn8v+rmC+eCZEPtCSscLVoDL2LTS7jextsxcbXz55oOYAP uyShtdAmivrGml84oS8SfKLgITFYSmP08AXdIVIs57HUetsgioJvFPsJTwjHVFkogP sl9y608D5F5jWhc8hOb8IEcKh/Q5q3HBcQgW4o3k+NG9BMkUSXK4eX/5jUaDQ7gL+L 3l5EZi8i1jpHwj3RAr8n75jns8R7PILNt5vdMCkVqIZWFqvkUy1xo9roLzcNPgfUCu b4GYn2LpkBC3w== From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: Marek Vasut , Linus Walleij , Bartosz Golaszewski , Loic Poulain , Marc Zyngier , NXP Linux Team , Peng Fan , Shawn Guo Subject: [PATCH v7 2/2] gpio: mxc: Always set GPIOs used as interrupt source to INPUT mode Date: Mon, 16 Jan 2023 10:49:57 +0100 Message-Id: <20230116094957.5756-2-marex@denx.de> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230116094957.5756-1-marex@denx.de> References: <20230116094957.5756-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Always configure GPIO pins which are used as interrupt source as INPUTs. In case the default pin configuration is OUTPUT, or the prior stage does configure the pins as OUTPUT, then Linux will not reconfigure the pin as INPUT and no interrupts are received. Always configure the interrupt source GPIO pin as input to fix the above case. Reviewed-by: Linus Walleij Fixes: 07bd1a6cc7cbb ("MXC arch: Add gpio support for the whole platform") Signed-off-by: Marek Vasut --- Cc: Bartosz Golaszewski Cc: Linus Walleij Cc: Loic Poulain Cc: Marc Zyngier Cc: NXP Linux Team Cc: Peng Fan Cc: Shawn Guo --- V2: Actually update and clear bits in GDIR register V3: Rebase on top of new patch 1/2, expand CC list, add Fixes tag V4: No change V5: No change V6: - Call gc->direction_input() to set direction, instead of GDIR register poking. The bgpio (gpio-mmio) may cache the content of direction register, so updating the HW GDIR register is not enough. Calling the gc->direction() assures the cache is updated. - Drop RBs since this is updated patch. V7: Rebase on current next-20230116 --- drivers/gpio/gpio-mxc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index 2d9d498727f10..6f673b2f2a1bf 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c @@ -223,7 +223,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) raw_spin_unlock_irqrestore(&port->gc.bgpio_lock, flags); - return 0; + return port->gc.direction_input(&port->gc, gpio_idx); } static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio)