From patchwork Mon Apr 29 14:44:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 163033 Delivered-To: patch@linaro.org Received: by 2002:a92:7e86:0:0:0:0:0 with SMTP id q6csp1973370ill; Mon, 29 Apr 2019 07:44:51 -0700 (PDT) X-Google-Smtp-Source: APXvYqzQFFLVOwV/q4DDCHvVjXawVi7YG9w/A7MPJJcZOUKyyI7kxX2l7pncNnoar/BpXIjZ+345 X-Received: by 2002:a17:902:4643:: with SMTP id o61mr3857262pld.95.1556549091439; Mon, 29 Apr 2019 07:44:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556549091; cv=none; d=google.com; s=arc-20160816; b=TuLAEPWYnENe4y3crrCyOTy50fa1qCkb0JwapuCeaBAcVmMOS9ontnTvGFizCKxWLg xFc0+ktoIO7dqkUgjbjWeFiDeWLgUyUyeMHc9eN2LNN/ywH0q77zslYB+GVtOFbGnE4S 7mdkbCI7px7YjR8jokqkruGYJeD5yir3VK1arM4YZGVyM6cZydL4WWuwfqr/mYJmzj2g YuHyQ32CPK3pSkW8WNkZgdZjHquijXZHKUnUsbCPsjfvdkwxDakZX7OHPfbE2P0piQBq W69Qh/vWuAcVSRB/Qi2Vgt10uXWQgLXeYoj7MI0fT0B8lbGOtLFnMzINGct60rqaGUjn U65w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=S4+LIuQzVGGw5h2/sMGrHioLS4AucT1Aj4upY7t3b5A=; b=yVFSxAcF9ddrzcZou3I0evZ1OZsSBiWIEZqYvogWsBlZP20C5lMXD81zhEMUcpgyAH tZbmJfvEdPN+ncQa3Mg1zbZyzekBjXle3M2AquJR0ftnEixgqw3+CJmAB+AgbF9CXEOS IhxrpQ3rCgxq8tj/qs01Ayw3EIDm6gk5Ea0ukSf9K6WVYYnGo4VXJBvQ11/RBnGnr0p5 F2v3VqAsvCrABV5zypgb+qk1sV7LdF7aJewcTypLxWs+XbjS5AyYDg2yuDuJGMoJGY6F JcK8/u//xb8QC7xmvEgcZBKUY5y60CdnQ0U6bu1mMUfWpUvtOfTfAHIsetym4CSsWep7 M7Vw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-rt-users-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-rt-users-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z9si31066764pgp.375.2019.04.29.07.44.51; Mon, 29 Apr 2019 07:44:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-rt-users-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-rt-users-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-rt-users-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728472AbfD2Oot (ORCPT + 3 others); Mon, 29 Apr 2019 10:44:49 -0400 Received: from foss.arm.com ([217.140.101.70]:58982 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728455AbfD2Oop (ORCPT ); Mon, 29 Apr 2019 10:44:45 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6F35880D; Mon, 29 Apr 2019 07:44:45 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 208FB3F5C1; Mon, 29 Apr 2019 07:44:42 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall Subject: [PATCH v2 3/7] irqchip/gicv2m: Don't map the MSI page in gicv2m_compose_msi_msg() Date: Mon, 29 Apr 2019 15:44:24 +0100 Message-Id: <20190429144428.29254-4-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190429144428.29254-1-julien.grall@arm.com> References: <20190429144428.29254-1-julien.grall@arm.com> Sender: linux-rt-users-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rt-users@vger.kernel.org gicv2m_compose_msi_msg() may be called from non-preemptible context. However, on RT, iommu_dma_map_msi_msg() requires to be called from a preemptible context. A recent change split iommu_dma_map_msi_msg() in two new functions: one that should be called in preemptible context, the other does not have any requirement. The GICv2m driver is reworked to avoid executing preemptible code in non-preemptible context. This can be achieved by preparing the MSI mapping when allocating the MSI interrupt. Signed-off-by: Julien Grall --- Changes in v2: - Rework the commit message to use imperative mood --- drivers/irqchip/irq-gic-v2m.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- 2.11.0 diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c index f5fe0100f9ff..4359f0583377 100644 --- a/drivers/irqchip/irq-gic-v2m.c +++ b/drivers/irqchip/irq-gic-v2m.c @@ -110,7 +110,7 @@ static void gicv2m_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) if (v2m->flags & GICV2M_NEEDS_SPI_OFFSET) msg->data -= v2m->spi_offset; - iommu_dma_map_msi_msg(data->irq, msg); + iommu_dma_compose_msi_msg(irq_data_get_msi_desc(data), msg); } static struct irq_chip gicv2m_irq_chip = { @@ -167,6 +167,7 @@ static void gicv2m_unalloc_msi(struct v2m_data *v2m, unsigned int hwirq, static int gicv2m_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs, void *args) { + msi_alloc_info_t *info = args; struct v2m_data *v2m = NULL, *tmp; int hwirq, offset, i, err = 0; @@ -186,6 +187,11 @@ static int gicv2m_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, hwirq = v2m->spi_start + offset; + err = iommu_dma_prepare_msi(info->desc, + v2m->res.start + V2M_MSI_SETSPI_NS); + if (err) + return err; + for (i = 0; i < nr_irqs; i++) { err = gicv2m_irq_gic_domain_alloc(domain, virq + i, hwirq + i); if (err)