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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id s17sm4785317pfm.149.2019.05.09.21.34.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 May 2019 21:34:25 -0700 (PDT) From: Bjorn Andersson To: Ohad Ben-Cohen , Bjorn Andersson , Rob Herring , Mark Rutland Cc: Andy Gross , David Brown , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/8] dt-bindings: remoteproc: Rename and amend Hexagon v56 binding Date: Thu, 9 May 2019 21:34:14 -0700 Message-Id: <20190510043421.31393-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190510043421.31393-1-bjorn.andersson@linaro.org> References: <20190510043421.31393-1-bjorn.andersson@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The SDM845 Audio DSP peripheral image loader binding describes the properties needed to load and boot firmware on a Hexagon v56. Rename the file and add the Compute DSP (CDSP) found in QCS404 to the binding. Signed-off-by: Bjorn Andersson --- ...qcom,adsp-pil.txt => qcom,hexagon-v56.txt} | 35 +++++++++++++------ 1 file changed, 25 insertions(+), 10 deletions(-) rename Documentation/devicetree/bindings/remoteproc/{qcom,adsp-pil.txt => qcom,hexagon-v56.txt} (74%) -- 2.18.0 diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp-pil.txt b/Documentation/devicetree/bindings/remoteproc/qcom,hexagon-v56.txt similarity index 74% rename from Documentation/devicetree/bindings/remoteproc/qcom,adsp-pil.txt rename to Documentation/devicetree/bindings/remoteproc/qcom,hexagon-v56.txt index 66af2c30944f..1337a3d93d35 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp-pil.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,hexagon-v56.txt @@ -1,12 +1,13 @@ -Qualcomm Technology Inc. ADSP Peripheral Image Loader +Qualcomm Technology Inc. Hexagon v56 Peripheral Image Loader This document defines the binding for a component that loads and boots firmware -on the Qualcomm Technology Inc. ADSP Hexagon core. +on the Qualcomm Technology Inc. Hexagon v56 core. - compatible: Usage: required Value type: Definition: must be one of: + "qcom,qcs404-cdsp-pil", "qcom,sdm845-adsp-pil" - reg: @@ -28,10 +29,11 @@ on the Qualcomm Technology Inc. ADSP Hexagon core. - clocks: Usage: required Value type: - Definition: List of 8 phandle and clock specifier pairs for the adsp. + Definition: List of phandles and clock specifier pairs for the Hexagon, + per clock-names below. - clock-names: - Usage: required + Usage: required for SDM845 ADSP Value type: Definition: List of clock input name strings sorted in the same order as the clocks property. Definition must have @@ -39,6 +41,14 @@ on the Qualcomm Technology Inc. ADSP Hexagon core. "lpass_ahbm_aon_cbcr", "qdsp6ss_xo", "qdsp6ss_sleep" and "qdsp6ss_core". +- clock-names: + Usage: required for QCS404 CDSP + Value type: + Definition: List of clock input name strings sorted in the same + order as the clocks property. Definition must have + "xo", "sway", "tbu", "bimc", "ahb_aon", "q6ss_slave", + "q6ss_master", "q6_axim". + - power-domains: Usage: required Value type: @@ -47,28 +57,33 @@ on the Qualcomm Technology Inc. ADSP Hexagon core. - resets: Usage: required Value type: - Definition: reference to the list of 2 reset-controller for the adsp. + Definition: reference to the list of resets for the Hexagon. - reset-names: - Usage: required + Usage: required for SDM845 ADSP Value type: Definition: must be "pdc_sync" and "cc_lpass" +- reset-names: + Usage: required for QCS404 CDSP + Value type: + Definition: must be "restart" + - qcom,halt-regs: Usage: required Value type: Definition: a phandle reference to a syscon representing TCSR followed - by the offset within syscon for lpass halt register. + by the offset within syscon for Hexagon halt register. - memory-region: Usage: required Value type: - Definition: reference to the reserved-memory for the ADSP + Definition: reference to the reserved-memory for the firmware - qcom,smem-states: Usage: required Value type: - Definition: reference to the smem state for requesting the ADSP to + Definition: reference to the smem state for requesting the Hexagon to shut down - qcom,smem-state-names: @@ -79,7 +94,7 @@ on the Qualcomm Technology Inc. ADSP Hexagon core. = SUBNODES The adsp node may have an subnode named "glink-edge" that describes the -communication edge, channels and devices related to the ADSP. +communication edge, channels and devices related to the Hexagon. See ../soc/qcom/qcom,glink.txt for details on how to describe these. = EXAMPLE From patchwork Fri May 10 04:34:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 163829 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:142:0:0:0:0 with SMTP id j2csp1875155ilr; Thu, 9 May 2019 21:34:57 -0700 (PDT) X-Google-Smtp-Source: APXvYqxidQ7h12qLj9dqC4Yf6EggYSs3ctruppKHm1Fcd8HdN9Kf4H45e/X/fnyM3z85lmUOGiJs X-Received: by 2002:a63:5166:: with SMTP id r38mr11213130pgl.429.1557462897298; Thu, 09 May 2019 21:34:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1557462897; cv=none; d=google.com; s=arc-20160816; b=rS/R0hkoDYshNg8MrTrQ7wAdWjAEL3AOxb2haYraHrWwNrjHsCVhyiNtrkPAqvQatA 2jMXGf+atHz8pZoEx5iEoNUeC3JWYINDvzsnx1ETlCRCaFP+CCw4acXIsv42HT4rsXkc /cXBMIEI7gDaF0pAocFhz3XOMebWtbrX8rIlrBiVH1ayr6E61dc1FWjguAqWZxQrhHjR wkHA1fRWMGsLL2Uw7Y3fO5DW+ti00JZVKFd7m6cbWnGHKCOPKMnzn+NrmytXU8e23NFj v92TfxLz6vVzaO1V6NlljEY55Ont7BKOrL4VbpoIpQI9QrK2uWJ0uUNxx/B8TM5fqBrt WHLw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=I9XJT6/tH1dITtwqwwLksUn/i2UuLzClmRgZy8rDTNU=; b=HG/sZNuvte2ogt42h2HGnzCRVy5RtAwxMXidpjzEPrm7YLeXIg5MVadBRwXGbe3/3F h1LPUEAijeKmNBR7H/qKxpEpvKLlB4R4zsEoGCwNMmBj0X2epJqABXN1UJKuU1eYQzGc V8vTmKo7j7JDFM+rxLtazaj/tzURMM34wNFCOi6oBEXakVaz0SmXM16SL6R/PbDRtcvy EjUKwtwdzkzZyqo1aR9IkF/MyZKfyHptN+aGZRFZq5bsMLHP0/RTfcSQjtjbN1cNfchR sWZQ8hHrAoWnCSxZ/fuzZ+fMDX2opKM67Efi4UFsPcRMzm/CbK5e+P2dnJuxwcqFm16r 3iGQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bDwrUyGi; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id s17sm4785317pfm.149.2019.05.09.21.34.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 May 2019 21:34:27 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , David Brown Cc: Ohad Ben-Cohen , Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/8] arm64: dts: qcom: qcs404-evb: Mark CDSP clocks protected Date: Thu, 9 May 2019 21:34:16 -0700 Message-Id: <20190510043421.31393-4-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190510043421.31393-1-bjorn.andersson@linaro.org> References: <20190510043421.31393-1-bjorn.andersson@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org With the Trustzone based CDSP remoteproc driver these clocks are controlled elsewhere and as they are not enabled by anything in Linux the clock framework will turn them off during lateinit. This results in issues either to later start the CDSP, using the Trustzone interface, or if the CDSP is already running it will crash. Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.18.0 diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi index 2c3127167e3c..dc1d7d5d21a4 100644 --- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi @@ -56,6 +56,13 @@ qcom,controlled-remotely; }; +&gcc { + protected-clocks = , + , + , + ; +}; + &pms405_spmi_regulators { vdd_s3-supply = <&pms405_s3>;