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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 May 2023 13:52:45.7706 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 73783811-c6d5-47a5-35da-08db4b14822d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT013.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6052 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Chirag Parekh Wire i2c pinmuxing gpio recovery for zc702. Signed-off-by: Chirag Parekh Signed-off-by: Michal Simek --- arch/arm/boot/dts/zynq-zc702.dts | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts index d23201ba8cd7..6efdbca9d3ef 100644 --- a/arch/arm/boot/dts/zynq-zc702.dts +++ b/arch/arm/boot/dts/zynq-zc702.dts @@ -5,6 +5,7 @@ */ /dts-v1/; #include "zynq-7000.dtsi" +#include / { model = "Xilinx ZC702 board"; @@ -106,8 +107,11 @@ &gpio0 { &i2c0 { status = "okay"; clock-frequency = <400000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c0_default>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + scl-gpios = <&gpio0 50 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio0 51 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; i2c-mux@74 { compatible = "nxp,pca9548"; @@ -298,6 +302,19 @@ conf { }; }; + pinctrl_i2c0_gpio: i2c0-gpio { + mux { + groups = "gpio0_50_grp", "gpio0_51_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_50_grp", "gpio0_51_grp"; + slew-rate = <0>; + io-standard = <1>; + }; + }; + pinctrl_sdhci0_default: sdhci0-default { mux { groups = "sdio0_2_grp";