From patchwork Fri May 26 11:32:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mohammad Rafi Shaik X-Patchwork-Id: 685994 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C5AAC7EE23 for ; Fri, 26 May 2023 11:33:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242730AbjEZLdv (ORCPT ); Fri, 26 May 2023 07:33:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32860 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242661AbjEZLdu (ORCPT ); Fri, 26 May 2023 07:33:50 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 326B6195; Fri, 26 May 2023 04:33:49 -0700 (PDT) Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34QAcdW7022383; Fri, 26 May 2023 11:33:34 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=gIfIqZ+aDP5nnGyN2ziderawqXsVXDG1RnA8Nts8Kiw=; b=HmxLSTvcQJOZA3KJIBy9De1JKSTIc9G2S/mTaqTfAuhtqKJlGexHWJ0nTaP6RBRovsIn CvR3uSldd58ivuR1WizCiNQC2l4ETGogjNLWRr6vvgTWOQpvnVhXHZ0KhI5rbehOPdBP Ug0dW9oGbzuQmYjAEkeXdKNmDG2C6icFVNgQmTJ4oEqsRmMngnFz32TI624mWkmHkYSr hyoB/6Auna3gX308+jXwsEBxc4CvIz0FzTtpvMOF+AwwgtwV6MesPKFGdwjzJIRdp4or jU75q5RStp2jEdswIfA5nZg1QpDuxMStICjagj7idAwKK5LcE0QQsP1Rykr8gIJnxT2I YQ== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qtu0u03u5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 26 May 2023 11:33:34 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 34QBXWCY010432 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 26 May 2023 11:33:32 GMT Received: from hu-mohs-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Fri, 26 May 2023 04:33:26 -0700 From: Mohammad Rafi Shaik To: , , , , , , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu , Mohammad Rafi Shaik Subject: [PATCH v6 1/8] arm64: dts: qcom: sc7280: Modify lpasscc node name Date: Fri, 26 May 2023 17:02:51 +0530 Message-ID: <20230526113258.1467276-2-quic_mohs@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230526113258.1467276-1-quic_mohs@quicinc.com> References: <20230526113258.1467276-1-quic_mohs@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: fUAnUcO4qMkB1gEwjXookHHQdOhDmICH X-Proofpoint-GUID: fUAnUcO4qMkB1gEwjXookHHQdOhDmICH X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-26_01,2023-05-25_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 lowpriorityscore=0 malwarescore=0 suspectscore=0 mlxlogscore=934 impostorscore=0 phishscore=0 mlxscore=0 spamscore=0 bulkscore=0 priorityscore=1501 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305260098 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Srinivasa Rao Mandadapu Modify lpasscc clock controller node name to generic name, that is from lpasscc to clock-controller. Signed-off-by: Srinivasa Rao Mandadapu Signed-off-by: Mohammad Rafi Shaik Reviewed-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 31728f461422..270618521638 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2237,7 +2237,7 @@ tcsr_2: syscon@1fc0000 { reg = <0 0x01fc0000 0 0x30000>; }; - lpasscc: lpasscc@3000000 { + lpasscc: clock-controller@3000000 { compatible = "qcom,sc7280-lpasscc"; reg = <0 0x03000000 0 0x40>, <0 0x03c04000 0 0x4>; From patchwork Fri May 26 11:32:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mohammad Rafi Shaik X-Patchwork-Id: 686551 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1825C77B7C for ; Fri, 26 May 2023 11:34:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242918AbjEZLeE (ORCPT ); Fri, 26 May 2023 07:34:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33170 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242917AbjEZLeD (ORCPT ); Fri, 26 May 2023 07:34:03 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F00FAE7; Fri, 26 May 2023 04:33:57 -0700 (PDT) Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34Q8m4F1017295; Fri, 26 May 2023 11:33:39 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=0TPL7SuFnbzKFa6XETKi0K/JpDHEU4uZqqjPlZlSnjI=; b=a5uSboM895striIlWY+ZocZUU4IQ3hSrcp/+Mj5EbBkXganjCh51bTeDiDsTM+wj8Z8t IoHvSYkKbdhk93b9+GrCxVbt44LrQKE3EsLtvOWPKyS7/sBTUzCtaHzHHdu35iM9aE5F sK4vv1nD7fdt2nPitKboN52nMZXjtUAEoNUpuGngVF9Z4Ej4Warr1ZoEdHobpssFnk3W KiChwq8iadF9UKyUujPno288m5antB8o7/V/uIhdAkcQWUpUSg25QAmWnEf8QlbKVy9X hNQ+GxW9Prh+b9m4bk9Q7HE1RJ8mqDfq4wFRpdMjATJJT5ePcApLk1IKkAtAiUr0mTLV IA== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qtrd8geuj-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 26 May 2023 11:33:39 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 34QBXclv010512 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 26 May 2023 11:33:38 GMT Received: from hu-mohs-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Fri, 26 May 2023 04:33:32 -0700 From: Mohammad Rafi Shaik To: , , , , , , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu , Mohammad Rafi Shaik , Krzysztof Kozlowski Subject: [PATCH v6 2/8] dt-bindings: remoteproc: qcom: sc7280-adsp-pil: Add missing properties Date: Fri, 26 May 2023 17:02:52 +0530 Message-ID: <20230526113258.1467276-3-quic_mohs@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230526113258.1467276-1-quic_mohs@quicinc.com> References: <20230526113258.1467276-1-quic_mohs@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 0dIzPdncnpFa-sOTaAtyvcqGiai2Ojgn X-Proofpoint-GUID: 0dIzPdncnpFa-sOTaAtyvcqGiai2Ojgn X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-26_01,2023-05-25_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 mlxlogscore=999 adultscore=0 malwarescore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 mlxscore=0 priorityscore=1501 phishscore=0 spamscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305260098 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Srinivasa Rao Mandadapu Add reg-names and power-domain-names for remoteproc ADSP peripheral loader. Add firmware-name property to distinguish and load different firmware binaries of various vendors. Change qcom,halt-regs property phandle to tcsr_1 from tcsr_mutex. Also add required-opps property and change power domain from LCX to CX, which is actual PD to be controlled, for setting appropriate performance state. This is to make compatible with remoteproc ADSP PIL driver and latest device tree changes. Fixes: 8490a99586ab ("dt-bindings: remoteproc: qcom: Add SC7280 ADSP support") Signed-off-by: Srinivasa Rao Mandadapu Signed-off-by: Mohammad Rafi Shaik Reviewed-by: Krzysztof Kozlowski --- .../remoteproc/qcom,sc7280-adsp-pil.yaml | 30 ++++++++++++++++--- 1 file changed, 26 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml index 94ca7a0cc203..7addc7de64c0 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml @@ -23,6 +23,11 @@ properties: - description: qdsp6ss register - description: efuse q6ss register + reg-names: + items: + - const: qdsp6ss_base + - const: lpass_efuse + iommus: items: - description: Phandle to apps_smmu node with sid mask @@ -57,7 +62,11 @@ properties: power-domains: items: - - description: LCX power domain + - description: CX power domain + + power-domain-names: + items: + - const: cx resets: items: @@ -73,6 +82,12 @@ properties: maxItems: 1 description: Reference to the reserved-memory for the Hexagon core + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: + The name of the firmware which should be loaded for this remote + processor. + qcom,halt-regs: $ref: /schemas/types.yaml#/definitions/phandle-array description: @@ -80,7 +95,7 @@ properties: four offsets within syscon for q6, modem, nc and qv6 halt registers. items: - items: - - description: phandle to TCSR_MUTEX registers + - description: phandle to TCSR_1 registers - description: offset to the Q6 halt register - description: offset to the modem halt register - description: offset to the nc halt register @@ -100,6 +115,10 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle description: Reference to the AOSS side-channel message RAM. + required-opps: + description: + A phandle to an OPP node describing required MMCX performance point. + glink-edge: $ref: qcom,glink-edge.yaml# type: object @@ -167,13 +186,16 @@ examples: <&gcc GCC_CFG_NOC_LPASS_CLK>; clock-names = "xo", "gcc_cfg_noc_lpass"; - power-domains = <&rpmhpd SC7280_LCX>; + power-domains = <&rpmhpd SC7280_CX>; + power-domain-names = "cx"; + + required-opps = <&rpmhpd_opp_nom>; resets = <&pdc_reset PDC_AUDIO_SYNC_RESET>, <&aoss_reset AOSS_CC_LPASS_RESTART>; reset-names = "pdc_sync", "cc_lpass"; - qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>; + qcom,halt-regs = <&tcsr_1 0x23000 0x25000 0x28000 0x33000>; memory-region = <&adsp_mem>; From patchwork Fri May 26 11:32:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mohammad Rafi Shaik X-Patchwork-Id: 686548 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 418BEC7EE23 for ; Fri, 26 May 2023 11:35:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243252AbjEZLfC (ORCPT ); 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Fri, 26 May 2023 11:34:13 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 34QBXitV016397 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 26 May 2023 11:33:44 GMT Received: from hu-mohs-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Fri, 26 May 2023 04:33:38 -0700 From: Mohammad Rafi Shaik To: , , , , , , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu , Mohammad Rafi Shaik , Krzysztof Kozlowski Subject: [PATCH v6 3/8] arm64: dts: qcom: sc7280: Extract audio nodes from common idp dtsi file Date: Fri, 26 May 2023 17:02:53 +0530 Message-ID: <20230526113258.1467276-4-quic_mohs@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230526113258.1467276-1-quic_mohs@quicinc.com> References: <20230526113258.1467276-1-quic_mohs@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: YG9tBl5jwQ9-UGV4g1G3irwEMzmG18br X-Proofpoint-GUID: YG9tBl5jwQ9-UGV4g1G3irwEMzmG18br X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-26_01,2023-05-25_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 adultscore=0 priorityscore=1501 mlxlogscore=999 spamscore=0 bulkscore=0 impostorscore=0 phishscore=0 mlxscore=0 suspectscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305260099 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Srinivasa Rao Mandadapu Split common idp dtsi file into audio specific dtsi and common idp dtsi file. It is required to isolate idp and crd-rev3 platform device tree nodes and convert crd-rev3 platform device tree nodes into audioreach specific device tree nodes. Signed-off-by: Srinivasa Rao Mandadapu Signed-off-by: Mohammad Rafi Shaik Reviewed-by: Krzysztof Kozlowski --- .../arm64/boot/dts/qcom/sc7280-audio-idp.dtsi | 131 ++++++++++++++++++ arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts | 1 + arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 122 ---------------- 3 files changed, 132 insertions(+), 122 deletions(-) create mode 100644 arch/arm64/boot/dts/qcom/sc7280-audio-idp.dtsi diff --git a/arch/arm64/boot/dts/qcom/sc7280-audio-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-audio-idp.dtsi new file mode 100644 index 000000000000..994a13325477 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7280-audio-idp.dtsi @@ -0,0 +1,131 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * sc7280 Audio IDP board device tree source (common between SKU1 and SKU2) + * + * Copyright (c) 2022, The Linux Foundation. All rights reserved. + */ + +/{ + /* BOARD-SPECIFIC TOP LEVEL NODES */ + sound: sound { + compatible = "google,sc7280-herobrine"; + model = "sc7280-wcd938x-max98360a-1mic"; + + audio-routing = + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "AMIC1", "MIC BIAS1", + "AMIC2", "MIC BIAS2", + "VA DMIC0", "MIC BIAS3", + "VA DMIC1", "MIC BIAS3", + "VA DMIC2", "MIC BIAS1", + "VA DMIC3", "MIC BIAS1", + "TX SWR_ADC0", "ADC1_OUTPUT", + "TX SWR_ADC1", "ADC2_OUTPUT", + "TX SWR_ADC2", "ADC3_OUTPUT", + "TX SWR_DMIC0", "DMIC1_OUTPUT", + "TX SWR_DMIC1", "DMIC2_OUTPUT", + "TX SWR_DMIC2", "DMIC3_OUTPUT", + "TX SWR_DMIC3", "DMIC4_OUTPUT", + "TX SWR_DMIC4", "DMIC5_OUTPUT", + "TX SWR_DMIC5", "DMIC6_OUTPUT", + "TX SWR_DMIC6", "DMIC7_OUTPUT", + "TX SWR_DMIC7", "DMIC8_OUTPUT"; + + #address-cells = <1>; + #size-cells = <0>; + + dai-link@0 { + link-name = "MAX98360A"; + reg = <0>; + + cpu { + sound-dai = <&lpass_cpu MI2S_SECONDARY>; + }; + + codec { + sound-dai = <&max98360a>; + }; + }; + + dai-link@1 { + link-name = "DisplayPort"; + reg = <1>; + + cpu { + sound-dai = <&lpass_cpu LPASS_DP_RX>; + }; + + codec { + sound-dai = <&mdss_dp>; + }; + }; + + dai-link@2 { + link-name = "WCD9385 Playback"; + reg = <2>; + + cpu { + sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>; + }; + + codec { + sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>; + }; + }; + + dai-link@3 { + link-name = "WCD9385 Capture"; + reg = <3>; + + cpu { + sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>; + }; + + codec { + sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>; + }; + }; + + dai-link@4 { + link-name = "DMIC"; + reg = <4>; + + cpu { + sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>; + }; + + codec { + sound-dai = <&lpass_va_macro 0>; + }; + }; + }; +}; + +&lpass_cpu { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>; + + dai-link@1 { + reg = ; + qcom,playback-sd-lines = <0>; + }; + + dai-link@5 { + reg = ; + }; + + dai-link@6 { + reg = ; + }; + + dai-link@19 { + reg = ; + }; + + dai-link@25 { + reg = ; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts b/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts index afae7f46b050..15f7f26b80cd 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts @@ -8,6 +8,7 @@ /dts-v1/; #include "sc7280-idp.dtsi" +#include "sc7280-audio-idp.dtsi" #include "sc7280-idp-ec-h1.dtsi" / { diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi index c6dc200c00ce..c09ee1b93511 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -87,100 +87,6 @@ nvme_3v3_regulator: nvme-3v3-regulator { pinctrl-names = "default"; pinctrl-0 = <&nvme_pwren>; }; - - sound: sound { - compatible = "google,sc7280-herobrine"; - model = "sc7280-wcd938x-max98360a-1mic"; - - audio-routing = - "IN1_HPHL", "HPHL_OUT", - "IN2_HPHR", "HPHR_OUT", - "AMIC1", "MIC BIAS1", - "AMIC2", "MIC BIAS2", - "VA DMIC0", "MIC BIAS3", - "VA DMIC1", "MIC BIAS3", - "VA DMIC2", "MIC BIAS1", - "VA DMIC3", "MIC BIAS1", - "TX SWR_ADC0", "ADC1_OUTPUT", - "TX SWR_ADC1", "ADC2_OUTPUT", - "TX SWR_ADC2", "ADC3_OUTPUT", - "TX SWR_DMIC0", "DMIC1_OUTPUT", - "TX SWR_DMIC1", "DMIC2_OUTPUT", - "TX SWR_DMIC2", "DMIC3_OUTPUT", - "TX SWR_DMIC3", "DMIC4_OUTPUT", - "TX SWR_DMIC4", "DMIC5_OUTPUT", - "TX SWR_DMIC5", "DMIC6_OUTPUT", - "TX SWR_DMIC6", "DMIC7_OUTPUT", - "TX SWR_DMIC7", "DMIC8_OUTPUT"; - - #address-cells = <1>; - #size-cells = <0>; - - dai-link@0 { - link-name = "MAX98360A"; - reg = <0>; - - cpu { - sound-dai = <&lpass_cpu MI2S_SECONDARY>; - }; - - codec { - sound-dai = <&max98360a>; - }; - }; - - dai-link@1 { - link-name = "DisplayPort"; - reg = <1>; - - cpu { - sound-dai = <&lpass_cpu LPASS_DP_RX>; - }; - - codec { - sound-dai = <&mdss_dp>; - }; - }; - - dai-link@2 { - link-name = "WCD9385 Playback"; - reg = <2>; - - cpu { - sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>; - }; - - codec { - sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>; - }; - }; - - dai-link@3 { - link-name = "WCD9385 Capture"; - reg = <3>; - - cpu { - sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>; - }; - - codec { - sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>; - }; - }; - - dai-link@4 { - link-name = "DMIC"; - reg = <4>; - - cpu { - sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>; - }; - - codec { - sound-dai = <&lpass_va_macro 0>; - }; - }; - }; }; &apps_rsc { @@ -373,34 +279,6 @@ &gpi_dma1 { status = "okay"; }; -&lpass_cpu { - status = "okay"; - - pinctrl-names = "default"; - pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>; - - dai-link@1 { - reg = ; - qcom,playback-sd-lines = <0>; - }; - - dai-link@5 { - reg = ; - }; - - dai-link@6 { - reg = ; - }; - - dai-link@19 { - reg = ; - }; - - dai-link@25 { - reg = ; - }; -}; - &lpass_rx_macro { status = "okay"; }; From patchwork Fri May 26 11:32:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mohammad Rafi Shaik X-Patchwork-Id: 685993 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 94F26C7EE2D for ; Fri, 26 May 2023 11:34:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243254AbjEZLeQ (ORCPT ); Fri, 26 May 2023 07:34:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33294 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243252AbjEZLeK (ORCPT ); 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Signed-off-by: Srinivasa Rao Mandadapu Signed-off-by: Mohammad Rafi Shaik --- .../sc7280-herobrine-audioreach-wcd9385.dtsi | 108 ++++++++++++++++++ 1 file changed, 108 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi new file mode 100644 index 000000000000..95d3aa08ebde --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * sc7280 device tree source for boards using Max98360 and wcd9385 codec + * along with ADSP + * + * Copyright (c) 2022, The Linux Foundation. All rights reserved. + */ + +#include + +/{ + /* BOARD-SPECIFIC TOP LEVEL NODES */ + sound: sound { + compatible = "google,sc7280-herobrine"; + model = "AR-wcd938x-max98360a-1mic"; + audio-routing = + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "AMIC1", "MIC BIAS1", + "AMIC2", "MIC BIAS2", + "VA DMIC0", "MIC BIAS1", + "VA DMIC1", "MIC BIAS1", + "VA DMIC2", "MIC BIAS3", + "VA DMIC3", "MIC BIAS3", + "TX SWR_ADC0", "ADC1_OUTPUT", + "TX SWR_ADC1", "ADC2_OUTPUT", + "TX SWR_ADC2", "ADC3_OUTPUT", + "TX SWR_DMIC0", "DMIC1_OUTPUT", + "TX SWR_DMIC1", "DMIC2_OUTPUT", + "TX SWR_DMIC2", "DMIC3_OUTPUT", + "TX SWR_DMIC3", "DMIC4_OUTPUT", + "TX SWR_DMIC4", "DMIC5_OUTPUT", + "TX SWR_DMIC5", "DMIC6_OUTPUT", + "TX SWR_DMIC6", "DMIC7_OUTPUT", + "TX SWR_DMIC7", "DMIC8_OUTPUT"; + + #address-cells = <1>; + #size-cells = <0>; + + dai-link@0 { + link-name = "WCD9385 Playback"; + reg = <0>; + + cpu { + sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>; + }; + + codec { + sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>; + }; + + platform { + sound-dai = <&q6apm>; + }; + }; + + dai-link@1 { + link-name = "WCD9385 Capture"; + reg = <1>; + + cpu { + sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>; + }; + + codec { + sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>; + }; + + platform { + sound-dai = <&q6apm>; + }; + }; + + dai-link@2 { + link-name = "Amplifier Playback"; + reg = <2>; + + cpu { + sound-dai = <&q6apmbedai SECONDARY_MI2S_RX>; + }; + + codec { + sound-dai = <&max98360a>; + }; + + platform { + sound-dai = <&q6apm>; + }; + }; + + dai-link@3 { + link-name = "DMIC"; + reg = <3>; + + cpu { + sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>; + }; + + codec { + sound-dai = <&lpass_va_macro 0>; + }; + + platform { + sound-dai = <&q6apm>; + }; + }; + }; +}; From patchwork Fri May 26 11:32:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mohammad Rafi Shaik X-Patchwork-Id: 686550 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7439C7EE2D for ; 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Fri, 26 May 2023 04:33:50 -0700 From: Mohammad Rafi Shaik To: , , , , , , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu , Mohammad Rafi Shaik Subject: [PATCH v6 5/8] arm64: dts: qcom: sc7280: Add LPASS PIL node Date: Fri, 26 May 2023 17:02:55 +0530 Message-ID: <20230526113258.1467276-6-quic_mohs@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230526113258.1467276-1-quic_mohs@quicinc.com> References: <20230526113258.1467276-1-quic_mohs@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: k4DA7orYpn27KZ5BTPG0KrECHI7tfR2L X-Proofpoint-GUID: k4DA7orYpn27KZ5BTPG0KrECHI7tfR2L X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-26_01,2023-05-25_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 lowpriorityscore=0 malwarescore=0 suspectscore=0 mlxlogscore=999 impostorscore=0 phishscore=0 mlxscore=0 spamscore=0 bulkscore=0 priorityscore=1501 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305260098 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Srinivasa Rao Mandadapu Add LPASS PIL node for sc7280 based audioreach platforms. Signed-off-by: Srinivasa Rao Mandadapu Signed-off-by: Mohammad Rafi Shaik --- .../sc7280-herobrine-audioreach-wcd9385.dtsi | 90 +++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi index 95d3aa08ebde..9daea1b25656 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi @@ -7,6 +7,8 @@ */ #include +#include +#include /{ /* BOARD-SPECIFIC TOP LEVEL NODES */ @@ -105,4 +107,92 @@ platform { }; }; }; + + remoteproc_adsp: remoteproc@3000000 { + compatible = "qcom,sc7280-adsp-pil"; + reg = <0 0x03000000 0 0x5000>, <0 0x0355b000 0 0x10>; + reg-names = "qdsp6ss_base", "lpass_efuse"; + + interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, + <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; + + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack", + "shutdown-ack"; + + qcom,qmp = <&aoss_qmp>; + + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_CFG_NOC_LPASS_CLK>; + clock-names = "xo", "gcc_cfg_noc_lpass"; + + iommus = <&apps_smmu 0x1800 0x0>; + + power-domains = <&rpmhpd SC7280_CX>; + power-domain-names = "cx"; + + required-opps = <&rpmhpd_opp_nom>; + + resets = <&pdc_reset PDC_AUDIO_SYNC_RESET>, + <&aoss_reset AOSS_CC_LPASS_RESTART>; + reset-names = "pdc_sync", "cc_lpass"; + + qcom,halt-regs = <&tcsr_1 0x3000 0x5000 0x8000 0x13000>; + + memory-region = <&adsp_mem>; + + qcom,smem-states = <&adsp_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + + mboxes = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <2>; + + gpr { + compatible = "qcom,gpr"; + qcom,glink-channels = "adsp_apps"; + qcom,domain = ; + qcom,intents = <512 20>; + #address-cells = <1>; + #size-cells = <0>; + + q6apm: service@1 { + compatible = "qcom,q6apm"; + reg = ; + #sound-dai-cells = <0>; + + q6apmdai: dais { + compatible = "qcom,q6apm-dais"; + iommus = <&apps_smmu 0x1801 0x0>; + }; + + q6apmbedai: bedais { + compatible = "qcom,q6apm-lpass-dais"; + #sound-dai-cells = <1>; + }; + }; + + q6prm: service@2 { + compatible = "qcom,q6prm"; + reg = ; + + q6prmcc: clock-controller { + compatible = "qcom,q6prm-lpass-clocks"; + #clock-cells = <2>; + }; + }; + }; + }; + }; }; From patchwork Fri May 26 11:32:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mohammad Rafi Shaik X-Patchwork-Id: 685992 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F2F1CC7EE2D for ; Fri, 26 May 2023 11:34:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243227AbjEZLej (ORCPT ); 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Fri, 26 May 2023 11:34:03 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 34QBY2Pl031689 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 26 May 2023 11:34:02 GMT Received: from hu-mohs-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Fri, 26 May 2023 04:33:56 -0700 From: Mohammad Rafi Shaik To: , , , , , , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu , Mohammad Rafi Shaik Subject: [PATCH v6 6/8] arm64: dts: qcom: sc7280: Modify VA/RX/TX macro clock nodes for audioreach solution Date: Fri, 26 May 2023 17:02:56 +0530 Message-ID: <20230526113258.1467276-7-quic_mohs@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230526113258.1467276-1-quic_mohs@quicinc.com> References: <20230526113258.1467276-1-quic_mohs@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: lRFZMM-7l2wBlXjsF_cbGCPJ2dF-04Gi X-Proofpoint-ORIG-GUID: lRFZMM-7l2wBlXjsF_cbGCPJ2dF-04Gi X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-26_01,2023-05-25_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 phishscore=0 adultscore=0 clxscore=1015 suspectscore=0 malwarescore=0 bulkscore=0 impostorscore=0 mlxlogscore=996 lowpriorityscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305260098 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Srinivasa Rao Mandadapu Modify VA, RX and TX macro and lpass_tlmm clock properties and enable them. For audioreach solution mclk, npl and fsgen clocks are enabled through the q6prm clock driver. Delete the power domain properties from VA, RX and TX macro, for audioreach solution the macro, dcodec power domains enabled through the q6prm clock driver. Signed-off-by: Srinivasa Rao Mandadapu Signed-off-by: Mohammad Rafi Shaik --- .../sc7280-herobrine-audioreach-wcd9385.dtsi | 43 +++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi index 9daea1b25656..c02ca393378f 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi @@ -196,3 +196,46 @@ q6prmcc: clock-controller { }; }; }; + +&lpass_rx_macro { + /delete-property/ power-domains; + /delete-property/ power-domain-names; + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_va_macro>; + clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; + + status = "okay"; +}; + +&lpass_tlmm { + clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "core", "audio"; +}; + +&lpass_tx_macro { + /delete-property/ power-domains; + /delete-property/ power-domain-names; + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_va_macro>; + clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; + + status = "okay"; +}; + +&lpass_va_macro { + /delete-property/ power-domains; + /delete-property/ power-domain-names; + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "mclk", "macro", "dcodec"; + + status = "okay"; +}; From patchwork Fri May 26 11:32:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mohammad Rafi Shaik X-Patchwork-Id: 686549 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A684C7EE2E for ; Fri, 26 May 2023 11:34:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243304AbjEZLen (ORCPT ); Fri, 26 May 2023 07:34:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33700 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243314AbjEZLel (ORCPT ); Fri, 26 May 2023 07:34:41 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9EFBBE6E; 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Fri, 26 May 2023 11:34:09 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 34QBY80o011583 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 26 May 2023 11:34:08 GMT Received: from hu-mohs-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Fri, 26 May 2023 04:34:02 -0700 From: Mohammad Rafi Shaik To: , , , , , , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu , Mohammad Rafi Shaik Subject: [PATCH v6 7/8] arm64: dts: qcom: sc7280: Modify LPASS_MCC reg region size in the lpass_tlmm node Date: Fri, 26 May 2023 17:02:57 +0530 Message-ID: <20230526113258.1467276-8-quic_mohs@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230526113258.1467276-1-quic_mohs@quicinc.com> References: <20230526113258.1467276-1-quic_mohs@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 1mcIRUc1TvlWSkJVgjC9fmUVddqbIGdG X-Proofpoint-ORIG-GUID: 1mcIRUc1TvlWSkJVgjC9fmUVddqbIGdG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-26_01,2023-05-25_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 phishscore=0 adultscore=0 clxscore=1015 suspectscore=0 malwarescore=0 bulkscore=0 impostorscore=0 mlxlogscore=852 lowpriorityscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305260098 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Srinivasa Rao Mandadapu Modify LPASS_MCC register region size in "lpass_tlmm" node. The pincntl driver requires access until slew-rate register region and remaining register region related to the lpass_efuse register is not required in pincntl driver as lpass_efuse register region is required in adsp remoteproc driver. Signed-off-by: Srinivasa Rao Mandadapu Signed-off-by: Mohammad Rafi Shaik --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 270618521638..08afabbd0778 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2488,7 +2488,7 @@ lpass_ag_noc: interconnect@3c40000 { lpass_tlmm: pinctrl@33c0000 { compatible = "qcom,sc7280-lpass-lpi-pinctrl"; reg = <0 0x033c0000 0x0 0x20000>, - <0 0x03550000 0x0 0x10000>; + <0 0x03550000 0x0 0xa100>; qcom,adsp-bypass-mode; gpio-controller; #gpio-cells = <2>; From patchwork Fri May 26 11:32:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mohammad Rafi Shaik X-Patchwork-Id: 685991 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1FD8AC7EE2D for ; Fri, 26 May 2023 11:35:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243025AbjEZLfA (ORCPT ); Fri, 26 May 2023 07:35:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33826 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243330AbjEZLex (ORCPT ); Fri, 26 May 2023 07:34:53 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DE4D9E4F; Fri, 26 May 2023 04:34:22 -0700 (PDT) Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34Q8bru7017114; Fri, 26 May 2023 11:34:15 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=4l04U8ScpSzOar6vhPfePpeMKhfTNryVB8CWo9BK0eo=; b=F0J2/uIido0DhTXcIbliuI0v2dUbwNakSUwkC5RtA8sF3xHeE7j5ZtvwsmH5re6D2vDa 6GTYyfuzkWxFhLDD08YB3fjol1fFvP8IMBJHjvhbKTZARuDbNTC0ySoBnBYBlRTd4dFO 6JmjzRTQ8GqJ6ZaUJ5/rgntNmopRvSFVlKWEY1/xfDVO5FOVU7BToHgoH2TnvhK+egeN hgxum7/IDdXRx0YBoTyxO4yM5ll1pFMFSn8rChZOwK+SH3AM3yVtfgodJ1NovMyBbNWX i2+SUWbTf1n+3L8PBlRQvZwSacuPOY2epV9b32r9h4T4EXrU8CKNUut4vzmubuaqyNvh QQ== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qtp4wgrq2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 26 May 2023 11:34:15 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 34QBYE0D021597 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 26 May 2023 11:34:14 GMT Received: from hu-mohs-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Fri, 26 May 2023 04:34:08 -0700 From: Mohammad Rafi Shaik To: , , , , , , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu , Mohammad Rafi Shaik Subject: [PATCH v6 8/8] arm64: dts: qcom: sc7280: Add qcom,adsp-pil-mode property in clock nodes Date: Fri, 26 May 2023 17:02:58 +0530 Message-ID: <20230526113258.1467276-9-quic_mohs@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230526113258.1467276-1-quic_mohs@quicinc.com> References: <20230526113258.1467276-1-quic_mohs@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: N6zYUlCqEDRjeKEMw-tKWic8NGv_jo4h X-Proofpoint-ORIG-GUID: N6zYUlCqEDRjeKEMw-tKWic8NGv_jo4h X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-26_01,2023-05-25_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 phishscore=0 adultscore=0 clxscore=1015 suspectscore=0 malwarescore=0 bulkscore=0 impostorscore=0 mlxlogscore=999 lowpriorityscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305260098 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Srinivasa Rao Mandadapu Add "qcom,adsp-pil-mode" property in clock nodes for herobrine crd revision 3 board specific device tree. This is to register clocks conditionally by differentiating ADSP based platforms and legacy path platforms. Also disable lpass_core clock, as it is creating conflict with ADSP clocks and it is not required for ADSP based platforms. Signed-off-by: Srinivasa Rao Mandadapu Signed-off-by: Mohammad Rafi Shaik --- .../qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi index c02ca393378f..876a29178d46 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi @@ -197,6 +197,14 @@ q6prmcc: clock-controller { }; }; +&lpass_aon { + qcom,adsp-pil-mode; +}; + +&lpass_core { + status = "disabled"; +}; + &lpass_rx_macro { /delete-property/ power-domains; /delete-property/ power-domain-names; @@ -239,3 +247,7 @@ &lpass_va_macro { status = "okay"; }; + +&lpasscc { + qcom,adsp-pil-mode; +};